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authorMatthew Wahab <matthew.wahab@arm.com>2015-06-16 14:15:54 +0100
committerJiong Wang <jiong.wang@arm.com>2015-06-16 14:17:34 +0100
commitbdfa8b951ba38b15487eab2a754b9a33b9f29634 (patch)
treec0b24a1d5c5c8d134dff5aa91a10700ec2e3d02b /opcodes
parent56f4083249f4633084d4e8d89fc065e895f874cf (diff)
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[AArch64] Support id_mmfr4 system register
2015-06-16 Matthew Wahab <matthew.wahab@arm.com> opcodes/ * aarch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1". gas/testsuite * sysreg.d: Add id_mmfr4_el1, update expected output. * sysreg.s: Add id_mmfr4_el1.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/aarch64-opc.c1
2 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fe9134d..d76ad3b 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2015-06-16 Matthew Wahab <matthew.wahab@arm.com>
+
+ * arch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1".
+
2015-06-16 Szabolcs Nagy <szabolcs.nagy@arm.com>
* arm-dis.c (print_insn_coprocessor): Avoid negative shift.
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 5c7ef86..9880142 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -2772,6 +2772,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
{ "id_mmfr1_el1", CPENC(3,0,C0,C1,5), 0 }, /* RO */
{ "id_mmfr2_el1", CPENC(3,0,C0,C1,6), 0 }, /* RO */
{ "id_mmfr3_el1", CPENC(3,0,C0,C1,7), 0 }, /* RO */
+ { "id_mmfr4_el1", CPENC(3,0,C0,C2,6), 0 }, /* RO */
{ "id_isar0_el1", CPENC(3,0,C0,C2,0), 0 }, /* RO */
{ "id_isar1_el1", CPENC(3,0,C0,C2,1), 0 }, /* RO */
{ "id_isar2_el1", CPENC(3,0,C0,C2,2), 0 }, /* RO */