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| author | Jan Beulich <jbeulich@novell.com> | 2015-06-01 09:51:28 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2015-06-01 09:51:28 +0200 |
| commit | 3a8547d2fb5319890dda877fb313822053083c3a (patch) | |
| tree | 8c715e8520fd5e5f0cfb29e8596a4afb2b821e8e /opcodes | |
| parent | 015c54d5a6a052f074fab168bc70296131276e80 (diff) | |
| download | fsf-binutils-gdb-3a8547d2fb5319890dda877fb313822053083c3a.zip fsf-binutils-gdb-3a8547d2fb5319890dda877fb313822053083c3a.tar.gz fsf-binutils-gdb-3a8547d2fb5319890dda877fb313822053083c3a.tar.bz2 | |
x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand order
As pointed out before, the documentation mandates the rounding mode to
follow the GPR, so disassembler should produce output accordingly.
gas/testsuite/
2015-06-01 Jan Beulich <jbeulich@suse.com>
* gas/i386/avx512f.s: Adjust operand order for Intel syntax
vcvt{,u}si2ss.
* gas/i386/x86-64-avx512f.s: Adjust operand order for Intel
syntax vcvt{,u}si2s{d,s}.
opcodes/
2015-06-01 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (print_insn): Swap rounding mode specifier and
general purpose register in Intel mode.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 7 |
2 files changed, 12 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 648669c..4104df9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2015-06-01 Jan Beulich <jbeulich@suse.com> + * i386-dis.c (print_insn): Swap rounding mode specifier and + general purpose register in Intel mode. + +2015-06-01 Jan Beulich <jbeulich@suse.com> + * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}. * i386-tbl.h: Regenerate. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 76f3ead..767bab3 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -13224,6 +13224,13 @@ print_insn (bfd_vma pc, disassemble_info *info) for (i = 0; i < MAX_OPERANDS; ++i) op_txt[i] = op_out[i]; + if (intel_syntax && dp && dp->op[2].rtn == OP_Rounding + && dp->op[3].rtn == OP_E && dp->op[4].rtn == NULL) + { + op_txt[2] = op_out[3]; + op_txt[3] = op_out[2]; + } + for (i = 0; i < (MAX_OPERANDS >> 1); ++i) { op_ad = op_index[i]; |