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| author | Stafford Horne <shorne@gmail.com> | 2019-06-13 06:16:19 +0900 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2019-06-13 06:16:19 +0900 |
| commit | e4c4ac46e8e7ef92311181f85b193af369897151 (patch) | |
| tree | 9f942d2ed2f996caa17a32cedb033aafaea2bf52 /opcodes/or1k-dis.c | |
| parent | a2e4218f237dd1555249555f8be4165aa8e56b6a (diff) | |
| download | fsf-binutils-gdb-e4c4ac46e8e7ef92311181f85b193af369897151.zip fsf-binutils-gdb-e4c4ac46e8e7ef92311181f85b193af369897151.tar.gz fsf-binutils-gdb-e4c4ac46e8e7ef92311181f85b193af369897151.tar.bz2 | |
opcodes/or1k: Regenerate opcodes
This picks up changes for:
- new orfpx64a32 spec additions
- new unordered instructions
- symbol and documentation updates
opcodes/ChangeLog:
* or1k-asm.c: Regenerated.
* or1k-desc.c: Regenerated.
* or1k-desc.h: Regenerated.
* or1k-dis.c: Regenerated.
* or1k-ibld.c: Regenerated.
* or1k-opc.c: Regenerated.
* or1k-opc.h: Regenerated.
* or1k-opinst.c: Regenerated.
Diffstat (limited to 'opcodes/or1k-dis.c')
| -rw-r--r-- | opcodes/or1k-dis.c | 43 |
1 files changed, 41 insertions, 2 deletions
diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c index f14c56f..74bf38f 100644 --- a/opcodes/or1k-dis.c +++ b/opcodes/or1k-dis.c @@ -58,6 +58,27 @@ static int read_insn /* -- disassembler routines inserted here. */ +/* -- dis.c */ + +static void +print_regpair (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = dis_info; + char reg1_index; + char reg2_index; + + reg1_index = value & 0x1f; + reg2_index = reg1_index + ((value & (1 << 5)) ? 2 : 1); + + (*info->fprintf_func) (info->stream, "r%d,r%d", reg1_index, reg2_index); +} + +/* -- */ void or1k_cgen_print_operand (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); @@ -99,8 +120,14 @@ or1k_cgen_print_operand (CGEN_CPU_DESC cd, case OR1K_OPERAND_RA : print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r2, 0); break; + case OR1K_OPERAND_RAD32F : + print_regpair (cd, info, fields->f_rad32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); + break; case OR1K_OPERAND_RADF : - print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0); + print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r2, 0); + break; + case OR1K_OPERAND_RADI : + print_regpair (cd, info, fields->f_rad32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); break; case OR1K_OPERAND_RASF : print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r2, 0); @@ -108,8 +135,14 @@ or1k_cgen_print_operand (CGEN_CPU_DESC cd, case OR1K_OPERAND_RB : print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r3, 0); break; + case OR1K_OPERAND_RBD32F : + print_regpair (cd, info, fields->f_rbd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); + break; case OR1K_OPERAND_RBDF : - print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0); + print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r3, 0); + break; + case OR1K_OPERAND_RBDI : + print_regpair (cd, info, fields->f_rbd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); break; case OR1K_OPERAND_RBSF : print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r3, 0); @@ -117,9 +150,15 @@ or1k_cgen_print_operand (CGEN_CPU_DESC cd, case OR1K_OPERAND_RD : print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r1, 0); break; + case OR1K_OPERAND_RDD32F : + print_regpair (cd, info, fields->f_rdd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); + break; case OR1K_OPERAND_RDDF : print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0); break; + case OR1K_OPERAND_RDDI : + print_regpair (cd, info, fields->f_rdd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); + break; case OR1K_OPERAND_RDSF : print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r1, 0); break; |