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| author | Adam Nemet <anemet@caviumnetworks.com> | 2008-02-04 19:26:11 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@caviumnetworks.com> | 2008-02-04 19:26:11 +0000 |
| commit | 57b592a36d52809bbd3da9e517fabd2500cd7ee6 (patch) | |
| tree | abd597ad5b6a9358fcdbf2d3767e01cc0b6072a7 /opcodes/mips-opc.c | |
| parent | e642969943f894f3930ffc174cdf3e9bd75941ad (diff) | |
| download | fsf-binutils-gdb-57b592a36d52809bbd3da9e517fabd2500cd7ee6.zip fsf-binutils-gdb-57b592a36d52809bbd3da9e517fabd2500cd7ee6.tar.gz fsf-binutils-gdb-57b592a36d52809bbd3da9e517fabd2500cd7ee6.tar.bz2 | |
* mips-dis.c: Update copyright.
(mips_arch_choices): Add Octeon.
* mips-opc.c: Update copyright.
(IOCT): New macro.
(mips_builtin_opcodes): Add Octeon instruction synciobdma.
Diffstat (limited to 'opcodes/mips-opc.c')
| -rw-r--r-- | opcodes/mips-opc.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 746763b..b0f9d7e 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -1,6 +1,6 @@ /* mips-opc.c -- MIPS opcode list. Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 - 2003, 2004, 2005, 2007 Free Software Foundation, Inc. + 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc. Contributed by Ralph Campbell and OSF Commented and modified by Ian Lance Taylor, Cygnus Support Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc. @@ -121,6 +121,7 @@ #define N5 (INSN_5400 | INSN_5500) #define N54 INSN_5400 #define N55 INSN_5500 +#define IOCT INSN_OCTEON #define G1 (T3 \ ) @@ -1295,6 +1296,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I2 }, {"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2 }, {"synci", "o(b)", 0x041f0000, 0xfc1f0000, SM|RD_b, 0, I33 }, +{"synciobdma", "", 0x0000008f, 0xffffffff, INSN_SYNC, 0, IOCT }, {"syscall", "", 0x0000000c, 0xffffffff, TRAP, 0, I1 }, {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, 0, I1 }, {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, 0, I2 }, |