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| author | DJ Delorie <dj@redhat.com> | 2009-06-24 01:44:53 +0000 |
|---|---|---|
| committer | DJ Delorie <dj@redhat.com> | 2009-06-24 01:44:53 +0000 |
| commit | 378a0c07cab0852b72230e3a16a66d5d8108af51 (patch) | |
| tree | 51e39c616fe2d3aa9b57678edf36cc6aa15bed8a /opcodes/mep-opc.c | |
| parent | 3ef23cd420ae6184288546c48fba7bde9dccefed (diff) | |
| download | fsf-binutils-gdb-378a0c07cab0852b72230e3a16a66d5d8108af51.zip fsf-binutils-gdb-378a0c07cab0852b72230e3a16a66d5d8108af51.tar.gz fsf-binutils-gdb-378a0c07cab0852b72230e3a16a66d5d8108af51.tar.bz2 | |
[cgen]
* cpu/mep.opc (mep_cgen_insn_supported_asm): New, skip the short
version of BSR when assembling VLIW bundles. Use it in mep-asm.c
[opcodes]
* mep-asm.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
Diffstat (limited to 'opcodes/mep-opc.c')
| -rw-r--r-- | opcodes/mep-opc.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/opcodes/mep-opc.c b/opcodes/mep-opc.c index a9b09a5..aa6c093 100644 --- a/opcodes/mep-opc.c +++ b/opcodes/mep-opc.c @@ -163,6 +163,18 @@ mep_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) return (ok1 && ok2 && ok3); } + +int +mep_cgen_insn_supported_asm (CGEN_CPU_DESC cd, const CGEN_INSN *insn) +{ + /* If we're assembling VLIW packets, ignore the 12-bit BSR as we + can't relax that. The 24-bit BSR is matched instead. */ + if (insn->base->num == MEP_INSN_BSR12 + && cgen_bitset_contains (cd->isas, ISA_EXT_COP1_64)) + return 0; + + return mep_cgen_insn_supported (cd, insn); +} /* The hash functions are recorded here to help keep assembler code out of the disassembler and vice versa. */ |