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authorNick Clifton <nickc@redhat.com>2002-05-15 20:54:50 +0000
committerNick Clifton <nickc@redhat.com>2002-05-15 20:54:50 +0000
commita978a3e5d8dec1a24c0851ecf16e241f7a23f946 (patch)
treedf41ce89873e433333215fc9550a1d411a2ab157 /opcodes/m32r-dis.c
parentc899585bc7835ebb2c56947f13ebbfc7ea8e6b7d (diff)
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Regernate cgen built files.
Diffstat (limited to 'opcodes/m32r-dis.c')
-rw-r--r--opcodes/m32r-dis.c37
1 files changed, 33 insertions, 4 deletions
diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index 40d7679..07560e1 100644
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -563,11 +563,21 @@ default_print_insn (cd, pc, info)
Print one instruction from PC on INFO->STREAM.
Return the size of the instruction (in bytes). */
+typedef struct cpu_desc_list {
+ struct cpu_desc_list *next;
+ int isa;
+ int mach;
+ int endian;
+ CGEN_CPU_DESC cd;
+} cpu_desc_list;
+
int
print_insn_m32r (pc, info)
bfd_vma pc;
disassemble_info *info;
{
+ static cpu_desc_list *cd_list = 0;
+ cpu_desc_list *cl = 0;
static CGEN_CPU_DESC cd = 0;
static int prev_isa;
static int prev_mach;
@@ -598,18 +608,27 @@ print_insn_m32r (pc, info)
#ifdef CGEN_COMPUTE_ISA
isa = CGEN_COMPUTE_ISA (info);
#else
- isa = 0;
+ isa = info->insn_sets;
#endif
- /* If we've switched cpu's, close the current table and open a new one. */
+ /* If we've switched cpu's, try to find a handle we've used before */
if (cd
&& (isa != prev_isa
|| mach != prev_mach
|| endian != prev_endian))
{
- m32r_cgen_cpu_close (cd);
cd = 0;
- }
+ for (cl = cd_list; cl; cl = cl->next)
+ {
+ if (cl->isa == isa &&
+ cl->mach == mach &&
+ cl->endian == endian)
+ {
+ cd = cl->cd;
+ break;
+ }
+ }
+ }
/* If we haven't initialized yet, initialize the opcode table. */
if (! cd)
@@ -630,6 +649,16 @@ print_insn_m32r (pc, info)
CGEN_CPU_OPEN_END);
if (!cd)
abort ();
+
+ /* save this away for future reference */
+ cl = xmalloc (sizeof (struct cpu_desc_list));
+ cl->cd = cd;
+ cl->isa = isa;
+ cl->mach = mach;
+ cl->endian = endian;
+ cl->next = cd_list;
+ cd_list = cl;
+
m32r_cgen_init_dis (cd);
}