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| author | Jan Beulich <jbeulich@novell.com> | 2018-08-06 08:34:36 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2018-08-06 08:34:36 +0200 |
| commit | e968fc9b638e48a89e9a96804896c88a400e9be1 (patch) | |
| tree | 97070a96162acbc7f4bfae19b009731cab56eb16 /opcodes/i386-reg.tbl | |
| parent | b01474366f651f3ea3eed4038e1e0b37588d243d (diff) | |
| download | fsf-binutils-gdb-e968fc9b638e48a89e9a96804896c88a400e9be1.zip fsf-binutils-gdb-e968fc9b638e48a89e9a96804896c88a400e9be1.tar.gz fsf-binutils-gdb-e968fc9b638e48a89e9a96804896c88a400e9be1.tar.bz2 | |
x86: fold RegEip/RegRip and RegEiz/RegRiz
This allows to simplify the code in a number of places.
Diffstat (limited to 'opcodes/i386-reg.tbl')
| -rw-r--r-- | opcodes/i386-reg.tbl | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl index d0ce53f..b3cb539 100644 --- a/opcodes/i386-reg.tbl +++ b/opcodes/i386-reg.tbl @@ -283,14 +283,14 @@ bnd0, RegBND, 0, 0, Dw2Inval, Dw2Inval bnd1, RegBND, 0, 1, Dw2Inval, Dw2Inval bnd2, RegBND, 0, 2, Dw2Inval, Dw2Inval bnd3, RegBND, 0, 3, Dw2Inval, Dw2Inval -// No type will make these registers rejected for all purposes except +// No Reg will make these registers rejected for all purposes except // for addressing. This saves creating one extra type for RIP/EIP. -rip, BaseIndex, RegRex64, RegRip, Dw2Inval, 16 -eip, BaseIndex, RegRex64, RegEip, 8, Dw2Inval -// No type will make these registers rejected for all purposes except +rip, Qword, RegRex64, RegIP, Dw2Inval, 16 +eip, Dword, RegRex64, RegIP, 8, Dw2Inval +// No Reg will make these registers rejected for all purposes except // for addressing. -riz, BaseIndex, RegRex64, RegRiz, Dw2Inval, Dw2Inval -eiz, BaseIndex, 0, RegEiz, Dw2Inval, Dw2Inval +riz, Qword|BaseIndex, RegRex64, RegIZ, Dw2Inval, Dw2Inval +eiz, Dword|BaseIndex, 0, RegIZ, Dw2Inval, Dw2Inval // fp regs. st(0), FloatReg|Acc, 0, 0, 11, 33 st(1), FloatReg, 0, 1, 12, 34 |