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| author | Jan Beulich <jbeulich@suse.com> | 2021-04-26 10:37:30 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2021-04-26 10:37:30 +0200 |
| commit | fe134c656991cda74ab7bad80947930f666f8907 (patch) | |
| tree | eca41b24b1d7416e13375c9dc9685b1ebf5b5a4e /opcodes/i386-opc.tbl | |
| parent | b818855549013ba43e730e07f790e5cbfd16a757 (diff) | |
| download | fsf-binutils-gdb-fe134c656991cda74ab7bad80947930f666f8907.zip fsf-binutils-gdb-fe134c656991cda74ab7bad80947930f666f8907.tar.gz fsf-binutils-gdb-fe134c656991cda74ab7bad80947930f666f8907.tar.bz2 | |
x86: optimize LEA
Over the years I've seen a number of instances where people used
lea (%reg1), %reg2
or
lea symbol, %reg
despite the same thing being expressable via MOV. Since additionally
LEA often has restrictions towards the ports it can be issued to, while
MOV typically gets dealt with simply by register renaming, transform to
MOV when possible (without growing opcode size and without altering
involved relocation types).
Note that for Mach-O the new 64-bit testcases would fail (for
BFD_RELOC_X86_64_32S not having a representation), and hence get skipped
there.
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 0c35848..b0530e5 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -228,7 +228,7 @@ out, 0xe6, None, 0, W|No_sSuf|No_qSuf|No_ldSuf, { Imm8 } out, 0xee, None, 0, W|No_sSuf|No_qSuf|No_ldSuf, { InOutPortReg } // Load effective address. -lea, 0x8d, None, 0, Modrm|Anysize|No_bSuf|No_sSuf|No_ldSuf, { BaseIndex, Reg16|Reg32|Reg64 } +lea, 0x8d, None, 0, Modrm|Anysize|No_bSuf|No_sSuf|No_ldSuf|Optimize, { BaseIndex, Reg16|Reg32|Reg64 } // Load segment registers from memory. lds, 0xc5, None, CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { DWord|Fword|Unspecified|BaseIndex, Reg16|Reg32 } |