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| author | H.J. Lu <hjl.tools@gmail.com> | 2008-01-04 01:05:45 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2008-01-04 01:05:45 +0000 |
| commit | 3629bb00a8c7689af995272018df56e85b82f569 (patch) | |
| tree | 0e6760bb541f4c2304edb948374eac8b7128c613 /opcodes/i386-opc.h | |
| parent | 2e5168804d07f991ed4266d2447f2525a7e2cfa0 (diff) | |
| download | fsf-binutils-gdb-3629bb00a8c7689af995272018df56e85b82f569.zip fsf-binutils-gdb-3629bb00a8c7689af995272018df56e85b82f569.tar.gz fsf-binutils-gdb-3629bb00a8c7689af995272018df56e85b82f569.tar.bz2 | |
gas/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
(cpu_flags_not): Likewise.
(cpu_flags_match): Updated to check 64bit and arch.
(set_code_flag): Remove cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_begin): Likewise.
(parse_insn): Call cpu_flags_match to check 64bit and arch.
(match_template): Likewise.
gas/testsuite/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-9.d: New file.
* gas/i386/arch-9.s: Likewise.
* gas/i386/i386.exp: Run arch-9.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
CpuSSE4_2_Or_ABM.
(cpu_flags): Likewise.
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
(CpuSSE4_2_Or_ABM): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
and CpuPadLock, respectively.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.h')
| -rw-r--r-- | opcodes/i386-opc.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 43bdd64..70decfd 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -82,12 +82,8 @@ #define CpuSSE4_2 (CpuSSE4_1 + 1) /* SSE5 support required */ #define CpuSSE5 (CpuSSE4_2 + 1) -/* SSE4.1 or SSE5 support required */ -#define CpuSSE4_1_Or_5 (CpuSSE5 + 1) -/* SSE4.2 or ABM support required */ -#define CpuSSE4_2_Or_ABM (CpuSSE4_1_Or_5 + 1) /* 64bit support available, used by -march= in assembler. */ -#define CpuLM (CpuSSE4_2_Or_ABM + 1) +#define CpuLM (CpuSSE5 + 1) /* 64bit support required */ #define Cpu64 (CpuLM + 1) /* Not supported in the 64bit mode */ @@ -136,8 +132,6 @@ typedef union i386_cpu_flags unsigned int cpusse4_1:1; unsigned int cpusse4_2:1; unsigned int cpusse5:1; - unsigned int cpusse4_1_or_5:1; - unsigned int cpusse4_2_or_abm:1; unsigned int cpulm:1; unsigned int cpu64:1; unsigned int cpuno64:1; |