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author | H.J. Lu <hjl.tools@gmail.com> | 2013-10-12 15:57:07 +0000 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2013-10-12 15:57:07 +0000 |
commit | 6c75cc62a384293163d99dfb7782cb4b78cb4f1a (patch) | |
tree | 629ab71478824d086f50e5a4c58489dd3f0018ae /opcodes/i386-dis.c | |
parent | 44dcb735e4714c44813e4e16168b3121de601ad3 (diff) | |
download | fsf-binutils-gdb-6c75cc62a384293163d99dfb7782cb4b78cb4f1a.zip fsf-binutils-gdb-6c75cc62a384293163d99dfb7782cb4b78cb4f1a.tar.gz fsf-binutils-gdb-6c75cc62a384293163d99dfb7782cb4b78cb4f1a.tar.bz2 |
Only allow 32-bit/64-bit registers for bndcl/bndcu/bndcn
gas/testsuite/
* gas/i386/mpx.s: Remove bndcl/bndcu/bndcn tests with AX.
* gas/i386/x86-64-mpx.s: Likwise.
* gas/i386/mpx.d: Updated.
* gas/i386/x86-64-mpx.d: Likewise.
opcodes/
* i386-dis.c (intel_operand_size): Move v_bnd_mode alongside the
default case.
(OP_E_register): Move v_bnd_mode alongside m_mode.
* i386-opc.tbl (bndcl, bndcu, bndcn): Split 32- and 64-bit variants.
Drop Reg16 and Disp16. Add NoRex64.
(bndmk, bndmov, bndldx, bndstx): Drop Disp16.
* i386-tbl.h: Re-generate.
Diffstat (limited to 'opcodes/i386-dis.c')
-rw-r--r-- | opcodes/i386-dis.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 3eedac9..8e55724 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -13808,7 +13808,6 @@ intel_operand_size (int bytemode, int sizeflag) } /* FALLTHRU */ case v_mode: - case v_bnd_mode: case v_swap_mode: case dq_mode: USED_REX (REX_W); @@ -14090,6 +14089,7 @@ intel_operand_size (int bytemode, int sizeflag) abort (); oappend ("WORD PTR "); break; + case v_bnd_mode: default: break; } @@ -14129,6 +14129,7 @@ OP_E_register (int bytemode, int sizeflag) names = names64; break; case m_mode: + case v_bnd_mode: names = address_mode == mode_64bit ? names64 : names32; break; case bnd_mode: @@ -14143,7 +14144,6 @@ OP_E_register (int bytemode, int sizeflag) bytemode = v_mode; /* FALLTHRU */ case v_mode: - case v_bnd_mode: case v_swap_mode: case dq_mode: case dqb_mode: |