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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-20 23:56:30 +0300 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-23 15:58:18 +0300 |
| commit | ee6872beb1912af41a506c8aea34af7d2f873d04 (patch) | |
| tree | 608938241e7f350c09c13fcee234f5c89aebf687 /opcodes/i386-dis-evex.h | |
| parent | 8cfcb7659cb844dff00efbbb644c15b650fb7e8b (diff) | |
| download | fsf-binutils-gdb-ee6872beb1912af41a506c8aea34af7d2f873d04.zip fsf-binutils-gdb-ee6872beb1912af41a506c8aea34af7d2f873d04.tar.gz fsf-binutils-gdb-ee6872beb1912af41a506c8aea34af7d2f873d04.tar.bz2 | |
Enable Intel AVX512_BITALG instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gas/
* config/tc-i386.c (cpu_arch): Add .avx512_bitalg.
(cpu_noarch): noavx512_bitalg.
* doc/c-i386.texi: Document .avx512_bitalg, noavx512_bitalg.
* testsuite/gas/i386/i386.exp: Add AVX512_BITALG tests.
* testsuite/gas/i386/avx512f_bitalg-intel.d: New test.
* testsuite/gas/i386/avx512f_bitalg.d: Likewise.
* testsuite/gas/i386/avx512f_bitalg.s: Likewise.
* testsuite/gas/i386/avx512vl_bitalg-intel.d: Likewise.
* testsuite/gas/i386/avx512vl_bitalg.d: Likewise.
* testsuite/gas/i386/avx512vl_bitalg.s: Likewise.
* testsuite/gas/i386/x86-64-avx512f_bitalg-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512f_bitalg.d: Likewise.
* testsuite/gas/i386/x86-64-avx512f_bitalg.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_bitalg-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_bitalg.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_bitalg.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_EVEX_0F3854, PREFIX_EVEX_0F388F.
(enum): Add EVEX_W_0F3854_P_2.
* i386-dis-evex.h (evex_table): Updated.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BITALG,
CPU_ANY_AVX512_BITALG_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
(cpu_flags): Add CpuAVX512_BITALG.
* i386-opc.h (enum): Add CpuAVX512_BITALG.
(i386_cpu_flags): Add cpuavx512_bitalg..
* i386-opc.tbl: Add Intel AVX512_BITALG instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-dis-evex.h')
| -rw-r--r-- | opcodes/i386-dis-evex.h | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index 467a2d3..9e062d0 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -389,7 +389,7 @@ static const struct dis386 evex_table[][256] = { { PREFIX_TABLE (PREFIX_EVEX_0F3851) }, { PREFIX_TABLE (PREFIX_EVEX_0F3852) }, { PREFIX_TABLE (PREFIX_EVEX_0F3853) }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_0F3854) }, { PREFIX_TABLE (PREFIX_EVEX_0F3855) }, { Bad_Opcode }, { Bad_Opcode }, @@ -455,7 +455,7 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { PREFIX_TABLE (PREFIX_EVEX_0F388D) }, { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_0F388F) }, /* 90 */ { PREFIX_TABLE (PREFIX_EVEX_0F3890) }, { PREFIX_TABLE (PREFIX_EVEX_0F3891) }, @@ -2031,6 +2031,12 @@ static const struct dis386 evex_table[][256] = { { "vpdpwssds", { XM, Vex, EXx }, 0 }, { "vp4dpwssds", { XM, Vex, EXxmm }, 0 }, }, + /* PREFIX_EVEX_0F3854 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (EVEX_W_0F3854_P_2) }, + }, /* PREFIX_EVEX_0F3855 */ { { Bad_Opcode }, @@ -2217,6 +2223,12 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { VEX_W_TABLE (EVEX_W_0F388D_P_2) }, }, + /* PREFIX_EVEX_0F388F */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vpshufbitqmb", { XMask, Vex, EXx }, 0 }, + }, /* PREFIX_EVEX_0F3890 */ { { Bad_Opcode }, @@ -3703,6 +3715,11 @@ static const struct dis386 evex_table[][256] = { { "vpmulld", { XM, Vex, EXx }, 0 }, { "vpmullq", { XM, Vex, EXx }, 0 }, }, + /* EVEX_W_0F3854_P_2 */ + { + { "vpopcntb", { XM, EXx }, 0 }, + { "vpopcntw", { XM, EXx }, 0 }, + }, /* EVEX_W_0F3855_P_2 */ { { "vpopcntd", { XM, EXx }, 0 }, |