diff options
author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2019-07-14 14:45:31 +0200 |
---|---|---|
committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2019-07-14 14:45:31 +0200 |
commit | 92434a14b97bf07546701613a16aaf4d8a3b3eca (patch) | |
tree | e60ab4f22c2660c51d887ff4c23aaf965c34df0f /opcodes/bpf-opc.c | |
parent | da73816739483bac537403262cef1c460e43319f (diff) | |
download | fsf-binutils-gdb-92434a14b97bf07546701613a16aaf4d8a3b3eca.zip fsf-binutils-gdb-92434a14b97bf07546701613a16aaf4d8a3b3eca.tar.gz fsf-binutils-gdb-92434a14b97bf07546701613a16aaf4d8a3b3eca.tar.bz2 |
cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructions
The eBPF non-generic load instructions ldind{b,h,w,dw} and
ldabs{b,h,w,dw} do not take an explicit destination register as an
argument. Instead, they put the loaded value in %r0, implicitly.
This patch fixes the CPU BPF description to not expect a 'dst'
argument in these arguments, regenerates the corresponding files in
opcodes, and updates the impacted GAS tests.
Tested in a x86-64 host.
cpu/ChangeLog:
2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf.cpu (dlsi): ldabs and ldind instructions do not take an
explicit 'dst' argument.
opcodes/ChangeLog:
2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf-desc.c: Regenerate.
* bpf-opc.c: Likewise.
gas/ChangeLog:
2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/mem.s: Do not use explicit arguments for
ldabs and ldind instructions.
* testsuite/gas/bpf/mem.d: Updated accordingly.
* testsuite/gas/bpf/mem-be.d: Likewise.
Diffstat (limited to 'opcodes/bpf-opc.c')
-rw-r--r-- | opcodes/bpf-opc.c | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index bb00ba8..4a36cb9 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -792,100 +792,100 @@ static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (DSTBE), ',', OP (IMM64), 0 } }, & ifmt_lddwbe, { 0x18 } }, -/* ldabsw $dstle,$srcle,$imm32 */ +/* ldabsw $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x20 } }, -/* ldabsh $dstle,$srcle,$imm32 */ +/* ldabsh $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x28 } }, -/* ldabsb $dstle,$srcle,$imm32 */ +/* ldabsb $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x30 } }, -/* ldabsdw $dstle,$srcle,$imm32 */ +/* ldabsdw $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x38 } }, -/* ldindw $dstle,$srcle,$imm32 */ +/* ldindw $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x40 } }, -/* ldindh $dstle,$srcle,$imm32 */ +/* ldindh $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x48 } }, -/* ldindb $dstle,$srcle,$imm32 */ +/* ldindb $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x50 } }, -/* ldinddw $dstle,$srcle,$imm32 */ +/* ldinddw $srcle,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, & ifmt_ldabswle, { 0x58 } }, -/* ldabsw $dstbe,$srcbe,$imm32 */ +/* ldabsw $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x20 } }, -/* ldabsh $dstbe,$srcbe,$imm32 */ +/* ldabsh $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x28 } }, -/* ldabsb $dstbe,$srcbe,$imm32 */ +/* ldabsb $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x30 } }, -/* ldabsdw $dstbe,$srcbe,$imm32 */ +/* ldabsdw $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x38 } }, -/* ldindw $dstbe,$srcbe,$imm32 */ +/* ldindw $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x40 } }, -/* ldindh $dstbe,$srcbe,$imm32 */ +/* ldindh $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x48 } }, -/* ldindb $dstbe,$srcbe,$imm32 */ +/* ldindb $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x50 } }, -/* ldinddw $dstbe,$srcbe,$imm32 */ +/* ldinddw $srcbe,$imm32 */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } }, + { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, & ifmt_ldabswbe, { 0x58 } }, /* ldxw $dstle,[$srcle+$offset16] */ |