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| author | Alan Modra <amodra@gmail.com> | 2020-01-20 12:31:58 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-01-20 15:45:50 +1030 |
| commit | 2bddb71a7421213dd9d8b8f2db133b43f5e1357e (patch) | |
| tree | fcad008cb31d002d4d2289e904fca5d7494711ea /opcodes/arm-dis.c | |
| parent | cf1d9e092f871df3b34a58cfcde915c689ac9067 (diff) | |
| download | fsf-binutils-gdb-2bddb71a7421213dd9d8b8f2db133b43f5e1357e.zip fsf-binutils-gdb-2bddb71a7421213dd9d8b8f2db133b43f5e1357e.tar.gz fsf-binutils-gdb-2bddb71a7421213dd9d8b8f2db133b43f5e1357e.tar.bz2 | |
ubsan: arm: out of bounds array access
.inst 0x81bdfe9f
disassembles as
0: 81bdfe9f ldaexdhi pc, reg-names-std, [sp]
I'm quite sure "reg-names-std" isn't an ARM register.
* arm-dis.c (print_insn_arm): Wrap 'T' value.
Diffstat (limited to 'opcodes/arm-dis.c')
| -rw-r--r-- | opcodes/arm-dis.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index c986b58..be2a932 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -10106,7 +10106,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) case 'T': /* We want register + 1 when decoding T. */ if (*c == 'T') - ++value; + value = (value + 1) & 0xf; if (c[1] == 'u') { |