diff options
| author | Jiong Wang <jiong.wang@arm.com> | 2014-09-03 14:40:41 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2014-09-03 14:53:53 +0100 |
| commit | ee804238f097e91088a340c15891170f2748b4fd (patch) | |
| tree | 22d92253b206d824681e73039fe861f8d20ec8df /opcodes/aarch64-dis.c | |
| parent | 97ea6506c45ab5519483a0221fdc049038496492 (diff) | |
| download | fsf-binutils-gdb-ee804238f097e91088a340c15891170f2748b4fd.zip fsf-binutils-gdb-ee804238f097e91088a340c15891170f2748b4fd.tar.gz fsf-binutils-gdb-ee804238f097e91088a340c15891170f2748b4fd.tar.bz2 | |
[PATCH/AArch64] Implement LSE feature
2014-09-03 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.c (parse_operands): Recognize PAIRREG.
(aarch64_features): Add entry for lse extension.
include/opcode/
* aarch64.h (AARCH64_FEATURE_LSE): New feature added.
(aarch64_opnd): Add AARCH64_OPND_PAIRREG.
(aarch64_insn_class): Add lse_atomic.
(F_LSE_SZ): New field added.
(opcode_has_special_coder): Recognize F_LSE_SZ.
opcode/
* aarch64-tbl.h (QL_R4NIL): New qualifiers.
(aarch64_feature_lse): New feature added.
(LSE): New Added.
(aarch64_opcode_table): New LSE instructions added. Improve
descriptions for ldarb/ldarh/ldar.
(aarch64_opcode_table): Describe PAIRREG.
* aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
* aarch64-opc.c (fields): Add entry for F_LSE_SZ.
(aarch64_print_operand): Recognize PAIRREG.
(operand_general_constraint_met_p): Check reg pair constraints for CASP
instructions.
* aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
(do_special_decoding): Recognize F_LSE_SZ.
* aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
gas/testsuite/
* gas/aarch64/lse-atomic.d: New.
* gas/aarch64/lse-atomic.s: Likewise.
* gas/aarch64/illegal-lse.d: Likewise.
* gas/aarch64/illegal-lse.l: Likewise.
* gas/aarch64/illegal-lse.s: Likewise.
* gas/aarch64/diagnostic.s: Check processor feature detect for lse
instruction.
* gas/aarch64/diagnostic.l: Likewise.
Diffstat (limited to 'opcodes/aarch64-dis.c')
| -rw-r--r-- | opcodes/aarch64-dis.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index c3670fe..589fa84 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -224,6 +224,17 @@ aarch64_ext_regno (const aarch64_operand *self, aarch64_opnd_info *info, return 1; } +int +aarch64_ext_regno_pair (const aarch64_operand *self ATTRIBUTE_UNUSED, aarch64_opnd_info *info, + const aarch64_insn code ATTRIBUTE_UNUSED, + const aarch64_inst *inst ATTRIBUTE_UNUSED) +{ + assert (info->idx == 1 + || info->idx ==3); + info->reg.regno = inst->operands[info->idx - 1].reg.regno + 1; + return 1; +} + /* e.g. IC <ic_op>{, <Xt>}. */ int aarch64_ext_regrt_sysins (const aarch64_operand *self, aarch64_opnd_info *info, @@ -1360,6 +1371,13 @@ do_special_decoding (aarch64_inst *inst) && extract_field (FLD_N, inst->value, 0) != value) return 0; } + /* 'sf' field. */ + if (inst->opcode->flags & F_LSE_SZ) + { + idx = select_operand_for_sf_field_coding (inst->opcode); + value = extract_field (FLD_lse_sz, inst->value, 0); + inst->operands[idx].qualifier = get_greg_qualifier_from_value (value); + } /* size:Q fields. */ if (inst->opcode->flags & F_SIZEQ) return decode_sizeq (inst); |