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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-05 20:50:18 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-05 20:50:18 +0000 |
| commit | 68a642838267d9971f77f9eb487d32044a499c82 (patch) | |
| tree | 9687f65166a0f885332088bec9166d438007c5d3 /opcodes/aarch64-dis.c | |
| parent | 4e50d5f863090d22db5ce0ec1e7d9e075806fd91 (diff) | |
| download | fsf-binutils-gdb-68a642838267d9971f77f9eb487d32044a499c82.zip fsf-binutils-gdb-68a642838267d9971f77f9eb487d32044a499c82.tar.gz fsf-binutils-gdb-68a642838267d9971f77f9eb487d32044a499c82.tar.bz2 | |
gas/
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
gas/testsuite/
* gas/aarch64/alias.s: Add tests.
* gas/aarch64/alias.d: Update.
* gas/aarch64/no-aliases.d: Update.
* gas/aarch64/diagnostic.s: Add tests.
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/illegal.s: Add tests.
* gas/aarch64/illegal.l: Update.
include/opcode/
* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
(enum aarch64_opnd): Add AARCH64_OPND_COND1.
opcodes/
* aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'.
(convert_from_csel): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1.
(aarch64_print_operand): Handle AARCH64_OPND_COND1.
* aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
COND for cinc, cset, cinv, csetm and cneg.
(AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1.
* aarch64-asm-2.c: Re-generated.
* aarch64-dis-2.c: Ditto.
* aarch64-opc-2.c: Ditto.
Diffstat (limited to 'opcodes/aarch64-dis.c')
| -rw-r--r-- | opcodes/aarch64-dis.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index c403be8..c11f78f 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -1601,12 +1601,14 @@ convert_ubfm_to_lsl (aarch64_inst *inst) /* CINC <Wd>, <Wn>, <cond> is equivalent to: - CSINC <Wd>, <Wn>, <Wn>, invert(<cond>). */ + CSINC <Wd>, <Wn>, <Wn>, invert(<cond>) + where <cond> is not AL or NV. */ static int convert_from_csel (aarch64_inst *inst) { - if (inst->operands[1].reg.regno == inst->operands[2].reg.regno) + if (inst->operands[1].reg.regno == inst->operands[2].reg.regno + && (inst->operands[3].cond->value & 0xe) != 0xe) { copy_operand_info (inst, 2, 3); inst->operands[2].cond = get_inverted_cond (inst->operands[3].cond); @@ -1618,13 +1620,15 @@ convert_from_csel (aarch64_inst *inst) /* CSET <Wd>, <cond> is equivalent to: - CSINC <Wd>, WZR, WZR, invert(<cond>). */ + CSINC <Wd>, WZR, WZR, invert(<cond>) + where <cond> is not AL or NV. */ static int convert_csinc_to_cset (aarch64_inst *inst) { if (inst->operands[1].reg.regno == 0x1f - && inst->operands[2].reg.regno == 0x1f) + && inst->operands[2].reg.regno == 0x1f + && (inst->operands[3].cond->value & 0xe) != 0xe) { copy_operand_info (inst, 1, 3); inst->operands[1].cond = get_inverted_cond (inst->operands[3].cond); |