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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-11-27 15:02:26 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-11-27 15:05:09 +0000 |
| commit | 35822b3812f74319dfad28876d37645589b83a80 (patch) | |
| tree | d43a1073d6c7e3c1dcf236a29452fa07f33e8047 /opcodes/aarch64-dis.c | |
| parent | 805035d70cd8637c169caf97800accdd267d1d8e (diff) | |
| download | fsf-binutils-gdb-35822b3812f74319dfad28876d37645589b83a80.zip fsf-binutils-gdb-35822b3812f74319dfad28876d37645589b83a80.tar.gz fsf-binutils-gdb-35822b3812f74319dfad28876d37645589b83a80.tar.bz2 | |
[AArch64] Let aliased instructions be their preferred form.
Although the AArch64 backend supports aliased instructions, the aliasing
forms are always preferred over the real instruction. This makes it
awkward to handle instructions which have aliases but which are their
own preferred form.
This patch includes the instruction being aliased in the list of
alternatives which is searched when considering which form to use.
opcodes/
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-dis.c: Weaken assert.
* aarch64-gen.c: Include the instruction in the list of its
possible aliases.
Change-Id: I1f23eb25fccef76a64d3d732d58761bd25fad94e
Diffstat (limited to 'opcodes/aarch64-dis.c')
| -rw-r--r-- | opcodes/aarch64-dis.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 93766c6..d744c25 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -1866,7 +1866,7 @@ determine_disassembling_preference (struct aarch64_inst *inst) for (; alias; alias = aarch64_find_next_alias_opcode (alias)) { DEBUG_TRACE ("try %s", alias->name); - assert (alias_opcode_p (alias)); + assert (alias_opcode_p (alias) || opcode_has_alias (opcode)); /* An alias can be a pseudo opcode which will never be used in the disassembly, e.g. BIC logical immediate is such a pseudo opcode |