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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 20:15:13 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 20:15:37 +0000 |
| commit | 3dd032c5fb4eb7fc6bc0341d348da5c75e2d8e38 (patch) | |
| tree | f8ceee98b93206d0fc7b4180e361dbfa461800b7 /opcodes/aarch64-asm.c | |
| parent | 01a4d0822025084609380fb989d43bda0667db72 (diff) | |
| download | fsf-binutils-gdb-3dd032c5fb4eb7fc6bc0341d348da5c75e2d8e38.zip fsf-binutils-gdb-3dd032c5fb4eb7fc6bc0341d348da5c75e2d8e38.tar.gz fsf-binutils-gdb-3dd032c5fb4eb7fc6bc0341d348da5c75e2d8e38.tar.bz2 | |
aarch64: [SME] Add SME mode selection and state access instructions
This patch is adding new SME mode selection and state access instructions:
* Add SMSTART and SMSTOP instructions.
* Add SVCR system register.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_sm_za): New parser.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-8-illegal.d: New test.
* testsuite/gas/aarch64/sme-8-illegal.l: New test.
* testsuite/gas/aarch64/sme-8-illegal.s: New test.
* testsuite/gas/aarch64/sme-8.d: New test.
* testsuite/gas/aarch64/sme-8.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_SM_ZA.
(enum aarch64_insn_class): New instruction classes
sme_start and sme_stop.
opcodes/ChangeLog:
* aarch64-asm.c (aarch64_ins_pstatefield): New inserter.
(aarch64_ins_sme_sm_za): New inserter.
* aarch64-dis.c (aarch64_ext_imm): New extractor.
(aarch64_ext_pstatefield): New extractor.
(aarch64_ext_sme_sm_za): New extractor.
* aarch64-opc.c (operand_general_constraint_met_p):
New pstatefield value for SME instructions.
(aarch64_print_operand): Printout for OPND_SME_SM_ZA.
(SR_SME): New register SVCR.
* aarch64-opc.h (F_REG_IN_CRM): New register endcoding.
* aarch64-opc.h (F_IMM_IN_CRM): New immediate endcoding.
(PSTATE_ENCODE_CRM): Encode CRm field.
(PSTATE_DECODE_CRM): Decode CRm field.
(PSTATE_ENCODE_CRM_IMM): Encode CRm immediate field.
(PSTATE_DECODE_CRM_IMM): Decode CRm immediate field.
(PSTATE_ENCODE_CRM_AND_IMM): Encode CRm and immediate
field.
* aarch64-tbl.h (struct aarch64_opcode): New SMSTART
and SMSTOP instructions.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Diffstat (limited to 'opcodes/aarch64-asm.c')
| -rw-r--r-- | opcodes/aarch64-asm.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index a2b0e86..b9aff95 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -848,6 +848,10 @@ aarch64_ins_pstatefield (const aarch64_operand *self ATTRIBUTE_UNUSED, /* op1:op2 */ insert_fields (code, info->pstatefield, inst->opcode->mask, 2, FLD_op2, FLD_op1); + + /* Extra CRm mask. */ + if (info->sysreg.flags | F_REG_IN_CRM) + insert_field (FLD_CRm, code, PSTATE_DECODE_CRM (info->sysreg.flags), 0); return true; } @@ -1427,6 +1431,27 @@ aarch64_ins_sme_addr_ri_u4xvl (const aarch64_operand *self, return true; } +/* Encode in SMSTART and SMSTOP {SM | ZA } mode. */ +bool +aarch64_ins_sme_sm_za (const aarch64_operand *self, + const aarch64_opnd_info *info, + aarch64_insn *code, + const aarch64_inst *inst ATTRIBUTE_UNUSED, + aarch64_operand_error *errors ATTRIBUTE_UNUSED) +{ + aarch64_insn fld_crm; + /* Set CRm[3:1] bits. */ + if (info->reg.regno == 's') + fld_crm = 0x02 ; /* SVCRSM. */ + else if (info->reg.regno == 'z') + fld_crm = 0x04; /* SVCRZA. */ + else + assert (0); + + insert_field (self->fields[0], code, fld_crm, 0); + return true; +} + /* Miscellaneous encoding functions. */ /* Encode size[0], i.e. bit 22, for |