diff options
| author | Jan Beulich <jbeulich@novell.com> | 2011-10-06 09:22:58 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@novell.com> | 2011-10-06 09:22:58 +0000 |
| commit | 989993d80a97a66f24c22a34ae9f28d9cd7387ca (patch) | |
| tree | 2728542978c1fe8ba53cb52467168081593fd354 /opcodes/ChangeLog | |
| parent | 07c7ed6d7740dab37ec36a4a736bb2c550c99e86 (diff) | |
| download | fsf-binutils-gdb-989993d80a97a66f24c22a34ae9f28d9cd7387ca.zip fsf-binutils-gdb-989993d80a97a66f24c22a34ae9f28d9cd7387ca.tar.gz fsf-binutils-gdb-989993d80a97a66f24c22a34ae9f28d9cd7387ca.tar.bz2 | |
gas/testsuite/
2011-09-28 Jan Beulich <jbeulich@suse.com>
* gas/ppc/476.s: Fix lswi first operand.
* gas/ppc/476.d: Adjust expected output.
* gas/ppc/a2.s: Fix lswi first operand.
* gas/ppc/a2.d: Adjust expected output.
* gas/ppc/power6.s: Fix lfdpx first operand.
* gas/ppc/power6.d: Adjust expected output.
opcodes/
2011-09-28 Jan Beulich <jbeulich@suse.com>
* ppc-opc.c (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX,
RBX): New.
(insert_bo, insert_boe): Reject bcctr with bit 2 in bo unset.
(powerpc_opcodes): Use RAX for second and RBXC for third operand of
lswx. Use NBI for third operand of lswi. Use FRTp for first operand of
lfdp and lfdpx. Use FRSp for first operand of stfdp and stfdpx, and
mark them as invalid on POWER7. Use FRTp, FRAp, and FRBp repsectively
on DFP quad instructions.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 051f52a..49d6e54 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,14 @@ +2011-09-28 Jan Beulich <jbeulich@suse.com> + + * ppc-opc.c (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX, + RBX): New. + (insert_bo, insert_boe): Reject bcctr with bit 2 in bo unset. + (powerpc_opcodes): Use RAX for second and RBXC for third operand of + lswx. Use NBI for third operand of lswi. Use FRTp for first operand of + lfdp and lfdpx. Use FRSp for first operand of stfdp and stfdpx, and + mark them as invalid on POWER7. Use FRTp, FRAp, and FRBp repsectively + on DFP quad instructions. + 2011-09-27 David S. Miller <davem@davemloft.net> * sparc-opc.c (sparc_opcodes): Fix random instruction to write |