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| author | Alan Modra <amodra@gmail.com> | 2007-11-06 03:59:16 +0000 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2007-11-06 03:59:16 +0000 |
| commit | b7fcf6f6bb53b5027e111107f5416769cb9a5798 (patch) | |
| tree | 51bad855a952144d6c62fe89a44c32b3a1e0fd65 /ld | |
| parent | c63eb11c7b1158d190360c84612999fea444e0af (diff) | |
| download | fsf-binutils-gdb-b7fcf6f6bb53b5027e111107f5416769cb9a5798.zip fsf-binutils-gdb-b7fcf6f6bb53b5027e111107f5416769cb9a5798.tar.gz fsf-binutils-gdb-b7fcf6f6bb53b5027e111107f5416769cb9a5798.tar.bz2 | |
bfd/
* elf32-ppc.c (ppc_elf_check_relocs): Don't refcount tlsld_got here..
(ppc_elf_gc_sweep_hook): ..or here..
(ppc_elf_tls_optimize): ..or here. Make two passes through the
relocs, ensuring that tls_get_addr calls follow gd and ld relocs.
(allocate_dynrelocs): Refcount tlsld_got here.
(ppc_elf_size_dynamic_sections): Call allocate_dynrelocs before
allocating tlsld_got.
(ppc_elf_relocate_section): Remove check that a tls_get_addr
call follows gd and ld relocs.
ld/testsuite/
* ld-powerpc/tlsso32.d: Update for changed got alloc order.
Diffstat (limited to 'ld')
| -rw-r--r-- | ld/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | ld/testsuite/ld-powerpc/tlsso32.d | 14 |
2 files changed, 11 insertions, 7 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index cf588d5..fd417c0 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2007-11-06 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/tlsso32.d: Update for changed got alloc order. + 2007-11-05 Alan Modra <amodra@bigpond.net.au> * ld-elf/merge3.d, ld-elf/merge3.s: Delete. diff --git a/ld/testsuite/ld-powerpc/tlsso32.d b/ld/testsuite/ld-powerpc/tlsso32.d index 731c568..b4e45d8 100644 --- a/ld/testsuite/ld-powerpc/tlsso32.d +++ b/ld/testsuite/ld-powerpc/tlsso32.d @@ -9,30 +9,30 @@ Disassembly of section \.text: .* <_start>: -.*: 38 7f ff e8 addi r3,r31,-24 -.*: 48 00 00 01 bl .* .*: 38 7f ff e0 addi r3,r31,-32 .*: 48 00 00 01 bl .* -.*: 38 7f ff f0 addi r3,r31,-16 +.*: 38 7f ff f4 addi r3,r31,-12 +.*: 48 00 00 01 bl .* +.*: 38 7f ff e8 addi r3,r31,-24 .*: 48 01 01 95 bl .*<__tls_get_addr@plt> -.*: 38 7f ff e0 addi r3,r31,-32 +.*: 38 7f ff f4 addi r3,r31,-12 .*: 48 01 01 8d bl .*<__tls_get_addr@plt> .*: 39 23 80 20 addi r9,r3,-32736 .*: 3d 23 00 00 addis r9,r3,0 .*: 81 49 80 24 lwz r10,-32732\(r9\) -.*: 81 3f ff f8 lwz r9,-8\(r31\) +.*: 81 3f ff f0 lwz r9,-16\(r31\) .*: 7d 49 12 2e lhzx r10,r9,r2 .*: 89 42 00 00 lbz r10,0\(r2\) .*: 3d 22 00 00 addis r9,r2,0 .*: 99 49 00 00 stb r10,0\(r9\) .*: 38 7e ff d8 addi r3,r30,-40 .*: 48 00 00 01 bl .* -.*: 38 7e ff e0 addi r3,r30,-32 +.*: 38 7e ff f4 addi r3,r30,-12 .*: 48 00 00 01 bl .* .*: 91 43 80 04 stw r10,-32764\(r3\) .*: 3d 23 00 00 addis r9,r3,0 .*: 91 49 80 08 stw r10,-32760\(r9\) -.*: 81 3e ff f8 lwz r9,-8\(r30\) +.*: 81 3e ff f0 lwz r9,-16\(r30\) .*: 7d 49 13 2e sthx r10,r9,r2 .*: a1 42 00 00 lhz r10,0\(r2\) .*: 3d 22 00 00 addis r9,r2,0 |