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authorTrevor Smigiel <Trevor_Smigiel@playstation.sony.com>2009-07-24 19:51:27 +0000
committerTrevor Smigiel <Trevor_Smigiel@playstation.sony.com>2009-07-24 19:51:27 +0000
commit8fdcc58daafe1153d2edf18a2f106d2b247e1f01 (patch)
tree12dd0108e2284f8bcf70a761b5e6dcae9f60d7bf /ld
parent309d33736f82fece9dbeae7a4ba096cdc2d77753 (diff)
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include/elf/
* spu.h (R_SPU_ADD_PIC): New. bfd/ * reloc.c (BFD_RELOC_SPU_ADD_PIC): Define. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-spu.c (elf_howto_table): Add entries SPU_ADD_PIC. (spu_elf_bfd_to_reloc_type): Handle SPU_ADD_PIC. (spu_elf_relocate_section): Patch instructions marked by SPU_ADD_PIC. gas/ * config/tc-spu.c (md_apply_fix): Handle SPU_ADD_PIC. * config/tc-spu.h (tc_fix_adjustable): Don't adjust for SPU_ADD_PIC. (TC_FORCE_RELOCATION): Emit relocs for SPU_ADD_PIC. ld/testsuite/ * ld-spu/pic.d: New. * ld-spu/pic.s: New. * ld-spu/picdef.s: New.
Diffstat (limited to 'ld')
-rw-r--r--ld/testsuite/ChangeLog7
-rw-r--r--ld/testsuite/ld-spu/pic.d105
-rw-r--r--ld/testsuite/ld-spu/pic.s68
-rw-r--r--ld/testsuite/ld-spu/picdef.s5
4 files changed, 185 insertions, 0 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index c50a807..97f94cd 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2009-07-24 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
+ Alan Modra <amodra@bigpond.net.au>
+
+ * ld-spu/pic.d: New.
+ * ld-spu/pic.s: New.
+ * ld-spu/picdef.s: New.
+
2009-07-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10434
diff --git a/ld/testsuite/ld-spu/pic.d b/ld/testsuite/ld-spu/pic.d
new file mode 100644
index 0000000..87edc1d
--- /dev/null
+++ b/ld/testsuite/ld-spu/pic.d
@@ -0,0 +1,105 @@
+#source: pic.s
+#source: picdef.s
+#ld: --emit-relocs
+#objdump: -D -r
+
+.*elf32-spu
+
+
+Disassembly of section \.text:
+
+00000000 <before>:
+ \.\.\.
+
+00000008 <_start>:
+ 8: 42 00 08 02 ila \$2,10 <_start\+0x8>
+ 8: SPU_ADDR18 \.text\+0x10
+ c: 33 00 00 fe brsl \$126,10 <_start\+0x8>
+ c: SPU_REL16 \.text\+0x10
+ 10: 08 1f 81 7e sf \$126,\$2,\$126
+ 14: 42 00 02 04 ila \$4,4 <before\+0x4>
+ 14: SPU_ADDR18 \.text\+0x4
+ 18: 42 00 42 05 ila \$5,84 <end>
+ 18: SPU_ADDR18 \.text\+0x84
+ 1c: 42 00 04 06 ila \$6,8 <_start>
+ 1c: SPU_ADDR18 _start
+ 20: 42 00 42 07 ila \$7,84 <end>
+ 20: SPU_ADDR18 \.text\+0x84
+ 24: 18 1f 82 04 a \$4,\$4,\$126
+ 24: SPU_ADD_PIC before\+0x4
+ 28: 18 1f 82 85 a \$5,\$5,\$126
+ 28: SPU_ADD_PIC after\+0xfffffffc
+ 2c: 18 1f 83 06 a \$6,\$6,\$126
+ 2c: SPU_ADD_PIC _start
+ 30: 18 1f 83 87 a \$7,\$7,\$126
+ 30: SPU_ADD_PIC end
+ 34: 42 00 00 0e ila \$14,0
+ 34: SPU_ADDR18 \.text
+ 38: 18 1f 87 0e a \$14,\$14,\$126
+ 38: SPU_ADD_PIC before
+ 3c: 42 00 00 03 ila \$3,0
+ 3c: SPU_ADDR18 undef
+ 40: 1c 00 01 83 ai \$3,\$3,0
+ 40: SPU_ADD_PIC undef
+ 44: 41 00 00 07 ilhu \$7,0
+ 44: SPU_ADDR16_HI ext
+ 48: 60 ab 3c 07 iohl \$7,22136 # 5678
+ 48: SPU_ADDR16_LO ext
+ 4c: 18 1f 83 84 a \$4,\$7,\$126
+ 4c: SPU_ADD_PIC ext
+ 50: 42 00 80 09 ila \$9,100 <loc>
+ 50: SPU_ADDR18 \.data
+ 54: 18 1f 84 85 a \$5,\$9,\$126
+ 54: SPU_ADD_PIC loc
+ 58: 42 00 88 08 ila \$8,110 <glob>
+ 58: SPU_ADDR18 glob
+ 5c: 18 1f 84 06 a \$6,\$8,\$126
+ 5c: SPU_ADD_PIC glob
+ 60: 42 00 90 09 ila \$9,120 <__bss_start>
+ 60: SPU_ADDR18 _end
+ 64: 18 1f 84 89 a \$9,\$9,\$126
+ 64: SPU_ADD_PIC _end
+ 68: 12 02 39 85 hbrr 7c <acall>,1234 <abscall> # 1234
+ 68: SPU_REL16 abscall
+ 6c: 33 ff f2 82 lqr \$2,0 <before>
+ 6c: SPU_REL16 undef
+ 70: 23 ff f2 02 stqr \$2,0 <before>
+ 70: SPU_REL16 undef
+ 74: 33 8a c0 83 lqr \$3,5678 <ext> # 5678
+ 74: SPU_REL16 ext
+ 78: 33 8a c2 04 lqr \$4,5688 <ext\+0x10> # 5688
+ 78: SPU_REL16 ext\+0x10
+
+0000007c <acall>:
+ 7c: 33 02 37 00 brsl \$0,1234 <abscall> # 1234
+ 7c: SPU_REL16 abscall
+ 80: 32 02 36 80 br 1234 <abscall> # 1234
+ 80: SPU_REL16 abscall
+
+00000084 <end>:
+ 84: 00 00 00 00 stop
+
+00000088 <after>:
+ 88: 00 00 00 00 stop
+
+Disassembly of section \.data:
+
+00000100 <loc>:
+ 100: 00 00 00 01 stop
+ \.\.\.
+
+00000110 <glob>:
+ 110: 00 00 00 02 stop
+ \.\.\.
+
+Disassembly of section \.note\.spu_name:
+
+00000000 <\.note\.spu_name>:
+.*
+.*
+.*
+.*
+.*
+.*
+.*
+#pass
diff --git a/ld/testsuite/ld-spu/pic.s b/ld/testsuite/ld-spu/pic.s
new file mode 100644
index 0000000..67ee7bc
--- /dev/null
+++ b/ld/testsuite/ld-spu/pic.s
@@ -0,0 +1,68 @@
+ .global _end
+ .global _start
+ .global glob
+ .weak undef
+
+ .section .text.a,"ax"
+before:
+ .long 0
+ .long 0
+
+ .section .text.b,"ax"
+_start:
+ ila 2,.+8
+ brsl 126,.+4
+ sf 126,2,126
+ ila 4,before+4
+ ila 5,after-4
+ ila 6,_start
+ ila 7,end
+ .reloc .,SPU_ADD_PIC,before+4
+ a 4,4,126
+ .reloc .,SPU_ADD_PIC,after-4
+ a 5,5,126
+ .reloc .,SPU_ADD_PIC,_start
+ a 6,6,126
+ .reloc .,SPU_ADD_PIC,end
+ a 7,7,126
+ ila 14,before
+ .reloc .,SPU_ADD_PIC,before
+ a 14,14,126
+
+ ila 3,undef
+ .reloc .,SPU_ADD_PIC,undef
+ a 3,3,126
+ ilhu 7,ext@h
+ iohl 7,ext@l
+ .reloc .,SPU_ADD_PIC,ext
+ a 4,7,126
+ ila 9,loc
+ .reloc .,SPU_ADD_PIC,loc
+ a 5,9,126
+ ila 8,glob
+ .reloc .,SPU_ADD_PIC,glob
+ a 6,8,126
+ ila 9,_end
+ .reloc .,SPU_ADD_PIC,_end
+ a 9,9,126
+
+ hbrr acall,abscall
+ lqr 2,undef
+ stqr 2,undef
+ lqr 3,ext
+ lqr 4,ext+16
+acall:
+ brsl 0,abscall
+ br abscall
+end:
+
+ .section .text.c,"ax"
+ .long 0
+after:
+ .long 0
+
+ .data
+loc:
+ .long 1,0,0,0
+glob:
+ .long 2,0,0,0
diff --git a/ld/testsuite/ld-spu/picdef.s b/ld/testsuite/ld-spu/picdef.s
new file mode 100644
index 0000000..4df3e4b
--- /dev/null
+++ b/ld/testsuite/ld-spu/picdef.s
@@ -0,0 +1,5 @@
+ .global abscall
+ .global ext
+
+abscall = 0x1234
+ext = 0x5678