bfd/

	* bfd-in.h (bfd_h8300_pad_address): Declare.
	* bfd-in2.h: Regenerate.
	* cpu-h8300.c (bfd_h8300_pad_address): New function.
	* coff-h8300.c (h8300_reloc16_estimate): Use it to canonicalize
	addresses before checking whether they can be relaxed.
	(h8300_reloc16_extra_cases): Likewise for the R_MOVL2 sanity check.
	Don't complain about overflows in general 8-bit relocations.
	* elf32-h8300.c (elf32_h8_relax_section): Use bfd_h8300_pad_address.
	Fix handling of R_H8_DIR24A8.

ld/testsuite/
	* ld-h8300/relax-3{.s,.d,-coff.d}: New test.
	* ld-h8300/h8300.exp: Run it.

5 files changed, 103 insertions, 0 deletions

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 21fb9d2..e267928 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2003-07-11  Richard Sandiford  <rsandifo@redhat.com>
+
+	* ld-h8300/relax-3{.s,.d,-coff.d}: New test.
+	* ld-h8300/h8300.exp: Run it.
+
 2003-07-10  Alan Modra  <amodra@bigpond.net.au>
 
 	* ld-powerpc/powerpc.exp: Dump output .got section rather than .toc.
diff --git a/ld/testsuite/ld-h8300/h8300.exp b/ld/testsuite/ld-h8300/h8300.exp
index af457ab..5390961 100644
--- a/ld/testsuite/ld-h8300/h8300.exp
+++ b/ld/testsuite/ld-h8300/h8300.exp
@@ -28,4 +28,7 @@ run_dump_test relax
 
 if {[istarget *-elf]} {
     run_dump_test relax-2
+    run_dump_test relax-3
+} else {
+    run_dump_test relax-3-coff
 }
diff --git a/ld/testsuite/ld-h8300/relax-3-coff.d b/ld/testsuite/ld-h8300/relax-3-coff.d
new file mode 100644
index 0000000..49a68cf
--- /dev/null
+++ b/ld/testsuite/ld-h8300/relax-3-coff.d
@@ -0,0 +1,32 @@
+# name: H8300 Relaxation Test 3
+# source: relax-3.s
+# ld: --relax -m h8300s
+# objdump: -d --no-show-raw-insn
+
+.*:     file format .*-h8300
+
+Disassembly of section .text:
+
+00000100 <_start>:
+#
+# Relaxation of aa:16
+#
+.*:	6a 08 00 00 * mov.b	@0x0:16,r0l
+.*:	6a 08 7f ff * mov.b	@0x7fff:16,r0l
+.*:	6a 08 80 00 * mov.b	@0x8000:16,r0l
+.*:	6a 08 fe ff * mov.b	@0xfeff:16,r0l
+.*:	28 00       * mov.b	@0x0:8,r0l
+.*:	28 ff       * mov.b	@0xff:8,r0l
+#
+# Relaxation of aa:32
+#
+.*:	6a 08 00 00 * mov.b	@0x0:16,r0l
+.*:	6a 08 7f ff * mov.b	@0x7fff:16,r0l
+.*:	6a 28 00 00 80 00 * mov.b	@0x8000:32,r0l
+.*:	6a 28 00 00 ff 00 * mov.b	@0xff00:32,r0l
+.*:	6a 28 00 ff ff 00 * mov.b	@0xffff00:32,r0l
+.*:	6a 28 ff ff 7f ff * mov.b	@0xffff7fff:32,r0l
+.*:	6a 08 80 00 * mov.b	@0x8000:16,r0l
+.*:	6a 08 fe ff * mov.b	@0xfeff:16,r0l
+.*:	28 00       * mov.b	@0x0:8,r0l
+.*:	28 ff       * mov.b	@0xff:8,r0l
diff --git a/ld/testsuite/ld-h8300/relax-3.d b/ld/testsuite/ld-h8300/relax-3.d
new file mode 100644
index 0000000..eb14f6e
--- /dev/null
+++ b/ld/testsuite/ld-h8300/relax-3.d
@@ -0,0 +1,31 @@
+# name: H8300 Relaxation Test 3
+# ld: --relax -m h8300self
+# objdump: -d --no-show-raw-insn
+
+.*:     file format .*-h8300
+
+Disassembly of section .text:
+
+00000100 <_start>:
+#
+# Relaxation of aa:16
+#
+.*:	6a 08 00 00 * mov.b	@0x0:16,r0l
+.*:	6a 08 7f ff * mov.b	@0x7fff:16,r0l
+.*:	6a 08 80 00 * mov.b	@0x8000:16,r0l
+.*:	6a 08 fe ff * mov.b	@0xfeff:16,r0l
+.*:	28 00       * mov.b	@0x0:8,r0l
+.*:	28 ff       * mov.b	@0xff:8,r0l
+#
+# Relaxation of aa:32
+#
+.*:	6a 08 00 00 * mov.b	@0x0:16,r0l
+.*:	6a 08 7f ff * mov.b	@0x7fff:16,r0l
+.*:	6a 28 00 00 80 00 * mov.b	@0x8000:32,r0l
+.*:	6a 28 00 00 ff 00 * mov.b	@0xff00:32,r0l
+.*:	6a 28 00 ff ff 00 * mov.b	@0xffff00:32,r0l
+.*:	6a 28 ff ff 7f ff * mov.b	@0xffff7fff:32,r0l
+.*:	6a 08 80 00 * mov.b	@0x8000:16,r0l
+.*:	6a 08 fe ff * mov.b	@0xfeff:16,r0l
+.*:	28 00       * mov.b	@0x0:8,r0l
+.*:	28 ff       * mov.b	@0xff:8,r0l
diff --git a/ld/testsuite/ld-h8300/relax-3.s b/ld/testsuite/ld-h8300/relax-3.s
new file mode 100644
index 0000000..f4a2346
--- /dev/null
+++ b/ld/testsuite/ld-h8300/relax-3.s
@@ -0,0 +1,32 @@
+	.h8300s
+	.globl	_start
+_start:
+	# s3-s6 aren't valid 16-bit addresses.
+	mov.b	@s1:16,r0l
+	mov.b	@s2:16,r0l
+	mov.b	@s7:16,r0l
+	mov.b	@s8:16,r0l
+	mov.b	@s9:16,r0l
+	mov.b	@s10:16,r0l
+
+	mov.b	@s1:32,r0l
+	mov.b	@s2:32,r0l
+	mov.b	@s3:32,r0l
+	mov.b	@s4:32,r0l
+	mov.b	@s5:32,r0l
+	mov.b	@s6:32,r0l
+	mov.b	@s7:32,r0l
+	mov.b	@s8:32,r0l
+	mov.b	@s9:32,r0l
+	mov.b	@s10:32,r0l
+
+	.equ	s1,0
+	.equ	s2,0x7fff
+	.equ	s3,0x8000
+	.equ	s4,0xff00
+	.equ	s5,0xffff00
+	.equ	s6,0xffff7fff
+	.equ	s7,0xffff8000
+	.equ	s8,0xfffffeff
+	.equ	s9,0xffffff00
+	.equ	s10,0xffffffff