aboutsummaryrefslogtreecommitdiff
path: root/ld
diff options
context:
space:
mode:
authorDenis Chertykov <chertykov@gmail.com>2016-06-09 19:00:57 +0300
committerDenis Chertykov <chertykov@gmail.com>2016-06-09 19:00:57 +0300
commit1857fe72aff6f254217956d141bff4b9ca454bc5 (patch)
tree85738760d7e2c8810e930388514e7a293482bed2 /ld
parent337c570c5f4442459d3324c9429ad80840094015 (diff)
downloadfsf-binutils-gdb-1857fe72aff6f254217956d141bff4b9ca454bc5.zip
fsf-binutils-gdb-1857fe72aff6f254217956d141bff4b9ca454bc5.tar.gz
fsf-binutils-gdb-1857fe72aff6f254217956d141bff4b9ca454bc5.tar.bz2
Print symbol names in comments for LDS/STS disassembly.
This patch adds default data address space origin (0x800000) to the symbol addresses. when disassemble lds/sts instructions. So that symbol names shall be printed in comments for lds/sts instructions disassemble. ld/ * testsuite/ld-avr/lds-mega.d: New test. * testsuite/ld-avr/lds-mega.s: New test source. * testsuite/ld-avr/lds-tiny.d: New test. * testsuite/ld-avr/lds-tiny.s: New test source. opcodes/ * avr-dis.c (avr_operand): Add default data address space origin (0x800000) to the address and set as symbol address for LDS/ STS immediate operands.
Diffstat (limited to 'ld')
-rw-r--r--ld/ChangeLog6
-rw-r--r--ld/testsuite/ld-avr/lds-mega.d23
-rw-r--r--ld/testsuite/ld-avr/lds-mega.s20
-rw-r--r--ld/testsuite/ld-avr/lds-tiny.d18
-rw-r--r--ld/testsuite/ld-avr/lds-tiny.s14
5 files changed, 81 insertions, 0 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 1e28252..cbb98e3 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,9 @@
+2016-06-09 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+ * testsuite/ld-avr/lds-mega.d: New test.
+ * testsuite/ld-avr/lds-mega.s: New test source.
+ * testsuite/ld-avr/lds-tiny.d: New test.
+ * testsuite/ld-avr/lds-tiny.s: New test source.
+
2016-06-08 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-x86-64/tls.exp (run_cc_link_tests): Update test
diff --git a/ld/testsuite/ld-avr/lds-mega.d b/ld/testsuite/ld-avr/lds-mega.d
new file mode 100644
index 0000000..078bf73
--- /dev/null
+++ b/ld/testsuite/ld-avr/lds-mega.d
@@ -0,0 +1,23 @@
+#name: AVR (avr51) check disassembly if symbolic name present
+#as: -mavr51
+#ld: -mavr51
+#source: lds-mega.s
+#objdump: -d
+#target: avr-*-*
+
+.*: file format elf32-avr
+
+
+Disassembly of section .text:
+
+00000000 <main>:
+ 0: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <_edata>
+ 4: 08 2e mov r0, r24
+ 6: 00 0c add r0, r0
+ 8: 99 0b sbc r25, r25
+ a: 90 93 03 01 sts 0x0103, r25 ; 0x800103 <myvar2\+0x1>
+ e: 80 93 02 01 sts 0x0102, r24 ; 0x800102 <myvar2>
+ 12: 80 e0 ldi r24, 0x00 ; 0
+ 14: 90 e0 ldi r25, 0x00 ; 0
+ 16: 08 95 ret
+
diff --git a/ld/testsuite/ld-avr/lds-mega.s b/ld/testsuite/ld-avr/lds-mega.s
new file mode 100644
index 0000000..6f6e0df
--- /dev/null
+++ b/ld/testsuite/ld-avr/lds-mega.s
@@ -0,0 +1,20 @@
+ .file "lds-mega.s"
+__tmp_reg__ = 0
+ .text
+.global main
+ .type main, @function
+main:
+.L__stack_usage = 0
+ lds r24,256
+ mov __tmp_reg__,r24
+ lsl r0
+ sbc r25,r25
+ sts myvar2+1,r25
+ sts myvar2,r24
+ ldi r24,0
+ ldi r25,0
+ ret
+ .size main, .-main
+ .comm myvar2,2,1
+ .comm myvar1,2,1
+
diff --git a/ld/testsuite/ld-avr/lds-tiny.d b/ld/testsuite/ld-avr/lds-tiny.d
new file mode 100644
index 0000000..405546a
--- /dev/null
+++ b/ld/testsuite/ld-avr/lds-tiny.d
@@ -0,0 +1,18 @@
+#name: AVR (avrtiny) check disassembly if symbolic name present
+#as: -mavrtiny
+#ld: -mavrtiny
+#objdump: -d
+#source: lds-tiny.s
+#target: avr-*-*
+
+.*: file format elf32-avr
+
+
+Disassembly of section .text:
+
+00000000 <main>:
+ 0: 20 a1 lds r18, 0x40 ; 0x800040 <_edata>
+ 2: 42 a1 lds r20, 0x42 ; 0x800042 <myvar2\+0x1>
+ 4: 53 a1 lds r21, 0x43 ; 0x800043 <_end>
+ 6: 08 95 ret
+
diff --git a/ld/testsuite/ld-avr/lds-tiny.s b/ld/testsuite/ld-avr/lds-tiny.s
new file mode 100644
index 0000000..5e34141
--- /dev/null
+++ b/ld/testsuite/ld-avr/lds-tiny.s
@@ -0,0 +1,14 @@
+ .file "lds-tiny.s"
+ .text
+.global main
+ .type main, @function
+main:
+.L__stack_usage = 0
+ lds r18, 0x40
+ lds r20, 0x42
+ lds r21, 0x43
+ ret
+ .size main, .-main
+ .comm myvar1,1,1
+ .comm myvar2,2,1
+