diff options
author | Alan Modra <amodra@gmail.com> | 2011-07-14 03:28:22 +0000 |
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committer | Alan Modra <amodra@gmail.com> | 2011-07-14 03:28:22 +0000 |
commit | 9df0ef5fe7ecd8bd8dc591ea3bdb2d3fb089d710 (patch) | |
tree | abefb750fcd256c0732b34ed5f67fe7be4d836f2 /ld | |
parent | fb42df5ed908e2bb9ce52a389981ea8b1c97cdf8 (diff) | |
download | fsf-binutils-gdb-9df0ef5fe7ecd8bd8dc591ea3bdb2d3fb089d710.zip fsf-binutils-gdb-9df0ef5fe7ecd8bd8dc591ea3bdb2d3fb089d710.tar.gz fsf-binutils-gdb-9df0ef5fe7ecd8bd8dc591ea3bdb2d3fb089d710.tar.bz2 |
bfd/
* elf64-ppc.c (struct ppc_link_hash_table): Add plt_static_chain.
(build_plt_stub): Add plt_static_chain param, don't load r11 if false.
(build_tls_get_addr_stub): Likewise.
(ppc_build_one_stub): Update calls to above.
(ppc_size_one_stub): Adjust stub size.
(ppc64_elf_size_stubs): Add plt_static_chain param, save to htab.
* elf64-ppc.h (ppc64_elf_size_stubs): Update prototype.
ld/
* emultempl/ppc64elf.em (plt_static_chain): New var.
(gld${EMULATION_NAME}_after_allocation): Pass to ppc64_elf_size_stubs.
(PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS,
PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle
--plt-static-chain and --no-plt-static-chain.
ld/testsuite/
* ld-powerpc/tlsexe.d, * ld-powerpc/tlsexe.g. *ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g,
* ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.d,
* ld-powerpc/tlstocso.d: Update for plt stub change.
Diffstat (limited to 'ld')
-rw-r--r-- | ld/ChangeLog | 8 | ||||
-rw-r--r-- | ld/emultempl/ppc64elf.em | 25 | ||||
-rw-r--r-- | ld/testsuite/ChangeLog | 7 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsexe.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsexe.g | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsexe.r | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsexetoc.d | 6 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsexetoc.g | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsexetoc.r | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsso.d | 14 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlstocso.d | 10 |
11 files changed, 57 insertions, 25 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog index a14588d..69510b1 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,5 +1,13 @@ 2011-07-14 Alan Modra <amodra@gmail.com> + * emultempl/ppc64elf.em (plt_static_chain): New var. + (gld${EMULATION_NAME}_after_allocation): Pass to ppc64_elf_size_stubs. + (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, + PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle + --plt-static-chain and --no-plt-static-chain. + +2011-07-14 Alan Modra <amodra@gmail.com> + * emultempl/elf32.em (gld${EMULATION_NAME}_add_options, gld${EMULATION_NAME}_handle_option, gld${EMULATION_NAME}_list_options): Provide --build-id, -z defs, -z muldefs, -z max-page-size, diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em index 0c99592..a57861b 100644 --- a/ld/emultempl/ppc64elf.em +++ b/ld/emultempl/ppc64elf.em @@ -61,6 +61,9 @@ static int no_multi_toc = 0; /* Whether to sort input toc and got sections. */ static int no_toc_sort = 0; +/* Set if PLT call stubs should load r11. */ +static int plt_static_chain = 0; + /* Whether to emit symbols for stubs. */ static int emit_stub_syms = -1; @@ -500,7 +503,7 @@ gld${EMULATION_NAME}_after_allocation (void) einfo ("%P: .init/.fini fragments use differing TOC pointers\n"); /* Call into the BFD backend to do the real work. */ - if (!ppc64_elf_size_stubs (&link_info, group_size)) + if (!ppc64_elf_size_stubs (&link_info, group_size, plt_static_chain)) einfo ("%X%P: can not size stub section: %E\n"); } } @@ -651,7 +654,9 @@ fi # PARSE_AND_LIST_PROLOGUE=' #define OPTION_STUBGROUP_SIZE 301 -#define OPTION_STUBSYMS (OPTION_STUBGROUP_SIZE + 1) +#define OPTION_PLT_STATIC_CHAIN (OPTION_STUBGROUP_SIZE + 1) +#define OPTION_NO_PLT_STATIC_CHAIN (OPTION_PLT_STATIC_CHAIN + 1) +#define OPTION_STUBSYMS (OPTION_NO_PLT_STATIC_CHAIN + 1) #define OPTION_NO_STUBSYMS (OPTION_STUBSYMS + 1) #define OPTION_DOTSYMS (OPTION_NO_STUBSYMS + 1) #define OPTION_NO_DOTSYMS (OPTION_DOTSYMS + 1) @@ -666,6 +671,8 @@ PARSE_AND_LIST_PROLOGUE=' PARSE_AND_LIST_LONGOPTS=' { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE }, + { "plt-static-chain", no_argument, NULL, OPTION_PLT_STATIC_CHAIN }, + { "no-plt-static-chain", no_argument, NULL, OPTION_NO_PLT_STATIC_CHAIN }, { "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS }, { "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS }, { "dotsyms", no_argument, NULL, OPTION_DOTSYMS }, @@ -691,6 +698,12 @@ PARSE_AND_LIST_OPTIONS=' choose suitable defaults.\n" )); fprintf (file, _("\ + --plt-static-chain PLT call stubs should load r11.\n" + )); + fprintf (file, _("\ + --no-plt-static-chain PLT call stubs should not load r11. (default)\n" + )); + fprintf (file, _("\ --emit-stub-syms Label linker stubs with a symbol.\n" )); fprintf (file, _("\ @@ -739,6 +752,14 @@ PARSE_AND_LIST_ARGS_CASES=' } break; + case OPTION_PLT_STATIC_CHAIN: + plt_static_chain = 1; + break; + + case OPTION_NO_PLT_STATIC_CHAIN: + plt_static_chain = 0; + break; + case OPTION_STUBSYMS: emit_stub_syms = 1; break; diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 64c2d10..60b57ed 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2011-07-14 Alan Modra <amodra@gmail.com> + + * ld-powerpc/tlsexe.d, * ld-powerpc/tlsexe.g. *ld-powerpc/tlsexe.r, + * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, + * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.d, + * ld-powerpc/tlstocso.d: Update for plt stub change. + 2011-07-11 Catherine Moore <clm@cm00re.com> * ld-scripts/section-flags-1.s: New. diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d index 54db23d..aa1595e 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.d +++ b/ld/testsuite/ld-powerpc/tlsexe.d @@ -21,7 +21,6 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 48 ld r11,-32696\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 58 ld r11,-32680\(r2\) .* e8 42 80 50 ld r2,-32688\(r2\) .* 4e 80 04 21 bctrl .* e9 61 00 20 ld r11,32\(r1\) @@ -34,7 +33,7 @@ Disassembly of section \.text: .* 60 00 00 00 nop .* 7c 63 6a 14 add r3,r3,r13 .* 38 62 80 18 addi r3,r2,-32744 -.* 4b ff ff a5 bl .* +.* 4b ff ff a9 bl .* .* 60 00 00 00 nop .* 3c 6d 00 00 addis r3,r13,0 .* 60 00 00 00 nop @@ -68,7 +67,6 @@ Disassembly of section \.text: .* e9 4d 90 2a lwa r10,-28632\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* a9 49 90 30 lha r10,-28624\(r9\) -.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 00 .* .* <__glink_PLTresolve>: diff --git a/ld/testsuite/ld-powerpc/tlsexe.g b/ld/testsuite/ld-powerpc/tlsexe.g index c68175f..558f39f 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.g +++ b/ld/testsuite/ld-powerpc/tlsexe.g @@ -7,6 +7,6 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 10018618 ffffffff ffff8018 .* +.* 00000000 10018610 ffffffff ffff8018 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlsexe.r b/ld/testsuite/ld-powerpc/tlsexe.r index 68b36bb..264e891 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.r +++ b/ld/testsuite/ld-powerpc/tlsexe.r @@ -16,7 +16,7 @@ Section Headers: +\[[ 0-9]+\] \.dynstr +.* +\[[ 0-9]+\] \.rela\.dyn +.* +\[[ 0-9]+\] \.rela\.plt +.* - +\[[ 0-9]+\] \.text +PROGBITS .* 0+130 0+ +AX +0 +0 +8 + +\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +8 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8 diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d index 8354e2d..2b8ce24 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.d +++ b/ld/testsuite/ld-powerpc/tlsexetoc.d @@ -21,7 +21,6 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 70 ld r11,-32656\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 80 ld r11,-32640\(r2\) .* e8 42 80 78 ld r2,-32648\(r2\) .* 4e 80 04 21 bctrl .* e9 61 00 20 ld r11,32\(r1\) @@ -31,10 +30,10 @@ Disassembly of section \.text: .* <_start>: .* 38 62 80 08 addi r3,r2,-32760 -.* 4b ff ff b1 bl .* +.* 4b ff ff b5 bl .* .* 60 00 00 00 nop .* 38 62 80 18 addi r3,r2,-32744 -.* 4b ff ff a5 bl .* +.* 4b ff ff a9 bl .* .* 60 00 00 00 nop .* 3c 6d 00 00 addis r3,r13,0 .* 60 00 00 00 nop @@ -52,7 +51,6 @@ Disassembly of section \.text: .* 89 4d 90 60 lbz r10,-28576\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 90 68 stb r10,-28568\(r9\) -.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 28 .* .* <__glink_PLTresolve>: diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.g b/ld/testsuite/ld-powerpc/tlsexetoc.g index 387e9cd..5056886 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.g +++ b/ld/testsuite/ld-powerpc/tlsexetoc.g @@ -7,7 +7,7 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 100185b0 00000000 00000000 .* +.* 00000000 100185a8 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000001 .* .* 00000000 00000000 00000000 00000001 .* diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.r b/ld/testsuite/ld-powerpc/tlsexetoc.r index 8ba8503..ab65fe3 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.r +++ b/ld/testsuite/ld-powerpc/tlsexetoc.r @@ -16,7 +16,7 @@ Section Headers: +\[[ 0-9]+\] \.dynstr +.* +\[[ 0-9]+\] \.rela\.dyn +.* +\[[ 0-9]+\] \.rela\.plt +.* - +\[[ 0-9]+\] \.text +PROGBITS .* 0+f0 0+ +AX +0 +0 +8 + +\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +8 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8 diff --git a/ld/testsuite/ld-powerpc/tlsso.d b/ld/testsuite/ld-powerpc/tlsso.d index 4a3b045..a5d28e5 100644 --- a/ld/testsuite/ld-powerpc/tlsso.d +++ b/ld/testsuite/ld-powerpc/tlsso.d @@ -12,22 +12,21 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 78 ld r11,-32648\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 88 ld r11,-32632\(r2\) .* e8 42 80 80 ld r2,-32640\(r2\) .* 4e 80 04 20 bctr .* <_start>: .* 38 62 80 20 addi r3,r2,-32736 -.* 4b ff ff e5 bl .* +.* 4b ff ff e9 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 50 addi r3,r2,-32688 -.* 4b ff ff d9 bl .* +.* 4b ff ff dd bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 38 addi r3,r2,-32712 -.* 4b ff ff cd bl .* +.* 4b ff ff d1 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 50 addi r3,r2,-32688 -.* 4b ff ff c1 bl .* +.* 4b ff ff c5 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 39 23 80 40 addi r9,r3,-32704 .* 3d 23 00 00 addis r9,r3,0 @@ -40,10 +39,10 @@ Disassembly of section \.text: .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 00 00 stb r10,0\(r9\) .* 38 62 80 08 addi r3,r2,-32760 -.* 4b ff ff 8d bl .* +.* 4b ff ff 91 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 50 addi r3,r2,-32688 -.* 4b ff ff 81 bl .* +.* 4b ff ff 85 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* f9 43 80 08 std r10,-32760\(r3\) .* 3d 23 00 00 addis r9,r3,0 @@ -55,6 +54,7 @@ Disassembly of section \.text: .* e9 4d 00 02 lwa r10,0\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* a9 49 00 00 lha r10,0\(r9\) +.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 20 .* .* <__glink_PLTresolve>: diff --git a/ld/testsuite/ld-powerpc/tlstocso.d b/ld/testsuite/ld-powerpc/tlstocso.d index 0b84311..cf9cd08 100644 --- a/ld/testsuite/ld-powerpc/tlstocso.d +++ b/ld/testsuite/ld-powerpc/tlstocso.d @@ -12,22 +12,21 @@ Disassembly of section \.text: .* f8 41 00 28 std r2,40\(r1\) .* e9 62 80 70 ld r11,-32656\(r2\) .* 7d 69 03 a6 mtctr r11 -.* e9 62 80 80 ld r11,-32640\(r2\) .* e8 42 80 78 ld r2,-32648\(r2\) .* 4e 80 04 20 bctr .* <_start>: .* 38 62 80 08 addi r3,r2,-32760 -.* 4b ff ff e5 bl .* +.* 4b ff ff e9 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 18 addi r3,r2,-32744 -.* 4b ff ff d9 bl .* +.* 4b ff ff dd bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 28 addi r3,r2,-32728 -.* 4b ff ff cd bl .* +.* 4b ff ff d1 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 38 62 80 38 addi r3,r2,-32712 -.* 4b ff ff c1 bl .* +.* 4b ff ff c5 bl .* .* e8 41 00 28 ld r2,40\(r1\) .* 39 23 80 40 addi r9,r3,-32704 .* 3d 23 00 00 addis r9,r3,0 @@ -39,6 +38,7 @@ Disassembly of section \.text: .* 89 4d 00 00 lbz r10,0\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 00 00 stb r10,0\(r9\) +.* 60 00 00 00 nop .* 00 00 00 00 .* .* 00 01 02 18 .* .* <__glink_PLTresolve>: |