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| author | Alan Modra <amodra@gmail.com> | 2013-11-01 19:25:56 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2013-11-04 10:21:32 +1030 |
| commit | 52a82034ac9a288d2d8e60efa880623288b5d228 (patch) | |
| tree | a1563eb868c979d4a8885798d64a36a9f7bb187a /ld/testsuite | |
| parent | a345bc8d317a159e3e887632d80c5a8282d34f07 (diff) | |
| download | fsf-binutils-gdb-52a82034ac9a288d2d8e60efa880623288b5d228.zip fsf-binutils-gdb-52a82034ac9a288d2d8e60efa880623288b5d228.tar.gz fsf-binutils-gdb-52a82034ac9a288d2d8e60efa880623288b5d228.tar.bz2 | |
Edit ELFv2 global entry prologue to non-PIC
Changing addis r2,r12,..; addi r2,r2,.. to lis r2,..; addi r2,r2..
in non-PIC executables has the benefit of removing a dependency on r12.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Edit global entry
prologue to non-PIC in non-PIC executables.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry.
Diffstat (limited to 'ld/testsuite')
| -rw-r--r-- | ld/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | ld/testsuite/ld-powerpc/elfv2exe.d | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 01175a5..38192f2 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2013-11-04 Alan Modra <amodra@gmail.com> + * ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry. + +2013-11-04 Alan Modra <amodra@gmail.com> + * ld-elfvers/vers24.rd: Allow extra readelf output after symbol visibility. * ld-ifunc/ifunc.exp: Likewise. diff --git a/ld/testsuite/ld-powerpc/elfv2exe.d b/ld/testsuite/ld-powerpc/elfv2exe.d index 50d4685..7ff9d38 100644 --- a/ld/testsuite/ld-powerpc/elfv2exe.d +++ b/ld/testsuite/ld-powerpc/elfv2exe.d @@ -20,8 +20,8 @@ Disassembly of section \.text: .*: (20 04 80 4e|4e 80 04 20) bctr 0+100000e0 <_start>: -.*: (02 00 4c 3c|3c 4c 00 02) addis r2,r12,2 -.*: (60 80 42 38|38 42 80 60) addi r2,r2,-32672 +.*: (02 10 40 3c|3c 40 10 02) lis r2,4098 +.*: (40 81 42 38|38 42 81 40) addi r2,r2,-32448 .*: (a6 02 08 7c|7c 08 02 a6) mflr r0 .*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\) .*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\) |