x86-64: Add R_X86_64_CODE_4_GOTPCRELX

For

	mov        name@GOTPCREL(%rip), %reg
	test       %reg, name@GOTPCREL(%rip)
	binop      name@GOTPCREL(%rip), %reg

where binop is one of adc, add, add, cmp, or, sbb, sub, xor instructions,
add

 # define R_X86_64_CODE_4_GOTPCRELX  43

if the instruction starts at 4 bytes before the relocation offset.  It
similar to R_X86_64_GOTPCRELX.  Linker can treat R_X86_64_CODE_4_GOTPCRELX
as R_X86_64_GOTPCREL or convert the above instructions to

	lea	name(%rip), %reg
	mov	$name, %reg
	test	$name, %reg
	binop	$name, %reg

if the instruction is encoded with the REX2 prefix when possible.

bfd/

	* elf64-x86-64.c (x86_64_elf_howto_table): Add
	R_X86_64_CODE_4_GOTPCRELX.
	(R_X86_64_standard): Updated.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX.
	(elf_x86_64_convert_load_reloc): Handle R_X86_64_CODE_4_GOTPCRELX.
	(elf_x86_64_scan_relocs): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	* reloc.c (bfd_reloc_code_real): Add
	BFD_RELOC_X86_64_CODE_4_GOTPCRELX.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* write.h (fix): Add fx_tcbit3.  Change fx_unused to 1 bit.
	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_X86_64_CODE_4_GOTPCRELX.
	(tc_gen_reloc): Likewise.
	(output_disp): Set fixP->fx_tcbit3 for REX2 prefix.
	(i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTPCRELX
	if fixp->fx_tcbit3 is set.
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Add
	BFD_RELOC_X86_64_CODE_4_GOTPCRELX.
	(TC_FORCE_RELOCATION_ABS): Likewise.
	* testsuite/gas/i386/x86-64-gotpcrel.s: Add tests for
	R_X86_64_CODE_4_GOTPCRELX.
	* testsuite/gas/i386/x86-64-localpic.s: Likewise.
	* testsuite/gas/i386/x86-64-gotpcrel.d: Updated.
	* testsuite/gas/i386/x86-64-localpic.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.

include/

	* elf/x86-64.h (elf_x86_64_reloc_type): Add
	R_X86_64_CODE_4_GOTPCRELX.

ld/

	* testsuite/ld-x86-64/apx-load1.s: New file.
	* testsuite/ld-x86-64/apx-load1a.d: Likewise.
	* testsuite/ld-x86-64/apx-load1b.d: Likewise.
	* testsuite/ld-x86-64/apx-load1c.d: Likewise.
	* testsuite/ld-x86-64/apx-load1d.d: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run apx-load1a, apx-load1b,
	apx-load1c and apx-load1d.

6 files changed, 258 insertions, 0 deletions

diff --git a/ld/testsuite/ld-x86-64/apx-load1.s b/ld/testsuite/ld-x86-64/apx-load1.s
new file mode 100644
index 0000000..f5eac57
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/apx-load1.s
@@ -0,0 +1,51 @@
+	.data
+	.type	bar, @object
+bar:
+	.byte	1
+	.size	bar, .-bar
+	.globl	foo
+	.type	foo, @object
+foo:
+	.byte	1
+	.size	foo, .-foo
+	.text
+	.globl	_start
+	.type	_start, @function
+_start:
+	adcl	bar@GOTPCREL(%rip), %r16d
+	addl	bar@GOTPCREL(%rip), %r17d
+	andl	bar@GOTPCREL(%rip), %r18d
+	cmpl	bar@GOTPCREL(%rip), %r19d
+	orl	bar@GOTPCREL(%rip), %r20d
+	sbbl	bar@GOTPCREL(%rip), %r21d
+	subl	bar@GOTPCREL(%rip), %r22d
+	xorl	bar@GOTPCREL(%rip), %r23d
+	testl	%r24d, bar@GOTPCREL(%rip)
+	adcq	bar@GOTPCREL(%rip), %r16
+	addq	bar@GOTPCREL(%rip), %r17
+	andq	bar@GOTPCREL(%rip), %r18
+	cmpq	bar@GOTPCREL(%rip), %r19
+	orq	bar@GOTPCREL(%rip), %r20
+	sbbq	bar@GOTPCREL(%rip), %r21
+	subq	bar@GOTPCREL(%rip), %r22
+	xorq	bar@GOTPCREL(%rip), %r23
+	testq	%r24, bar@GOTPCREL(%rip)
+	adcl	foo@GOTPCREL(%rip), %r16d
+	addl	foo@GOTPCREL(%rip), %r17d
+	andl	foo@GOTPCREL(%rip), %r18d
+	cmpl	foo@GOTPCREL(%rip), %r19d
+	orl	foo@GOTPCREL(%rip), %r20d
+	sbbl	foo@GOTPCREL(%rip), %r21d
+	subl	foo@GOTPCREL(%rip), %r22d
+	xorl	foo@GOTPCREL(%rip), %r23d
+	testl	%r24d, foo@GOTPCREL(%rip)
+	adcq	foo@GOTPCREL(%rip), %r16
+	addq	foo@GOTPCREL(%rip), %r17
+	andq	foo@GOTPCREL(%rip), %r18
+	cmpq	foo@GOTPCREL(%rip), %r19
+	orq	foo@GOTPCREL(%rip), %r20
+	sbbq	foo@GOTPCREL(%rip), %r21
+	subq	foo@GOTPCREL(%rip), %r22
+	xorq	foo@GOTPCREL(%rip), %r23
+	testq	%r24, foo@GOTPCREL(%rip)
+	.size	_start, .-_start
diff --git a/ld/testsuite/ld-x86-64/apx-load1a.d b/ld/testsuite/ld-x86-64/apx-load1a.d
new file mode 100644
index 0000000..162a234
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/apx-load1a.d
@@ -0,0 +1,54 @@
+#source: apx-load1.s
+#as: --64 -mrelax-relocations=yes
+#ld: -melf_x86_64 -z max-page-size=0x200000 -z noseparate-code
+#objdump: -dw --sym
+
+.*: +file format .*
+
+SYMBOL TABLE:
+#...
+0+6001d0 l     O .data	0+1 bar
+#...
+0+6001d1 g     O .data	0+1 foo
+#...
+
+Disassembly of section .text:
+
+0+4000b0 <_start>:
+ +[a-f0-9]+:	d5 10 81 d0 d0 01 60 00 	adc    \$0x6001d0,%r16d
+ +[a-f0-9]+:	d5 10 81 c1 d0 01 60 00 	add    \$0x6001d0,%r17d
+ +[a-f0-9]+:	d5 10 81 e2 d0 01 60 00 	and    \$0x6001d0,%r18d
+ +[a-f0-9]+:	d5 10 81 fb d0 01 60 00 	cmp    \$0x6001d0,%r19d
+ +[a-f0-9]+:	d5 10 81 cc d0 01 60 00 	or     \$0x6001d0,%r20d
+ +[a-f0-9]+:	d5 10 81 dd d0 01 60 00 	sbb    \$0x6001d0,%r21d
+ +[a-f0-9]+:	d5 10 81 ee d0 01 60 00 	sub    \$0x6001d0,%r22d
+ +[a-f0-9]+:	d5 10 81 f7 d0 01 60 00 	xor    \$0x6001d0,%r23d
+ +[a-f0-9]+:	d5 11 f7 c0 d0 01 60 00 	test   \$0x6001d0,%r24d
+ +[a-f0-9]+:	d5 18 81 d0 d0 01 60 00 	adc    \$0x6001d0,%r16
+ +[a-f0-9]+:	d5 18 81 c1 d0 01 60 00 	add    \$0x6001d0,%r17
+ +[a-f0-9]+:	d5 18 81 e2 d0 01 60 00 	and    \$0x6001d0,%r18
+ +[a-f0-9]+:	d5 18 81 fb d0 01 60 00 	cmp    \$0x6001d0,%r19
+ +[a-f0-9]+:	d5 18 81 cc d0 01 60 00 	or     \$0x6001d0,%r20
+ +[a-f0-9]+:	d5 18 81 dd d0 01 60 00 	sbb    \$0x6001d0,%r21
+ +[a-f0-9]+:	d5 18 81 ee d0 01 60 00 	sub    \$0x6001d0,%r22
+ +[a-f0-9]+:	d5 18 81 f7 d0 01 60 00 	xor    \$0x6001d0,%r23
+ +[a-f0-9]+:	d5 19 f7 c0 d0 01 60 00 	test   \$0x6001d0,%r24
+ +[a-f0-9]+:	d5 10 81 d0 d1 01 60 00 	adc    \$0x6001d1,%r16d
+ +[a-f0-9]+:	d5 10 81 c1 d1 01 60 00 	add    \$0x6001d1,%r17d
+ +[a-f0-9]+:	d5 10 81 e2 d1 01 60 00 	and    \$0x6001d1,%r18d
+ +[a-f0-9]+:	d5 10 81 fb d1 01 60 00 	cmp    \$0x6001d1,%r19d
+ +[a-f0-9]+:	d5 10 81 cc d1 01 60 00 	or     \$0x6001d1,%r20d
+ +[a-f0-9]+:	d5 10 81 dd d1 01 60 00 	sbb    \$0x6001d1,%r21d
+ +[a-f0-9]+:	d5 10 81 ee d1 01 60 00 	sub    \$0x6001d1,%r22d
+ +[a-f0-9]+:	d5 10 81 f7 d1 01 60 00 	xor    \$0x6001d1,%r23d
+ +[a-f0-9]+:	d5 11 f7 c0 d1 01 60 00 	test   \$0x6001d1,%r24d
+ +[a-f0-9]+:	d5 18 81 d0 d1 01 60 00 	adc    \$0x6001d1,%r16
+ +[a-f0-9]+:	d5 18 81 c1 d1 01 60 00 	add    \$0x6001d1,%r17
+ +[a-f0-9]+:	d5 18 81 e2 d1 01 60 00 	and    \$0x6001d1,%r18
+ +[a-f0-9]+:	d5 18 81 fb d1 01 60 00 	cmp    \$0x6001d1,%r19
+ +[a-f0-9]+:	d5 18 81 cc d1 01 60 00 	or     \$0x6001d1,%r20
+ +[a-f0-9]+:	d5 18 81 dd d1 01 60 00 	sbb    \$0x6001d1,%r21
+ +[a-f0-9]+:	d5 18 81 ee d1 01 60 00 	sub    \$0x6001d1,%r22
+ +[a-f0-9]+:	d5 18 81 f7 d1 01 60 00 	xor    \$0x6001d1,%r23
+ +[a-f0-9]+:	d5 19 f7 c0 d1 01 60 00 	test   \$0x6001d1,%r24
+#pass
diff --git a/ld/testsuite/ld-x86-64/apx-load1b.d b/ld/testsuite/ld-x86-64/apx-load1b.d
new file mode 100644
index 0000000..8c8962c
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/apx-load1b.d
@@ -0,0 +1,55 @@
+#source: apx-load1.s
+#as: --x32 -mrelax-relocations=yes
+#ld: -melf32_x86_64 -z max-page-size=0x200000 -z noseparate-code
+#objdump: -dw --sym
+
+.*: +file format .*
+
+SYMBOL TABLE:
+#...
+0+600194 l     O .data	0+1 bar
+#...
+0+600195 g     O .data	0+1 foo
+#...
+
+
+Disassembly of section .text:
+
+0+400074 <_start>:
+ +[a-f0-9]+:	d5 10 81 d0 94 01 60 00 	adc    \$0x600194,%r16d
+ +[a-f0-9]+:	d5 10 81 c1 94 01 60 00 	add    \$0x600194,%r17d
+ +[a-f0-9]+:	d5 10 81 e2 94 01 60 00 	and    \$0x600194,%r18d
+ +[a-f0-9]+:	d5 10 81 fb 94 01 60 00 	cmp    \$0x600194,%r19d
+ +[a-f0-9]+:	d5 10 81 cc 94 01 60 00 	or     \$0x600194,%r20d
+ +[a-f0-9]+:	d5 10 81 dd 94 01 60 00 	sbb    \$0x600194,%r21d
+ +[a-f0-9]+:	d5 10 81 ee 94 01 60 00 	sub    \$0x600194,%r22d
+ +[a-f0-9]+:	d5 10 81 f7 94 01 60 00 	xor    \$0x600194,%r23d
+ +[a-f0-9]+:	d5 11 f7 c0 94 01 60 00 	test   \$0x600194,%r24d
+ +[a-f0-9]+:	d5 18 81 d0 94 01 60 00 	adc    \$0x600194,%r16
+ +[a-f0-9]+:	d5 18 81 c1 94 01 60 00 	add    \$0x600194,%r17
+ +[a-f0-9]+:	d5 18 81 e2 94 01 60 00 	and    \$0x600194,%r18
+ +[a-f0-9]+:	d5 18 81 fb 94 01 60 00 	cmp    \$0x600194,%r19
+ +[a-f0-9]+:	d5 18 81 cc 94 01 60 00 	or     \$0x600194,%r20
+ +[a-f0-9]+:	d5 18 81 dd 94 01 60 00 	sbb    \$0x600194,%r21
+ +[a-f0-9]+:	d5 18 81 ee 94 01 60 00 	sub    \$0x600194,%r22
+ +[a-f0-9]+:	d5 18 81 f7 94 01 60 00 	xor    \$0x600194,%r23
+ +[a-f0-9]+:	d5 19 f7 c0 94 01 60 00 	test   \$0x600194,%r24
+ +[a-f0-9]+:	d5 10 81 d0 95 01 60 00 	adc    \$0x600195,%r16d
+ +[a-f0-9]+:	d5 10 81 c1 95 01 60 00 	add    \$0x600195,%r17d
+ +[a-f0-9]+:	d5 10 81 e2 95 01 60 00 	and    \$0x600195,%r18d
+ +[a-f0-9]+:	d5 10 81 fb 95 01 60 00 	cmp    \$0x600195,%r19d
+ +[a-f0-9]+:	d5 10 81 cc 95 01 60 00 	or     \$0x600195,%r20d
+ +[a-f0-9]+:	d5 10 81 dd 95 01 60 00 	sbb    \$0x600195,%r21d
+ +[a-f0-9]+:	d5 10 81 ee 95 01 60 00 	sub    \$0x600195,%r22d
+ +[a-f0-9]+:	d5 10 81 f7 95 01 60 00 	xor    \$0x600195,%r23d
+ +[a-f0-9]+:	d5 11 f7 c0 95 01 60 00 	test   \$0x600195,%r24d
+ +[a-f0-9]+:	d5 18 81 d0 95 01 60 00 	adc    \$0x600195,%r16
+ +[a-f0-9]+:	d5 18 81 c1 95 01 60 00 	add    \$0x600195,%r17
+ +[a-f0-9]+:	d5 18 81 e2 95 01 60 00 	and    \$0x600195,%r18
+ +[a-f0-9]+:	d5 18 81 fb 95 01 60 00 	cmp    \$0x600195,%r19
+ +[a-f0-9]+:	d5 18 81 cc 95 01 60 00 	or     \$0x600195,%r20
+ +[a-f0-9]+:	d5 18 81 dd 95 01 60 00 	sbb    \$0x600195,%r21
+ +[a-f0-9]+:	d5 18 81 ee 95 01 60 00 	sub    \$0x600195,%r22
+ +[a-f0-9]+:	d5 18 81 f7 95 01 60 00 	xor    \$0x600195,%r23
+ +[a-f0-9]+:	d5 19 f7 c0 95 01 60 00 	test   \$0x600195,%r24
+#pass
diff --git a/ld/testsuite/ld-x86-64/apx-load1c.d b/ld/testsuite/ld-x86-64/apx-load1c.d
new file mode 100644
index 0000000..fdfe00c
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/apx-load1c.d
@@ -0,0 +1,47 @@
+#source: apx-load1.s
+#as: --64
+#ld: -shared -melf_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
+#objdump: -dw
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+188 <_start>:
+ +[a-f0-9]+:	d5 40 13 05 f8 01 20 00 	adc    0x2001f8\(%rip\),%r16d        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 03 0d f0 01 20 00 	add    0x2001f0\(%rip\),%r17d        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 23 15 e8 01 20 00 	and    0x2001e8\(%rip\),%r18d        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 3b 1d e0 01 20 00 	cmp    0x2001e0\(%rip\),%r19d        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 0b 25 d8 01 20 00 	or     0x2001d8\(%rip\),%r20d        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 1b 2d d0 01 20 00 	sbb    0x2001d0\(%rip\),%r21d        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 2b 35 c8 01 20 00 	sub    0x2001c8\(%rip\),%r22d        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 33 3d c0 01 20 00 	xor    0x2001c0\(%rip\),%r23d        # 200388 <.*>
+ +[a-f0-9]+:	d5 44 85 05 b8 01 20 00 	test   %r24d,0x2001b8\(%rip\)        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 13 05 b0 01 20 00 	adc    0x2001b0\(%rip\),%r16        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 03 0d a8 01 20 00 	add    0x2001a8\(%rip\),%r17        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 23 15 a0 01 20 00 	and    0x2001a0\(%rip\),%r18        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 3b 1d 98 01 20 00 	cmp    0x200198\(%rip\),%r19        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 0b 25 90 01 20 00 	or     0x200190\(%rip\),%r20        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 1b 2d 88 01 20 00 	sbb    0x200188\(%rip\),%r21        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 2b 35 80 01 20 00 	sub    0x200180\(%rip\),%r22        # 200388 <.*>
+ +[a-f0-9]+:	d5 48 33 3d 78 01 20 00 	xor    0x200178\(%rip\),%r23        # 200388 <.*>
+ +[a-f0-9]+:	d5 4c 85 05 70 01 20 00 	test   %r24,0x200170\(%rip\)        # 200388 <.*>
+ +[a-f0-9]+:	d5 40 13 05 70 01 20 00 	adc    0x200170\(%rip\),%r16d        # 200390 <.*>
+ +[a-f0-9]+:	d5 40 03 0d 68 01 20 00 	add    0x200168\(%rip\),%r17d        # 200390 <.*>
+ +[a-f0-9]+:	d5 40 23 15 60 01 20 00 	and    0x200160\(%rip\),%r18d        # 200390 <.*>
+ +[a-f0-9]+:	d5 40 3b 1d 58 01 20 00 	cmp    0x200158\(%rip\),%r19d        # 200390 <.*>
+ +[a-f0-9]+:	d5 40 0b 25 50 01 20 00 	or     0x200150\(%rip\),%r20d        # 200390 <.*>
+ +[a-f0-9]+:	d5 40 1b 2d 48 01 20 00 	sbb    0x200148\(%rip\),%r21d        # 200390 <.*>
+ +[a-f0-9]+:	d5 40 2b 35 40 01 20 00 	sub    0x200140\(%rip\),%r22d        # 200390 <.*>
+ +[a-f0-9]+:	d5 40 33 3d 38 01 20 00 	xor    0x200138\(%rip\),%r23d        # 200390 <.*>
+ +[a-f0-9]+:	d5 44 85 05 30 01 20 00 	test   %r24d,0x200130\(%rip\)        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 13 05 28 01 20 00 	adc    0x200128\(%rip\),%r16        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 03 0d 20 01 20 00 	add    0x200120\(%rip\),%r17        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 23 15 18 01 20 00 	and    0x200118\(%rip\),%r18        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 3b 1d 10 01 20 00 	cmp    0x200110\(%rip\),%r19        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 0b 25 08 01 20 00 	or     0x200108\(%rip\),%r20        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 1b 2d 00 01 20 00 	sbb    0x200100\(%rip\),%r21        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 2b 35 f8 00 20 00 	sub    0x2000f8\(%rip\),%r22        # 200390 <.*>
+ +[a-f0-9]+:	d5 48 33 3d f0 00 20 00 	xor    0x2000f0\(%rip\),%r23        # 200390 <.*>
+ +[a-f0-9]+:	d5 4c 85 05 e8 00 20 00 	test   %r24,0x2000e8\(%rip\)        # 200390 <.*>
+#pass
diff --git a/ld/testsuite/ld-x86-64/apx-load1d.d b/ld/testsuite/ld-x86-64/apx-load1d.d
new file mode 100644
index 0000000..4da9678
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/apx-load1d.d
@@ -0,0 +1,47 @@
+#source: apx-load1.s
+#as: --x32
+#ld: -shared -melf32_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
+#objdump: -dw
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+100 <_start>:
+ +[a-f0-9]+:	d5 40 13 05 88 01 20 00 	adc    0x200188\(%rip\),%r16d        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 03 0d 80 01 20 00 	add    0x200180\(%rip\),%r17d        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 23 15 78 01 20 00 	and    0x200178\(%rip\),%r18d        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 3b 1d 70 01 20 00 	cmp    0x200170\(%rip\),%r19d        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 0b 25 68 01 20 00 	or     0x200168\(%rip\),%r20d        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 1b 2d 60 01 20 00 	sbb    0x200160\(%rip\),%r21d        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 2b 35 58 01 20 00 	sub    0x200158\(%rip\),%r22d        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 33 3d 50 01 20 00 	xor    0x200150\(%rip\),%r23d        # 200290 <.*>
+ +[a-f0-9]+:	d5 44 85 05 48 01 20 00 	test   %r24d,0x200148\(%rip\)        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 13 05 40 01 20 00 	adc    0x200140\(%rip\),%r16        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 03 0d 38 01 20 00 	add    0x200138\(%rip\),%r17        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 23 15 30 01 20 00 	and    0x200130\(%rip\),%r18        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 3b 1d 28 01 20 00 	cmp    0x200128\(%rip\),%r19        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 0b 25 20 01 20 00 	or     0x200120\(%rip\),%r20        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 1b 2d 18 01 20 00 	sbb    0x200118\(%rip\),%r21        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 2b 35 10 01 20 00 	sub    0x200110\(%rip\),%r22        # 200290 <.*>
+ +[a-f0-9]+:	d5 48 33 3d 08 01 20 00 	xor    0x200108\(%rip\),%r23        # 200290 <.*>
+ +[a-f0-9]+:	d5 4c 85 05 00 01 20 00 	test   %r24,0x200100\(%rip\)        # 200290 <.*>
+ +[a-f0-9]+:	d5 40 13 05 00 01 20 00 	adc    0x200100\(%rip\),%r16d        # 200298 <.*>
+ +[a-f0-9]+:	d5 40 03 0d f8 00 20 00 	add    0x2000f8\(%rip\),%r17d        # 200298 <.*>
+ +[a-f0-9]+:	d5 40 23 15 f0 00 20 00 	and    0x2000f0\(%rip\),%r18d        # 200298 <.*>
+ +[a-f0-9]+:	d5 40 3b 1d e8 00 20 00 	cmp    0x2000e8\(%rip\),%r19d        # 200298 <.*>
+ +[a-f0-9]+:	d5 40 0b 25 e0 00 20 00 	or     0x2000e0\(%rip\),%r20d        # 200298 <.*>
+ +[a-f0-9]+:	d5 40 1b 2d d8 00 20 00 	sbb    0x2000d8\(%rip\),%r21d        # 200298 <.*>
+ +[a-f0-9]+:	d5 40 2b 35 d0 00 20 00 	sub    0x2000d0\(%rip\),%r22d        # 200298 <.*>
+ +[a-f0-9]+:	d5 40 33 3d c8 00 20 00 	xor    0x2000c8\(%rip\),%r23d        # 200298 <.*>
+ +[a-f0-9]+:	d5 44 85 05 c0 00 20 00 	test   %r24d,0x2000c0\(%rip\)        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 13 05 b8 00 20 00 	adc    0x2000b8\(%rip\),%r16        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 03 0d b0 00 20 00 	add    0x2000b0\(%rip\),%r17        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 23 15 a8 00 20 00 	and    0x2000a8\(%rip\),%r18        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 3b 1d a0 00 20 00 	cmp    0x2000a0\(%rip\),%r19        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 0b 25 98 00 20 00 	or     0x200098\(%rip\),%r20        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 1b 2d 90 00 20 00 	sbb    0x200090\(%rip\),%r21        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 2b 35 88 00 20 00 	sub    0x200088\(%rip\),%r22        # 200298 <.*>
+ +[a-f0-9]+:	d5 48 33 3d 80 00 20 00 	xor    0x200080\(%rip\),%r23        # 200298 <.*>
+ +[a-f0-9]+:	d5 4c 85 05 78 00 20 00 	test   %r24,0x200078\(%rip\)        # 200298 <.*>
+#pass
diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp
index 95a2986..d5c5219 100644
--- a/ld/testsuite/ld-x86-64/x86-64.exp
+++ b/ld/testsuite/ld-x86-64/x86-64.exp
@@ -605,6 +605,10 @@ run_dump_test "load1a"
 run_dump_test "load1b"
 run_dump_test "load1c"
 run_dump_test "load1d"
+run_dump_test "apx-load1a"
+run_dump_test "apx-load1b"
+run_dump_test "apx-load1c"
+run_dump_test "apx-load1d"
 run_dump_test "load2"
 run_dump_test "call1a"
 run_dump_test "call1b"