opcodes/arm: use '@' consistently for the comment character

Looking at the ARM disassembler output, every comment seems to start
with a ';' character, so I assumed this was the correct character to
start an assembler comment.

I then spotted a couple of places where there was no ';', but instead,
just a '@' character.  I thought that this was a case of a missing
';', and proposed a patch to add the missing ';' characters.

Turns out I was wrong, '@' is actually the ARM assembler comment
character, while ';' is the statement separator.  Thus this:

    nop    ;@ comment

is two statements, the first is the 'nop' instruction, while the
second contains no instructions, just the '@ comment' comment text.

This:

    nop    @ comment

is a single 'nop' instruction followed by a comment.  And finally,
this:

    nop    ; comment

is two statements, the first contains the 'nop' instruction, while the
second contains the instruction 'comment', which obviously isn't
actually an instruction at all.

Why this matters is that, in the next commit, I would like to add
libopcodes syntax styling support for ARM.

The question then is how should the disassembler style the three cases
above?

As '@' is the actual comment start character then clearly the '@' and
anything after it can be styled as a comment.  But what about ';' in
the second example?  Style as text?  Style as a comment?

And the third example is even harder, what about the 'comment' text?
Style as an instruction mnemonic?  Style as text?  Style as a comment?

I think the only sensible answer is to move the disassembler to use
'@' consistently as its comment character, and remove all the uses of
';'.

Then, in the next commit, it's obvious what to do.

There's obviously a *lot* of tests that get updated by this commit,
the only actual code changes are in opcodes/arm-dis.c.

1 files changed, 21 insertions, 21 deletions

diff --git a/ld/testsuite/ld-arm/ifunc-14.dd b/ld/testsuite/ld-arm/ifunc-14.dd
index 281373c..d0b795c 100644
--- a/ld/testsuite/ld-arm/ifunc-14.dd
+++ b/ld/testsuite/ld-arm/ifunc-14.dd
@@ -5,8 +5,8 @@
 Disassembly of section \.plt:
 
 00009000 <.plt>:
-    9000:	e52de004 	push	{lr}		; \(str lr, \[sp, #-4\]!\)
-    9004:	e59fe004 	ldr	lr, \[pc, #4\]	; 9010 <.*>
+    9000:	e52de004 	push	{lr}		@ \(str lr, \[sp, #-4\]!\)
+    9004:	e59fe004 	ldr	lr, \[pc, #4\]	@ 9010 <.*>
     9008:	e08fe00e 	add	lr, pc, lr
     900c:	e5bef008 	ldr	pc, \[lr, #8\]!
 #------------------------------------------------------------------------------
@@ -18,15 +18,15 @@ Disassembly of section \.plt:
 #------------------------------------------------------------------------------
 00009014 <f2t@plt>:
     9014:	e28fc600 	add	ip, pc, #0, 12
-    9018:	e28cca07 	add	ip, ip, #28672	; 0x7000
-    901c:	e5bcfff0 	ldr	pc, \[ip, #4080\]!	; 0xff0
+    9018:	e28cca07 	add	ip, ip, #28672	@ 0x7000
+    901c:	e5bcfff0 	ldr	pc, \[ip, #4080\]!	@ 0xff0
 #------------------------------------------------------------------------------
 #------ f2's .plt entry
 #------------------------------------------------------------------------------
 00009020 <f2@plt>:
     9020:	e28fc600 	add	ip, pc, #0, 12
-    9024:	e28cca07 	add	ip, ip, #28672	; 0x7000
-    9028:	e5bcffe8 	ldr	pc, \[ip, #4072\]!	; 0xfe8
+    9024:	e28cca07 	add	ip, ip, #28672	@ 0x7000
+    9028:	e5bcffe8 	ldr	pc, \[ip, #4072\]!	@ 0xfe8
 
 Disassembly of section \.iplt:
 
@@ -35,24 +35,24 @@ Disassembly of section \.iplt:
 #------ f1's .iplt entry
 #------------------------------------------------------------------------------
     902c:	e28fc600 	add	ip, pc, #0, 12
-    9030:	e28cca07 	add	ip, ip, #28672	; 0x7000
-    9034:	e5bcffe0 	ldr	pc, \[ip, #4064\]!	; 0xfe0
+    9030:	e28cca07 	add	ip, ip, #28672	@ 0x7000
+    9034:	e5bcffe0 	ldr	pc, \[ip, #4064\]!	@ 0xfe0
 #------------------------------------------------------------------------------
 #------ f1t's .iplt entry
 #------------------------------------------------------------------------------
     9038:	e28fc600 	add	ip, pc, #0, 12
-    903c:	e28cca07 	add	ip, ip, #28672	; 0x7000
-    9040:	e5bcffd8 	ldr	pc, \[ip, #4056\]!	; 0xfd8
+    903c:	e28cca07 	add	ip, ip, #28672	@ 0x7000
+    9040:	e5bcffd8 	ldr	pc, \[ip, #4056\]!	@ 0xfd8
 
 00009044 <f3>:
     9044:	e28fc600 	add	ip, pc, #0, 12
-    9048:	e28cca07 	add	ip, ip, #28672	; 0x7000
-    904c:	e5bcffd0 	ldr	pc, \[ip, #4048\]!	; 0xfd0
+    9048:	e28cca07 	add	ip, ip, #28672	@ 0x7000
+    904c:	e5bcffd0 	ldr	pc, \[ip, #4048\]!	@ 0xfd0
 
 00009050 <f3t>:
     9050:	e28fc600 	add	ip, pc, #0, 12
-    9054:	e28cca07 	add	ip, ip, #28672	; 0x7000
-    9058:	e5bcffc8 	ldr	pc, \[ip, #4040\]!	; 0xfc8
+    9054:	e28cca07 	add	ip, ip, #28672	@ 0x7000
+    9058:	e5bcffc8 	ldr	pc, \[ip, #4040\]!	@ 0xfc8
 
 Disassembly of section \.text:
 
@@ -65,37 +65,37 @@ Disassembly of section \.text:
     a00a:	46f7      	mov	pc, lr
 
 0000a00c <_start>:
-    a00c:	f8df 4000 	ldr\.w	r4, \[pc\]	; a010 <_start\+0x4>
+    a00c:	f8df 4000 	ldr\.w	r4, \[pc\]	@ a010 <_start\+0x4>
 #------------------------------------------------------------------------------
 #------ PC-relative offset of foo
 #------------------------------------------------------------------------------
     a010:	00005ff0 	\.word	0x00005ff0
-    a014:	f8df 4000 	ldr\.w	r4, \[pc\]	; a018 <_start\+0xc>
+    a014:	f8df 4000 	ldr\.w	r4, \[pc\]	@ a018 <_start\+0xc>
 #------------------------------------------------------------------------------
 #------ PC-relative offset of f1's .iplt entry
 #------------------------------------------------------------------------------
     a018:	fffff014 	\.word	0xfffff014
-    a01c:	f8df 4000 	ldr\.w	r4, \[pc\]	; a020 <_start\+0x14>
+    a01c:	f8df 4000 	ldr\.w	r4, \[pc\]	@ a020 <_start\+0x14>
 #------------------------------------------------------------------------------
 #------ PC-relative offset of f2's .plt entry
 #------------------------------------------------------------------------------
     a020:	fffff000 	\.word	0xfffff000
-    a024:	f8df 4000 	ldr\.w	r4, \[pc\]	; a028 <_start\+0x1c>
+    a024:	f8df 4000 	ldr\.w	r4, \[pc\]	@ a028 <_start\+0x1c>
 #------------------------------------------------------------------------------
 #------ PC-relative offset of f3
 #------------------------------------------------------------------------------
     a028:	fffff01c 	\.word	0xfffff01c
-    a02c:	f8df 4000 	ldr\.w	r4, \[pc\]	; a030 <_start\+0x24>
+    a02c:	f8df 4000 	ldr\.w	r4, \[pc\]	@ a030 <_start\+0x24>
 #------------------------------------------------------------------------------
 #------ PC-relative offset of f1t's .iplt entry
 #------------------------------------------------------------------------------
     a030:	fffff008 	\.word	0xfffff008
-    a034:	f8df 4000 	ldr\.w	r4, \[pc\]	; a038 <_start\+0x2c>
+    a034:	f8df 4000 	ldr\.w	r4, \[pc\]	@ a038 <_start\+0x2c>
 #------------------------------------------------------------------------------
 #------ PC-relative offset of f2t's .plt entry
 #------------------------------------------------------------------------------
     a038:	ffffefdc 	\.word	0xffffefdc
-    a03c:	f8df 4000 	ldr\.w	r4, \[pc\]	; a040 <_start\+0x34>
+    a03c:	f8df 4000 	ldr\.w	r4, \[pc\]	@ a040 <_start\+0x34>
 #------------------------------------------------------------------------------
 #------ PC-relative offset of f3t
 #------------------------------------------------------------------------------