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author | Maciej W. Rozycki <macro@imgtec.com> | 2017-01-30 17:11:22 +0000 |
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committer | Maciej W. Rozycki <macro@imgtec.com> | 2017-01-30 17:16:01 +0000 |
commit | 8b10b0b3e100c25322a083248c7a18bf5a1f3527 (patch) | |
tree | 4993513d1cb11f9a039d4c01b7373a9afcb13616 /ld/ld.texinfo | |
parent | 7795a8f8bdde2fa5c0e0639b92280314b32ec78d (diff) | |
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MIPS: Add options to control branch ISA checks
Complement commit 9d862524f6ae ("MIPS: Verify the ISA mode and alignment
of branch and jump targets") and add GAS and LD options to control the
checks for invalid branches between ISA modes introduced there, to help
with some handwritten code lacking `.insn' annotation for labels used as
branch targets and code produced by older versions of GCC which suffers
from the issue with branches to code that has been optimized away,
addressed with GCC commit 242424 ("MIPS/GCC: Mark trailing labels with
`.insn'"), <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01061.html>.
bfd/
* elfxx-mips.h (_bfd_mips_elf_insn32): Rename prototype to...
(_bfd_mips_elf_linker_flags): ... this. Add another parameter.
* elfxx-mips.c (mips_elf_link_hash_table): Add
`ignore_branch_isa' member.
(mips_elf_perform_relocation): Do not treat an ISA mode mismatch
in branch relocation calculation as an error if
`ignore_branch_isa' has been set.
(_bfd_mips_elf_insn32): Rename to...
(_bfd_mips_elf_linker_flags): ... this. Rename the `on'
parameter to `insn32' and add an `ignore_branch_isa' parameter.
Handle the new parameter.
gas/
* config/tc-mips.c (mips_ignore_branch_isa): New variable.
(options): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(md_longopts): Add "mignore-branch-isa" and
"mno-ignore-branch-isa" options.
(md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
(fix_bad_cross_mode_branch_p): Return FALSE if
`mips_ignore_branch_isa' has been set.
(md_show_usage): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa'.
* doc/as.texinfo (Target MIPS options): Add
`-mignore-branch-isa' and `-mno-ignore-branch-isa' options.
(-mignore-branch-isa, -mno-ignore-branch-isa): New options.
* doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa' options.
* testsuite/gas/mips/branch-local-ignore-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-3.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* emultempl/mipself.em (ignore_branch_isa): New variable.
(mips_create_output_section_statements): Rename
`_bfd_mips_elf_insn32' called to `_bfd_mips_elf_linker_flags',
add `ignore_branch_isa' argument.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(PARSE_AND_LIST_LONGOPTS): Add "ignore-branch-isa" and
"no-ignore-branch-isa" options.
(PARSE_AND_LIST_OPTIONS): Add `--ignore-branch-isa' and
`--no-ignore-branch-isa'.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
* ld.texinfo (Options specific to MIPS targets): Add
`--ignore-branch-isa' and `--no-ignore-branch-isa' options.
(ld and the MIPS family): Likewise.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n64.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-mips16: New
test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-micromips: New
test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Diffstat (limited to 'ld/ld.texinfo')
-rw-r--r-- | ld/ld.texinfo | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/ld/ld.texinfo b/ld/ld.texinfo index 2ce7560..8f2dfdb 100644 --- a/ld/ld.texinfo +++ b/ld/ld.texinfo @@ -3001,7 +3001,8 @@ Info entry for @file{ld}. @c man begin OPTIONS The following options are supported to control microMIPS instruction -generation when linking for MIPS targets. +generation and branch relocation checks for ISA mode transitions when +linking for MIPS targets. @table @gcctabopt @@ -3016,6 +3017,20 @@ or in relaxation. If @samp{--insn32} is used, then the linker only uses used, all instruction encodings are used, including 16-bit ones where possible. +@kindex --ignore-branch-isa +@item --ignore-branch-isa +@kindex --no-ignore-branch-isa +@itemx --no-ignore-branch-isa +These options control branch relocation checks for invalid ISA mode +transitions. If @samp{--ignore-branch-isa} is used, then the linker +accepts any branch relocations and any ISA mode transition required +is lost in relocation calculation, except for some cases of @code{BAL} +instructions which meet relaxation conditions and are converted to +equivalent @code{JALX} instructions as the associated relocation is +calculated. By default or if @samp{--no-ignore-branch-isa} is used +a check is made causing the loss of an ISA mode transition to produce +an error. + @end table @c man end @@ -7062,6 +7077,19 @@ used, then the linker only uses 32-bit instruction encodings. By default or if @samp{--no-insn32} is used, all instruction encodings are used, including 16-bit ones where possible. +@cindex MIPS branch relocation check control +@kindex --ignore-branch-isa +@kindex --no-ignore-branch-isa +The @samp{--ignore-branch-isa} and @samp{--no-ignore-branch-isa} options +control branch relocation checks for invalid ISA mode transitions. If +@samp{--ignore-branch-isa} is used, then the linker accepts any branch +relocations and any ISA mode transition required is lost in relocation +calculation, except for some cases of @code{BAL} instructions which meet +relaxation conditions and are converted to equivalent @code{JALX} +instructions as the associated relocation is calculated. By default +or if @samp{--no-ignore-branch-isa} is used a check is made causing +the loss of an ISA mode transition to produce an error. + @ifclear GENERIC @lowersections @end ifclear |