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authorAndrew Waterman <andrew@sifive.com>2017-02-14 15:37:04 -0800
committerPalmer Dabbelt <palmer@dabbelt.com>2017-02-15 10:35:00 -0800
commitf98d33be3af3a8d788aaef37e8fef167b59c81b2 (patch)
tree28419e3c63df6a77c11f96994b864d12feb9cf0e /include
parent773fb663445646ebe45298e255d263f9520b2e2e (diff)
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Add SFENCE.VMA instruction
include/ChangeLog: 2017-02-14 Andrew Waterman <andrew@sifive.com> * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define. (MASK_SFENCE_VMA): Likewise. (sfence_vma): Declare instruction. opcodes/ChangeLog: 2017-02-14 Andrew Waterman <andrew@sifive.com> * riscv-opc.c (riscv_opcodes): Add sfence.vma instruction and pseudoinstructions.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog6
-rw-r--r--include/opcode/riscv-opc.h3
2 files changed, 9 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index e90166c..7e59ea2 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2017-02-14 Andrew Waterman <andrew@sifive.com>
+
+ * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
+ (MASK_SFENCE_VMA): Likewise.
+ (sfence_vma): Declare instruction.
+
2017-02-14 Alan Modra <amodra@gmail.com>
PR 21118
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 09d680b..dd58053 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -227,6 +227,8 @@
#define MASK_DRET 0xffffffff
#define MATCH_SFENCE_VM 0x10400073
#define MASK_SFENCE_VM 0xfff07fff
+#define MATCH_SFENCE_VMA 0x12000073
+#define MASK_SFENCE_VMA 0xfe007fff
#define MATCH_WFI 0x10500073
#define MASK_WFI 0xffffffff
#define MATCH_CSRRW 0x1073
@@ -883,6 +885,7 @@ DECLARE_INSN(hret, MATCH_HRET, MASK_HRET)
DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
+DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA)
DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)