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| author | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2017-01-04 12:27:10 +0000 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2017-01-04 12:31:08 +0000 |
| commit | d74d4880e23263bac3690bcb641af56bd13036e6 (patch) | |
| tree | 728a2c19b7ef9f5fc7eda05e30f7a77acd1dd309 /include | |
| parent | 10ab38d930db6159b93082dfe5e41761bdc0d70b (diff) | |
| download | fsf-binutils-gdb-d74d4880e23263bac3690bcb641af56bd13036e6.zip fsf-binutils-gdb-d74d4880e23263bac3690bcb641af56bd13036e6.tar.gz fsf-binutils-gdb-d74d4880e23263bac3690bcb641af56bd13036e6.tar.bz2 | |
[AArch64] Add separate feature flag for weaker release consistent load insns
The weaker release consistency support of ARMv8.3-A is allowed as an optional
extension for ARMv8.2-A, so separate command line option and feature flag is
added: -march=armv8.2-a+rcpc turns LDAPR, LDAPRB, LDAPRH instructions on.
opcodes/
* aarch64-tbl.h (RCPC, RCPC_INSN): Define.
(aarch64_opcode_table): Use RCPC_INSN.
include/
* opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
(AARCH64_ARCH_V8_3): Update.
gas/
* config/tc-aarch64.c (aarch64_features): Add rcpc.
* doc/c-aarch64.texi (AArch64 Extensions): Document rcpc.
* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ...
* testsuite/gas/aarch64/ldst-rcpc.d: This.
* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ...
* testsuite/gas/aarch64/ldst-rcpc.s: This.
* testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 4 |
2 files changed, 8 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 87083b6..a518342 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define. + (AARCH64_ARCH_V8_3): Update. + 2017-01-03 Kito Cheng <kito.cheng@gmail.com> * opcode/riscv-opc.h: Add support for the "q" ISA extension. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index d3d86ca..c4f75e5 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -53,6 +53,7 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_RAS 0x04000000 /* RAS Extensions. */ #define AARCH64_FEATURE_PROFILE 0x08000000 /* Statistical Profiling. */ #define AARCH64_FEATURE_SVE 0x10000000 /* SVE instructions. */ +#define AARCH64_FEATURE_RCPC 0x20000000 /* RCPC instructions. */ /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ @@ -70,7 +71,8 @@ typedef uint32_t aarch64_insn; | AARCH64_FEATURE_F16 \ | AARCH64_FEATURE_RAS) #define AARCH64_ARCH_V8_3 AARCH64_FEATURE (AARCH64_ARCH_V8_2, \ - AARCH64_FEATURE_V8_3) + AARCH64_FEATURE_V8_3 \ + | AARCH64_FEATURE_RCPC) #define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) #define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */ |