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| author | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 17:09:59 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 17:09:59 +0100 |
| commit | bb7eff5206e4795ac79c177a80fe9f4630aaf730 (patch) | |
| tree | ebea7c8fc80d1fbca2c49b1b8988e9a8816b6042 /include | |
| parent | f2a5c4f5af38b146f0bc7e1407e422ac292f9da7 (diff) | |
| download | fsf-binutils-gdb-bb7eff5206e4795ac79c177a80fe9f4630aaf730.zip fsf-binutils-gdb-bb7eff5206e4795ac79c177a80fe9f4630aaf730.tar.gz fsf-binutils-gdb-bb7eff5206e4795ac79c177a80fe9f4630aaf730.tar.bz2 | |
[AArch64] Add SVE condition codes
SVE defines new names for existing NZCV conditions, to reflect the
result of instructions like PTEST. This patch adds support for these
names.
The patch also adds comments to the disassembly output to show the
alternative names of a condition code. For example:
cinv x0, x1, cc
becomes:
cinv x0, x1, cc // cc = lo, ul, last
and:
b.cc f0 <...>
becomes:
b.cc f0 <...> // b.lo, b.ul, b.last
Doing this for the SVE names follows the practice recommended by the
SVE specification and is definitely useful when reading SVE code.
If the feeling is that it's too distracting elsewhere, we could add
an option to turn it off.
include/
* opcode/aarch64.h (aarch64_cond): Bump array size to 4.
opcodes/
* aarch64-dis.c (remove_dot_suffix): New function, split out from...
(print_mnemonic_name): ...here.
(print_comment): New function.
(print_aarch64_insn): Call it.
* aarch64-opc.c (aarch64_conds): Add SVE names.
(aarch64_print_operand): Print alternative condition names in
a comment.
gas/
* config/tc-aarch64.c (opcode_lookup): Search for the end of
a condition name, rather than assuming that it will have exactly
2 characters.
(parse_operands): Likewise.
* testsuite/gas/aarch64/alias.d: Add new condition-code comments
to the expected output.
* testsuite/gas/aarch64/beq_1.d: Likewise.
* testsuite/gas/aarch64/float-fp16.d: Likewise.
* testsuite/gas/aarch64/int-insns.d: Likewise.
* testsuite/gas/aarch64/no-aliases.d: Likewise.
* testsuite/gas/aarch64/programmer-friendly.d: Likewise.
* testsuite/gas/aarch64/reloc-insn.d: Likewise.
* testsuite/gas/aarch64/b_c_1.d, testsuite/gas/aarch64/b_c_1.s:
New test.
ld/
* testsuite/ld-aarch64/emit-relocs-280.d: Match branch comments.
* testsuite/ld-aarch64/weak-undefined.d: Likewise.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index f2d20eb..0c2fc11 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,9 @@ 2016-09-21 Richard Sandiford <richard.sandiford@arm.com> + * opcode/aarch64.h (aarch64_cond): Bump array size to 4. + +2016-09-21 Richard Sandiford <richard.sandiford@arm.com> + * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro. (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi) (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P) diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 5913860..defda78 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -859,7 +859,7 @@ typedef struct { /* A list of names with the first one as the disassembly preference; terminated by NULL if fewer than 3. */ - const char *names[3]; + const char *names[4]; aarch64_insn value; } aarch64_cond; |