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| author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-09 23:11:40 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-09 23:21:40 +0000 |
| commit | 64c111834081a117f902cffc15dadbc535f1c65e (patch) | |
| tree | 128dd40a1359e495b204f806e1b024a9047c2de3 /include | |
| parent | f17ecb4baca990b57cc57e8337c4e03ecee02742 (diff) | |
| download | fsf-binutils-gdb-64c111834081a117f902cffc15dadbc535f1c65e.zip fsf-binutils-gdb-64c111834081a117f902cffc15dadbc535f1c65e.tar.gz fsf-binutils-gdb-64c111834081a117f902cffc15dadbc535f1c65e.tar.bz2 | |
MIPS16: Remove unused `>' operand code
This code has never been used throughout the repository history, and
likely not before either, as due to the assymetry of MIPS16 instruction
set encoding there are no 32-bit shift operations having their immediate
shift count placed in the position of the usual `rx' instruction field.
gas/
* config/tc-mips.c (mips16_macro_build) <'>'>: Remove case.
include/
* opcode/mips.h: Remove references to `>' operand code.
opcodes/
* mips16-opc.c (decode_mips16_operand) <'>'>: Remove cases.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/mips.h | 3 |
2 files changed, 5 insertions, 2 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 00cebb6..b8c9628 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2016-12-09 Maciej W. Rozycki <macro@imgtec.com> + + * opcode/mips.h: Remove references to `>' operand code. + 2016-12-07 Maciej W. Rozycki <macro@imgtec.com> * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 160fc91..a199f06 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1809,7 +1809,6 @@ extern int bfd_mips_num_opcodes; The remaining codes may be extended. Except as otherwise noted, the full extended operand is a 16 bit signed value. "<" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 5 bit unsigned) - ">" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 5 bit unsigned) "[" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 6 bit unsigned) "]" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 6 bit unsigned) "4" 4 bit signed immediate * 0 (MIPS16OP_*_IMM4) (full 15 bit signed) @@ -1834,7 +1833,7 @@ extern int bfd_mips_num_opcodes; Characters used so far, for quick reference when adding more: " 456 8 0" - "[]<>" + "[]<" "ABCDE HI KLM P RS UVWXYZ" "a e ijklm pq vwxyz" */ |