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authorRichard Henderson <rth@redhat.com>1999-05-03 07:29:11 +0000
committerRichard Henderson <rth@redhat.com>1999-05-03 07:29:11 +0000
commit252b5132c753830d5fd56823373aed85f2a0db63 (patch)
tree1af963bfd8d3e55167b81def4207f175eaff3a56 /include
downloadfsf-binutils-gdb-252b5132c753830d5fd56823373aed85f2a0db63.zip
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19990502 sourceware importbinu_ss_19990502
Diffstat (limited to 'include')
-rw-r--r--include/COPYING340
-rw-r--r--include/ChangeLog1527
-rw-r--r--include/ansidecl.h163
-rw-r--r--include/aout/ChangeLog178
-rw-r--r--include/aout/adobe.h297
-rw-r--r--include/aout/aout64.h475
-rw-r--r--include/aout/ar.h36
-rw-r--r--include/aout/dynix3.h71
-rw-r--r--include/aout/encap.h135
-rw-r--r--include/aout/host.h22
-rw-r--r--include/aout/hp.h82
-rw-r--r--include/aout/hp300hpux.h119
-rw-r--r--include/aout/hppa.h7
-rw-r--r--include/aout/ranlib.h62
-rw-r--r--include/aout/reloc.h66
-rw-r--r--include/aout/stab.def268
-rw-r--r--include/aout/stab_gnu.h37
-rw-r--r--include/aout/sun4.h219
-rw-r--r--include/bfdlink.h520
-rw-r--r--include/bout.h182
-rw-r--r--include/callback.h270
-rw-r--r--include/coff/ChangeLog793
-rw-r--r--include/coff/a29k.h305
-rw-r--r--include/coff/alpha.h362
-rw-r--r--include/coff/apollo.h252
-rw-r--r--include/coff/arm.h258
-rw-r--r--include/coff/aux-coff.h31
-rw-r--r--include/coff/ecoff.h421
-rw-r--r--include/coff/go32exe.h20
-rw-r--r--include/coff/h8300.h204
-rw-r--r--include/coff/h8500.h201
-rw-r--r--include/coff/i386.h228
-rw-r--r--include/coff/i860.h205
-rw-r--r--include/coff/i960.h275
-rw-r--r--include/coff/internal.h728
-rw-r--r--include/coff/m68k.h225
-rw-r--r--include/coff/m88k.h219
-rw-r--r--include/coff/mcore.h245
-rw-r--r--include/coff/mips.h369
-rw-r--r--include/coff/pe.h169
-rw-r--r--include/coff/powerpc.h199
-rw-r--r--include/coff/rs6000.h243
-rw-r--r--include/coff/sh.h269
-rw-r--r--include/coff/sparc.h210
-rw-r--r--include/coff/sym.h484
-rw-r--r--include/coff/symconst.h177
-rw-r--r--include/coff/tic30.h203
-rw-r--r--include/coff/tic80.h228
-rw-r--r--include/coff/w65.h201
-rw-r--r--include/coff/we32k.h206
-rw-r--r--include/coff/z8k.h201
-rw-r--r--include/demangle.h95
-rw-r--r--include/dis-asm.h243
-rw-r--r--include/elf/ChangeLog719
-rw-r--r--include/elf/alpha.h108
-rw-r--r--include/elf/arc.h54
-rw-r--r--include/elf/arm-oabi.h87
-rw-r--r--include/elf/arm.h96
-rw-r--r--include/elf/common.h454
-rw-r--r--include/elf/d10v.h38
-rw-r--r--include/elf/d30v.h42
-rw-r--r--include/elf/dwarf.h319
-rw-r--r--include/elf/dwarf2.h637
-rw-r--r--include/elf/external.h256
-rw-r--r--include/elf/fr30.h43
-rw-r--r--include/elf/hppa.h187
-rw-r--r--include/elf/i386.h49
-rw-r--r--include/elf/internal.h312
-rw-r--r--include/elf/m32r.h66
-rw-r--r--include/elf/m68k.h56
-rw-r--r--include/elf/mcore.h43
-rw-r--r--include/elf/mips.h860
-rw-r--r--include/elf/mn10200.h39
-rw-r--r--include/elf/mn10300.h53
-rw-r--r--include/elf/ppc.h127
-rw-r--r--include/elf/reloc-macros.h116
-rw-r--r--include/elf/sh.h55
-rw-r--r--include/elf/sparc.h156
-rw-r--r--include/elf/v850.h111
-rw-r--r--include/floatformat.h111
-rw-r--r--include/fnmatch.h70
-rw-r--r--include/fopen-bin.h27
-rw-r--r--include/fopen-same.h27
-rw-r--r--include/fopen-vms.h24
-rw-r--r--include/gdbm.h91
-rw-r--r--include/getopt.h133
-rw-r--r--include/hp-symtab.h1871
-rw-r--r--include/ieee.h139
-rw-r--r--include/libiberty.h180
-rw-r--r--include/mpw/ChangeLog61
-rw-r--r--include/mpw/README1
-rw-r--r--include/mpw/dir.h23
-rw-r--r--include/mpw/dirent.h31
-rw-r--r--include/mpw/fcntl.h124
-rw-r--r--include/mpw/grp.h10
-rw-r--r--include/mpw/mpw.h130
-rw-r--r--include/mpw/pwd.h15
-rw-r--r--include/mpw/spin.h64
-rw-r--r--include/mpw/stat.h75
-rw-r--r--include/mpw/sys/file.h1
-rw-r--r--include/mpw/sys/param.h1
-rw-r--r--include/mpw/sys/resource.h9
-rw-r--r--include/mpw/sys/stat.h44
-rw-r--r--include/mpw/sys/time.h13
-rw-r--r--include/mpw/sys/types.h15
-rw-r--r--include/mpw/utime.h7
-rw-r--r--include/mpw/varargs.h9
-rw-r--r--include/nlm/ChangeLog83
-rw-r--r--include/nlm/alpha-ext.h166
-rw-r--r--include/nlm/common.h124
-rw-r--r--include/nlm/external.h174
-rw-r--r--include/nlm/i386-ext.h116
-rw-r--r--include/nlm/internal.h309
-rw-r--r--include/nlm/ppc-ext.h163
-rw-r--r--include/nlm/sparc32-ext.h120
-rw-r--r--include/oasys.h152
-rw-r--r--include/objalloc.h116
-rw-r--r--include/obstack.h593
-rw-r--r--include/opcode/ChangeLog1873
-rw-r--r--include/opcode/a29k.h285
-rw-r--r--include/opcode/alpha.h238
-rw-r--r--include/opcode/arc.h274
-rw-r--r--include/opcode/arm.h294
-rw-r--r--include/opcode/cgen.h1380
-rw-r--r--include/opcode/convex.h1711
-rw-r--r--include/opcode/d10v.h194
-rw-r--r--include/opcode/d30v.h273
-rw-r--r--include/opcode/h8300.h604
-rw-r--r--include/opcode/hppa.h486
-rw-r--r--include/opcode/i386.h1063
-rw-r--r--include/opcode/i860.h491
-rw-r--r--include/opcode/i960.h509
-rw-r--r--include/opcode/m68k.h315
-rw-r--r--include/opcode/m88k.h923
-rw-r--r--include/opcode/mips.h723
-rw-r--r--include/opcode/mn10200.h110
-rw-r--r--include/opcode/mn10300.h138
-rw-r--r--include/opcode/np1.h422
-rw-r--r--include/opcode/ns32k.h491
-rw-r--r--include/opcode/pn.h282
-rw-r--r--include/opcode/ppc.h248
-rw-r--r--include/opcode/pyr.h287
-rw-r--r--include/opcode/sparc.h240
-rw-r--r--include/opcode/tahoe.h213
-rw-r--r--include/opcode/tic30.h691
-rw-r--r--include/opcode/tic80.h277
-rw-r--r--include/opcode/v850.h166
-rw-r--r--include/opcode/vax.h382
-rw-r--r--include/os9k.h169
-rw-r--r--include/progress.h37
-rw-r--r--include/regs/ChangeLog0
-rw-r--r--include/remote-sim.h321
-rw-r--r--include/splay-tree.h116
-rw-r--r--include/symcat.h40
-rw-r--r--include/wait.h63
155 files changed, 40379 insertions, 0 deletions
diff --git a/include/COPYING b/include/COPYING
new file mode 100644
index 0000000..60549be
--- /dev/null
+++ b/include/COPYING
@@ -0,0 +1,340 @@
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+ 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
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+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
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+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
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+ 0. This License applies to any program or other work which contains
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+ NO WARRANTY
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+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
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+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) 19yy <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) 19yy name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/include/ChangeLog b/include/ChangeLog
new file mode 100644
index 0000000..fbadf92
--- /dev/null
+++ b/include/ChangeLog
@@ -0,0 +1,1527 @@
+1999-04-11 Richard Henderson <rth@cygnus.com>
+
+ * bfdlink.h (bfd_elf_version_expr): Rename `match' to `pattern'.
+ Add `match' callback function.
+
+1999-04-10 Richard Henderson <rth@cygnus.com>
+
+ * bfdlink.h (bfd_link_info): Add no_undefined.
+
+1999-04-08 Nick Clifton <nickc@cygnus.com>
+
+ * dis-asm.h: Add prototype for print_insn_mcore.
+
+1999-04-02 Mark Mitchell <mark@codesourcery.com>
+
+ * splay-tree.h (splay_tree_compare_pointers): Declare.
+
+1999-03-30 Mark Mitchell <mark@codesourcery.com>
+
+ * splay-tree.h (splay_tree_compare_ints): Declare.
+
+Wed Mar 24 12:46:29 1999 Andrew Cagney <cagney@amy.cygnus.com>
+
+ * libiberty.h (basename): Cygwin{,32} should have the prototype.
+
+1999-02-22 Jim Lemke <jlemke@cygnus.com>
+
+ * bfdlink.h (bfd_link_info): add field "mpc860c0".
+
+Mon Feb 1 21:05:46 1999 Catherine Moore <clm@cygnus.com>
+
+ * dis-asm.h (print_insn_i386_att): Declare.
+ (print_insn_i386_intel): Declare.
+
+998-12-30 Michael Meissner <meissner@cygnus.com>
+
+ * dis-asm.h (INIT_DISASSEMBLE_INFO_NO_ARCH): Cast STREAM and
+ FPRINTF_FUNC to avoid compiler warnings.
+
+Wed Dec 30 16:07:14 1998 David Taylor <taylor@texas.cygnus.com>
+
+ * dis-asm.h: change void * to PTR (two places).
+
+Mon Dec 14 09:53:31 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * demangle.h: Don't check IN_GCC anymore.
+ * splay-tree.h: Likewise.
+
+Tue Dec 8 00:30:31 1998 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
+
+ The following changes were made by Elena Zannoni
+ <ezannoni@kwikemart.cygnus.com> and Edith Epstein
+ <eepstein@sophia.cygnus.com> as part of a project to merge in
+ changes made by HP; HP did not create ChangeLog entries.
+
+ * dis-asm.h (struct disassemble_info): change the type of stream
+ from FILE* to void*, for use with gdb's new type GDB_FILE.
+ (fprintf_ftype): change FILE* parameter type to void*.
+
+ * demangle.h: (DMGL_EDG): new macro for Kuck and Associates
+ (DMGL_STYLE_MASK): modify to include Kuck and Assoc style
+ (demangling_styles): add new edg_demangling style
+ (EDG_DEMANGLING_STYLE_STRING): new macro
+ (EDG_DEMANGLING): new macro
+
+ * demangle.h (DMGL_HP): new macro, for HP/aCC compiler.
+ (DMGL_STYLE_MASK): modify to include new HP's style.
+ (demangling_styles): add new hp_demangling value.
+ (HP_DEMANGLING_STYLE_STRING): new macro.
+ (ARM_DEMANGLING): coerce to int.
+ (HP_DEMANGLING): new macro.
+
+ * hp-symtab.h: rewritten, from HP.
+ (quick_procedure): change type of language field to unsigned int
+ (quick_module): change type of language field to unsigned int
+ (struct dntt_type_svar): add field thread_specific.
+ (hp_language): add languages modcal and dmpascal.
+
+Mon Nov 30 15:25:58 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * elf/sh.h (elf_sh_reloc_type): Add R_SH_FIRST_INVALID_RELOC,
+ R_SH_LAST_INVALID_RELOC, R_SH_SWITCH8 and R_SH_max.
+
+Fri Nov 20 13:14:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * libiberty.h (basename): Add prototype for FreeBSD.
+
+Fri Nov 13 19:19:11 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * libiberty.h: Prototype xcalloc.
+
+Sun Nov 8 17:42:25 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * ansidecl.h: Wrap problematic macros with !IN_GCC.
+
+ * demangle.h: Never define PARAMS().
+ * splay-tree.h: Likewise.
+
+Sat Nov 7 18:30:20 1998 Peter Schauer <peter.schauer@regent.e-technik.tu-muenchen.de>
+
+ * dis-asm.h (print_insn_vax): Declare.
+
+Sat Nov 7 16:04:03 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * demangle.h: Don't include gansidecl.h.
+ * splay-tree.h: Likewise.
+
+1998-10-26 16:03 Ulrich Drepper <drepper@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Add new field optimize.
+
+Thu Oct 22 19:58:00 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * splay-tree.h: Wrap function pointer parameter declarations in
+ PARAMS() macro.
+
+1998-10-21 Mark Mitchell <mark@markmitchell.com>
+
+ * splay-tree.h: New file.
+
+Fri Oct 9 00:02:03 1998 Jeffrey A Law (law@cygnus.com)
+
+ * Merge devo and egcs include directories.
+
+Sat Sep 5 12:16:33 1998 Jeffrey A Law (law@cygnus.com)
+
+ * getopt.h, obstack.h: Updated from gcc.
+
+1998-08-03 Jason Molenda (jsm@bugshack.cygnus.com)
+
+ * libiberty.h (xexit): Change decl to use modern GCC attribute
+ to indicate exit does not return.
+
+Mon Jun 1 13:48:32 1998 Jason Molenda (crash@bugshack.cygnus.com)
+
+ * obstack.h: Update to latest FSF version.
+
+Tue May 26 20:57:43 1998 Stan Cox <scox@equinox.cygnus.com>
+
+ * elf/sparc.h (EF_SPARC_LEDATA, R_SPARC_32LE): Added.
+
+Tue Feb 24 13:05:02 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * dis-asm.h (disassemble_info): Member `symbol' renamed to `symbols'
+ and made an "asymbol **". New member num_symbols.
+ (INIT_DISASSEMBLE_INFO_NO_ARCH): Update.
+
+Tue Feb 17 12:32:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_fetch_register, sim_store_register): Add
+ register length parameter. Functions return actual length of
+ register.
+
+Thu Feb 12 16:29:01 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * getopt.h: Update to latest FSF version.
+
+Wed Feb 11 16:56:06 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * symcat.h: New file.
+
+Mon Feb 2 17:13:31 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
+
+ * dis-asm.h (print_insn_tic30): Declare.
+
+Thu Jan 22 16:23:59 1998 Fred Fish <fnf@cygnus.com>
+
+ * dis-asm.h: Add flag INSN_HAS_RELOC to tell disassembly
+ function there is a reloc on this line.
+
+Mon Dec 8 11:22:23 1997 Nick Clifton <nickc@cygnus.com>
+
+ * dis-asm.h: Remove prototype of disasm_symaddr() as this function
+ no longer exists.
+
+Tue Dec 2 10:20:53 1997 Nick Clifton <nickc@cygnus.com>
+
+ * dis-asm.h (disasm_symaddr): New prototype.
+
+Mon Dec 1 20:24:18 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * coff/sh.h (R_SH_SWITCH8): New.
+
+Mon Dec 1 11:29:35 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * callback.h (CB_SYSCALL): Comment out arg names in prototypes.
+
+Wed Nov 26 16:47:58 1997 Michael Meissner <meissner@cygnus.com>
+
+ * callback.h (CB_SYSCALL): Consistantly use names for prototype
+ arguments.
+
+Wed Nov 26 11:39:30 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * callback.h (CB_SYSCALL): Change byte count arguments to
+ {read,write}_mem to `int'. New member `magic'.
+ (CB_SYSCALL_MAGIC,CB_SYSCALL_INIT): New macros.
+
+Tue Nov 25 01:35:52 1997 Doug Evans <devans@seba.cygnus.com>
+
+ * callback.h (struct stat): Move forward decl up.
+ (host_callback): Pass stat struct pointer to stat,fstat.
+ (CB_SYS_nnn): Reorganize.
+ (CB_SYSCALL): New members p1,p2.
+ (cb_host_to_target_stat): Delete fourth arg.
+
+Sat Nov 22 23:34:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_stop_reason): Clarify sim_signalled SIGRC
+ argument.
+
+Mon Nov 17 14:00:51 1997 Doug Evans <devans@seba.cygnus.com>
+
+ * callback.h (CB_TARGET_DEFS_MAP): Renamed from target_defs_map.
+ (host_callback): Add stat, fstat, syscall_map, errno_map, open_map,
+ signal_map, stat_map.
+ (errn_map,open_map): Renamed to cb_init_foo_map.
+ (cb_host_to_target_errno,cb_target_to_host_open): Renamed from
+ host_to_target_errno,target_to_host_open.
+ (cb_read_target_syscall_maps): Add prototype.
+ (cb_target_to_host_syscall): Likewise.
+ (cb_host_to_target_stat): Likewise.
+ (cb_syscall): Likewise.
+ (CB_SYS_{exit,open,close,read,write,lseek,unlink,getpid,kill,fstat,
+ argvlen,argv,chdir,stat,chmod,utime,time}): Define.
+ (CB_SYSCALL): New type.
+ (CB_RC): New enum.
+
+Fri Nov 7 10:34:09 1997 Rob Savoye <rob@darkstar.cygnus.com>
+
+ * libiberty.h: Add extern "C" { so it can be used with C++
+ programs.
+ * remote-sim.h: Add extern "C" { so it can be used with C++
+ programs.
+
+Tue Oct 14 16:07:51 1997 Nick Clifton <nickc@cygnus.com>
+
+ * dis-asm.h (struct disassemble_info): New field
+ 'symbol_at_address_func'.
+ (INIT_DISASSEMBLE_INFO_NO_ARCH): Initialise new field with
+ generic_symbol_at_address.
+
+Mon Oct 13 10:17:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h: Clarify sim_read, sim_write MEM argument.
+
+Wed Sep 24 18:03:10 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
+
+ * remote-sim.h (SIM_RC): Add a bunch of new return codes for
+ breakpoint stuff.
+ * Add functions to tell the simulator to set/clear/enable/disable
+ intrinsic breakpoints.
+
+Thu Aug 28 19:41:42 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * libiberty.h (dupargv): Add prototype.
+
+Tue Aug 26 12:25:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_create_inferior): Add ABFD arg. Document.
+
+Mon Aug 25 10:50:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_open): Add ABFD arg. Document.
+
+Fri Aug 8 16:43:56 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * dis-asm.h (arc_get_disassembler): Declare.
+
+Wed Jul 30 11:39:50 1997 Per Bothner <bothner@deneb.cygnus.com>
+
+ * demangle.h (DMGL_JAVA): New option to request Java demangling.
+
+Tue Jul 22 17:59:54 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * libiberty.h (PEXECUTE_*): Define.
+ (pexecute, pwait): Declare.
+
+Fri Jun 6 13:02:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_kill): Mark as depreciated.
+
+Fri May 23 13:43:41 1997 Fred Fish <fnf@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Add task_link member.
+
+Thu May 22 11:32:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h: Review documentation. Clarify restrictions on
+ when functions can be called.
+
+Wed May 21 16:47:53 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_set_profile_size): Add prototype, document as
+ depreciated.
+
+Tue May 20 09:32:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_open): Add callback struct.
+ (sim_set_callbacks): Drop SIM_DESC argument. Document.
+ (sim_size): Remove recently added SIM_DESC argument. Document.
+
+Mon May 19 19:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h: Pass SD into sim_size.
+
+Thu May 15 01:24:16 1997 Mark Alexander <marka@cygnus.com>
+
+ * obstack.h (obstack_specify_allocation_with_arg, obstack_chunkfun,
+ obstack_freefun): Eliminate compile warnings in gdb.
+
+Tue May 13 10:21:14 1997 Nick Clifton <nickc@cygnus.com>
+
+ * coff/arm.h (constants): Added new flag bits F_APCS_26 and
+ F_APCS_SET for the f_flags field of the filehdr structure. Added new
+ flags: F_APCS26, F_ARM_2, F_ARM_3, F_ARM_7, F_ARM_7T to store
+ information in the flags field of the internal_f structure used by BFD
+ routines.
+
+Tue Apr 22 10:24:34 1997 Fred Fish <fnf@cygnus.com>
+
+ * floatformat.h (floatformat_byteorders): Add comments for previous
+ formats and add floatformat_littlebyte_bigword, primarily for ARM.
+ Add declaration for floatformat_ieee_double_littlebyte_bigword.
+
+Fri Apr 18 13:04:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * remote-sim.h (sim_stop): New interface - asynchronous
+ notification of a request to stop / suspend the running
+ simulation.
+
+ * remote-sim.h (enum sim_stop): Add sim_running and sim_polling as
+ states for use internal to simulators.
+
+ * callback.h (struct host_callback_strut): Put a magic number at
+ the end of the struct to allow basic checking.
+ (struct host_callback_struct ): Add poll_quit - so
+ that the console etc can be polled at regular intervals.
+
+Thu Apr 17 02:17:12 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * remote-sim.h (struct _bfd): Declare.
+ (sim_load): Return SIM_RC. New arg `abfd'.
+ (sim_create_inferior): Return SIM_RC. Delete arg `start_address'.
+
+Wed Apr 2 17:09:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
+
+ * remote-sim.h (sim_trace, sim_size): Make these global. They
+ will go away shortly.
+
+Wed Apr 2 15:23:49 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * remote-sim.h (SIM_OPEN_KIND, SIM_RC): New enums.
+ (sim_open): New argument `kind'.
+
+Wed Apr 2 14:45:51 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * COPYING: Update FSF address.
+
+Fri Mar 28 15:29:54 1997 Mike Meissner <meissner@cygnus.com>
+
+ * callback.h (top level): Include stdarg.h or varargs.h if
+ va_start is not defined.
+ (host_callback_struct): Make {,e}vprintf_filtered take a va_list
+ instead of void *, since va_list might be an array or structure
+ type.
+
+Fri Mar 28 15:44:41 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
+
+ * libiberty.h (basename): Add prototype for glibc and linux.
+
+Mon Mar 17 19:22:12 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * objalloc.h: New file.
+
+Mon Mar 17 14:57:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
+
+ * remote-sim.h: New file, copied in from gdb/remote-sim.h. One
+ day this will be placed in a directory of its own.
+
+Sat Mar 15 19:00:14 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * obstack.h: Update to current FSF version.
+
+Thu Mar 6 15:46:59 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
+
+ * callback.h (struct host_callback_struct): Add callbacks -
+ flush_stdout, write_stderr, flush_stderr, vprintf_filtered,
+ evprintf_filtered. Delete redundant callbacks - printf_filtered.
+
+Thu Feb 27 23:18:27 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Remove lprefix and lprefix_len
+ fields.
+
+Tue Feb 25 00:10:49 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * dis-asm.h (INIT_DISASSEMBLE_INFO_NO_ARCH): Initialize
+ bytes_per_chunk and display_endian.
+
+Mon Feb 24 17:47:02 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ From Eric Youngdale <eric@andante.jic.com>:
+ * bfdlink.h (struct bfd_elf_version_expr): Define.
+ (struct bfd_elf_version_deps): Define.
+ (struct bfd_elf_version_tree): Define.
+
+Thu Feb 6 14:20:01 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * dis-asm.h: (disassemble_info): Add new fields
+ bytes_per_chunk and display_endian to control the
+ display of raw instructions.
+
+Fri Dec 27 22:17:37 1996 Fred Fish <fnf@cygnus.com>
+
+ * dis-asm.h (print_insn_tic80): Declare.
+
+Sun Dec 8 17:11:12 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * callback.h (host_callback): New member `error'.
+
+Wed Nov 20 00:40:23 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * callback.h: New file, moved here from gdb.
+
+Mon Nov 18 16:34:00 1996 Dawn Perchik <dawn@critters.cygnus.com>
+
+ * libiberty.h: Checkin again; last checkin failed due to sticky tag.
+
+Wed Nov 13 08:22:00 1996 Dawn Perchik <dawn@critters.cygnus.com>
+
+ * libiberty.h: Revert last commit due to conflicts with hpux
+ system headers.
+
+Tue Nov 12 16:31:00 1996 Dawn Perchik <dawn@critters.cygnus.com>
+
+ * libiberty.h: Move prototypes from argv.c here.
+
+Thu Oct 31 14:56:18 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * ansidecl.h (VPARAMS,VA_START): Define.
+
+Fri Oct 25 12:08:04 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * dis-asm.h (disassemble_info): Add bytes_per_line field.
+ (INIT_DISASSEMBLE_INFO_NO_ARCH): Initialize bytes_per_line field.
+
+Thu Oct 24 17:10:01 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * dis-asm.h (disassemble_info): Add symbol field.
+ (INIT_DISASSEMBLE_INFO_NO_ARCH): Initialize symbol field.
+
+Thu Oct 17 11:17:40 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * dis-asm.h (print_insn_m32r): Declare.
+
+Mon Oct 14 23:56:52 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * libiberty.h: Declare parameter types for xmalloc and xrealloc.
+
+Thu Oct 3 13:45:27 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * fnmatch.h: New file.
+
+Thu Oct 3 10:33:14 1996 Jeffrey A Law (law@cygnus.com)
+
+ * dis-asm.h (print_insn_mn10x00): Delete declaration.
+ (print_insn_mn10200, print_insn_mn10300): Declare.
+
+Wed Oct 2 21:24:43 1996 Jeffrey A Law (law@cygnus.com)
+
+ * dis-asm.h (print_insn_mn10x00): Declare.
+
+Mon Sep 30 13:56:11 1996 Fred Fish <fnf@cygnus.com>
+
+ * libiberty.h: Remove #ifndef PRIVATE_XMALLOC.
+
+Sat Aug 31 13:27:06 1996 Jeffrey A Law (law@cygnus.com)
+
+ * dis-asm.h (print_insn_v850): Declare.
+
+Tue Aug 13 16:10:30 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * obstack.h: Change bcopy to memcpy. Works better on Posix
+ systems, which generally lack bcopy.
+
+Mon Aug 12 17:03:18 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * ansidecl.h: Change WIN32 to _WIN32.
+
+Fri Jul 26 13:58:18 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * dis-asm.h: Add flavour field.
+ (print_insn_alpha): Declare.
+ (print_insn_alpha_osf, print_insn_alpha_vms): Don't declare.
+ (INIT_DISASSEMBLE_INFO): Initialize flavour field.
+
+Tue Jul 23 17:37:58 1996 Fred Fish <fnf@cygnus.com>
+
+ * libiberty.h (PRIVATE_XMALLOC): Enclose xmalloc/xrealloc
+ definitions inside #ifndef so that programs that want to
+ can define PRIVATE_XMALLOC and then define xmalloc and
+ xrealloc anyway they want.
+ (basename): Document in source that we can't declare the
+ parameter type because it is declared inconsistently across
+ different systems.
+
+Mon Jul 22 13:16:13 1996 Richard Henderson <rth@tamu.edu>
+
+ * dis-asm.h (print_insn_alpha): Don't declare.
+ (print_insn_alpha_osf, print_insn_alpha_vms): Declare.
+
+Wed Jul 17 14:45:12 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * dis-asm.h: (print_insn_d10v): Declare.
+
+Mon Jul 15 16:55:38 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * dis-asm.h: Get rid of decls for print_insn_i8086,
+ print_insn_sparc64 and print_insn_sparclite.
+ * (INIT_DISASSEMBLE_INFO): Split into two pieces. One,
+ INIT_DISASSEMBLE_INFO_NO_ARCH inits everything except for endian,
+ mach, and arch.
+
+Fri Jul 12 10:19:27 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * dis-asm.h (print_insn_i8086): Declare.
+
+Wed Jul 3 16:02:39 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * dis-asm.h (print_insn_sparclite): Declare.
+
+Tue Jun 18 16:02:46 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * dis-asm.h (print_insn_h8300s): Declare.
+
+Tue Jun 18 15:11:33 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * fopen-vms.h: New file.
+
+Tue Jun 4 18:58:16 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Add notice_all field.
+
+Fri Apr 26 10:33:12 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * demangle.h (#ifdef IN_GCC): #include "gansidecl.h".
+ (PROTO,PTR,const): Delete.
+
+Mon Apr 22 17:27:42 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Add traditional_format field.
+
+Mon Apr 15 15:16:56 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * libiberty.h (choose_temp_base): Add prototype.
+
+Tue Mar 12 17:29:46 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (bfd_wrapped_link_hash_lookup): Declare.
+ (struct bfd_link_info): Add wrap_hash field.
+
+Wed Feb 14 16:49:17 1996 Martin Anantharaman <martin@mail.imech.uni-duisburg.de>
+
+ * ieee.h (ieee_record_enum_type): Define
+ ieee_external_reference_info_enum.
+
+Fri Feb 2 17:09:25 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * dis-asm.h (DISASM_RAW_INSN): Delete.
+
+Tue Jan 23 09:21:47 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * dis-asm.h (INIT_DISASSEMBLE_INFO): Set endian to BFD_ENDIAN_UNKNOWN.
+ New argument FPRINTF_FUNC.
+
+Mon Jan 22 16:37:59 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * dis-asm.h (disassemble_info): New members arch, mach, endian.
+ (INIT_DISASSEMBLE_INFO): Initialize them.
+ (DISASM_RAW_INSN{,FLAG}): Define.
+
+Thu Jan 18 11:32:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * demangle.h (cplus_demangle_opname): Change opname parameter to
+ const char *.
+ (cplus_mangle_opname): Change return type and opname parameter to
+ const char *.
+
+Fri Jan 5 00:01:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ieee.h (enum ieee_record): Add ieee_asn_record_enum,
+ ieee_at_record_enum, ieee_ty_record_enum, ieee_atn_record_enum,
+ ieee_bb_record_enum, and ieee_be_record_enum.
+
+Wed Jan 3 13:12:09 1996 Fred Fish <fnf@cygnus.com>
+
+ * obstack.h: Update copyright to 1996.
+ (_obstack_memory_used): Declare.
+ (obstack_memory_used): Define macro.
+
+Thu Dec 28 11:42:12 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * libiberty.h (xstrdup): Declare.
+
+Thu Dec 21 14:47:17 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * wait.h: Protect all macros with #ifndef.
+
+Tue Oct 24 21:45:40 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Add static_link field.
+
+Tue Sep 12 16:28:04 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_callbacks): Add symbol parameter to
+ warning callback.
+
+Fri Sep 1 13:11:51 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_callbacks): Change warning callback
+ to take BFD, section, and address arguments.
+
+Thu Aug 31 16:45:12 1995 steve chamberlain <sac@slash.cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Remove PE stuff.
+
+Tue Aug 22 03:18:23 1995 Ken Raeburn <raeburn@kr-laptop.cygnus.com>
+
+ * libiberty.h: Declare xstrerror. From Pat Rankin.
+
+Mon Aug 21 18:11:36 1995 steve chamberlain <sac@slash.cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Remove PE stuff.
+
+Wed Aug 2 08:14:12 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * dis-asm.h (print_insn_sparc64): Declare.
+
+Mon Jul 10 13:26:49 1995 Eric Youngdale <eric@aib.com>
+
+ * bfdlink.h (struct bfd_link_info): Add new field symbolic.
+
+Sun Jul 2 17:48:40 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Change type of base_file to
+ PTR.
+
+Thu Jun 29 00:02:45 1995 Steve Chamberlain <sac@slash.cygnus.com>
+
+ * bfdlink.h (struct bfd_link_info): Added base_file member.
+
+Tue Jun 20 16:40:04 1995 Steve Chamberlain <sac@slash.cygnus.com>
+
+ * ansidecl.h: win32s is ANSI enough.
+
+Thu May 18 04:25:50 1995 Ken Raeburn <raeburn@kr-laptop.cygnus.com>
+
+ Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk)
+
+ * dis-asm.h (print_insn_arm): Delete declaration.
+ (print_insn_{little,big}_arm): New declarations.
+
+ * floatformat.h (floatformat_arm_ext): Declare.
+
+Sat May 13 10:14:08 1995 Steve Chamberlain <sac@slash.cygnus.com>
+
+ * coff/pe.h: New file.
+ * bfdlink.h (subsytem, stack_heap_parameters): New.
+ * coff/i386.h (NT_SECTION_ALIGNMENT, NT_FILE_ALIGNMENT,
+ NT_DEF_RESERVE, NT_DEF_COMMIT): New.
+ * coff/internal.h (internal_filehdr): New fields for PE.
+ (IMAGE_DATA_DIRECTORY): New.
+ (internal_aouthdr): New fields for PE.
+
+Thu May 4 14:36:42 1995 Jason Merrill <jason@phydeaux.cygnus.com>
+
+ * demangle.h: Don't include ansidecl.h if IN_GCC.
+
+Tue Feb 21 00:37:28 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hp-symtab.h: Don't use bitfield enumerations, the HP C compiler
+ does not handle them correctly.
+
+Thu Feb 9 14:20:27 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * libiberty.h (basename): Don't declare parameter type; some
+ systems have this in their header files.
+
+Wed Feb 8 17:35:38 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (struct bfd_link_hash_entry): Change format of common
+ symbol information, to remove restrictions on maximum size and
+ alignment power, by using a pointer to a structure instead.
+
+Mon Feb 6 14:55:32 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * bfdlink.h (enum bfd_link_hash_type): Rename bfd_link_hash_weak
+ to bfd_link_hash_undefweak. Add bfd_link_hash_defweak.
+
+Mon Jan 16 21:00:23 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ * dis-asm.h (GDB_INIT_DISASSEMBLE_INFO, etc): Remove all
+ GDB-specific definitions.
+
+Sun Jan 15 18:39:35 1995 Steve Chamberlain <sac@splat>
+
+ * dis-asm.h (print_insn_w65): Declare.
+
+Thu Jan 12 17:51:17 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * libiberty.h (hex_p): Fix sense of test.
+
+Wed Jan 11 22:36:40 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * libiberty.h (_hex_array_size, _hex_bad, _hex_value, hex_init,
+ hex_p, hex_value): New macros and declarations, for hex.c.
+
+Fri Jan 6 17:44:14 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * dis-asm.h: Make idempotent.
+
+Wed Dec 14 13:08:43 1994 Stan Shebs <shebs@andros.cygnus.com>
+
+ * progress.h: New file, empty definitions for progress macros.
+
+Fri Nov 25 00:14:05 1994 Jeff Law (law@snake.cs.utah.edu)
+
+ * hp-symtab.h: New file describing the debug symbols emitted
+ by the HP C compilers.
+
+Fri Nov 11 15:48:37 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * bfdlink.h (struct bfd_link_hash_entry): Change u.c.size from 24
+ to 26 bits, and change u.c.alignment_power from 8 to 6 bits. 6
+ bit in the alignment power is enough for a 64 bit address space.
+
+Mon Oct 31 13:02:51 1994 Stan Shebs (shebs@andros.cygnus.com)
+
+ * demangle.h (cplus_mangle_opname): Declare.
+
+Tue Oct 25 11:38:02 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * bfdlink.h (struct bfd_link_callbacks): Fix comments for
+ multiple_common field.
+
+Sun Sep 04 17:58:10 1994 Richard Earnshaw (rwe@pegasus.esprit.ec.org)
+
+ * aout/aout64.h: Only define QMAGIC if it isn't already defined.
+
+ * dis-asm.h: Add support for the ARM.
+
+Wed Aug 10 12:51:41 1994 Doug Evans (dje@canuck.cygnus.com)
+
+ * libiberty.h (strsignal): Document its existence even if we
+ can't declare it.
+
+Tue Aug 2 14:40:03 1994 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * os9k.h: Remove u_int16, u_int32, and owner_id typedefs and
+ expand their uses. Those names conflict with Mach headers.
+
+Fri Jul 22 14:17:12 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
+
+ * bfdlink.h (struct bfd_link_hash_entry): Change u.c.size into a
+ bitfield. Add field u.c.alignment_power.
+
+Sun Jul 10 00:26:39 1994 Ian Dall (dall@hfrd.dsto.gov.au)
+
+ * dis-asm.h: Add print_insn_ns32k declaration.
+
+Mon Jun 20 17:13:29 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
+
+ * bfdlink.h (bfd_link_hash_table): Make creator a const pointer.
+
+Sat Jun 18 16:09:32 1994 Stan Shebs (shebs@andros.cygnus.com)
+
+ * demangle.h (cplus_demangle_opname): Declare.
+
+Thu Jun 16 15:19:03 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfdlink.h (struct bfd_link_info): Add new field shared.
+
+Mon Jun 6 14:39:44 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfdlink.h (struct bfd_link_hash_entry): Remove written field:
+ not needed for all backends.
+
+Thu Apr 28 19:06:50 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * dis-asm.h (disassembler): Declare.
+
+Fri Apr 1 00:38:17 1994 Jim Wilson (wilson@mole.gnu.ai.mit.edu)
+
+ * obstack.h: Delete use of IN_GCC to control whether
+ stddef.h or gstddef.h is included.
+
+Tue Mar 22 13:06:02 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfdlink.h (enum bfd_link_order_type): Add bfd_data_link_order.
+ (struct bfd_link_order): Add data field to union.
+
+Mon Mar 21 18:45:26 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfdlink.h (struct bfd_link_callbacks): Change bitsize argument
+ to add_to_set to reloc. Remove bitsize argument from constructor.
+ Comment that reloc_overflow, reloc_dangerous and unattached_reloc
+ must handle NULL pointers for reloc location.
+ (enum bfd_link_order_type): Add bfd_section_reloc_link_order and
+ bfd_symbol_reloc_link_order.
+ (struct bfd_link_order): Add reloc field to union.
+ (struct bfd_link_order_reloc): Define.
+
+Mon Mar 14 12:27:50 1994 Ian Lance Taylor (ian@cygnus.com)
+
+ * ieee-float.h: Removed; no longer used.
+
+Tue Mar 1 18:10:49 1994 Kung Hsu (kung@mexican.cygnus.com)
+
+ * os9k.h: os9000 target specific header file, the header of the
+ object file is used now.
+
+Sun Feb 27 21:52:26 1994 Jim Kingdon (kingdon@deneb.cygnus.com)
+
+ * floatformat.h: New file, intended to replace ieee-float.h.
+
+Sun Feb 20 17:15:42 1994 Ian Lance Taylor (ian@lisa.cygnus.com)
+
+ * ansidecl.h (ANSI_PROTOTYPES): Define if using ANSI prototypes.
+
+Wed Feb 16 01:07:12 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * libiberty.h: Don't declare strsignal, to avoid conflicts with
+ Solaris system header files.
+
+Sat Feb 12 22:11:32 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
+
+ * libiberty.h (xexit): Use __volatile__ to avoid losing if
+ compiling with gcc -traditional.
+
+Thu Feb 10 14:05:41 1994 Ian Lance Taylor (ian@cygnus.com)
+
+ * libiberty.h: New file. Declares functions provided by
+ libiberty.
+
+Tue Feb 8 05:19:52 1994 David J. Mackenzie (djm@thepub.cygnus.com)
+
+ Handle obstack_chunk_alloc returning NULL. This allows
+ obstacks to be used by libraries, without forcing them
+ to call exit or longjmp.
+ * obstack.h (struct obstack): Add alloc_failed flag.
+ _obstack_begin, _obstack_begin_1): Declare to return int, not void.
+ (obstack_finish): If alloc_failed, return NULL.
+ (obstack_base, obstack_next_free, objstack_object_size):
+ If alloc_failed, return 0.
+ (obstack_grow, obstack_grow0, obstack_1grow, obstack_ptr_grow,
+ obstack_int_grow, obstack_blank): If alloc_failed, do nothing that
+ could corrupt the obstack.
+
+Mon Jan 24 15:06:05 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfdlink.h (struct bfd_link_callbacks): Add name, reloc_name and
+ addend argments to reloc_overflow callback.
+
+Fri Jan 21 19:13:12 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * dis-asm.h (print_insn_big_powerpc, print_insn_little_powerpc,
+ print_insn_rs6000): Declare.
+
+Thu Jan 6 14:15:55 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfdlink.h (struct bfd_link_callbacks): Add bitsize argument to
+ add_to_set field. Add new callback named constructor.
+
+Thu Dec 30 10:44:06 1993 Ian Lance Taylor (ian@rtl.cygnus.com)
+
+ * bfdlink.h: New file for new BFD linker backend routines.
+
+Mon Nov 29 10:43:57 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * dis-asm.h (enum dis_insn_tyupe): Remove non-ANSI trailing comma.
+
+Sat Oct 2 20:42:26 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * dis-asm.h: Move comment to right place.
+
+Mon Aug 9 19:03:35 1993 David J. Mackenzie (djm@thepub.cygnus.com)
+
+ * obstack.h (obstack_chunkfun, obstack_freefun): Add defns from
+ previous version. Are these Cygnus local changes?
+
+Fri Aug 6 17:05:47 1993 David J. Mackenzie (djm@thepub.cygnus.com)
+
+ * getopt.h, obstack.h: Update to latest FSF version.
+
+Mon Aug 2 16:37:14 1993 Stu Grossman (grossman at cygnus.com)
+
+ * coff/i386.h: Add Lynx magic number.
+
+Mon Aug 2 14:45:29 1993 John Gilmore (gnu@cygnus.com)
+
+ * dis-asm.h: Move enum outside of struct defn to avoid warnings.
+
+Mon Aug 2 08:49:30 1993 Stu Grossman (grossman at cygnus.com)
+
+ * wait.h (WEXITSTATUS, WSTOPSIG): Mask down to 8 bits. This is
+ for systems that store stuff into the high 16 bits of a wait
+ status.
+
+Fri Jul 30 18:38:02 1993 John Gilmore (gnu@cygnus.com)
+
+ * dis-asm.h: Add new fields insn_info_valid, branch_delay_insns,
+ data_size, insn_type, target, target2. These are used to return
+ information from the instruction decoders back to the calling
+ program. Add comments, make more readable.
+
+Mon Jul 19 22:14:14 1993 Fred Fish (fnf@deneb.cygnus.com)
+
+ * nlm: New directory containing NLM/NetWare includes.
+
+Thu Jul 15 12:10:04 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * dis-asm.h (struct disassemble_info): New field application_data.
+
+Thu Jul 15 12:41:15 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * dis-asm.h: Added declaration of print_insn_m88k.
+
+Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
+
+ * opcode/h8300.h: Lots of little fixes for the h8/300h.
+
+Fri Jul 2 10:31:59 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * ansidecl.h: Use ANSI macros if __mips and _SYSTYPE_SVR4 are
+ defined, since RISC/OS cc handles ANSI declarations in SVR4 mode
+ but does not define __STDC__.
+
+Sun Jun 20 18:27:52 1993 Ken Raeburn (raeburn@poseidon.cygnus.com)
+
+ * dis-asm.h: Don't need to include ansidecl.h any more.
+
+Fri Jun 18 03:22:10 1993 John Gilmore (gnu@cygnus.com)
+
+ * oasys.h: Eliminate "int8_type", "int16_type", "int32_type", and
+ their variants. These changes are coordinated with corresponding
+ changes in ../bfd/oasys.c.
+
+Wed Jun 16 10:43:08 1993 Fred Fish (fnf@cygnus.com)
+
+ * bfd.h: Note that it has been removed.
+
+Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
+
+ Support for H8/300-H
+ * dis-asm.h (print_insn_h8300, print_insn_h8300h): Declare it.
+ * coff/h8300.h: New magic number.
+ * coff/internal.h: New relocations.
+ * opcode/h8300.h: Lots of new opcodes.
+
+Tue Jun 1 07:35:03 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
+
+ * ansidecl.h (const): Don't define it if it's already defined.
+
+Thu May 27 18:19:51 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * dis-asm.h (print_insn_hppa): Declare it.
+
+ * bfd.h: Moved to bfd directory. Small stub here includes it
+ without requiring "-I../bfd".
+
+Thu Apr 29 12:06:13 1993 Ken Raeburn (raeburn@deneb.cygnus.com)
+
+ * bfd.h: Updated with BSF_FUNCTION.
+
+Mon Apr 26 18:15:50 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * bfd.h, dis-asm.h: Updated with Hitachi SH.
+
+Fri Apr 23 18:41:38 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * bfd.h: Updated with alpha changes.
+ * dis-asm.h: Added alpha.
+
+Fri Apr 16 17:35:30 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * bfd.h: Update for signed bfd_*get_*.
+
+Thu Apr 15 09:24:21 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * bfd.h: Updated for file_truncated error.
+
+Thu Apr 8 10:53:47 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * ansidecl.h: If no ANSI, define const to be empty.
+
+Thu Apr 1 09:00:10 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * dis-asm.h: Declare a29k and i960 print_insn_*.
+
+ * dis-asm.h: Add print_address_func and related stuff.
+
+ * dis-asm.h (dis_asm_read_memory): Fix prototype.
+
+Wed Mar 31 17:40:16 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * dis-asm.h: Add print_insn_sparc.
+
+Wed Mar 31 17:51:42 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * bfd.h: Updated for BFD_RELOC_MIPS_GPREL and bfd_[gs]et_gp_size
+ prototypes.
+
+Wed Mar 31 16:35:12 1993 Stu Grossman (grossman@cygnus.com)
+
+ * dis-asm.h: (disassemble_info): Fix typo in prototype of
+ dis_asm_memory_error().
+
+Tue Mar 30 19:09:23 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * dis-asm.h (disassembler_info): Add read_memory_func,
+ memory_error_func, buffer, and length.
+ ({GDB_,}INIT_DISASSEMBLE_INFO): Set them.
+ print_insn_*: Remove second argument.
+
+Tue Mar 30 14:48:55 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * bfd.h: Update for lma field of section.
+
+Tue Mar 30 12:22:55 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * ansidecl.h: Use ANSI versions on AIX regardless of __STDC__.
+
+Fri Mar 19 14:49:49 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * dis-asm.h: Add h8500.
+
+Thu Mar 18 13:49:09 1993 Per Bothner (bothner@rtl.cygnus.com)
+
+ * ieee-float.h: Moved from ../gdb.
+ * dis-asm.h: New file. Interface to dis-assembler.
+
+Thu Mar 11 10:52:57 1993 Fred Fish (fnf@cygnus.com)
+
+ * demangle.h (DMGL_NO_OPTS): Add define (set to 0) to use
+ in place of bare 0, for readability reasons.
+
+Tue Mar 2 17:50:11 1993 Fred Fish (fnf@cygnus.com)
+
+ * demangle.h: Replace all references to cfront with ARM.
+
+Tue Feb 23 12:21:14 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * bfd.h: Update for new elements in JUMP_TABLE.
+
+Tue Feb 16 00:51:30 1993 John Gilmore (gnu@cygnus.com)
+
+ * bfd.h: Update for BFD_VERSION 2.1.
+
+Tue Jan 26 11:49:20 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * bfd.h: Update for SEC_IS_COMMON flag.
+
+Tue Jan 19 12:25:12 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfd.h: Update for bfd_asymbol_value bug fix.
+
+Fri Jan 8 16:37:18 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * bfd.h: Update to include ECOFF tdata and target_flavour.
+
+Sun Dec 27 17:52:30 1992 Fred Fish (fnf@cygnus.com)
+
+ * bfd.h: Add declaration for bfd_get_size().
+
+Tue Dec 22 22:42:46 1992 Fred Fish (fnf@cygnus.com)
+
+ * demangle.h: Protect file from multiple inclusions with
+ #if !defined(DEMANGLE_H)...#define DEMANGLE_H...#endif.
+
+Mon Dec 21 21:25:50 1992 Stu Grossman (grossman at cygnus.com)
+
+ * bfd.h: Update to get hppa_core_struct from bfd.c.
+
+Thu Dec 17 00:42:35 1992 John Gilmore (gnu@cygnus.com)
+
+ * bfd.h: Update to get tekhex tdata name change from bfd.
+
+Mon Nov 9 23:55:42 1992 John Gilmore (gnu@cygnus.com)
+
+ * ansidecl.h: Update comments to discourage use of EXFUN.
+
+Thu Nov 5 16:35:44 1992 Ian Lance Taylor (ian@cygnus.com)
+
+ * bfd.h: Update to bring in SEC_SHARED_LIBRARY.
+
+Thu Nov 5 03:21:32 1992 John Gilmore (gnu@cygnus.com)
+
+ * bfd.h: Update to match EXFUN, bfd_seclet_struct, and SDEF
+ cleanups in bfd.
+
+Wed Nov 4 07:28:05 1992 Ken Raeburn (raeburn@cygnus.com)
+
+ * bout.h (N_CALLNAME, N_BALNAME): Define as char-type values, so
+ widening works consistently.
+
+Fri Oct 16 03:17:08 1992 John Gilmore (gnu@cygnus.com)
+
+ * getopt.h: Update to Revised Standard FSF Version.
+
+Thu Oct 15 21:43:22 1992 K. Richard Pixley (rich@sendai.cygnus.com)
+
+ * getopt.h (struct option): use the provided enum for has_arg.
+
+ * demangle.h (AUTO_DEMANGLING, GNU_DEMANGLING,
+ LUCID_DEMANGLING): ultrix compilers require enums to be
+ enums and ints to be ints and casts where they meet. cast some
+ enums into ints.
+
+Thu Oct 15 04:35:51 1992 John Gilmore (gnu@cygnus.com)
+
+ * bfd.h: Update after comment changes.
+
+Thu Oct 8 09:03:02 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * bfd.h (bfd_get_symbol_leading_char): new macro for getting in xvec
+
+Thu Sep 3 09:10:50 1992 Stu Grossman (grossman at cygnus.com)
+
+ * bfd.h (struct reloc_howto_struct): size needs to be signed if
+ it's going to hold negative values.
+
+Sun Aug 30 17:50:27 1992 Per Bothner (bothner@rtl.cygnus.com)
+
+ * demangle.h: New file, moved from ../gdb. Made independent
+ of gdb. Allow demangling style option to be passed as a
+ parameter to cplus_demangle(), but using the
+ current_demangling_style global as the default.
+
+Sat Aug 29 10:07:55 1992 Fred Fish (fnf@cygnus.com)
+
+ * obstack.h: Merge comment change from current FSF version.
+
+Thu Aug 27 12:59:29 1992 Brendan Kehoe (brendan@cygnus.com)
+
+ * bfd.h: add we32k
+
+Tue Aug 25 15:07:47 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * bfd.h: new after Z8000 stuff
+
+Mon Aug 17 09:01:23 1992 Ken Raeburn (raeburn@cygnus.com)
+
+ * bfd.h: Regenerated after page/segment size changes.
+
+Sat Aug 1 13:46:31 1992 Fred Fish (fnf@cygnus.com)
+
+ * obstack.h: Merge changes from current FSF version.
+
+Mon Jul 20 21:06:23 1992 Fred Fish (fnf@cygnus.com)
+
+ * obstack.h (area_id, flags): Remove, replace with extra_arg,
+ use_extra_arg, and maybe_empty_object.
+ * obstack.h (OBSTACK_MAYBE_EMPTY_OBJECT, OBSTACK_MMALLOC_LIKE):
+ Remove, replaced by maybe_empty_object and use_extra_arg bitfields.
+ * obstack.h (obstack_full_begin, _obstack_begin): Remove area_id
+ and flags arguments.
+ * obstack.h (obstack_alloc_arg): New macro to set extra_arg.
+
+Thu Jul 16 08:12:44 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * bfd.h: new after adding BFD_IS_RELAXABLE
+
+Sat Jul 4 03:22:23 1992 John Gilmore (gnu at cygnus.com)
+
+ * bfd.h: Regen after adding BSF_FILE.
+
+Mon Jun 29 14:18:36 1992 Fred Fish (fnf at sunfish)
+
+ * obstack.h: Convert bcopy() use to memcpy(), which is more
+ portable, more standard, and can take advantage of gcc's builtin
+ functions for increased performance.
+
+Thu Jun 25 04:46:08 1992 John Gilmore (gnu at cygnus.com)
+
+ * ansidecl.h (PARAMS): Incorporate this macro from gdb's defs.h.
+ It's a cleaner way to forward-declare function prototypes.
+
+Fri Jun 19 15:46:32 1992 Stu Grossman (grossman at cygnus.com)
+
+ * bfd.h: HPPA merge.
+
+Tue Jun 16 21:30:56 1992 K. Richard Pixley (rich@cygnus.com)
+
+ * getopt.h: gratuitous white space changes merged from other prep
+ releases.
+
+Thu Jun 11 01:10:55 1992 John Gilmore (gnu at cygnus.com)
+
+ * bfd.h: Regen'd from bfd.c after removing elf_core_tdata_struct.
+
+Mon May 18 17:29:03 1992 K. Richard Pixley (rich@cygnus.com)
+
+ * getopt.h: merged changes from make-3.62.11.
+
+ * getopt.h: merged changes from grep-1.6 (alpha).
+
+Fri May 8 14:53:32 1992 K. Richard Pixley (rich@cygnus.com)
+
+ * getopt.h: merged changes from bison-1.18.
+
+Sat Mar 14 17:25:20 1992 Fred Fish (fnf@cygnus.com)
+
+ * obstack.h: Add "area_id" and "flags" members to obstack
+ structure. Add obstack_chunkfun() and obstack_freefun() to
+ set functions explicitly. Convert maybe_empty_object to
+ a bit in "flags".
+
+Thu Feb 27 22:01:02 1992 Per Bothner (bothner@cygnus.com)
+
+ * wait.h (WIFSTOPPED): Add IBM rs6000-specific version.
+
+Fri Feb 21 20:49:20 1992 John Gilmore (gnu at cygnus.com)
+
+ * obstack.h: Add obstack_full_begin.
+ * bfd.h, obstack.h: Protolint.
+
+Thu Jan 30 01:18:42 1992 John Gilmore (gnu at cygnus.com)
+
+ * bfd.h: Remove comma from enum declaration.
+
+Mon Jan 27 22:01:13 1992 Steve Chamberlain (sac at cygnus.com)
+
+ * bfd.h : new target entr, bfd_relax_section
+
+Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
+
+ * bfd.h, ieee.h, opcode/m68k.h, opcode/sparc.h: ANSIfy enums.
+
+Thu Dec 12 20:59:56 1991 John Gilmore (gnu at cygnus.com)
+
+ * fopen-same.h, fopen-bin.h: New files for configuring
+ whether fopen distinguishes binary files or not. For use
+ by host-dependent config files.
+
+Sat Nov 30 20:46:43 1991 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * bfd.h: change the documentation format.
+
+ * created coff, elf and opcode and aout directories. Moved:
+
+ aout64.h ==> aout/aout64.h
+ ar.h ==> aout/ar.h
+ a.out.encap.h ==> aout/encap.h
+ a.out.host.h ==> aout/host.h
+ a.out.hp.h ==> aout/hp.h
+ a.out.sun4.h ==> aout/sun4.h
+ ranlib.h ==> aout/ranlib.h
+ reloc.h ==> aout/reloc.h
+ stab.def ==> aout/stab.def
+ stab.gnu.h ==> aout/stab_gnu.h
+
+ coff-a29k.h ==> coff/a29k.h
+ coff-h8300.h ==> coff/h8300.h
+ coff-i386.h ==> coff/i386.h
+ coff-i960.h ==> coff/i960.h
+ internalcoff.h ==> coff/internal.h
+ coff-m68k.h ==> coff/m68k.h
+ coff-m88k.h ==> coff/m88k.h
+ coff-mips.h ==> coff/mips.h
+ coff-rs6000.h ==> coff/rs6000.h
+
+ elf-common.h ==> elf/common.h
+ dwarf.h ==> elf/dwarf.h
+ elf-external.h ==> elf/external.h
+ elf-internal.h ==> elf/internal.h
+
+ a29k-opcode.h ==> opcode/a29k.h
+ arm-opcode.h ==> opcode/arm.h
+ h8300-opcode.h ==> opcode/h8300.h
+ i386-opcode.h ==> opcode/i386.h
+ i860-opcode.h ==> opcode/i860.h
+ i960-opcode.h ==> opcode/i960.h
+ m68k-opcode.h ==> opcode/m68k.h
+ m88k-opcode.h ==> opcode/m88k.h
+ mips-opcode.h ==> opcode/mips.h
+ np1-opcode.h ==> opcode/np1.h
+ ns32k-opcode.h ==> opcode/ns32k.h
+ pn-opcode.h ==> opcode/pn.h
+ pyr-opcode.h ==> opcode/pyr.h
+ sparc-opcode.h ==> opcode/sparc.h
+ tahoe-opcode.h ==> opcode/tahoe.h
+ vax-opcode.h ==> opcode/vax.h
+
+
+
+Wed Nov 27 10:38:31 1991 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * internalcoff.h: (internal_scnhdr) took out #def dependency, now
+ s_nreloc and s_nlnno are always long. (internal_reloc): allways
+ has an offset field now.
+
+Fri Nov 22 08:12:58 1991 John Gilmore (gnu at cygnus.com)
+
+ * coff-rs6000.h: Lint; use unsigned chars for external fields.
+ * internalcoff.h: Lint; cast storage classes to signed char.
+
+Thu Nov 21 21:01:05 1991 Per Bothner (bothner at cygnus.com)
+
+ * stab.def: Remove the GNU extended type codes (e.g. N_SETT).
+ * aout64.h: The heuristic for distinguishing between
+ sunos-style and bsd-style ZMAGIC files (wrt. where the
+ text segment starts) is moved into (the default definition of)
+ the macro N_HEADER_IN_TEXT. This definition is only used
+ if no other definition is used - e.g. bfd/newsos3.c defines
+ N_HEADER_IN_TEXT(x) to be always 0 (as before).
+
+Thu Nov 21 11:53:03 1991 John Gilmore (gnu at cygnus.com)
+
+ * aout64.h (N_TXTADDR, N_TXTOFF, N_TXTSIZE): New definitions
+ that should handle all uses. LOGICAL_ versions deleted.
+ Eliminate N_HEADER_IN_TEXT, using a_entry to determine which
+ kind of zmagic a.out file we are looking at.
+ * coff-rs6000.h: Typo.
+
+Tue Nov 19 18:43:37 1991 Per Bothner (bothner at cygnus.com)
+
+ (Note: This is a revised entry, as was aout64.h.)
+ * aout64.h: Some cleanups of N_TXTADDR and N_TXTOFF:
+ Will now work for both old- and new-style ZMAGIC files,
+ depending on N_HEADER_IN_TEXT macro.
+ Add LOGICAL_TXTADDR, LOICAL_TXTOFF and LOGICAL_TXTSIZE
+ that don't count the exec header as part
+ of the text segment, to be consistent with bfd.
+ * a.out.sun4.h: Simplified/fixed for previous change.
+
+Mon Nov 18 00:02:06 1991 Fred Fish (fnf at cygnus.com)
+
+ * dwarf.h: Update to DWARF draft 5 version from gcc2.
+
+Thu Nov 14 19:44:59 1991 Per Bothner (bothner at cygnus.com)
+
+ * stab.def: Added defs for extended GNU symbol types,
+ such as N_SETT. These are normally ifdef'd out (because
+ of conflicts with a.out.gnu.h), but are used by bfb_stab_name().
+
+Thu Nov 14 19:17:03 1991 Fred Fish (fnf at cygnus.com)
+
+ * elf-common.h: Add defines to support ELF symbol table code.
+
+Mon Nov 11 19:01:06 1991 Fred Fish (fnf at cygnus.com)
+
+ * elf-internal.h, elf-external.h, elf-common.h: Add support for
+ note sections, which are used in ELF core files to hold copies
+ of various /proc structures.
+
+Thu Nov 7 08:58:26 1991 Steve Chamberlain (sac at cygnus.com)
+
+ * internalcoff.h: took out the M88 dependency in the lineno
+ struct.
+ * coff-m88k.h: defines GET_LINENO_LNNO and PUT_LINENO_LNNO to use
+ 32bit linno entries.
+ * a29k-opcode.h: fixed encoding of mtacc
+
+Sun Nov 3 11:54:22 1991 Per Bothner (bothner at cygnus.com)
+
+ * bfd.h: Updated from ../bfd/bfd-in.h (q.v).
+
+Fri Nov 1 11:13:53 1991 John Gilmore (gnu at cygnus.com)
+
+ * internalcoff.h: Add x_csect defines.
+
+Fri Oct 25 03:18:20 1991 John Gilmore (gnu at cygnus.com)
+
+ * Rename COFF-related files in `coff-ARCH.h' form.
+ coff-a29k.h, coff-i386.h, coff-i960.h, coff-m68k.h, coff-m88k.h,
+ coff-mips.h, coff-rs6000.h to be exact.
+
+Thu Oct 24 22:11:11 1991 John Gilmore (gnu at cygnus.com)
+
+ RS/6000 support, by Metin G. Ozisik, Mimi Phûông-Thåo Võ, and
+ John Gilmore.
+
+ * a.out.gnu.h: Update slightly.
+ * bfd.h: Add new error code, fix doc, add bfd_arch_rs6000.
+ * internalcoff.h: Add more F_ codes for filehdr. Add
+ rs/6000-dependent fields to aouthdr. Add storage classes
+ to syments. Add 6000-specific auxent. Add r_size in reloc.
+ * rs6000coff.c: New file.
+
+Thu Oct 24 04:13:20 1991 Fred Fish (fnf at cygnus.com)
+
+ * dwarf.h: New file for dwarf support. Copied from gcc2
+ distribution.
+
+Wed Oct 16 13:31:45 1991 John Gilmore (gnu at cygnus.com)
+
+ * aout64.h: Remove PAGE_SIZE defines; they are target-dependent.
+ Add N_FN_SEQ for N_FN symbol type used on Sequent machines.
+ * stab.def: Include N_FN_SEQ in table.
+ * bout.h: External formats of structures use unsigned chars.
+
+Fri Oct 11 12:40:43 1991 Steve Chamberlain (steve at cygnus.com)
+
+ * bfd.h:upgrade from bfd.c
+ * internalcoff.h: add n_name, n_zeroes and n_offset macros
+ * amdcoff.h: Define OMAGIC and AOUTHDRSZ.
+
+Fri Oct 11 10:58:06 1991 Per Bothner (bothner at cygnus.com)
+
+ * a.out.host.h: Change SEGMENT_SIZE to 0x1000 for Sony.
+ * bfd.h (align_power): Add (actually move) comment.
+
+Tue Oct 8 15:29:32 1991 Per Bothner (bothner at cygnus.com)
+
+ * sys/h-rtbsd.h: Define MISSING_VFPRINT (for binutils/bucomm.c).
+
+Sun Oct 6 19:24:39 1991 John Gilmore (gnu at cygnus.com)
+
+ * aout64.h: Move struct internal_exec to ../bfd/libaout.h so
+ it can be shared by all `a.out-family' code. Rename
+ EXTERNAL_LIST_SIZE to EXTERNAL_NLIST_SIZE. Use basic types
+ for nlist members, and make strx integral rather than pointer.
+ More commentary on n_type values.
+ * bout.h: Provide a struct external_exec rather than an
+ internal_exec.
+ * m68kcoff.h: Remove `tagentries' which snuck in from the i960
+ COFF port.
+
+Fri Oct 4 01:25:59 1991 John Gilmore (gnu at cygnus.com)
+
+ * h8300-opcode.h: Remove `_enum' from the typedef for an enum.
+ * bfd.h: Update to match bfd changes.
+
+ * sys/h-i386mach.h, sysdep.h: Add 386 Mach host support.
+
+Tue Oct 1 04:58:42 1991 John Gilmore (gnu at cygnus.com)
+
+ * bfd.h, elf-common.h, elf-external.h, elf-internal.h:
+ Add preliminary ELF support, sufficient for GDB, from Fred Fish.
+ * sysdep.h, sys/h-amix.h: Support Amiga SVR4.
+
+ * sys/h-vaxult.h: Make it work. (David Taylor <taylor@think.com>)
+ * a.out.vax.h: Remove unused and confusing file.
+
+Mon Sep 30 12:52:35 1991 Per Bothner (bothner at cygnus.com)
+
+ * sysdep.h: Define NEWSOS3_SYS, and use it.
+
+Fri Sep 20 13:38:21 1991 John Gilmore (gnu at cygnus.com)
+
+ * a.out.gnu.h (N_FN): Its value *really is* 0x1F.
+ Fix it, and add comments warning about or-ing N_EXT with it
+ and/or N_WARNING.
+ * aout64.h (N_FN): Fix value, add comments about N_EXT.
+ * stab.def (table at end): Update to show all the type
+ values <0x20, including low order bits. Move N_FN to
+ its rightful place.
+
+Tue Sep 17 17:41:37 1991 Stu Grossman (grossman at cygnus.com)
+
+ * sys/h-irix3.h: sgi/irix support.
+
+Tue Sep 17 07:52:59 1991 John Gilmore (gnu at cygint.cygnus.com)
+
+ * stab.def (N_DEFD): Add GNU Modula-2 debug stab, from Andrew
+ Beers.
+
+Thu Sep 12 14:12:59 1991 John Gilmore (gnu at cygint.cygnus.com)
+
+ * internalcoff.h (SYMNMLEN, FILNMLEN, DIMNUM): Define these
+ for internalcoff, separately from the various external coff's.
+ * amdcoff.h, bcs88kcoff.h, i386coff.h, intel-coff.h, m68kcoff.h,
+ m88k-bcs.h: Prefix SYMNMLEN, FILNMLEN, and DIMNUM with E_'s for
+ the external struct definitions.
+ * ecoff.h: Remove these #define's, kludge no longer needed.
+
+ * sys/h-ultra3.h: Add new Ultracomputer host.
+ * sysdep.h: Add ULTRA3_SYM1_SYS and use it.
+
+Tue Sep 10 10:11:46 1991 John Gilmore (gnu at cygint.cygnus.com)
+
+ * i386coff.h (LINESZ): Always 6, not based on sizeof().
+ (Fix from Peter Schauer <pes@regent.e-technik.tu-muenchen.de>.)
+
+Wed Sep 4 08:58:37 1991 John Gilmore (gnu at cygint.cygnus.com)
+
+ * a.out.gnu.h, aout64.h: Add N_WARNING. Change N_FN to 0x0E,
+ to match SunOS and BSD. Add N_COMM as 0x12 for SunOS shared lib
+ support.
+ * stab.def: Add N_COMM to table, fix overlap comment.
+
+Tue Sep 3 06:29:20 1991 John Gilmore (gnu at cygint.cygnus.com)
+
+ Merge with latest FSF versions of these files.
+
+ * stab.gnu.h: Add LAST_UNUSED_STAB_CODE.
+ * stab.def: Update to GPL2. Move N_WARNING out, since not a
+ debug symbol. Change comments, and reorder table to numeric
+ order. Update final table comment.
+ (N_DSLINE, N_BSLINE): Renumber from 0x66 and 0x68, to 0x46 and 0x48.
+
+ * obstack.h: GPL2. Merge.
+
+Fri Aug 23 01:54:23 1991 John Gilmore (gnu at cygint.cygnus.com)
+
+ * a.out.gnu.h, a.out.sun4.h: Make SEGMENT_SIZE able to depend
+ on the particular a.out being examined.
+ * a.out.sun4.h: Define segment sizes for Sun-3's and Sun-4's.
+ * FIXME: a.out.gnu.h is almost obsolete.
+ * FIXME: a.out.sun4.h should be renamed a.out.sun.h now.
+
+Wed Aug 21 20:32:13 1991 John Gilmore (gnu at cygint.cygnus.com)
+
+ * Start a ChangeLog for the includes directory.
+
+ * a.out.gnu.h (N_FN): Fix value -- was 15, should be 0x1E.
+ * stab.def: Update allocation table in comments at end,
+ to reflect reality as I know it.
+
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/include/ansidecl.h b/include/ansidecl.h
new file mode 100644
index 0000000..cdb9fb7
--- /dev/null
+++ b/include/ansidecl.h
@@ -0,0 +1,163 @@
+/* ANSI and traditional C compatability macros
+ Copyright 1991, 1992, 1996 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* ANSI and traditional C compatibility macros
+
+ ANSI C is assumed if __STDC__ is #defined.
+
+ Macro ANSI C definition Traditional C definition
+ ----- ---- - ---------- ----------- - ----------
+ PTR `void *' `char *'
+ LONG_DOUBLE `long double' `double'
+ VOLATILE `volatile' `'
+ SIGNED `signed' `'
+ PTRCONST `void *const' `char *'
+ ANSI_PROTOTYPES 1 not defined
+
+ CONST is also defined, but is obsolete. Just use const.
+
+ obsolete -- DEFUN (name, arglist, args)
+
+ Defines function NAME.
+
+ ARGLIST lists the arguments, separated by commas and enclosed in
+ parentheses. ARGLIST becomes the argument list in traditional C.
+
+ ARGS list the arguments with their types. It becomes a prototype in
+ ANSI C, and the type declarations in traditional C. Arguments should
+ be separated with `AND'. For functions with a variable number of
+ arguments, the last thing listed should be `DOTS'.
+
+ obsolete -- DEFUN_VOID (name)
+
+ Defines a function NAME, which takes no arguments.
+
+ obsolete -- EXFUN (name, (prototype)) -- obsolete.
+
+ Replaced by PARAMS. Do not use; will disappear someday soon.
+ Was used in external function declarations.
+ In ANSI C it is `NAME PROTOTYPE' (so PROTOTYPE should be enclosed in
+ parentheses). In traditional C it is `NAME()'.
+ For a function that takes no arguments, PROTOTYPE should be `(void)'.
+
+ obsolete -- PROTO (type, name, (prototype) -- obsolete.
+
+ This one has also been replaced by PARAMS. Do not use.
+
+ PARAMS ((args))
+
+ We could use the EXFUN macro to handle prototype declarations, but
+ the name is misleading and the result is ugly. So we just define a
+ simple macro to handle the parameter lists, as in:
+
+ static int foo PARAMS ((int, char));
+
+ This produces: `static int foo();' or `static int foo (int, char);'
+
+ EXFUN would have done it like this:
+
+ static int EXFUN (foo, (int, char));
+
+ but the function is not external...and it's hard to visually parse
+ the function name out of the mess. EXFUN should be considered
+ obsolete; new code should be written to use PARAMS.
+
+ DOTS is also obsolete.
+
+ Examples:
+
+ extern int printf PARAMS ((const char *format, ...));
+*/
+
+#ifndef _ANSIDECL_H
+
+#define _ANSIDECL_H 1
+
+
+/* Every source file includes this file,
+ so they will all get the switch for lint. */
+/* LINTLIBRARY */
+
+
+#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32)
+/* All known AIX compilers implement these things (but don't always
+ define __STDC__). The RISC/OS MIPS compiler defines these things
+ in SVR4 mode, but does not define __STDC__. */
+
+#define PTR void *
+#define PTRCONST void *CONST
+#define LONG_DOUBLE long double
+
+#ifndef IN_GCC
+#define AND ,
+#define NOARGS void
+#define VOLATILE volatile
+#define SIGNED signed
+#endif /* ! IN_GCC */
+
+#define PARAMS(paramlist) paramlist
+#define ANSI_PROTOTYPES 1
+
+#define VPARAMS(ARGS) ARGS
+#define VA_START(va_list,var) va_start(va_list,var)
+
+/* These are obsolete. Do not use. */
+#ifndef IN_GCC
+#define CONST const
+#define DOTS , ...
+#define PROTO(type, name, arglist) type name arglist
+#define EXFUN(name, proto) name proto
+#define DEFUN(name, arglist, args) name(args)
+#define DEFUN_VOID(name) name(void)
+#endif /* ! IN_GCC */
+
+#else /* Not ANSI C. */
+
+#define PTR char *
+#define PTRCONST PTR
+#define LONG_DOUBLE double
+
+#ifndef IN_GCC
+#define AND ;
+#define NOARGS
+#define VOLATILE
+#define SIGNED
+#endif /* !IN_GCC */
+
+#ifndef const /* some systems define it in header files for non-ansi mode */
+#define const
+#endif
+
+#define PARAMS(paramlist) ()
+
+#define VPARAMS(ARGS) (va_alist) va_dcl
+#define VA_START(va_list,var) va_start(va_list)
+
+/* These are obsolete. Do not use. */
+#ifndef IN_GCC
+#define CONST
+#define DOTS
+#define PROTO(type, name, arglist) type name ()
+#define EXFUN(name, proto) name()
+#define DEFUN(name, arglist, args) name arglist args;
+#define DEFUN_VOID(name) name()
+#endif /* ! IN_GCC */
+
+#endif /* ANSI C. */
+
+#endif /* ansidecl.h */
diff --git a/include/aout/ChangeLog b/include/aout/ChangeLog
new file mode 100644
index 0000000..854cfd5
--- /dev/null
+++ b/include/aout/ChangeLog
@@ -0,0 +1,178 @@
+Sun Jun 28 11:33:48 1998 Peter Schauer <pes@regent.e-technik.tu-muenchen.de>
+
+ * stab.def: Add N_ALIAS from SunPro F77.
+
+Mon Mar 11 12:15:52 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * stab.def: Use __define_stab_duplicate rather than __define_stab
+ for duplicate entries N_BROWS and N_MOD2.
+ * stab_gnu.h (__define_stab_duplicate): Define before including
+ stab.def.
+
+Fri Oct 27 17:47:16 1995 Niklas Hallqvist <niklas@appli.se>
+
+ * aout64.h, host.h, hp300hpux.h, sun4.h: Changed PAGE_SIZE to
+ TARGET_PAGE_SIZE.
+
+Tue Sep 12 12:07:02 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * sun4.h (struct internal_sun4_dynamic_link): Change all fields
+ from long to unsigned long.
+
+Wed Jul 12 00:15:13 1995 Ken Raeburn <raeburn@kr-pc.cygnus.com>
+
+ * sun4.h (PAGE_SIZE): Undefine before defining.
+
+Thu Jun 16 14:22:55 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * aout64.h (BMAGIC): Define.
+
+Sat Jun 11 16:16:09 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ Add weak symbols as an extension to a.out.
+ * aout64.h (N_WEAKU, N_WEAKA, N_WEAKT, N_WEAKD, N_WEAKB): Define.
+ * stab.def: Update symbol value table.
+
+Thu Jun 2 17:13:38 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * sun4.h (EXTERNAL_SUN4_DYNAMIC_DEBUGGER_SIZE): Correct from 28 to
+ 24. Fix up ld_got comment.
+
+Wed Mar 30 00:31:49 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
+
+ * dynix3.h: Cleanup, adapt to current bfd version.
+
+Sat Feb 26 10:25:53 1994 Ian Lance Taylor (ian@cygnus.com)
+
+ * aout64.h: Add casts to avoid warnings from SVR4 cc.
+
+Fri Feb 11 12:56:04 1994 Stan Shebs (shebs@andros.cygnus.com)
+
+ * ar.h (ARMAG, ARMAGB, ARFMAG): Change '\n' to '\012', for greater
+ portability.
+
+Fri Jan 21 00:59:06 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * sun4.h: Added information about SunOS shared libraries.
+
+Fri Jan 7 08:20:13 1994 Jim Kingdon (kingdon@deneb.cygnus.com)
+
+ * aout64.h (N_TXTADDR): Add comment regarding OMAGIC and NMAGIC.
+
+Sat Dec 25 14:55:41 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * aout64.h (N_DATOFF): Don't pad (revert change of 8 Jul 1993).
+
+Tue Nov 16 15:43:46 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * aout64.h: New macros ZMAGIC_DISK_BLOCK_SIZE and N_DISK_BLOCK_SIZE
+ for Linux ZMAGIC.
+ (N_TXTOFF, N_DATOFF): Use them.
+
+Thu Nov 4 00:33:48 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
+
+ * aout64.h (RELOC_STD_BITS_RELATIVE_LITTLE): Fixed value to match
+ sun3 system; used to overlap other fields.
+ (RELOC_STD_BITS_JMPTABLE_LITTLE): Likewise.
+
+Wed Nov 3 13:48:27 1993 David J. Mackenzie (djm@thepub.cygnus.com)
+
+ * aout64.h (RELOC_STD_BITS_BASEREL_LITTLE): Make it 0x10 (Ken's
+ suggestion) to avoid conflict with RELOC_STD_BITS_EXTERN_LITTLE.
+
+Fri Oct 29 15:09:52 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * hp300hpux.h (N_SHARED_LIB): Define to be 0.
+
+Mon Sep 13 21:00:56 1993 John Gilmore (gnu@cygnus.com)
+
+ * ar.h (ARMAP_TIME_OFFSET): Add and describe.
+
+Mon Aug 23 Sean Fagan (sef@cygnus.com)
+
+ * aout64.h [ARCH_SIZE != 64]: Allow N_BADMAG to be overridden.
+
+Mon Aug 16 14:30:14 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * stab_gnu.h: Include aout/stab.def not just stab.def.
+
+Sun Jul 18 21:41:47 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
+
+ * dynix3.h: New, for symmetry running dynix.
+
+Thu Jul 8 12:52:22 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * aout64.h (N_BADMAG): Recognize QMAGIC.
+ N_TXTOFF, N_TXTADDR, N_TXTSIZE: Special code for QMAGIC.
+ N_DATOFF: Pad text size if we need to.
+
+Fri Jun 18 19:19:38 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * stab.def (N_ECOML): Fix comment.
+
+Mon May 31 09:21:30 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * stab.def: Remove Solaris information on N_FUN stabstring grammar;
+ I've transferred it to gdb/doc/stabs.texinfo, where it belongs.
+
+Mon May 10 05:48:43 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
+
+ * hp300hpux.h: Patch from Glenn Engel for linker problem and
+ compatibility fix:
+ (OMAGIC, NMAGIC): New definitions.
+ (SHAREMAGIC): Deleted.
+ (HPUX_DOT_O_MAGIC): New macro.
+ (_N_BADMAG): Adjusted.
+ (N_HEADER_IN_TEXT, N_DATADDR): New macros.
+
+Thu Apr 29 12:07:37 1993 Ken Raeburn (raeburn@deneb.cygnus.com)
+
+ * hp300hpux.h: New file from Glenn Engel, glenne@lsid.hp.com.
+
+Tue Apr 27 05:51:04 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
+
+ * aout64.h (struct external_exec, *MAGIC, N_BADMAG): Don't define
+ if `external_exec' is already defined as a macro.
+ (N_DATOFF, N_TRELOFF, N_DRELOFF, N_SYMOFF, N_STROFF): Don't define
+ if already defined.
+ (struct external_nlist, EXTERNAL_NLIST_SIZE): Don't define if
+ `external_nlist' is already defined as a macro.
+
+Sat Aug 15 04:23:02 1992 John Gilmore (gnu@cygnus.com)
+
+ * adobe.h: Add description of a.out.adobe format.
+
+Fri Jul 3 00:36:52 1992 John Gilmore (gnu at cygnus.com)
+
+ * stab.def: Update more Solaris definitions.
+ * stab_gnu.h: Add N_SO language types, and Solaris basic float types.
+
+Sun Jun 14 10:53:53 1992 John Gilmore (gnu at cygnus.com)
+
+ * stab.def: Update descriptions of Solaris-2 stabs; add N_UNDF.
+
+Thu Jun 11 01:12:07 1992 John Gilmore (gnu at cygnus.com)
+
+ * stab.def: Add N_OBJ and N_OPT from Solaris-2.
+
+Thu Jan 30 18:12:44 1992 John Gilmore (gnu at cygnus.com)
+
+ * aout/aout64.h: N_TXTSIZE needs some more parentheses.
+ I don't trust C precedence.
+
+Wed Dec 18 14:32:01 1991 Per Bothner (bothner at cygnus.com)
+
+ * aout/aout64.h: Move common sunos-specific test
+ to recognize shared libraries into new macro N_SHARED_LIB.
+ Use it to simplify&reformat N_TXTADDR, N_TXTOFF, N_TXTSIZE.
+
+Sat Nov 30 20:34:52 1991 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * ChangeLog, aout64.h, ar.h, encap.h, host.h, hp.h, ranlib.h,
+ reloc.h, stab.def, stab_gnu.h, sun4.h: All moved from the
+ devo/include directory
+
+
+Local Variables:
+version-control: never
+End:
diff --git a/include/aout/adobe.h b/include/aout/adobe.h
new file mode 100644
index 0000000..3d2f15c
--- /dev/null
+++ b/include/aout/adobe.h
@@ -0,0 +1,297 @@
+/* `a.out.adobe' differences from standard a.out files */
+
+#ifndef __A_OUT_ADOBE_H__
+#define __A_OUT_ADOBE_H__
+
+#define BYTES_IN_WORD 4
+
+/* Struct external_exec is the same. */
+
+/* This is the layout on disk of the 32-bit or 64-bit exec header. */
+
+struct external_exec
+{
+ bfd_byte e_info[4]; /* magic number and stuff */
+ bfd_byte e_text[BYTES_IN_WORD]; /* length of text section in bytes */
+ bfd_byte e_data[BYTES_IN_WORD]; /* length of data section in bytes */
+ bfd_byte e_bss[BYTES_IN_WORD]; /* length of bss area in bytes */
+ bfd_byte e_syms[BYTES_IN_WORD]; /* length of symbol table in bytes */
+ bfd_byte e_entry[BYTES_IN_WORD]; /* start address */
+ bfd_byte e_trsize[BYTES_IN_WORD]; /* length of text relocation info */
+ bfd_byte e_drsize[BYTES_IN_WORD]; /* length of data relocation info */
+};
+
+#define EXEC_BYTES_SIZE (4 + BYTES_IN_WORD * 7)
+
+/* Magic numbers for a.out files */
+
+#undef ZMAGIC
+#define ZMAGIC 0xAD0BE /* Cute, eh? */
+#undef OMAGIC
+#undef NMAGIC
+
+#define N_BADMAG(x) ((x).a_info != ZMAGIC)
+
+/* By default, segment size is constant. But some machines override this
+ to be a function of the a.out header (e.g. machine type). */
+#ifndef N_SEGSIZE
+#define N_SEGSIZE(x) SEGMENT_SIZE
+#endif
+#undef N_SEGSIZE /* FIXMEXXXX */
+
+/* Segment information for the a.out.Adobe format is specified after the
+ file header. It contains N segment descriptors, followed by one with
+ a type of zero.
+
+ The actual text of the segments starts at N_TXTOFF in the file,
+ regardless of how many or how few segment headers there are. */
+
+struct external_segdesc {
+ unsigned char e_type[1];
+ unsigned char e_size[3];
+ unsigned char e_virtbase[4];
+ unsigned char e_filebase[4];
+};
+
+struct internal_segdesc {
+ unsigned int a_type:8; /* Segment type N_TEXT, N_DATA, 0 */
+ unsigned int a_size:24; /* Segment size */
+ bfd_vma a_virtbase; /* Virtual address */
+ unsigned int a_filebase; /* Base address in object file */
+};
+
+#define N_TXTADDR(x) \
+
+/* This is documented to be at 1024, but appears to really be at 2048.
+ FIXME?! */
+#define N_TXTOFF(x) 2048
+
+#define N_TXTSIZE(x) ((x).a_text)
+
+#define N_DATADDR(x)
+
+#define N_BSSADDR(x)
+
+/* Offsets of the various portions of the file after the text segment. */
+
+#define N_DATOFF(x) ( N_TXTOFF(x) + N_TXTSIZE(x) )
+#define N_TRELOFF(x) ( N_DATOFF(x) + (x).a_data )
+#define N_DRELOFF(x) ( N_TRELOFF(x) + (x).a_trsize )
+#define N_SYMOFF(x) ( N_DRELOFF(x) + (x).a_drsize )
+#define N_STROFF(x) ( N_SYMOFF(x) + (x).a_syms )
+
+/* Symbols */
+struct external_nlist {
+ bfd_byte e_strx[BYTES_IN_WORD]; /* index into string table of name */
+ bfd_byte e_type[1]; /* type of symbol */
+ bfd_byte e_other[1]; /* misc info (usually empty) */
+ bfd_byte e_desc[2]; /* description field */
+ bfd_byte e_value[BYTES_IN_WORD]; /* value of symbol */
+};
+
+#define EXTERNAL_NLIST_SIZE (BYTES_IN_WORD+4+BYTES_IN_WORD)
+
+struct internal_nlist {
+ unsigned long n_strx; /* index into string table of name */
+ unsigned char n_type; /* type of symbol */
+ unsigned char n_other; /* misc info (usually empty) */
+ unsigned short n_desc; /* description field */
+ bfd_vma n_value; /* value of symbol */
+};
+
+/* The n_type field is the symbol type, containing: */
+
+#define N_UNDF 0 /* Undefined symbol */
+#define N_ABS 2 /* Absolute symbol -- defined at particular addr */
+#define N_TEXT 4 /* Text sym -- defined at offset in text seg */
+#define N_DATA 6 /* Data sym -- defined at offset in data seg */
+#define N_BSS 8 /* BSS sym -- defined at offset in zero'd seg */
+#define N_COMM 0x12 /* Common symbol (visible after shared lib dynlink) */
+#define N_FN 0x1f /* File name of .o file */
+#define N_FN_SEQ 0x0C /* N_FN from Sequent compilers (sigh) */
+/* Note: N_EXT can only be usefully OR-ed with N_UNDF, N_ABS, N_TEXT,
+ N_DATA, or N_BSS. When the low-order bit of other types is set,
+ (e.g. N_WARNING versus N_FN), they are two different types. */
+#define N_EXT 1 /* External symbol (as opposed to local-to-this-file) */
+#define N_TYPE 0x1e
+#define N_STAB 0xe0 /* If any of these bits are on, it's a debug symbol */
+
+#define N_INDR 0x0a
+
+/* The following symbols refer to set elements.
+ All the N_SET[ATDB] symbols with the same name form one set.
+ Space is allocated for the set in the text section, and each set
+ elements value is stored into one word of the space.
+ The first word of the space is the length of the set (number of elements).
+
+ The address of the set is made into an N_SETV symbol
+ whose name is the same as the name of the set.
+ This symbol acts like a N_DATA global symbol
+ in that it can satisfy undefined external references. */
+
+/* These appear as input to LD, in a .o file. */
+#define N_SETA 0x14 /* Absolute set element symbol */
+#define N_SETT 0x16 /* Text set element symbol */
+#define N_SETD 0x18 /* Data set element symbol */
+#define N_SETB 0x1A /* Bss set element symbol */
+
+/* This is output from LD. */
+#define N_SETV 0x1C /* Pointer to set vector in data area. */
+
+/* Warning symbol. The text gives a warning message, the next symbol
+ in the table will be undefined. When the symbol is referenced, the
+ message is printed. */
+
+#define N_WARNING 0x1e
+
+/* Relocations
+
+ There are two types of relocation flavours for a.out systems,
+ standard and extended. The standard form is used on systems where the
+ instruction has room for all the bits of an offset to the operand, whilst
+ the extended form is used when an address operand has to be split over n
+ instructions. Eg, on the 68k, each move instruction can reference
+ the target with a displacement of 16 or 32 bits. On the sparc, move
+ instructions use an offset of 14 bits, so the offset is stored in
+ the reloc field, and the data in the section is ignored.
+*/
+
+/* This structure describes a single relocation to be performed.
+ The text-relocation section of the file is a vector of these structures,
+ all of which apply to the text section.
+ Likewise, the data-relocation section applies to the data section. */
+
+struct reloc_std_external {
+ bfd_byte r_address[BYTES_IN_WORD]; /* offset of of data to relocate */
+ bfd_byte r_index[3]; /* symbol table index of symbol */
+ bfd_byte r_type[1]; /* relocation type */
+};
+
+#define RELOC_STD_BITS_PCREL_BIG 0x80
+#define RELOC_STD_BITS_PCREL_LITTLE 0x01
+
+#define RELOC_STD_BITS_LENGTH_BIG 0x60
+#define RELOC_STD_BITS_LENGTH_SH_BIG 5 /* To shift to units place */
+#define RELOC_STD_BITS_LENGTH_LITTLE 0x06
+#define RELOC_STD_BITS_LENGTH_SH_LITTLE 1
+
+#define RELOC_STD_BITS_EXTERN_BIG 0x10
+#define RELOC_STD_BITS_EXTERN_LITTLE 0x08
+
+#define RELOC_STD_BITS_BASEREL_BIG 0x08
+#define RELOC_STD_BITS_BASEREL_LITTLE 0x08
+
+#define RELOC_STD_BITS_JMPTABLE_BIG 0x04
+#define RELOC_STD_BITS_JMPTABLE_LITTLE 0x04
+
+#define RELOC_STD_BITS_RELATIVE_BIG 0x02
+#define RELOC_STD_BITS_RELATIVE_LITTLE 0x02
+
+#define RELOC_STD_SIZE (BYTES_IN_WORD + 3 + 1) /* Bytes per relocation entry */
+
+struct reloc_std_internal
+{
+ bfd_vma r_address; /* Address (within segment) to be relocated. */
+ /* The meaning of r_symbolnum depends on r_extern. */
+ unsigned int r_symbolnum:24;
+ /* Nonzero means value is a pc-relative offset
+ and it should be relocated for changes in its own address
+ as well as for changes in the symbol or section specified. */
+ unsigned int r_pcrel:1;
+ /* Length (as exponent of 2) of the field to be relocated.
+ Thus, a value of 2 indicates 1<<2 bytes. */
+ unsigned int r_length:2;
+ /* 1 => relocate with value of symbol.
+ r_symbolnum is the index of the symbol
+ in files the symbol table.
+ 0 => relocate with the address of a segment.
+ r_symbolnum is N_TEXT, N_DATA, N_BSS or N_ABS
+ (the N_EXT bit may be set also, but signifies nothing). */
+ unsigned int r_extern:1;
+ /* The next three bits are for SunOS shared libraries, and seem to
+ be undocumented. */
+ unsigned int r_baserel:1; /* Linkage table relative */
+ unsigned int r_jmptable:1; /* pc-relative to jump table */
+ unsigned int r_relative:1; /* "relative relocation" */
+ /* unused */
+ unsigned int r_pad:1; /* Padding -- set to zero */
+};
+
+
+/* EXTENDED RELOCS */
+
+struct reloc_ext_external {
+ bfd_byte r_address[BYTES_IN_WORD]; /* offset of of data to relocate */
+ bfd_byte r_index[3]; /* symbol table index of symbol */
+ bfd_byte r_type[1]; /* relocation type */
+ bfd_byte r_addend[BYTES_IN_WORD]; /* datum addend */
+};
+
+#define RELOC_EXT_BITS_EXTERN_BIG 0x80
+#define RELOC_EXT_BITS_EXTERN_LITTLE 0x01
+
+#define RELOC_EXT_BITS_TYPE_BIG 0x1F
+#define RELOC_EXT_BITS_TYPE_SH_BIG 0
+#define RELOC_EXT_BITS_TYPE_LITTLE 0xF8
+#define RELOC_EXT_BITS_TYPE_SH_LITTLE 3
+
+/* Bytes per relocation entry */
+#define RELOC_EXT_SIZE (BYTES_IN_WORD + 3 + 1 + BYTES_IN_WORD)
+
+enum reloc_type
+{
+ /* simple relocations */
+ RELOC_8, /* data[0:7] = addend + sv */
+ RELOC_16, /* data[0:15] = addend + sv */
+ RELOC_32, /* data[0:31] = addend + sv */
+ /* pc-rel displacement */
+ RELOC_DISP8, /* data[0:7] = addend - pc + sv */
+ RELOC_DISP16, /* data[0:15] = addend - pc + sv */
+ RELOC_DISP32, /* data[0:31] = addend - pc + sv */
+ /* Special */
+ RELOC_WDISP30, /* data[0:29] = (addend + sv - pc)>>2 */
+ RELOC_WDISP22, /* data[0:21] = (addend + sv - pc)>>2 */
+ RELOC_HI22, /* data[0:21] = (addend + sv)>>10 */
+ RELOC_22, /* data[0:21] = (addend + sv) */
+ RELOC_13, /* data[0:12] = (addend + sv) */
+ RELOC_LO10, /* data[0:9] = (addend + sv) */
+ RELOC_SFA_BASE,
+ RELOC_SFA_OFF13,
+ /* P.I.C. (base-relative) */
+ RELOC_BASE10, /* Not sure - maybe we can do this the */
+ RELOC_BASE13, /* right way now */
+ RELOC_BASE22,
+ /* for some sort of pc-rel P.I.C. (?) */
+ RELOC_PC10,
+ RELOC_PC22,
+ /* P.I.C. jump table */
+ RELOC_JMP_TBL,
+ /* reputedly for shared libraries somehow */
+ RELOC_SEGOFF16,
+ RELOC_GLOB_DAT,
+ RELOC_JMP_SLOT,
+ RELOC_RELATIVE,
+
+ RELOC_11,
+ RELOC_WDISP2_14,
+ RELOC_WDISP19,
+ RELOC_HHI22, /* data[0:21] = (addend + sv) >> 42 */
+ RELOC_HLO10, /* data[0:9] = (addend + sv) >> 32 */
+
+ /* 29K relocation types */
+ RELOC_JUMPTARG,
+ RELOC_CONST,
+ RELOC_CONSTH,
+
+ NO_RELOC
+ };
+
+
+struct reloc_internal {
+ bfd_vma r_address; /* offset of of data to relocate */
+ long r_index; /* symbol table index of symbol */
+ enum reloc_type r_type; /* relocation type */
+ bfd_vma r_addend; /* datum addend */
+};
+
+#endif /* __A_OUT_ADOBE_H__ */
diff --git a/include/aout/aout64.h b/include/aout/aout64.h
new file mode 100644
index 0000000..76f1140
--- /dev/null
+++ b/include/aout/aout64.h
@@ -0,0 +1,475 @@
+/* `a.out' object-file definitions, including extensions to 64-bit fields */
+
+#ifndef __A_OUT_64_H__
+#define __A_OUT_64_H__
+
+/* This is the layout on disk of the 32-bit or 64-bit exec header. */
+
+#ifndef external_exec
+struct external_exec
+{
+ bfd_byte e_info[4]; /* magic number and stuff */
+ bfd_byte e_text[BYTES_IN_WORD]; /* length of text section in bytes */
+ bfd_byte e_data[BYTES_IN_WORD]; /* length of data section in bytes */
+ bfd_byte e_bss[BYTES_IN_WORD]; /* length of bss area in bytes */
+ bfd_byte e_syms[BYTES_IN_WORD]; /* length of symbol table in bytes */
+ bfd_byte e_entry[BYTES_IN_WORD]; /* start address */
+ bfd_byte e_trsize[BYTES_IN_WORD]; /* length of text relocation info */
+ bfd_byte e_drsize[BYTES_IN_WORD]; /* length of data relocation info */
+};
+
+#define EXEC_BYTES_SIZE (4 + BYTES_IN_WORD * 7)
+
+/* Magic numbers for a.out files */
+
+#if ARCH_SIZE==64
+#define OMAGIC 0x1001 /* Code indicating object file */
+#define ZMAGIC 0x1002 /* Code indicating demand-paged executable. */
+#define NMAGIC 0x1003 /* Code indicating pure executable. */
+
+/* There is no 64-bit QMAGIC as far as I know. */
+
+#define N_BADMAG(x) (N_MAGIC(x) != OMAGIC \
+ && N_MAGIC(x) != NMAGIC \
+ && N_MAGIC(x) != ZMAGIC)
+#else
+#define OMAGIC 0407 /* ...object file or impure executable. */
+#define NMAGIC 0410 /* Code indicating pure executable. */
+#define ZMAGIC 0413 /* Code indicating demand-paged executable. */
+#define BMAGIC 0415 /* Used by a b.out object. */
+
+/* This indicates a demand-paged executable with the header in the text.
+ It is used by 386BSD (and variants) and Linux, at least. */
+#ifndef QMAGIC
+#define QMAGIC 0314
+#endif
+# ifndef N_BADMAG
+# define N_BADMAG(x) (N_MAGIC(x) != OMAGIC \
+ && N_MAGIC(x) != NMAGIC \
+ && N_MAGIC(x) != ZMAGIC \
+ && N_MAGIC(x) != QMAGIC)
+# endif /* N_BADMAG */
+#endif
+
+#endif
+
+#ifdef QMAGIC
+#define N_IS_QMAGIC(x) (N_MAGIC (x) == QMAGIC)
+#else
+#define N_IS_QMAGIC(x) (0)
+#endif
+
+/* The difference between TARGET_PAGE_SIZE and N_SEGSIZE is that TARGET_PAGE_SIZE is
+ the finest granularity at which you can page something, thus it
+ controls the padding (if any) before the text segment of a ZMAGIC
+ file. N_SEGSIZE is the resolution at which things can be marked as
+ read-only versus read/write, so it controls the padding between the
+ text segment and the data segment (in memory; on disk the padding
+ between them is TARGET_PAGE_SIZE). TARGET_PAGE_SIZE and N_SEGSIZE are the same
+ for most machines, but different for sun3. */
+
+/* By default, segment size is constant. But some machines override this
+ to be a function of the a.out header (e.g. machine type). */
+
+#ifndef N_SEGSIZE
+#define N_SEGSIZE(x) SEGMENT_SIZE
+#endif
+
+/* Virtual memory address of the text section.
+ This is getting very complicated. A good reason to discard a.out format
+ for something that specifies these fields explicitly. But til then...
+
+ * OMAGIC and NMAGIC files:
+ (object files: text for "relocatable addr 0" right after the header)
+ start at 0, offset is EXEC_BYTES_SIZE, size as stated.
+ * The text address, offset, and size of ZMAGIC files depend
+ on the entry point of the file:
+ * entry point below TEXT_START_ADDR:
+ (hack for SunOS shared libraries)
+ start at 0, offset is 0, size as stated.
+ * If N_HEADER_IN_TEXT(x) is true (which defaults to being the
+ case when the entry point is EXEC_BYTES_SIZE or further into a page):
+ no padding is needed; text can start after exec header. Sun
+ considers the text segment of such files to include the exec header;
+ for BFD's purposes, we don't, which makes more work for us.
+ start at TEXT_START_ADDR + EXEC_BYTES_SIZE, offset is EXEC_BYTES_SIZE,
+ size as stated minus EXEC_BYTES_SIZE.
+ * If N_HEADER_IN_TEXT(x) is false (which defaults to being the case when
+ the entry point is less than EXEC_BYTES_SIZE into a page (e.g. page
+ aligned)): (padding is needed so that text can start at a page boundary)
+ start at TEXT_START_ADDR, offset TARGET_PAGE_SIZE, size as stated.
+
+ Specific configurations may want to hardwire N_HEADER_IN_TEXT,
+ for efficiency or to allow people to play games with the entry point.
+ In that case, you would #define N_HEADER_IN_TEXT(x) as 1 for sunos,
+ and as 0 for most other hosts (Sony News, Vax Ultrix, etc).
+ (Do this in the appropriate bfd target file.)
+ (The default is a heuristic that will break if people try changing
+ the entry point, perhaps with the ld -e flag.)
+
+ * QMAGIC is always like a ZMAGIC for which N_HEADER_IN_TEXT is true,
+ and for which the starting address is TARGET_PAGE_SIZE (or should this be
+ SEGMENT_SIZE?) (TEXT_START_ADDR only applies to ZMAGIC, not to QMAGIC).
+ */
+
+/* This macro is only relevant for ZMAGIC files; QMAGIC always has the header
+ in the text. */
+#ifndef N_HEADER_IN_TEXT
+#define N_HEADER_IN_TEXT(x) (((x).a_entry & (TARGET_PAGE_SIZE-1)) >= EXEC_BYTES_SIZE)
+#endif
+
+/* Sun shared libraries, not linux. This macro is only relevant for ZMAGIC
+ files. */
+#ifndef N_SHARED_LIB
+#define N_SHARED_LIB(x) ((x).a_entry < TEXT_START_ADDR)
+#endif
+
+/* Returning 0 not TEXT_START_ADDR for OMAGIC and NMAGIC is based on
+ the assumption that we are dealing with a .o file, not an
+ executable. This is necessary for OMAGIC (but means we don't work
+ right on the output from ld -N); more questionable for NMAGIC. */
+
+#ifndef N_TXTADDR
+#define N_TXTADDR(x) \
+ (/* The address of a QMAGIC file is always one page in, */ \
+ /* with the header in the text. */ \
+ N_IS_QMAGIC (x) ? TARGET_PAGE_SIZE + EXEC_BYTES_SIZE : \
+ N_MAGIC(x) != ZMAGIC ? 0 : /* object file or NMAGIC */\
+ N_SHARED_LIB(x) ? 0 : \
+ N_HEADER_IN_TEXT(x) ? \
+ TEXT_START_ADDR + EXEC_BYTES_SIZE : /* no padding */\
+ TEXT_START_ADDR /* a page of padding */\
+ )
+#endif
+
+/* If N_HEADER_IN_TEXT is not true for ZMAGIC, there is some padding
+ to make the text segment start at a certain boundary. For most
+ systems, this boundary is TARGET_PAGE_SIZE. But for Linux, in the
+ time-honored tradition of crazy ZMAGIC hacks, it is 1024 which is
+ not what TARGET_PAGE_SIZE needs to be for QMAGIC. */
+
+#ifndef ZMAGIC_DISK_BLOCK_SIZE
+#define ZMAGIC_DISK_BLOCK_SIZE TARGET_PAGE_SIZE
+#endif
+
+#define N_DISK_BLOCK_SIZE(x) \
+ (N_MAGIC(x) == ZMAGIC ? ZMAGIC_DISK_BLOCK_SIZE : TARGET_PAGE_SIZE)
+
+/* Offset in an a.out of the start of the text section. */
+#ifndef N_TXTOFF
+#define N_TXTOFF(x) \
+ (/* For {O,N,Q}MAGIC, no padding. */ \
+ N_MAGIC(x) != ZMAGIC ? EXEC_BYTES_SIZE : \
+ N_SHARED_LIB(x) ? 0 : \
+ N_HEADER_IN_TEXT(x) ? \
+ EXEC_BYTES_SIZE : /* no padding */\
+ ZMAGIC_DISK_BLOCK_SIZE /* a page of padding */\
+ )
+#endif
+/* Size of the text section. It's always as stated, except that we
+ offset it to `undo' the adjustment to N_TXTADDR and N_TXTOFF
+ for ZMAGIC files that nominally include the exec header
+ as part of the first page of text. (BFD doesn't consider the
+ exec header to be part of the text segment.) */
+#ifndef N_TXTSIZE
+#define N_TXTSIZE(x) \
+ (/* For QMAGIC, we don't consider the header part of the text section. */\
+ N_IS_QMAGIC (x) ? (x).a_text - EXEC_BYTES_SIZE : \
+ (N_MAGIC(x) != ZMAGIC || N_SHARED_LIB(x)) ? (x).a_text : \
+ N_HEADER_IN_TEXT(x) ? \
+ (x).a_text - EXEC_BYTES_SIZE: /* no padding */\
+ (x).a_text /* a page of padding */\
+ )
+#endif
+/* The address of the data segment in virtual memory.
+ It is the text segment address, plus text segment size, rounded
+ up to a N_SEGSIZE boundary for pure or pageable files. */
+#ifndef N_DATADDR
+#define N_DATADDR(x) \
+ (N_MAGIC(x)==OMAGIC? (N_TXTADDR(x)+N_TXTSIZE(x)) \
+ : (N_SEGSIZE(x) + ((N_TXTADDR(x)+N_TXTSIZE(x)-1) & ~(N_SEGSIZE(x)-1))))
+#endif
+/* The address of the BSS segment -- immediately after the data segment. */
+
+#define N_BSSADDR(x) (N_DATADDR(x) + (x).a_data)
+
+/* Offsets of the various portions of the file after the text segment. */
+
+/* For {Q,Z}MAGIC, there is padding to make the data segment start on
+ a page boundary. Most of the time the a_text field (and thus
+ N_TXTSIZE) already contains this padding. It is possible that for
+ BSDI and/or 386BSD it sometimes doesn't contain the padding, and
+ perhaps we should be adding it here. But this seems kind of
+ questionable and probably should be BSDI/386BSD-specific if we do
+ do it.
+
+ For NMAGIC (at least for hp300 BSD, probably others), there is
+ padding in memory only, not on disk, so we must *not* ever pad here
+ for NMAGIC. */
+
+#ifndef N_DATOFF
+#define N_DATOFF(x) \
+ (N_TXTOFF(x) + N_TXTSIZE(x))
+#endif
+
+#ifndef N_TRELOFF
+#define N_TRELOFF(x) ( N_DATOFF(x) + (x).a_data )
+#endif
+#ifndef N_DRELOFF
+#define N_DRELOFF(x) ( N_TRELOFF(x) + (x).a_trsize )
+#endif
+#ifndef N_SYMOFF
+#define N_SYMOFF(x) ( N_DRELOFF(x) + (x).a_drsize )
+#endif
+#ifndef N_STROFF
+#define N_STROFF(x) ( N_SYMOFF(x) + (x).a_syms )
+#endif
+
+/* Symbols */
+#ifndef external_nlist
+struct external_nlist {
+ bfd_byte e_strx[BYTES_IN_WORD]; /* index into string table of name */
+ bfd_byte e_type[1]; /* type of symbol */
+ bfd_byte e_other[1]; /* misc info (usually empty) */
+ bfd_byte e_desc[2]; /* description field */
+ bfd_byte e_value[BYTES_IN_WORD]; /* value of symbol */
+};
+#define EXTERNAL_NLIST_SIZE (BYTES_IN_WORD+4+BYTES_IN_WORD)
+#endif
+
+struct internal_nlist {
+ unsigned long n_strx; /* index into string table of name */
+ unsigned char n_type; /* type of symbol */
+ unsigned char n_other; /* misc info (usually empty) */
+ unsigned short n_desc; /* description field */
+ bfd_vma n_value; /* value of symbol */
+};
+
+/* The n_type field is the symbol type, containing: */
+
+#define N_UNDF 0 /* Undefined symbol */
+#define N_ABS 2 /* Absolute symbol -- defined at particular addr */
+#define N_TEXT 4 /* Text sym -- defined at offset in text seg */
+#define N_DATA 6 /* Data sym -- defined at offset in data seg */
+#define N_BSS 8 /* BSS sym -- defined at offset in zero'd seg */
+#define N_COMM 0x12 /* Common symbol (visible after shared lib dynlink) */
+#define N_FN 0x1f /* File name of .o file */
+#define N_FN_SEQ 0x0C /* N_FN from Sequent compilers (sigh) */
+/* Note: N_EXT can only be usefully OR-ed with N_UNDF, N_ABS, N_TEXT,
+ N_DATA, or N_BSS. When the low-order bit of other types is set,
+ (e.g. N_WARNING versus N_FN), they are two different types. */
+#define N_EXT 1 /* External symbol (as opposed to local-to-this-file) */
+#define N_TYPE 0x1e
+#define N_STAB 0xe0 /* If any of these bits are on, it's a debug symbol */
+
+#define N_INDR 0x0a
+
+/* The following symbols refer to set elements.
+ All the N_SET[ATDB] symbols with the same name form one set.
+ Space is allocated for the set in the text section, and each set
+ elements value is stored into one word of the space.
+ The first word of the space is the length of the set (number of elements).
+
+ The address of the set is made into an N_SETV symbol
+ whose name is the same as the name of the set.
+ This symbol acts like a N_DATA global symbol
+ in that it can satisfy undefined external references. */
+
+/* These appear as input to LD, in a .o file. */
+#define N_SETA 0x14 /* Absolute set element symbol */
+#define N_SETT 0x16 /* Text set element symbol */
+#define N_SETD 0x18 /* Data set element symbol */
+#define N_SETB 0x1A /* Bss set element symbol */
+
+/* This is output from LD. */
+#define N_SETV 0x1C /* Pointer to set vector in data area. */
+
+/* Warning symbol. The text gives a warning message, the next symbol
+ in the table will be undefined. When the symbol is referenced, the
+ message is printed. */
+
+#define N_WARNING 0x1e
+
+/* Weak symbols. These are a GNU extension to the a.out format. The
+ semantics are those of ELF weak symbols. Weak symbols are always
+ externally visible. The N_WEAK? values are squeezed into the
+ available slots. The value of a N_WEAKU symbol is 0. The values
+ of the other types are the definitions. */
+#define N_WEAKU 0x0d /* Weak undefined symbol. */
+#define N_WEAKA 0x0e /* Weak absolute symbol. */
+#define N_WEAKT 0x0f /* Weak text symbol. */
+#define N_WEAKD 0x10 /* Weak data symbol. */
+#define N_WEAKB 0x11 /* Weak bss symbol. */
+
+/* Relocations
+
+ There are two types of relocation flavours for a.out systems,
+ standard and extended. The standard form is used on systems where the
+ instruction has room for all the bits of an offset to the operand, whilst
+ the extended form is used when an address operand has to be split over n
+ instructions. Eg, on the 68k, each move instruction can reference
+ the target with a displacement of 16 or 32 bits. On the sparc, move
+ instructions use an offset of 14 bits, so the offset is stored in
+ the reloc field, and the data in the section is ignored.
+*/
+
+/* This structure describes a single relocation to be performed.
+ The text-relocation section of the file is a vector of these structures,
+ all of which apply to the text section.
+ Likewise, the data-relocation section applies to the data section. */
+
+struct reloc_std_external {
+ bfd_byte r_address[BYTES_IN_WORD]; /* offset of of data to relocate */
+ bfd_byte r_index[3]; /* symbol table index of symbol */
+ bfd_byte r_type[1]; /* relocation type */
+};
+
+#define RELOC_STD_BITS_PCREL_BIG ((unsigned int) 0x80)
+#define RELOC_STD_BITS_PCREL_LITTLE ((unsigned int) 0x01)
+
+#define RELOC_STD_BITS_LENGTH_BIG ((unsigned int) 0x60)
+#define RELOC_STD_BITS_LENGTH_SH_BIG 5
+#define RELOC_STD_BITS_LENGTH_LITTLE ((unsigned int) 0x06)
+#define RELOC_STD_BITS_LENGTH_SH_LITTLE 1
+
+#define RELOC_STD_BITS_EXTERN_BIG ((unsigned int) 0x10)
+#define RELOC_STD_BITS_EXTERN_LITTLE ((unsigned int) 0x08)
+
+#define RELOC_STD_BITS_BASEREL_BIG ((unsigned int) 0x08)
+#define RELOC_STD_BITS_BASEREL_LITTLE ((unsigned int) 0x10)
+
+#define RELOC_STD_BITS_JMPTABLE_BIG ((unsigned int) 0x04)
+#define RELOC_STD_BITS_JMPTABLE_LITTLE ((unsigned int) 0x20)
+
+#define RELOC_STD_BITS_RELATIVE_BIG ((unsigned int) 0x02)
+#define RELOC_STD_BITS_RELATIVE_LITTLE ((unsigned int) 0x40)
+
+#define RELOC_STD_SIZE (BYTES_IN_WORD + 3 + 1) /* Bytes per relocation entry */
+
+struct reloc_std_internal
+{
+ bfd_vma r_address; /* Address (within segment) to be relocated. */
+ /* The meaning of r_symbolnum depends on r_extern. */
+ unsigned int r_symbolnum:24;
+ /* Nonzero means value is a pc-relative offset
+ and it should be relocated for changes in its own address
+ as well as for changes in the symbol or section specified. */
+ unsigned int r_pcrel:1;
+ /* Length (as exponent of 2) of the field to be relocated.
+ Thus, a value of 2 indicates 1<<2 bytes. */
+ unsigned int r_length:2;
+ /* 1 => relocate with value of symbol.
+ r_symbolnum is the index of the symbol
+ in files the symbol table.
+ 0 => relocate with the address of a segment.
+ r_symbolnum is N_TEXT, N_DATA, N_BSS or N_ABS
+ (the N_EXT bit may be set also, but signifies nothing). */
+ unsigned int r_extern:1;
+ /* The next three bits are for SunOS shared libraries, and seem to
+ be undocumented. */
+ unsigned int r_baserel:1; /* Linkage table relative */
+ unsigned int r_jmptable:1; /* pc-relative to jump table */
+ unsigned int r_relative:1; /* "relative relocation" */
+ /* unused */
+ unsigned int r_pad:1; /* Padding -- set to zero */
+};
+
+
+/* EXTENDED RELOCS */
+
+struct reloc_ext_external {
+ bfd_byte r_address[BYTES_IN_WORD]; /* offset of of data to relocate */
+ bfd_byte r_index[3]; /* symbol table index of symbol */
+ bfd_byte r_type[1]; /* relocation type */
+ bfd_byte r_addend[BYTES_IN_WORD]; /* datum addend */
+};
+
+#define RELOC_EXT_BITS_EXTERN_BIG ((unsigned int) 0x80)
+#define RELOC_EXT_BITS_EXTERN_LITTLE ((unsigned int) 0x01)
+
+#define RELOC_EXT_BITS_TYPE_BIG ((unsigned int) 0x1F)
+#define RELOC_EXT_BITS_TYPE_SH_BIG 0
+#define RELOC_EXT_BITS_TYPE_LITTLE ((unsigned int) 0xF8)
+#define RELOC_EXT_BITS_TYPE_SH_LITTLE 3
+
+/* Bytes per relocation entry */
+#define RELOC_EXT_SIZE (BYTES_IN_WORD + 3 + 1 + BYTES_IN_WORD)
+
+enum reloc_type
+{
+ /* simple relocations */
+ RELOC_8, /* data[0:7] = addend + sv */
+ RELOC_16, /* data[0:15] = addend + sv */
+ RELOC_32, /* data[0:31] = addend + sv */
+ /* pc-rel displacement */
+ RELOC_DISP8, /* data[0:7] = addend - pc + sv */
+ RELOC_DISP16, /* data[0:15] = addend - pc + sv */
+ RELOC_DISP32, /* data[0:31] = addend - pc + sv */
+ /* Special */
+ RELOC_WDISP30, /* data[0:29] = (addend + sv - pc)>>2 */
+ RELOC_WDISP22, /* data[0:21] = (addend + sv - pc)>>2 */
+ RELOC_HI22, /* data[0:21] = (addend + sv)>>10 */
+ RELOC_22, /* data[0:21] = (addend + sv) */
+ RELOC_13, /* data[0:12] = (addend + sv) */
+ RELOC_LO10, /* data[0:9] = (addend + sv) */
+ RELOC_SFA_BASE,
+ RELOC_SFA_OFF13,
+ /* P.I.C. (base-relative) */
+ RELOC_BASE10, /* Not sure - maybe we can do this the */
+ RELOC_BASE13, /* right way now */
+ RELOC_BASE22,
+ /* for some sort of pc-rel P.I.C. (?) */
+ RELOC_PC10,
+ RELOC_PC22,
+ /* P.I.C. jump table */
+ RELOC_JMP_TBL,
+ /* reputedly for shared libraries somehow */
+ RELOC_SEGOFF16,
+ RELOC_GLOB_DAT,
+ RELOC_JMP_SLOT,
+ RELOC_RELATIVE,
+
+ RELOC_11,
+ RELOC_WDISP2_14,
+ RELOC_WDISP19,
+ RELOC_HHI22, /* data[0:21] = (addend + sv) >> 42 */
+ RELOC_HLO10, /* data[0:9] = (addend + sv) >> 32 */
+
+ /* 29K relocation types */
+ RELOC_JUMPTARG,
+ RELOC_CONST,
+ RELOC_CONSTH,
+
+ /* All the new ones I can think of, for sparc v9 */
+
+ RELOC_64, /* data[0:63] = addend + sv */
+ RELOC_DISP64, /* data[0:63] = addend - pc + sv */
+ RELOC_WDISP21, /* data[0:20] = (addend + sv - pc)>>2 */
+ RELOC_DISP21, /* data[0:20] = addend - pc + sv */
+ RELOC_DISP14, /* data[0:13] = addend - pc + sv */
+ /* Q .
+ What are the other ones,
+ Since this is a clean slate, can we throw away the ones we dont
+ understand ? Should we sort the values ? What about using a
+ microcode format like the 68k ?
+ */
+ NO_RELOC
+ };
+
+
+struct reloc_internal {
+ bfd_vma r_address; /* offset of of data to relocate */
+ long r_index; /* symbol table index of symbol */
+ enum reloc_type r_type; /* relocation type */
+ bfd_vma r_addend; /* datum addend */
+};
+
+/* Q.
+ Should the length of the string table be 4 bytes or 8 bytes ?
+
+ Q.
+ What about archive indexes ?
+
+ */
+
+#endif /* __A_OUT_64_H__ */
diff --git a/include/aout/ar.h b/include/aout/ar.h
new file mode 100644
index 0000000..7b5dcda
--- /dev/null
+++ b/include/aout/ar.h
@@ -0,0 +1,36 @@
+/* archive file definition for GNU software */
+
+/* So far this is correct for BSDish archives. Don't forget that
+ files must begin on an even byte boundary. */
+
+#ifndef __GNU_AR_H__
+#define __GNU_AR_H__
+
+/* Note that the usual '\n' in magic strings may translate to different
+ characters, as allowed by ANSI. '\012' has a fixed value, and remains
+ compatible with existing BSDish archives. */
+
+#define ARMAG "!<arch>\012" /* For COFF and a.out archives */
+#define ARMAGB "!<bout>\012" /* For b.out archives */
+#define SARMAG 8
+#define ARFMAG "`\012"
+
+/* The ar_date field of the armap (__.SYMDEF) member of an archive
+ must be greater than the modified date of the entire file, or
+ BSD-derived linkers complain. We originally write the ar_date with
+ this offset from the real file's mod-time. After finishing the
+ file, we rewrite ar_date if it's not still greater than the mod date. */
+
+#define ARMAP_TIME_OFFSET 60
+
+struct ar_hdr {
+ char ar_name[16]; /* name of this member */
+ char ar_date[12]; /* file mtime */
+ char ar_uid[6]; /* owner uid; printed as decimal */
+ char ar_gid[6]; /* owner gid; printed as decimal */
+ char ar_mode[8]; /* file mode, printed as octal */
+ char ar_size[10]; /* file size, printed as decimal */
+ char ar_fmag[2]; /* should contain ARFMAG */
+};
+
+#endif /* __GNU_AR_H__ */
diff --git a/include/aout/dynix3.h b/include/aout/dynix3.h
new file mode 100644
index 0000000..efeeebf
--- /dev/null
+++ b/include/aout/dynix3.h
@@ -0,0 +1,71 @@
+/*
+ * a.out specifics for Sequent Symmetry running Dynix 3.x
+ */
+#ifndef A_OUT_DYNIX3_H
+#define A_OUT_DYNIX3_H
+
+#define external_exec dynix_external_exec
+
+/* struct exec for Dynix 3
+ *
+ * a_gdtbl and a_bootstrap are only for standalone binaries.
+ * Shared data fields are not supported by the kernel as of Dynix 3.1,
+ * but are supported by Dynix compiler programs.
+ */
+struct dynix_external_exec {
+ unsigned char e_info[4];
+ unsigned char e_text[4];
+ unsigned char e_data[4];
+ unsigned char e_bss[4];
+ unsigned char e_syms[4];
+ unsigned char e_entry[4];
+ unsigned char e_trsize[4];
+ unsigned char e_drsize[4];
+ unsigned char e_g_code[8], e_g_data[8], e_g_desc[8];
+ unsigned char e_shdata[4];
+ unsigned char e_shbss[4];
+ unsigned char e_shdrsize[4];
+ unsigned char e_bootstrap[44];
+ unsigned char e_reserved[12];
+ unsigned char e_version[4];
+};
+
+#define EXEC_BYTES_SIZE (128)
+
+/*
+ * All executables under Dynix are demand paged with read-only text,
+ * Thus no NMAGIC.
+ *
+ * ZMAGIC has a page of 0s at virtual 0,
+ * XMAGIC has an invalid page at virtual 0
+ */
+#define OMAGIC 0x12eb /* .o */
+#define ZMAGIC 0x22eb /* zero @ 0, demand load */
+#define XMAGIC 0x32eb /* invalid @ 0, demand load */
+#define SMAGIC 0x42eb /* standalone, not supported here */
+
+#define N_BADMAG(x) ((OMAGIC != N_MAGIC(x)) && \
+ (ZMAGIC != N_MAGIC(x)) && \
+ (XMAGIC != N_MAGIC(x)) && \
+ (SMAGIC != N_MAGIC(x)))
+
+#define N_ADDRADJ(x) ((ZMAGIC == N_MAGIC(x) || XMAGIC == N_MAGIC(x)) ? 0x1000 : 0)
+
+#define N_TXTOFF(x) (EXEC_BYTES_SIZE)
+#define N_DATOFF(x) (N_TXTOFF(x) + N_TXTSIZE(x))
+#define N_SHDATOFF(x) (N_DATOFF(x) + (x).a_data)
+#define N_TRELOFF(x) (N_SHDATOFF(x) + (x).a_shdata)
+#define N_DRELOFF(x) (N_TRELOFF(x) + (x).a_trsize)
+#define N_SHDRELOFF(x) (N_DRELOFF(x) + (x).a_drsize)
+#define N_SYMOFF(x) (N_SHDRELOFF(x) + (x).a_shdrsize)
+#define N_STROFF(x) (N_SYMOFF(x) + (x).a_syms)
+
+#define N_TXTADDR(x) \
+ (((OMAGIC == N_MAGIC(x)) || (SMAGIC == N_MAGIC(x))) ? 0 \
+ : TEXT_START_ADDR + EXEC_BYTES_SIZE)
+
+#define N_TXTSIZE(x) \
+ (((OMAGIC == N_MAGIC(x)) || (SMAGIC == N_MAGIC(x))) ? ((x).a_text) \
+ : ((x).a_text - N_ADDRADJ(x) - EXEC_BYTES_SIZE))
+
+#endif /* A_OUT_DYNIX3_H */
diff --git a/include/aout/encap.h b/include/aout/encap.h
new file mode 100644
index 0000000..b215d49
--- /dev/null
+++ b/include/aout/encap.h
@@ -0,0 +1,135 @@
+/* Yet Another Try at encapsulating bsd object files in coff.
+ Copyright (C) 1988, 1989, 1991 Free Software Foundation, Inc.
+ Written by Pace Willisson 12/9/88
+
+ This file is obsolete. It needs to be converted to just define a bunch
+ of stuff that BFD can use to do coff-encapsulated files. --gnu@cygnus.com
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * We only use the coff headers to tell the kernel
+ * how to exec the file. Therefore, the only fields that need to
+ * be filled in are the scnptr and vaddr for the text and data
+ * sections, and the vaddr for the bss. As far as coff is concerned,
+ * there is no symbol table, relocation, or line numbers.
+ *
+ * A normal bsd header (struct exec) is placed after the coff headers,
+ * and before the real text. I defined a the new fields 'a_machtype'
+ * and a_flags. If a_machtype is M_386, and a_flags & A_ENCAP is
+ * true, then the bsd header is preceeded by a coff header. Macros
+ * like N_TXTOFF and N_TXTADDR use this field to find the bsd header.
+ *
+ * The only problem is to track down the bsd exec header. The
+ * macros HEADER_OFFSET, etc do this.
+ */
+
+#define N_FLAGS_COFF_ENCAPSULATE 0x20 /* coff header precedes bsd header */
+
+/* Describe the COFF header used for encapsulation. */
+
+struct coffheader
+{
+ /* filehdr */
+ unsigned short f_magic;
+ unsigned short f_nscns;
+ long f_timdat;
+ long f_symptr;
+ long f_nsyms;
+ unsigned short f_opthdr;
+ unsigned short f_flags;
+ /* aouthdr */
+ short magic;
+ short vstamp;
+ long tsize;
+ long dsize;
+ long bsize;
+ long entry;
+ long text_start;
+ long data_start;
+ struct coffscn
+ {
+ char s_name[8];
+ long s_paddr;
+ long s_vaddr;
+ long s_size;
+ long s_scnptr;
+ long s_relptr;
+ long s_lnnoptr;
+ unsigned short s_nreloc;
+ unsigned short s_nlnno;
+ long s_flags;
+ } scns[3];
+};
+
+/* Describe some of the parameters of the encapsulation,
+ including how to find the encapsulated BSD header. */
+
+/* FIXME, this is dumb. The same tools can't handle a.outs for different
+ architectures, just because COFF_MAGIC is different; so you need a
+ separate GNU nm for every architecture!!? Unfortunately, it needs to
+ be this way, since the COFF_MAGIC value is determined by the kernel
+ we're trying to fool here. */
+
+#define COFF_MAGIC_I386 0514 /* I386MAGIC */
+#define COFF_MAGIC_M68K 0520 /* MC68MAGIC */
+#define COFF_MAGIC_A29K 0x17A /* Used by asm29k cross-tools */
+
+#ifdef COFF_MAGIC
+short __header_offset_temp;
+#define HEADER_OFFSET(f) \
+ (__header_offset_temp = 0, \
+ fread ((char *)&__header_offset_temp, sizeof (short), 1, (f)), \
+ fseek ((f), -sizeof (short), 1), \
+ __header_offset_temp==COFF_MAGIC ? sizeof(struct coffheader) : 0)
+#else
+#define HEADER_OFFSET(f) 0
+#endif
+
+#define HEADER_SEEK(f) (fseek ((f), HEADER_OFFSET((f)), 1))
+
+/* Describe the characteristics of the BSD header
+ that appears inside the encapsulation. */
+
+/* Encapsulated coff files that are linked ZMAGIC have a text segment
+ offset just past the header (and a matching TXTADDR), excluding
+ the headers from the text segment proper but keeping the physical
+ layout and the virtual memory layout page-aligned.
+
+ Non-encapsulated a.out files that are linked ZMAGIC have a text
+ segment that starts at 0 and an N_TXTADR similarly offset to 0.
+ They too are page-aligned with each other, but they include the
+ a.out header as part of the text.
+
+ The _N_HDROFF gets sizeof struct exec added to it, so we have
+ to compensate here. See <a.out.gnu.h>. */
+
+#undef _N_HDROFF
+#undef N_TXTADDR
+#undef N_DATADDR
+
+#define _N_HDROFF(x) ((N_FLAGS(x) & N_FLAGS_COFF_ENCAPSULATE) ? \
+ sizeof (struct coffheader) : 0)
+
+/* Address of text segment in memory after it is loaded. */
+#define N_TXTADDR(x) \
+ ((N_FLAGS(x) & N_FLAGS_COFF_ENCAPSULATE) ? \
+ sizeof (struct coffheader) + sizeof (struct exec) : 0)
+#define SEGMENT_SIZE 0x400000
+
+#define N_DATADDR(x) \
+ ((N_FLAGS(x) & N_FLAGS_COFF_ENCAPSULATE) ? \
+ (SEGMENT_SIZE + ((N_TXTADDR(x)+(x).a_text-1) & ~(SEGMENT_SIZE-1))) : \
+ (N_TXTADDR(x)+(x).a_text))
diff --git a/include/aout/host.h b/include/aout/host.h
new file mode 100644
index 0000000..8e36212
--- /dev/null
+++ b/include/aout/host.h
@@ -0,0 +1,22 @@
+/* Parameters about the a.out format, based on the host system on which
+ the program is compiled. */
+
+/* Address of data segment in memory after it is loaded.
+ It is up to you to define SEGMENT_SIZE
+ on machines not listed here. */
+#ifndef SEGMENT_SIZE
+#if defined(hp300) || defined(pyr)
+#define SEGMENT_SIZE page_size
+#endif
+#ifdef sony
+#define SEGMENT_SIZE 0x1000
+#endif /* Sony. */
+#ifdef is68k
+#define SEGMENT_SIZE 0x20000
+#endif
+#if defined(m68k) && defined(PORTAR)
+#define TARGET_PAGE_SIZE 0x400
+#define SEGMENT_SIZE TARGET_PAGE_SIZE
+#endif
+#endif /*!defined(SEGMENT_SIZE)*/
+
diff --git a/include/aout/hp.h b/include/aout/hp.h
new file mode 100644
index 0000000..002f49c
--- /dev/null
+++ b/include/aout/hp.h
@@ -0,0 +1,82 @@
+/* Special version of <a.out.h> for use under hp-ux.
+ Copyright 1988, 1991 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* THIS FILE IS OBSOLETE. It needs to be revised as a variant "external"
+ a.out format for use with BFD. */
+
+/* The `exec' structure and overall layout must be close to HP's when
+ we are running on an HP system, otherwise we will not be able to
+ execute the resulting file. */
+
+/* Allow this file to be included twice. */
+#ifndef __GNU_EXEC_MACROS__
+
+struct exec
+{
+ unsigned short a_machtype; /* machine type */
+ unsigned short a_magic; /* magic number */
+ unsigned long a_spare1;
+ unsigned long a_spare2;
+ unsigned long a_text; /* length of text, in bytes */
+ unsigned long a_data; /* length of data, in bytes */
+ unsigned long a_bss; /* length of uninitialized data area for file, in bytes */
+ unsigned long a_trsize; /* length of relocation info for text, in bytes */
+ unsigned long a_drsize; /* length of relocation info for data, in bytes */
+ unsigned long a_spare3; /* HP = pascal interface size */
+ unsigned long a_spare4; /* HP = symbol table size */
+ unsigned long a_spare5; /* HP = debug name table size */
+ unsigned long a_entry; /* start address */
+ unsigned long a_spare6; /* HP = source line table size */
+ unsigned long a_spare7; /* HP = value table size */
+ unsigned long a_syms; /* length of symbol table data in file, in bytes */
+ unsigned long a_spare8;
+};
+
+/* Tell a.out.gnu.h not to define `struct exec'. */
+#define __STRUCT_EXEC_OVERRIDE__
+
+#include "../a.out.gnu.h"
+
+#undef N_MAGIC
+#undef N_MACHTYPE
+#undef N_FLAGS
+#undef N_SET_INFO
+#undef N_SET_MAGIC
+#undef N_SET_MACHTYPE
+#undef N_SET_FLAGS
+
+#define N_MAGIC(exec) ((exec) . a_magic)
+#define N_MACHTYPE(exec) ((exec) . a_machtype)
+#define N_SET_MAGIC(exec, magic) (((exec) . a_magic) = (magic))
+#define N_SET_MACHTYPE(exec, machtype) (((exec) . a_machtype) = (machtype))
+
+#undef N_BADMAG
+#define N_BADMAG(x) ((_N_BADMAG (x)) || (_N_BADMACH (x)))
+
+#define _N_BADMACH(x) \
+(((N_MACHTYPE (x)) != HP9000S200_ID) && \
+ ((N_MACHTYPE (x)) != HP98x6_ID))
+
+#define HP98x6_ID 0x20A
+#define HP9000S200_ID 0x20C
+
+#undef _N_HDROFF
+#define _N_HDROFF(x) (SEGMENT_SIZE - (sizeof (struct exec)))
+
+#define SEGMENT_SIZE 0x1000
+
+#endif /* __GNU_EXEC_MACROS__ */
diff --git a/include/aout/hp300hpux.h b/include/aout/hp300hpux.h
new file mode 100644
index 0000000..44d5196
--- /dev/null
+++ b/include/aout/hp300hpux.h
@@ -0,0 +1,119 @@
+/* Special version of <a.out.h> for use under hp-ux.
+ Copyright (C) 1988,1993 Free Software Foundation, Inc. */
+
+struct hp300hpux_exec_bytes
+{
+ unsigned char e_info[4]; /* a_machtype/a_magic */
+ unsigned char e_spare1[4];
+ unsigned char e_spare2[4];
+ unsigned char e_text[4]; /* length of text, in bytes */
+ unsigned char e_data[4]; /* length of data, in bytes */
+ unsigned char e_bss[4]; /* length of uninitialized data area , in bytes */
+ unsigned char e_trsize[4]; /* length of relocation info for text, in bytes*/
+ unsigned char e_drsize[4]; /* length of relocation info for data, in bytes*/
+ unsigned char e_passize[4];/* HP = pascal interface size */
+ unsigned char e_syms[4]; /* HP = symbol table size */
+ unsigned char e_spare5[4]; /* HP = debug name table size */
+ unsigned char e_entry[4]; /* start address */
+ unsigned char e_spare6[4]; /* HP = source line table size */
+ unsigned char e_supsize[4];/* HP = value table size */
+ unsigned char e_drelocs[4];
+ unsigned char e_extension[4]; /* file offset of extension */
+};
+#define EXEC_BYTES_SIZE 64
+
+struct hp300hpux_nlist_bytes
+ {
+ unsigned char e_value[4];
+ unsigned char e_type[1];
+ unsigned char e_length[1]; /* length of ascii symbol name */
+ unsigned char e_almod[2]; /* alignment mod */
+ unsigned char e_shlib[2]; /* info about dynamic linking */
+ };
+#define EXTERNAL_NLIST_SIZE 10
+
+struct hp300hpux_reloc
+ {
+ unsigned char r_address[4];/* offset of of data to relocate */
+ unsigned char r_index[2]; /* symbol table index of symbol */
+ unsigned char r_type[1]; /* relocation type */
+ unsigned char r_length[1]; /* length of item to reloc */
+ };
+
+struct hp300hpux_header_extension
+{
+ unsigned char e_syms[4];
+ unsigned char unique_headers[12*4];
+ unsigned char e_header[2]; /* type of header */
+ unsigned char e_version[2]; /* version */
+ unsigned char e_size[4]; /* bytes following*/
+ unsigned char e_extension[4];/* file offset of next extension */
+};
+#define EXTERNAL_EXTENSION_HEADER_SIZE (16*4)
+
+/* hpux separates object files (0x106) and impure executables (0x107) */
+/* but the bfd code does not distinguish between them. Since we want to*/
+/* read hpux .o files, we add an special define and use it below in */
+/* offset and address calculations. */
+
+#define HPUX_DOT_O_MAGIC 0x106
+#define OMAGIC 0x107 /* object file or impure executable. */
+#define NMAGIC 0x108 /* Code indicating pure executable. */
+#define ZMAGIC 0x10B /* demand-paged executable. */
+
+#define N_HEADER_IN_TEXT(x) 0
+
+#if 0 /* libaout.h only uses the lower 8 bits */
+#define HP98x6_ID 0x20A
+#define HP9000S200_ID 0x20C
+#endif
+#define HP98x6_ID 0x0A
+#define HP9000S200_ID 0x0C
+
+#define N_BADMAG(x) ((_N_BADMAG (x)) || (_N_BADMACH (x)))
+
+#define N_DATADDR(x) \
+ ((N_MAGIC(x)==OMAGIC || N_MAGIC(x)==HPUX_DOT_O_MAGIC) ? \
+ (N_TXTADDR(x)+N_TXTSIZE(x)) \
+ : (N_SEGSIZE(x) + ((N_TXTADDR(x)+N_TXTSIZE(x)-1) & ~(N_SEGSIZE(x)-1))))
+
+#define _N_BADMACH(x) \
+(((N_MACHTYPE (x)) != HP9000S200_ID) && \
+ ((N_MACHTYPE (x)) != HP98x6_ID))
+
+#define _N_BADMAG(x) (N_MAGIC(x) != HPUX_DOT_O_MAGIC \
+ && N_MAGIC(x) != OMAGIC \
+ && N_MAGIC(x) != NMAGIC \
+ && N_MAGIC(x) != ZMAGIC )
+
+#undef _N_HDROFF
+#define _N_HDROFF(x) (SEGMENT_SIZE - (sizeof (struct exec)))
+
+#undef N_DATOFF
+#undef N_PASOFF
+#undef N_SYMOFF
+#undef N_SUPOFF
+#undef N_TRELOFF
+#undef N_DRELOFF
+#undef N_STROFF
+
+#define N_DATOFF(x) ( N_TXTOFF(x) + N_TXTSIZE(x) )
+#define N_PASOFF(x) ( N_DATOFF(x) + (x).a_data)
+#define N_SYMOFF(x) ( N_PASOFF(x) /* + (x).a_passize*/ )
+#define N_SUPOFF(x) ( N_SYMOFF(x) + (x).a_syms )
+#define N_TRELOFF(x) ( N_SUPOFF(x) /* + 0 (x).a_supsize*/ )
+#define N_DRELOFF(x) ( N_TRELOFF(x) + (x).a_trsize )
+#define N_EXTHOFF(x) ( N_DRELOFF(x) /* + 0 (x).a_drsize */)
+#define N_STROFF(x) ( 0 /* no string table */ )
+
+/* use these when the file has gnu symbol tables */
+#define N_GNU_TRELOFF(x) (N_DATOFF(x) + (x).a_data)
+#define N_GNU_DRELOFF(x) (N_GNU_TRELOFF(x) + (x).a_trsize)
+#define N_GNU_SYMOFF(x) (N_GNU_DRELOFF(x) + (x).a_drsize)
+
+#define TARGET_PAGE_SIZE 0x1000
+#define SEGMENT_SIZE 0x1000
+#define TEXT_START_ADDR 0
+
+#undef N_SHARED_LIB
+#define N_SHARED_LIB(x) ( 0 /* no shared libraries */ )
diff --git a/include/aout/hppa.h b/include/aout/hppa.h
new file mode 100644
index 0000000..7e185de
--- /dev/null
+++ b/include/aout/hppa.h
@@ -0,0 +1,7 @@
+#include "filehdr.h"
+#include "aouthdr.h"
+#include "scnhdr.h"
+#include "spacehdr.h"
+#include "syms.h"
+
+
diff --git a/include/aout/ranlib.h b/include/aout/ranlib.h
new file mode 100644
index 0000000..9826005
--- /dev/null
+++ b/include/aout/ranlib.h
@@ -0,0 +1,62 @@
+/* ranlib.h -- archive library index member definition for GNU.
+ Copyright 1990-1991 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The Symdef member of an archive contains two things:
+ a table that maps symbol-string offsets to file offsets,
+ and a symbol-string table. All the symbol names are
+ run together (each with trailing null) in the symbol-string
+ table. There is a single longword bytecount on the front
+ of each of these tables. Thus if we have two symbols,
+ "foo" and "_bar", that are in archive members at offsets
+ 200 and 900, it would look like this:
+ 16 ; byte count of index table
+ 0 ; offset of "foo" in string table
+ 200 ; offset of foo-module in file
+ 4 ; offset of "bar" in string table
+ 900 ; offset of bar-module in file
+ 9 ; byte count of string table
+ "foo\0_bar\0" ; string table */
+
+#define RANLIBMAG "__.SYMDEF" /* Archive file name containing index */
+#define RANLIBSKEW 3 /* Creation time offset */
+
+/* Format of __.SYMDEF:
+ First, a longword containing the size of the 'symdef' data that follows.
+ Second, zero or more 'symdef' structures.
+ Third, a longword containing the length of symbol name strings.
+ Fourth, zero or more symbol name strings (each followed by a null). */
+
+struct symdef
+ {
+ union
+ {
+ unsigned long string_offset; /* In the file */
+ char *name; /* In memory, sometimes */
+ } s;
+ /* this points to the front of the file header (AKA member header --
+ a struct ar_hdr), not to the front of the file or into the file).
+ in other words it only tells you which file to read */
+ unsigned long file_offset;
+ };
+
+/* Compatability with BSD code */
+
+#define ranlib symdef
+#define ran_un s
+#define ran_strx string_offset
+#define ran_name name
+#define ran_off file_offset
diff --git a/include/aout/reloc.h b/include/aout/reloc.h
new file mode 100644
index 0000000..563c552
--- /dev/null
+++ b/include/aout/reloc.h
@@ -0,0 +1,66 @@
+/* reloc.h -- Header file for relocation information.
+ Copyright 1989-1991 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Relocation types for a.out files using reloc_info_extended
+ (SPARC and AMD 29000). */
+
+#ifndef _RELOC_H_READ_
+#define _RELOC_H_READ_ 1
+
+enum reloc_type
+ {
+ RELOC_8, RELOC_16, RELOC_32, /* simple relocations */
+ RELOC_DISP8, RELOC_DISP16, RELOC_DISP32, /* pc-rel displacement */
+ RELOC_WDISP30, RELOC_WDISP22,
+ RELOC_HI22, RELOC_22,
+ RELOC_13, RELOC_LO10,
+ RELOC_SFA_BASE, RELOC_SFA_OFF13,
+ RELOC_BASE10, RELOC_BASE13, RELOC_BASE22, /* P.I.C. (base-relative) */
+ RELOC_PC10, RELOC_PC22, /* for some sort of pc-rel P.I.C. (?) */
+ RELOC_JMP_TBL, /* P.I.C. jump table */
+ RELOC_SEGOFF16, /* reputedly for shared libraries somehow */
+ RELOC_GLOB_DAT, RELOC_JMP_SLOT, RELOC_RELATIVE,
+ RELOC_11,
+ RELOC_WDISP2_14,
+ RELOC_WDISP19,
+ RELOC_HHI22,
+ RELOC_HLO10,
+
+ /* 29K relocation types */
+ RELOC_JUMPTARG, RELOC_CONST, RELOC_CONSTH,
+
+ RELOC_WDISP14, RELOC_WDISP21,
+
+ NO_RELOC
+ };
+
+#define RELOC_TYPE_NAMES \
+"8", "16", "32", "DISP8", \
+"DISP16", "DISP32", "WDISP30", "WDISP22", \
+"HI22", "22", "13", "LO10", \
+"SFA_BASE", "SFAOFF13", "BASE10", "BASE13", \
+"BASE22", "PC10", "PC22", "JMP_TBL", \
+"SEGOFF16", "GLOB_DAT", "JMP_SLOT", "RELATIVE", \
+"11", "WDISP2_14", "WDISP19", "HHI22", \
+"HLO10", \
+"JUMPTARG", "CONST", "CONSTH", "WDISP14", \
+"WDISP21", \
+"NO_RELOC"
+
+#endif /* _RELOC_H_READ_ */
+
+/* end of reloc.h */
diff --git a/include/aout/stab.def b/include/aout/stab.def
new file mode 100644
index 0000000..9c2d2dd
--- /dev/null
+++ b/include/aout/stab.def
@@ -0,0 +1,268 @@
+/* Table of DBX symbol codes for the GNU system.
+ Copyright (C) 1988, 91, 92, 93, 94, 95, 96, 1998
+ Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* New stab from Solaris 2. This uses an n_type of 0, which in a.out files
+ overlaps the N_UNDF used for ordinary symbols. In ELF files, the
+ debug information is in a different file section, so there is no conflict.
+ This symbol's n_value gives the size of the string section associated
+ with this file. The symbol's n_strx (relative to the just-updated
+ string section start address) gives the name of the source file,
+ e.g. "foo.c", without any path information. The symbol's n_desc gives
+ the count of upcoming symbols associated with this file (not including
+ this one). */
+/* __define_stab (N_UNDF, 0x00, "UNDF") */
+
+/* Global variable. Only the name is significant.
+ To find the address, look in the corresponding external symbol. */
+__define_stab (N_GSYM, 0x20, "GSYM")
+
+/* Function name for BSD Fortran. Only the name is significant.
+ To find the address, look in the corresponding external symbol. */
+__define_stab (N_FNAME, 0x22, "FNAME")
+
+/* Function name or text-segment variable for C. Value is its address.
+ Desc is supposedly starting line number, but GCC doesn't set it
+ and DBX seems not to miss it. */
+__define_stab (N_FUN, 0x24, "FUN")
+
+/* Data-segment variable with internal linkage. Value is its address.
+ "Static Sym". */
+__define_stab (N_STSYM, 0x26, "STSYM")
+
+/* BSS-segment variable with internal linkage. Value is its address. */
+__define_stab (N_LCSYM, 0x28, "LCSYM")
+
+/* Name of main routine. Only the name is significant. */
+__define_stab (N_MAIN, 0x2a, "MAIN")
+
+/* Solaris2: Read-only data symbols. */
+__define_stab (N_ROSYM, 0x2c, "ROSYM")
+
+/* Global symbol in Pascal.
+ Supposedly the value is its line number; I'm skeptical. */
+__define_stab (N_PC, 0x30, "PC")
+
+/* Number of symbols: 0, files,,funcs,lines according to Ultrix V4.0. */
+__define_stab (N_NSYMS, 0x32, "NSYMS")
+
+/* "No DST map for sym: name, ,0,type,ignored" according to Ultrix V4.0. */
+__define_stab (N_NOMAP, 0x34, "NOMAP")
+
+/* New stab from Solaris 2. Like N_SO, but for the object file. Two in
+ a row provide the build directory and the relative path of the .o from it.
+ Solaris2 uses this to avoid putting the stabs info into the linked
+ executable; this stab goes into the ".stab.index" section, and the debugger
+ reads the real stabs directly from the .o files instead. */
+__define_stab (N_OBJ, 0x38, "OBJ")
+
+/* New stab from Solaris 2. Options for the debugger, related to the
+ source language for this module. E.g. whether to use ANSI
+ integral promotions or traditional integral promotions. */
+__define_stab (N_OPT, 0x3c, "OPT")
+
+/* Register variable. Value is number of register. */
+__define_stab (N_RSYM, 0x40, "RSYM")
+
+/* Modula-2 compilation unit. Can someone say what info it contains? */
+__define_stab (N_M2C, 0x42, "M2C")
+
+/* Line number in text segment. Desc is the line number;
+ value is corresponding address. On Solaris2, the line number is
+ relative to the start of the current function. */
+__define_stab (N_SLINE, 0x44, "SLINE")
+
+/* Similar, for data segment. */
+__define_stab (N_DSLINE, 0x46, "DSLINE")
+
+/* Similar, for bss segment. */
+__define_stab (N_BSLINE, 0x48, "BSLINE")
+
+/* Sun's source-code browser stabs. ?? Don't know what the fields are.
+ Supposedly the field is "path to associated .cb file". THIS VALUE
+ OVERLAPS WITH N_BSLINE! */
+__define_stab_duplicate (N_BROWS, 0x48, "BROWS")
+
+/* GNU Modula-2 definition module dependency. Value is the modification time
+ of the definition file. Other is non-zero if it is imported with the
+ GNU M2 keyword %INITIALIZE. Perhaps N_M2C can be used if there
+ are enough empty fields? */
+__define_stab(N_DEFD, 0x4a, "DEFD")
+
+/* New in Solaris2. Function start/body/end line numbers. */
+__define_stab(N_FLINE, 0x4C, "FLINE")
+
+/* THE FOLLOWING TWO STAB VALUES CONFLICT. Happily, one is for Modula-2
+ and one is for C++. Still,... */
+/* GNU C++ exception variable. Name is variable name. */
+__define_stab (N_EHDECL, 0x50, "EHDECL")
+/* Modula2 info "for imc": name,,0,0,0 according to Ultrix V4.0. */
+__define_stab_duplicate (N_MOD2, 0x50, "MOD2")
+
+/* GNU C++ `catch' clause. Value is its address. Desc is nonzero if
+ this entry is immediately followed by a CAUGHT stab saying what exception
+ was caught. Multiple CAUGHT stabs means that multiple exceptions
+ can be caught here. If Desc is 0, it means all exceptions are caught
+ here. */
+__define_stab (N_CATCH, 0x54, "CATCH")
+
+/* Structure or union element. Value is offset in the structure. */
+__define_stab (N_SSYM, 0x60, "SSYM")
+
+/* Solaris2: Last stab emitted for module. */
+__define_stab (N_ENDM, 0x62, "ENDM")
+
+/* Name of main source file.
+ Value is starting text address of the compilation.
+ If multiple N_SO's appear, the first to contain a trailing / is the
+ compilation directory. The first to not contain a trailing / is the
+ source file name, relative to the compilation directory. Others (perhaps
+ resulting from cfront) are ignored.
+ On Solaris2, value is undefined, but desc is a source-language code. */
+
+__define_stab (N_SO, 0x64, "SO")
+
+/* SunPro F77: Name of alias. */
+__define_stab (N_ALIAS, 0x6c, "ALIAS")
+
+/* Automatic variable in the stack. Value is offset from frame pointer.
+ Also used for type descriptions. */
+__define_stab (N_LSYM, 0x80, "LSYM")
+
+/* Beginning of an include file. Only Sun uses this.
+ In an object file, only the name is significant.
+ The Sun linker puts data into some of the other fields. */
+__define_stab (N_BINCL, 0x82, "BINCL")
+
+/* Name of sub-source file (#include file).
+ Value is starting text address of the compilation. */
+__define_stab (N_SOL, 0x84, "SOL")
+
+/* Parameter variable. Value is offset from argument pointer.
+ (On most machines the argument pointer is the same as the frame pointer. */
+__define_stab (N_PSYM, 0xa0, "PSYM")
+
+/* End of an include file. No name.
+ This and N_BINCL act as brackets around the file's output.
+ In an object file, there is no significant data in this entry.
+ The Sun linker puts data into some of the fields. */
+__define_stab (N_EINCL, 0xa2, "EINCL")
+
+/* Alternate entry point. Value is its address. */
+__define_stab (N_ENTRY, 0xa4, "ENTRY")
+
+/* Beginning of lexical block.
+ The desc is the nesting level in lexical blocks.
+ The value is the address of the start of the text for the block.
+ The variables declared inside the block *precede* the N_LBRAC symbol.
+ On Solaris2, the value is relative to the start of the current function. */
+__define_stab (N_LBRAC, 0xc0, "LBRAC")
+
+/* Place holder for deleted include file. Replaces a N_BINCL and everything
+ up to the corresponding N_EINCL. The Sun linker generates these when
+ it finds multiple identical copies of the symbols from an include file.
+ This appears only in output from the Sun linker. */
+__define_stab (N_EXCL, 0xc2, "EXCL")
+
+/* Modula-2 scope information. Can someone say what info it contains? */
+__define_stab (N_SCOPE, 0xc4, "SCOPE")
+
+/* End of a lexical block. Desc matches the N_LBRAC's desc.
+ The value is the address of the end of the text for the block.
+ On Solaris2, the value is relative to the start of the current function. */
+__define_stab (N_RBRAC, 0xe0, "RBRAC")
+
+/* Begin named common block. Only the name is significant. */
+__define_stab (N_BCOMM, 0xe2, "BCOMM")
+
+/* End named common block. Only the name is significant
+ (and it should match the N_BCOMM). */
+__define_stab (N_ECOMM, 0xe4, "ECOMM")
+
+/* Member of a common block; value is offset within the common block.
+ This should occur within a BCOMM/ECOMM pair. */
+__define_stab (N_ECOML, 0xe8, "ECOML")
+
+/* Solaris2: Pascal "with" statement: type,,0,0,offset */
+__define_stab (N_WITH, 0xea, "WITH")
+
+/* These STAB's are used on Gould systems for Non-Base register symbols
+ or something like that. FIXME. I have assigned the values at random
+ since I don't have a Gould here. Fixups from Gould folk welcome... */
+__define_stab (N_NBTEXT, 0xF0, "NBTEXT")
+__define_stab (N_NBDATA, 0xF2, "NBDATA")
+__define_stab (N_NBBSS, 0xF4, "NBBSS")
+__define_stab (N_NBSTS, 0xF6, "NBSTS")
+__define_stab (N_NBLCS, 0xF8, "NBLCS")
+
+/* Second symbol entry containing a length-value for the preceding entry.
+ The value is the length. */
+__define_stab (N_LENG, 0xfe, "LENG")
+
+/* The above information, in matrix format.
+
+ STAB MATRIX
+ _________________________________________________
+ | 00 - 1F are not dbx stab symbols |
+ | In most cases, the low bit is the EXTernal bit|
+
+ | 00 UNDEF | 02 ABS | 04 TEXT | 06 DATA |
+ | 01 |EXT | 03 |EXT | 05 |EXT | 07 |EXT |
+
+ | 08 BSS | 0A INDR | 0C FN_SEQ | 0E WEAKA |
+ | 09 |EXT | 0B | 0D WEAKU | 0F WEAKT |
+
+ | 10 WEAKD | 12 COMM | 14 SETA | 16 SETT |
+ | 11 WEAKB | 13 | 15 | 17 |
+
+ | 18 SETD | 1A SETB | 1C SETV | 1E WARNING|
+ | 19 | 1B | 1D | 1F FN |
+
+ |_______________________________________________|
+ | Debug entries with bit 01 set are unused. |
+ | 20 GSYM | 22 FNAME | 24 FUN | 26 STSYM |
+ | 28 LCSYM | 2A MAIN | 2C ROSYM | 2E |
+ | 30 PC | 32 NSYMS | 34 NOMAP | 36 |
+ | 38 OBJ | 3A | 3C OPT | 3E |
+ | 40 RSYM | 42 M2C | 44 SLINE | 46 DSLINE |
+ | 48 BSLINE*| 4A DEFD | 4C FLINE | 4E |
+ | 50 EHDECL*| 52 | 54 CATCH | 56 |
+ | 58 | 5A | 5C | 5E |
+ | 60 SSYM | 62 ENDM | 64 SO | 66 |
+ | 68 | 6A | 6C ALIAS | 6E |
+ | 70 | 72 | 74 | 76 |
+ | 78 | 7A | 7C | 7E |
+ | 80 LSYM | 82 BINCL | 84 SOL | 86 |
+ | 88 | 8A | 8C | 8E |
+ | 90 | 92 | 94 | 96 |
+ | 98 | 9A | 9C | 9E |
+ | A0 PSYM | A2 EINCL | A4 ENTRY | A6 |
+ | A8 | AA | AC | AE |
+ | B0 | B2 | B4 | B6 |
+ | B8 | BA | BC | BE |
+ | C0 LBRAC | C2 EXCL | C4 SCOPE | C6 |
+ | C8 | CA | CC | CE |
+ | D0 | D2 | D4 | D6 |
+ | D8 | DA | DC | DE |
+ | E0 RBRAC | E2 BCOMM | E4 ECOMM | E6 |
+ | E8 ECOML | EA WITH | EC | EE |
+ | F0 | F2 | F4 | F6 |
+ | F8 | FA | FC | FE LENG |
+ +-----------------------------------------------+
+ * 50 EHDECL is also MOD2.
+ * 48 BSLINE is also BROWS.
+ */
diff --git a/include/aout/stab_gnu.h b/include/aout/stab_gnu.h
new file mode 100644
index 0000000..7d18e14
--- /dev/null
+++ b/include/aout/stab_gnu.h
@@ -0,0 +1,37 @@
+#ifndef __GNU_STAB__
+
+/* Indicate the GNU stab.h is in use. */
+
+#define __GNU_STAB__
+
+#define __define_stab(NAME, CODE, STRING) NAME=CODE,
+#define __define_stab_duplicate(NAME, CODE, STRING) NAME=CODE,
+
+enum __stab_debug_code
+{
+#include "aout/stab.def"
+LAST_UNUSED_STAB_CODE
+};
+
+#undef __define_stab
+
+/* Definitions of "desc" field for N_SO stabs in Solaris2. */
+
+#define N_SO_AS 1
+#define N_SO_C 2
+#define N_SO_ANSI_C 3
+#define N_SO_CC 4 /* C++ */
+#define N_SO_FORTRAN 5
+#define N_SO_PASCAL 6
+
+/* Solaris2: Floating point type values in basic types. */
+
+#define NF_NONE 0
+#define NF_SINGLE 1 /* IEEE 32-bit */
+#define NF_DOUBLE 2 /* IEEE 64-bit */
+#define NF_COMPLEX 3 /* Fortran complex */
+#define NF_COMPLEX16 4 /* Fortran double complex */
+#define NF_COMPLEX32 5 /* Fortran complex*16 */
+#define NF_LDOUBLE 6 /* Long double (whatever that is) */
+
+#endif /* __GNU_STAB_ */
diff --git a/include/aout/sun4.h b/include/aout/sun4.h
new file mode 100644
index 0000000..f42a0dd
--- /dev/null
+++ b/include/aout/sun4.h
@@ -0,0 +1,219 @@
+/* SPARC-specific values for a.out files */
+
+/* Some systems, e.g., AIX, may have defined this in header files already
+ included. */
+#undef TARGET_PAGE_SIZE
+#define TARGET_PAGE_SIZE 0x2000 /* 8K. aka NBPG in <sys/param.h> */
+/* Note that some SPARCs have 4K pages, some 8K, some others. */
+
+#define SEG_SIZE_SPARC TARGET_PAGE_SIZE
+#define SEG_SIZE_SUN3 0x20000 /* Resolution of r/w protection hw */
+
+#define TEXT_START_ADDR TARGET_PAGE_SIZE /* Location 0 is not accessible */
+#define N_HEADER_IN_TEXT(x) 1
+
+/* Non-default definitions of the accessor macros... */
+
+/* Segment size varies on Sun-3 versus Sun-4. */
+
+#define N_SEGSIZE(x) (N_MACHTYPE(x) == M_SPARC? SEG_SIZE_SPARC: \
+ N_MACHTYPE(x) == M_68020? SEG_SIZE_SUN3: \
+ /* Guess? */ TARGET_PAGE_SIZE)
+
+/* Virtual Address of text segment from the a.out file. For OMAGIC,
+ (almost always "unlinked .o's" these days), should be zero.
+ Sun added a kludge so that shared libraries linked ZMAGIC get
+ an address of zero if a_entry (!!!) is lower than the otherwise
+ expected text address. These kludges have gotta go!
+ For linked files, should reflect reality if we know it. */
+
+/* This differs from the version in aout64.h (which we override by defining
+ it here) only for NMAGIC (we return TEXT_START_ADDR+EXEC_BYTES_SIZE;
+ they return 0). */
+
+#define N_TXTADDR(x) \
+ (N_MAGIC(x)==OMAGIC? 0 \
+ : (N_MAGIC(x) == ZMAGIC && (x).a_entry < TEXT_START_ADDR)? 0 \
+ : TEXT_START_ADDR+EXEC_BYTES_SIZE)
+
+/* When a file is linked against a shared library on SunOS 4, the
+ dynamic bit in the exec header is set, and the first symbol in the
+ symbol table is __DYNAMIC. Its value is the address of the
+ following structure. */
+
+struct external_sun4_dynamic
+{
+ /* The version number of the structure. SunOS 4.1.x creates files
+ with version number 3, which is what this structure is based on.
+ According to gdb, version 2 is similar. I believe that version 2
+ used a different type of procedure linkage table, and there may
+ have been other differences. */
+ bfd_byte ld_version[4];
+ /* The virtual address of a 28 byte structure used in debugging.
+ The contents are filled in at run time by ld.so. */
+ bfd_byte ldd[4];
+ /* The virtual address of another structure with information about
+ how to relocate the executable at run time. */
+ bfd_byte ld[4];
+};
+
+/* The size of the debugging structure pointed to by the debugger
+ field of __DYNAMIC. */
+#define EXTERNAL_SUN4_DYNAMIC_DEBUGGER_SIZE (24)
+
+/* The structure pointed to by the linker field of __DYNAMIC. As far
+ as I can tell, most of the addresses in this structure are offsets
+ within the file, but some are actually virtual addresses. */
+
+struct internal_sun4_dynamic_link
+{
+ /* Linked list of loaded objects. This is filled in at runtime by
+ ld.so and probably by dlopen. */
+ unsigned long ld_loaded;
+
+ /* The address of the list of names of shared objects which must be
+ included at runtime. Each entry in the list is 16 bytes: the 4
+ byte address of the string naming the object (e.g., for -lc this
+ is "c"); 4 bytes of flags--the high bit is whether to search for
+ the object using the library path; the 2 byte major version
+ number; the 2 byte minor version number; the 4 byte address of
+ the next entry in the list (zero if this is the last entry). The
+ version numbers seem to only be non-zero when doing library
+ searching. */
+ unsigned long ld_need;
+
+ /* The address of the path to search for the shared objects which
+ must be included. This points to a string in PATH format which
+ is generated from the -L arguments to the linker. According to
+ the man page, ld.so implicitly adds ${LD_LIBRARY_PATH} to the
+ beginning of this string and /lib:/usr/lib:/usr/local/lib to the
+ end. The string is terminated by a null byte. This field is
+ zero if there is no additional path. */
+ unsigned long ld_rules;
+
+ /* The address of the global offset table. This appears to be a
+ virtual address, not a file offset. The first entry in the
+ global offset table seems to be the virtual address of the
+ sun4_dynamic structure (the same value as the __DYNAMIC symbol).
+ The global offset table is used for PIC code to hold the
+ addresses of variables. A dynamically linked file which does not
+ itself contain PIC code has a four byte global offset table. */
+ unsigned long ld_got;
+
+ /* The address of the procedure linkage table. This appears to be a
+ virtual address, not a file offset.
+
+ On a SPARC, the table is composed of 12 byte entries, each of
+ which consists of three instructions. The first entry is
+ sethi %hi(0),%g1
+ jmp %g1
+ nop
+ These instructions are changed by ld.so into a jump directly into
+ ld.so itself. Each subsequent entry is
+ save %sp, -96, %sp
+ call <address of first entry in procedure linkage table>
+ <reloc_number | 0x01000000>
+ The reloc_number is the number of the reloc to use to resolve
+ this entry. The reloc will be a JMP_SLOT reloc against some
+ symbol that is not defined in this object file but should be
+ defined in a shared object (if it is not, ld.so will report a
+ runtime error and exit). The constant 0x010000000 turns the
+ reloc number into a sethi of %g0, which does nothing since %g0 is
+ hardwired to zero.
+
+ When one of these entries is executed, it winds up calling into
+ ld.so. ld.so looks at the reloc number, available via the return
+ address, to determine which entry this is. It then looks at the
+ reloc and patches up the entry in the table into a sethi and jmp
+ to the real address followed by a nop. This means that the reloc
+ lookup only has to happen once, and it also means that the
+ relocation only needs to be done if the function is actually
+ called. The relocation is expensive because ld.so must look up
+ the symbol by name.
+
+ The size of the procedure linkage table is given by the ld_plt_sz
+ field. */
+ unsigned long ld_plt;
+
+ /* The address of the relocs. These are in the same format as
+ ordinary relocs. Symbol index numbers refer to the symbols
+ pointed to by ld_stab. I think the only way to determine the
+ number of relocs is to assume that all the bytes from ld_rel to
+ ld_hash contain reloc entries. */
+ unsigned long ld_rel;
+
+ /* The address of a hash table of symbols. The hash table has
+ roughly the same number of entries as there are dynamic symbols;
+ I think the only way to get the exact size is to assume that
+ every byte from ld_hash to ld_stab is devoted to the hash table.
+
+ Each entry in the hash table is eight bytes. The first four
+ bytes are a symbol index into the dynamic symbols. The second
+ four bytes are the index of the next hash table entry in the
+ bucket. The ld_buckets field gives the number of buckets, say B.
+ The first B entries in the hash table each start a bucket which
+ is chained through the second four bytes of each entry. A value
+ of zero ends the chain.
+
+ The hash function is simply
+ h = 0;
+ while (*string != '\0')
+ h = (h << 1) + *string++;
+ h &= 0x7fffffff;
+
+ To look up a symbol, compute the hash value of the name. Take
+ the modulos of hash value and the number of buckets. Start at
+ that entry in the hash table. See if the symbol (from the first
+ four bytes of the hash table entry) has the name you are looking
+ for. If not, use the chain field (the second four bytes of the
+ hash table entry) to move on to the next entry in this bucket.
+ If the chain field is zero you have reached the end of the
+ bucket, and the symbol is not in the hash table. */
+ unsigned long ld_hash;
+
+ /* The address of the symbol table. This is a list of
+ external_nlist structures. The string indices are relative to
+ the ld_symbols field. I think the only way to determine the
+ number of symbols is to assume that all the bytes between ld_stab
+ and ld_symbols are external_nlist structures. */
+ unsigned long ld_stab;
+
+ /* I don't know what this is for. It seems to always be zero. */
+ unsigned long ld_stab_hash;
+
+ /* The number of buckets in the hash table. */
+ unsigned long ld_buckets;
+
+ /* The address of the symbol string table. The first string in this
+ string table need not be the empty string. */
+ unsigned long ld_symbols;
+
+ /* The size in bytes of the symbol string table. */
+ unsigned long ld_symb_size;
+
+ /* The size in bytes of the text segment. */
+ unsigned long ld_text;
+
+ /* The size in bytes of the procedure linkage table. */
+ unsigned long ld_plt_sz;
+};
+
+/* The external form of the structure. */
+
+struct external_sun4_dynamic_link
+{
+ bfd_byte ld_loaded[4];
+ bfd_byte ld_need[4];
+ bfd_byte ld_rules[4];
+ bfd_byte ld_got[4];
+ bfd_byte ld_plt[4];
+ bfd_byte ld_rel[4];
+ bfd_byte ld_hash[4];
+ bfd_byte ld_stab[4];
+ bfd_byte ld_stab_hash[4];
+ bfd_byte ld_buckets[4];
+ bfd_byte ld_symbols[4];
+ bfd_byte ld_symb_size[4];
+ bfd_byte ld_text[4];
+ bfd_byte ld_plt_sz[4];
+};
diff --git a/include/bfdlink.h b/include/bfdlink.h
new file mode 100644
index 0000000..a055fa0
--- /dev/null
+++ b/include/bfdlink.h
@@ -0,0 +1,520 @@
+/* bfdlink.h -- header file for BFD link routines
+ Copyright 1993, 94, 95, 96, 97, 1999 Free Software Foundation, Inc.
+ Written by Steve Chamberlain and Ian Lance Taylor, Cygnus Support.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef BFDLINK_H
+#define BFDLINK_H
+
+/* Which symbols to strip during a link. */
+enum bfd_link_strip
+{
+ strip_none, /* Don't strip any symbols. */
+ strip_debugger, /* Strip debugging symbols. */
+ strip_some, /* keep_hash is the list of symbols to keep. */
+ strip_all /* Strip all symbols. */
+};
+
+/* Which local symbols to discard during a link. This is irrelevant
+ if strip_all is used. */
+enum bfd_link_discard
+{
+ discard_none, /* Don't discard any locals. */
+ discard_l, /* Discard local temporary symbols. */
+ discard_all /* Discard all locals. */
+};
+
+/* These are the possible types of an entry in the BFD link hash
+ table. */
+
+enum bfd_link_hash_type
+{
+ bfd_link_hash_new, /* Symbol is new. */
+ bfd_link_hash_undefined, /* Symbol seen before, but undefined. */
+ bfd_link_hash_undefweak, /* Symbol is weak and undefined. */
+ bfd_link_hash_defined, /* Symbol is defined. */
+ bfd_link_hash_defweak, /* Symbol is weak and defined. */
+ bfd_link_hash_common, /* Symbol is common. */
+ bfd_link_hash_indirect, /* Symbol is an indirect link. */
+ bfd_link_hash_warning /* Like indirect, but warn if referenced. */
+};
+
+/* The linking routines use a hash table which uses this structure for
+ its elements. */
+
+struct bfd_link_hash_entry
+{
+ /* Base hash table entry structure. */
+ struct bfd_hash_entry root;
+ /* Type of this entry. */
+ enum bfd_link_hash_type type;
+
+ /* Undefined and common symbols are kept in a linked list through
+ this field. This field is not in the union because that would
+ force us to remove entries from the list when we changed their
+ type, which would force the list to be doubly linked, which would
+ waste more memory. When an undefined or common symbol is
+ created, it should be added to this list, the head of which is in
+ the link hash table itself. As symbols are defined, they need
+ not be removed from the list; anything which reads the list must
+ doublecheck the symbol type.
+
+ Weak symbols are not kept on this list.
+
+ Defined and defweak symbols use this field as a reference marker.
+ If the field is not NULL, or this structure is the tail of the
+ undefined symbol list, the symbol has been referenced. If the
+ symbol is undefined and becomes defined, this field will
+ automatically be non-NULL since the symbol will have been on the
+ undefined symbol list. */
+ struct bfd_link_hash_entry *next;
+ /* A union of information depending upon the type. */
+ union
+ {
+ /* Nothing is kept for bfd_hash_new. */
+ /* bfd_link_hash_undefined, bfd_link_hash_undefweak. */
+ struct
+ {
+ bfd *abfd; /* BFD symbol was found in. */
+ } undef;
+ /* bfd_link_hash_defined, bfd_link_hash_defweak. */
+ struct
+ {
+ bfd_vma value; /* Symbol value. */
+ asection *section; /* Symbol section. */
+ } def;
+ /* bfd_link_hash_indirect, bfd_link_hash_warning. */
+ struct
+ {
+ struct bfd_link_hash_entry *link; /* Real symbol. */
+ const char *warning; /* Warning (bfd_link_hash_warning only). */
+ } i;
+ /* bfd_link_hash_common. */
+ struct
+ {
+ /* The linker needs to know three things about common
+ symbols: the size, the alignment, and the section in
+ which the symbol should be placed. We store the size
+ here, and we allocate a small structure to hold the
+ section and the alignment. The alignment is stored as a
+ power of two. We don't store all the information
+ directly because we don't want to increase the size of
+ the union; this structure is a major space user in the
+ linker. */
+ bfd_size_type size; /* Common symbol size. */
+ struct bfd_link_hash_common_entry
+ {
+ unsigned int alignment_power; /* Alignment. */
+ asection *section; /* Symbol section. */
+ } *p;
+ } c;
+ } u;
+};
+
+/* This is the link hash table. It is a derived class of
+ bfd_hash_table. */
+
+struct bfd_link_hash_table
+{
+ /* The hash table itself. */
+ struct bfd_hash_table table;
+ /* The back end which created this hash table. This indicates the
+ type of the entries in the hash table, which is sometimes
+ important information when linking object files of different
+ types together. */
+ const bfd_target *creator;
+ /* A linked list of undefined and common symbols, linked through the
+ next field in the bfd_link_hash_entry structure. */
+ struct bfd_link_hash_entry *undefs;
+ /* Entries are added to the tail of the undefs list. */
+ struct bfd_link_hash_entry *undefs_tail;
+};
+
+/* Look up an entry in a link hash table. If FOLLOW is true, this
+ follows bfd_link_hash_indirect and bfd_link_hash_warning links to
+ the real symbol. */
+extern struct bfd_link_hash_entry *bfd_link_hash_lookup
+ PARAMS ((struct bfd_link_hash_table *, const char *, boolean create,
+ boolean copy, boolean follow));
+
+/* Look up an entry in the main linker hash table if the symbol might
+ be wrapped. This should only be used for references to an
+ undefined symbol, not for definitions of a symbol. */
+
+extern struct bfd_link_hash_entry *bfd_wrapped_link_hash_lookup
+ PARAMS ((bfd *, struct bfd_link_info *, const char *, boolean, boolean,
+ boolean));
+
+/* Traverse a link hash table. */
+extern void bfd_link_hash_traverse
+ PARAMS ((struct bfd_link_hash_table *,
+ boolean (*) (struct bfd_link_hash_entry *, PTR),
+ PTR));
+
+/* Add an entry to the undefs list. */
+extern void bfd_link_add_undef
+ PARAMS ((struct bfd_link_hash_table *, struct bfd_link_hash_entry *));
+
+/* This structure holds all the information needed to communicate
+ between BFD and the linker when doing a link. */
+
+struct bfd_link_info
+{
+ /* Function callbacks. */
+ const struct bfd_link_callbacks *callbacks;
+ /* true if BFD should generate a relocateable object file. */
+ boolean relocateable;
+ /* true if BFD should generate a "task linked" object file,
+ similar to relocatable but also with globals converted to statics. */
+ boolean task_link;
+ /* true if BFD should generate a shared object. */
+ boolean shared;
+ /* true if BFD should pre-bind symbols in a shared object. */
+ boolean symbolic;
+ /* true if shared objects should be linked directly, not shared. */
+ boolean static_link;
+ /* true if the output file should be in a traditional format. This
+ is equivalent to the setting of the BFD_TRADITIONAL_FORMAT flag
+ on the output file, but may be checked when reading the input
+ files. */
+ boolean traditional_format;
+ /* true if we want to produced optimized output files. This might
+ need much more time and therefore must be explicitly selected. */
+ boolean optimize;
+ /* true if BFD should generate errors for undefined symbols
+ even if generating a shared object. */
+ boolean no_undefined;
+ /* Which symbols to strip. */
+ enum bfd_link_strip strip;
+ /* Which local symbols to discard. */
+ enum bfd_link_discard discard;
+ /* true if symbols should be retained in memory, false if they
+ should be freed and reread. */
+ boolean keep_memory;
+ /* The list of input BFD's involved in the link. These are chained
+ together via the link_next field. */
+ bfd *input_bfds;
+ /* If a symbol should be created for each input BFD, this is section
+ where those symbols should be placed. It must be a section in
+ the output BFD. It may be NULL, in which case no such symbols
+ will be created. This is to support CREATE_OBJECT_SYMBOLS in the
+ linker command language. */
+ asection *create_object_symbols_section;
+ /* Hash table handled by BFD. */
+ struct bfd_link_hash_table *hash;
+ /* Hash table of symbols to keep. This is NULL unless strip is
+ strip_some. */
+ struct bfd_hash_table *keep_hash;
+ /* true if every symbol should be reported back via the notice
+ callback. */
+ boolean notice_all;
+ /* Hash table of symbols to report back via the notice callback. If
+ this is NULL, and notice_all is false, then no symbols are
+ reported back. */
+ struct bfd_hash_table *notice_hash;
+ /* Hash table of symbols which are being wrapped (the --wrap linker
+ option). If this is NULL, no symbols are being wrapped. */
+ struct bfd_hash_table *wrap_hash;
+ /* If a base output file is wanted, then this points to it */
+ PTR base_file;
+
+ /* If non-zero, specifies that branches which are problematic for the
+ MPC860 C0 (or earlier) should be checked for and modified. It gives the
+ number of bytes that should be checked at the end of each text page. */
+ int mpc860c0;
+};
+
+/* This structures holds a set of callback functions. These are
+ called by the BFD linker routines. The first argument to each
+ callback function is the bfd_link_info structure being used. Each
+ function returns a boolean value. If the function returns false,
+ then the BFD function which called it will return with a failure
+ indication. */
+
+struct bfd_link_callbacks
+{
+ /* A function which is called when an object is added from an
+ archive. ABFD is the archive element being added. NAME is the
+ name of the symbol which caused the archive element to be pulled
+ in. */
+ boolean (*add_archive_element) PARAMS ((struct bfd_link_info *,
+ bfd *abfd,
+ const char *name));
+ /* A function which is called when a symbol is found with multiple
+ definitions. NAME is the symbol which is defined multiple times.
+ OBFD is the old BFD, OSEC is the old section, OVAL is the old
+ value, NBFD is the new BFD, NSEC is the new section, and NVAL is
+ the new value. OBFD may be NULL. OSEC and NSEC may be
+ bfd_com_section or bfd_ind_section. */
+ boolean (*multiple_definition) PARAMS ((struct bfd_link_info *,
+ const char *name,
+ bfd *obfd,
+ asection *osec,
+ bfd_vma oval,
+ bfd *nbfd,
+ asection *nsec,
+ bfd_vma nval));
+ /* A function which is called when a common symbol is defined
+ multiple times. NAME is the symbol appearing multiple times.
+ OBFD is the BFD of the existing symbol; it may be NULL if this is
+ not known. OTYPE is the type of the existing symbol, which may
+ be bfd_link_hash_defined, bfd_link_hash_defweak,
+ bfd_link_hash_common, or bfd_link_hash_indirect. If OTYPE is
+ bfd_link_hash_common, OSIZE is the size of the existing symbol.
+ NBFD is the BFD of the new symbol. NTYPE is the type of the new
+ symbol, one of bfd_link_hash_defined, bfd_link_hash_common, or
+ bfd_link_hash_indirect. If NTYPE is bfd_link_hash_common, NSIZE
+ is the size of the new symbol. */
+ boolean (*multiple_common) PARAMS ((struct bfd_link_info *,
+ const char *name,
+ bfd *obfd,
+ enum bfd_link_hash_type otype,
+ bfd_vma osize,
+ bfd *nbfd,
+ enum bfd_link_hash_type ntype,
+ bfd_vma nsize));
+ /* A function which is called to add a symbol to a set. ENTRY is
+ the link hash table entry for the set itself (e.g.,
+ __CTOR_LIST__). RELOC is the relocation to use for an entry in
+ the set when generating a relocateable file, and is also used to
+ get the size of the entry when generating an executable file.
+ ABFD, SEC and VALUE identify the value to add to the set. */
+ boolean (*add_to_set) PARAMS ((struct bfd_link_info *,
+ struct bfd_link_hash_entry *entry,
+ bfd_reloc_code_real_type reloc,
+ bfd *abfd, asection *sec, bfd_vma value));
+ /* A function which is called when the name of a g++ constructor or
+ destructor is found. This is only called by some object file
+ formats. CONSTRUCTOR is true for a constructor, false for a
+ destructor. This will use BFD_RELOC_CTOR when generating a
+ relocateable file. NAME is the name of the symbol found. ABFD,
+ SECTION and VALUE are the value of the symbol. */
+ boolean (*constructor) PARAMS ((struct bfd_link_info *,
+ boolean constructor,
+ const char *name, bfd *abfd, asection *sec,
+ bfd_vma value));
+ /* A function which is called to issue a linker warning. For
+ example, this is called when there is a reference to a warning
+ symbol. WARNING is the warning to be issued. SYMBOL is the name
+ of the symbol which triggered the warning; it may be NULL if
+ there is none. ABFD, SECTION and ADDRESS identify the location
+ which trigerred the warning; either ABFD or SECTION or both may
+ be NULL if the location is not known. */
+ boolean (*warning) PARAMS ((struct bfd_link_info *,
+ const char *warning, const char *symbol,
+ bfd *abfd, asection *section,
+ bfd_vma address));
+ /* A function which is called when a relocation is attempted against
+ an undefined symbol. NAME is the symbol which is undefined.
+ ABFD, SECTION and ADDRESS identify the location from which the
+ reference is made. In some cases SECTION may be NULL. */
+ boolean (*undefined_symbol) PARAMS ((struct bfd_link_info *,
+ const char *name, bfd *abfd,
+ asection *section, bfd_vma address));
+ /* A function which is called when a reloc overflow occurs. NAME is
+ the name of the symbol or section the reloc is against,
+ RELOC_NAME is the name of the relocation, and ADDEND is any
+ addend that is used. ABFD, SECTION and ADDRESS identify the
+ location at which the overflow occurs; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ boolean (*reloc_overflow) PARAMS ((struct bfd_link_info *,
+ const char *name,
+ const char *reloc_name, bfd_vma addend,
+ bfd *abfd, asection *section,
+ bfd_vma address));
+ /* A function which is called when a dangerous reloc is performed.
+ The canonical example is an a29k IHCONST reloc which does not
+ follow an IHIHALF reloc. MESSAGE is an appropriate message.
+ ABFD, SECTION and ADDRESS identify the location at which the
+ problem occurred; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ boolean (*reloc_dangerous) PARAMS ((struct bfd_link_info *,
+ const char *message,
+ bfd *abfd, asection *section,
+ bfd_vma address));
+ /* A function which is called when a reloc is found to be attached
+ to a symbol which is not being written out. NAME is the name of
+ the symbol. ABFD, SECTION and ADDRESS identify the location of
+ the reloc; if this is the result of a
+ bfd_section_reloc_link_order or bfd_symbol_reloc_link_order, then
+ ABFD will be NULL. */
+ boolean (*unattached_reloc) PARAMS ((struct bfd_link_info *,
+ const char *name,
+ bfd *abfd, asection *section,
+ bfd_vma address));
+ /* A function which is called when a symbol in notice_hash is
+ defined or referenced. NAME is the symbol. ABFD, SECTION and
+ ADDRESS are the value of the symbol. If SECTION is
+ bfd_und_section, this is a reference. */
+ boolean (*notice) PARAMS ((struct bfd_link_info *, const char *name,
+ bfd *abfd, asection *section, bfd_vma address));
+};
+
+/* The linker builds link_order structures which tell the code how to
+ include input data in the output file. */
+
+/* These are the types of link_order structures. */
+
+enum bfd_link_order_type
+{
+ bfd_undefined_link_order, /* Undefined. */
+ bfd_indirect_link_order, /* Built from a section. */
+ bfd_fill_link_order, /* Fill with a 16 bit constant. */
+ bfd_data_link_order, /* Set to explicit data. */
+ bfd_section_reloc_link_order, /* Relocate against a section. */
+ bfd_symbol_reloc_link_order /* Relocate against a symbol. */
+};
+
+/* This is the link_order structure itself. These form a chain
+ attached to the section whose contents they are describing. */
+
+struct bfd_link_order
+{
+ /* Next link_order in chain. */
+ struct bfd_link_order *next;
+ /* Type of link_order. */
+ enum bfd_link_order_type type;
+ /* Offset within output section. */
+ bfd_vma offset;
+ /* Size within output section. */
+ bfd_size_type size;
+ /* Type specific information. */
+ union
+ {
+ struct
+ {
+ /* Section to include. If this is used, then
+ section->output_section must be the section the
+ link_order is attached to, section->output_offset must
+ equal the link_order offset field, and section->_raw_size
+ must equal the link_order size field. Maybe these
+ restrictions should be relaxed someday. */
+ asection *section;
+ } indirect;
+ struct
+ {
+ /* Value to fill with. */
+ unsigned int value;
+ } fill;
+ struct
+ {
+ /* Data to put into file. The size field gives the number
+ of bytes which this field points to. */
+ bfd_byte *contents;
+ } data;
+ struct
+ {
+ /* Description of reloc to generate. Used for
+ bfd_section_reloc_link_order and
+ bfd_symbol_reloc_link_order. */
+ struct bfd_link_order_reloc *p;
+ } reloc;
+ } u;
+};
+
+/* A linker order of type bfd_section_reloc_link_order or
+ bfd_symbol_reloc_link_order means to create a reloc against a
+ section or symbol, respectively. This is used to implement -Ur to
+ generate relocs for the constructor tables. The
+ bfd_link_order_reloc structure describes the reloc that BFD should
+ create. It is similar to a arelent, but I didn't use arelent
+ because the linker does not know anything about most symbols, and
+ any asymbol structure it creates will be partially meaningless.
+ This information could logically be in the bfd_link_order struct,
+ but I didn't want to waste the space since these types of relocs
+ are relatively rare. */
+
+struct bfd_link_order_reloc
+{
+ /* Reloc type. */
+ bfd_reloc_code_real_type reloc;
+
+ union
+ {
+ /* For type bfd_section_reloc_link_order, this is the section
+ the reloc should be against. This must be a section in the
+ output BFD, not any of the input BFDs. */
+ asection *section;
+ /* For type bfd_symbol_reloc_link_order, this is the name of the
+ symbol the reloc should be against. */
+ const char *name;
+ } u;
+
+ /* Addend to use. The object file should contain zero. The BFD
+ backend is responsible for filling in the contents of the object
+ file correctly. For some object file formats (e.g., COFF) the
+ addend must be stored into in the object file, and for some
+ (e.g., SPARC a.out) it is kept in the reloc. */
+ bfd_vma addend;
+};
+
+/* Allocate a new link_order for a section. */
+extern struct bfd_link_order *bfd_new_link_order PARAMS ((bfd *, asection *));
+
+/* These structures are used to describe version information for the
+ ELF linker. These structures could be manipulated entirely inside
+ BFD, but it would be a pain. Instead, the regular linker sets up
+ these structures, and then passes them into BFD. */
+
+/* Regular expressions for a version. */
+
+struct bfd_elf_version_expr
+{
+ /* Next regular expression for this version. */
+ struct bfd_elf_version_expr *next;
+ /* Regular expression. */
+ const char *pattern;
+ /* Matching function. */
+ int (*match) PARAMS((struct bfd_elf_version_expr *, const char *));
+};
+
+/* Version dependencies. */
+
+struct bfd_elf_version_deps
+{
+ /* Next dependency for this version. */
+ struct bfd_elf_version_deps *next;
+ /* The version which this version depends upon. */
+ struct bfd_elf_version_tree *version_needed;
+};
+
+/* A node in the version tree. */
+
+struct bfd_elf_version_tree
+{
+ /* Next version. */
+ struct bfd_elf_version_tree *next;
+ /* Name of this version. */
+ const char *name;
+ /* Version number. */
+ unsigned int vernum;
+ /* Regular expressions for global symbols in this version. */
+ struct bfd_elf_version_expr *globals;
+ /* Regular expressions for local symbols in this version. */
+ struct bfd_elf_version_expr *locals;
+ /* List of versions which this version depends upon. */
+ struct bfd_elf_version_deps *deps;
+ /* Index of the version name. This is used within BFD. */
+ unsigned int name_indx;
+ /* Whether this version tree was used. This is used within BFD. */
+ int used;
+};
+
+#endif
diff --git a/include/bout.h b/include/bout.h
new file mode 100644
index 0000000..8fc28cc
--- /dev/null
+++ b/include/bout.h
@@ -0,0 +1,182 @@
+/*
+ * This file is a modified version of 'a.out.h'. It is to be used in all
+ * GNU tools modified to support the i80960 (or tools that operate on
+ * object files created by such tools).
+ *
+ * All i80960 development is done in a CROSS-DEVELOPMENT environment. I.e.,
+ * object code is generated on, and executed under the direction of a symbolic
+ * debugger running on, a host system. We do not want to be subject to the
+ * vagaries of which host it is or whether it supports COFF or a.out format,
+ * or anything else. We DO want to:
+ *
+ * o always generate the same format object files, regardless of host.
+ *
+ * o have an 'a.out' header that we can modify for our own purposes
+ * (the 80960 is typically an embedded processor and may require
+ * enhanced linker support that the normal a.out.h header can't
+ * accommodate).
+ *
+ * As for byte-ordering, the following rules apply:
+ *
+ * o Text and data that is actually downloaded to the target is always
+ * in i80960 (little-endian) order.
+ *
+ * o All other numbers (in the header, symbols, relocation directives)
+ * are in host byte-order: object files CANNOT be lifted from a
+ * little-end host and used on a big-endian (or vice versa) without
+ * modification.
+ * ==> THIS IS NO LONGER TRUE USING BFD. WE CAN GENERATE ANY BYTE ORDER
+ * FOR THE HEADER, AND READ ANY BYTE ORDER. PREFERENCE WOULD BE TO
+ * USE LITTLE-ENDIAN BYTE ORDER THROUGHOUT, REGARDLESS OF HOST. <==
+ *
+ * o The downloader ('comm960') takes care to generate a pseudo-header
+ * with correct (i80960) byte-ordering before shipping text and data
+ * off to the NINDY monitor in the target systems. Symbols and
+ * relocation info are never sent to the target.
+ */
+
+
+#define BMAGIC 0415
+/* We don't accept the following (see N_BADMAG macro).
+ * They're just here so GNU code will compile.
+ */
+#define OMAGIC 0407 /* old impure format */
+#define NMAGIC 0410 /* read-only text */
+#define ZMAGIC 0413 /* demand load format */
+
+/* FILE HEADER
+ * All 'lengths' are given as a number of bytes.
+ * All 'alignments' are for relinkable files only; an alignment of
+ * 'n' indicates the corresponding segment must begin at an
+ * address that is a multiple of (2**n).
+ */
+struct external_exec {
+ /* Standard stuff */
+ unsigned char e_info[4]; /* Identifies this as a b.out file */
+ unsigned char e_text[4]; /* Length of text */
+ unsigned char e_data[4]; /* Length of data */
+ unsigned char e_bss[4]; /* Length of uninitialized data area */
+ unsigned char e_syms[4]; /* Length of symbol table */
+ unsigned char e_entry[4]; /* Runtime start address */
+ unsigned char e_trsize[4]; /* Length of text relocation info */
+ unsigned char e_drsize[4]; /* Length of data relocation info */
+
+ /* Added for i960 */
+ unsigned char e_tload[4]; /* Text runtime load address */
+ unsigned char e_dload[4]; /* Data runtime load address */
+ unsigned char e_talign[1]; /* Alignment of text segment */
+ unsigned char e_dalign[1]; /* Alignment of data segment */
+ unsigned char e_balign[1]; /* Alignment of bss segment */
+ unsigned char e_relaxable[1]; /* Assembled with enough info to allow linker to relax */
+};
+
+#define EXEC_BYTES_SIZE (sizeof (struct external_exec))
+
+/* These macros use the a_xxx field names, since they operate on the exec
+ structure after it's been byte-swapped and realigned on the host machine. */
+#define N_BADMAG(x) (((x).a_info)!=BMAGIC)
+#define N_TXTOFF(x) EXEC_BYTES_SIZE
+#define N_DATOFF(x) ( N_TXTOFF(x) + (x).a_text )
+#define N_TROFF(x) ( N_DATOFF(x) + (x).a_data )
+#define N_TRELOFF N_TROFF
+#define N_DROFF(x) ( N_TROFF(x) + (x).a_trsize )
+#define N_DRELOFF N_DROFF
+#define N_SYMOFF(x) ( N_DROFF(x) + (x).a_drsize )
+#define N_STROFF(x) ( N_SYMOFF(x) + (x).a_syms )
+#define N_DATADDR(x) ( (x).a_dload )
+
+/* Address of text segment in memory after it is loaded. */
+#if !defined (N_TXTADDR)
+#define N_TXTADDR(x) 0
+#endif
+
+/* A single entry in the symbol table
+ */
+struct nlist {
+ union {
+ char *n_name;
+ struct nlist *n_next;
+ long n_strx; /* Index into string table */
+ } n_un;
+ unsigned char n_type; /* See below */
+ char n_other; /* Used in i80960 support -- see below */
+ short n_desc;
+ unsigned long n_value;
+};
+
+
+/* Legal values of n_type
+ */
+#define N_UNDF 0 /* Undefined symbol */
+#define N_ABS 2 /* Absolute symbol */
+#define N_TEXT 4 /* Text symbol */
+#define N_DATA 6 /* Data symbol */
+#define N_BSS 8 /* BSS symbol */
+#define N_FN 31 /* Filename symbol */
+
+#define N_EXT 1 /* External symbol (OR'd in with one of above) */
+#define N_TYPE 036 /* Mask for all the type bits */
+#define N_STAB 0340 /* Mask for all bits used for SDB entries */
+
+/* MEANING OF 'n_other'
+ *
+ * If non-zero, the 'n_other' fields indicates either a leaf procedure or
+ * a system procedure, as follows:
+ *
+ * 1 <= n_other <= 32 :
+ * The symbol is the entry point to a system procedure.
+ * 'n_value' is the address of the entry, as for any other
+ * procedure. The system procedure number (which can be used in
+ * a 'calls' instruction) is (n_other-1). These entries come from
+ * '.sysproc' directives.
+ *
+ * n_other == N_CALLNAME
+ * the symbol is the 'call' entry point to a leaf procedure.
+ * The *next* symbol in the symbol table must be the corresponding
+ * 'bal' entry point to the procedure (see following). These
+ * entries come from '.leafproc' directives in which two different
+ * symbols are specified (the first one is represented here).
+ *
+ *
+ * n_other == N_BALNAME
+ * the symbol is the 'bal' entry point to a leaf procedure.
+ * These entries result from '.leafproc' directives in which only
+ * one symbol is specified, or in which the same symbol is
+ * specified twice.
+ *
+ * Note that an N_CALLNAME entry *must* have a corresponding N_BALNAME entry,
+ * but not every N_BALNAME entry must have an N_CALLNAME entry.
+ */
+#define N_CALLNAME ((char)-1)
+#define N_BALNAME ((char)-2)
+#define IS_CALLNAME(x) (N_CALLNAME == (x))
+#define IS_BALNAME(x) (N_BALNAME == (x))
+#define IS_OTHER(x) ((x)>0 && (x) <=32)
+
+#define b_out_relocation_info relocation_info
+struct relocation_info {
+ int r_address; /* File address of item to be relocated */
+ unsigned
+#define r_index r_symbolnum
+ r_symbolnum:24,/* Index of symbol on which relocation is based,
+ * if r_extern is set. Otherwise set to
+ * either N_TEXT, N_DATA, or N_BSS to
+ * indicate section on which relocation is
+ * based.
+ */
+ r_pcrel:1, /* 1 => relocate PC-relative; else absolute
+ * On i960, pc-relative implies 24-bit
+ * address, absolute implies 32-bit.
+ */
+ r_length:2, /* Number of bytes to relocate:
+ * 0 => 1 byte
+ * 1 => 2 bytes -- used for 13 bit pcrel
+ * 2 => 4 bytes
+ */
+ r_extern:1,
+ r_bsr:1, /* Something for the GNU NS32K assembler */
+ r_disp:1, /* Something for the GNU NS32K assembler */
+ r_callj:1, /* 1 if relocation target is an i960 'callj' */
+ r_relaxable:1; /* 1 if enough info is left to relax
+ the data */
+};
diff --git a/include/callback.h b/include/callback.h
new file mode 100644
index 0000000..3075284
--- /dev/null
+++ b/include/callback.h
@@ -0,0 +1,270 @@
+/* Remote target system call callback support.
+ Copyright 1997 Free Software Foundation, Inc.
+ Contributed by Cygnus Solutions.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This interface isn't intended to be specific to any particular kind
+ of remote (hardware, simulator, whatever). As such, support for it
+ (e.g. sim/common/callback.c) should *not* live in the simulator source
+ tree, nor should it live in the gdb source tree. */
+
+/* There are various ways to handle system calls:
+
+ 1) Have a simulator intercept the appropriate trap instruction and
+ directly perform the system call on behalf of the target program.
+ This is the typical way of handling system calls for embedded targets.
+ [Handling system calls for embedded targets isn't that much of an
+ oxymoron as running compiler testsuites make use of the capability.]
+
+ This method of system call handling is done when STATE_ENVIRONMENT
+ is ENVIRONMENT_USER.
+
+ 2) Have a simulator emulate the hardware as much as possible.
+ If the program running on the real hardware communicates with some sort
+ of target manager, one would want to be able to run this program on the
+ simulator as well.
+
+ This method of system call handling is done when STATE_ENVIRONMENT
+ is ENVIRONMENT_OPERATING.
+*/
+
+#ifndef CALLBACK_H
+#define CALLBACK_H
+
+/* ??? The reason why we check for va_start here should be documented. */
+
+#ifndef va_start
+#include <ansidecl.h>
+#ifdef ANSI_PROTOTYPES
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+#endif
+
+/* Mapping of host/target values. */
+/* ??? For debugging purposes, one might want to add a string of the
+ name of the symbol. */
+
+typedef struct {
+ int host_val;
+ int target_val;
+} CB_TARGET_DEFS_MAP;
+
+#define MAX_CALLBACK_FDS 10
+
+/* Forward decl for stat/fstat. */
+struct stat;
+
+typedef struct host_callback_struct host_callback;
+
+struct host_callback_struct
+{
+ int (*close) PARAMS ((host_callback *,int));
+ int (*get_errno) PARAMS ((host_callback *));
+ int (*isatty) PARAMS ((host_callback *, int));
+ int (*lseek) PARAMS ((host_callback *, int, long , int));
+ int (*open) PARAMS ((host_callback *, const char*, int mode));
+ int (*read) PARAMS ((host_callback *,int, char *, int));
+ int (*read_stdin) PARAMS (( host_callback *, char *, int));
+ int (*rename) PARAMS ((host_callback *, const char *, const char *));
+ int (*system) PARAMS ((host_callback *, const char *));
+ long (*time) PARAMS ((host_callback *, long *));
+ int (*unlink) PARAMS ((host_callback *, const char *));
+ int (*write) PARAMS ((host_callback *,int, const char *, int));
+ int (*write_stdout) PARAMS ((host_callback *, const char *, int));
+ void (*flush_stdout) PARAMS ((host_callback *));
+ int (*write_stderr) PARAMS ((host_callback *, const char *, int));
+ void (*flush_stderr) PARAMS ((host_callback *));
+ int (*stat) PARAMS ((host_callback *, const char *, struct stat *));
+ int (*fstat) PARAMS ((host_callback *, int, struct stat *));
+
+ /* When present, call to the client to give it the oportunity to
+ poll any io devices for a request to quit (indicated by a nonzero
+ return value). */
+ int (*poll_quit) PARAMS ((host_callback *));
+
+ /* Used when the target has gone away, so we can close open
+ handles and free memory etc etc. */
+ int (*shutdown) PARAMS ((host_callback *));
+ int (*init) PARAMS ((host_callback *));
+
+ /* depreciated, use vprintf_filtered - Talk to the user on a console. */
+ void (*printf_filtered) PARAMS ((host_callback *, const char *, ...));
+
+ /* Talk to the user on a console. */
+ void (*vprintf_filtered) PARAMS ((host_callback *, const char *, va_list));
+
+ /* Same as vprintf_filtered but to stderr. */
+ void (*evprintf_filtered) PARAMS ((host_callback *, const char *, va_list));
+
+ /* Print an error message and "exit".
+ In the case of gdb "exiting" means doing a longjmp back to the main
+ command loop. */
+ void (*error) PARAMS ((host_callback *, const char *, ...));
+
+ int last_errno; /* host format */
+
+ int fdmap[MAX_CALLBACK_FDS];
+ char fdopen[MAX_CALLBACK_FDS];
+ char alwaysopen[MAX_CALLBACK_FDS];
+
+ /* System call numbers. */
+ CB_TARGET_DEFS_MAP *syscall_map;
+ /* Errno values. */
+ CB_TARGET_DEFS_MAP *errno_map;
+ /* Flags to the open system call. */
+ CB_TARGET_DEFS_MAP *open_map;
+ /* Signal numbers. */
+ CB_TARGET_DEFS_MAP *signal_map;
+ /* Layout of `stat' struct.
+ The format is a series of "name,length" pairs separated by colons.
+ Empty space is indicated with a `name' of "space".
+ All padding must be explicitly mentioned.
+ Lengths are in bytes. If this needs to be extended to bits,
+ use "name.bits".
+ Example: "st_dev,4:st_ino,4:st_mode,4:..." */
+ const char *stat_map;
+
+ /* Marker for those wanting to do sanity checks.
+ This should remain the last member of this struct to help catch
+ miscompilation errors. */
+#define HOST_CALLBACK_MAGIC 4705 /* teds constant */
+ int magic;
+};
+
+extern host_callback default_callback;
+
+/* Canonical versions of system call numbers.
+ It's not intended to willy-nilly throw every system call ever heard
+ of in here. Only include those that have an important use.
+ ??? One can certainly start a discussion over the ones that are currently
+ here, but that will always be true. */
+
+/* These are used by the ANSI C support of libc. */
+#define CB_SYS_exit 1
+#define CB_SYS_open 2
+#define CB_SYS_close 3
+#define CB_SYS_read 4
+#define CB_SYS_write 5
+#define CB_SYS_lseek 6
+#define CB_SYS_unlink 7
+#define CB_SYS_getpid 8
+#define CB_SYS_kill 9
+#define CB_SYS_fstat 10
+/*#define CB_SYS_sbrk 11 - not currently a system call, but reserved. */
+
+/* ARGV support. */
+#define CB_SYS_argvlen 12
+#define CB_SYS_argv 13
+
+/* These are extras added for one reason or another. */
+#define CB_SYS_chdir 14
+#define CB_SYS_stat 15
+#define CB_SYS_chmod 16
+#define CB_SYS_utime 17
+#define CB_SYS_time 18
+
+/* Struct use to pass and return information necessary to perform a
+ system call. */
+/* FIXME: Need to consider target word size. */
+
+typedef struct cb_syscall {
+ /* The target's value of what system call to perform. */
+ int func;
+ /* The arguments to the syscall. */
+ long arg1, arg2, arg3, arg4;
+
+ /* The result. */
+ long result;
+ /* Some system calls have two results. */
+ long result2;
+ /* The target's errno value, or 0 if success.
+ This is converted to the target's value with host_to_target_errno. */
+ int errcode;
+
+ /* Working space to be used by memory read/write callbacks. */
+ PTR p1;
+ PTR p2;
+ long x1,x2;
+
+ /* Callbacks for reading/writing memory (e.g. for read/write syscalls).
+ ??? long or unsigned long might be better to use for the `count'
+ argument here. We mimic sim_{read,write} for now. Be careful to
+ test any changes with -Wall -Werror, mixed signed comparisons
+ will get you. */
+ int (*read_mem) PARAMS ((host_callback * /*cb*/, struct cb_syscall * /*sc*/,
+ unsigned long /*taddr*/, char * /*buf*/,
+ int /*bytes*/));
+ int (*write_mem) PARAMS ((host_callback * /*cb*/, struct cb_syscall * /*sc*/,
+ unsigned long /*taddr*/, const char * /*buf*/,
+ int /*bytes*/));
+
+ /* For sanity checking, should be last entry. */
+ int magic;
+} CB_SYSCALL;
+
+/* Magic number sanity checker. */
+#define CB_SYSCALL_MAGIC 0x12344321
+
+/* Macro to initialize CB_SYSCALL. Called first, before filling in
+ any fields. */
+#define CB_SYSCALL_INIT(sc) \
+do { \
+ memset ((sc), 0, sizeof (*(sc))); \
+ (sc)->magic = CB_SYSCALL_MAGIC; \
+} while (0)
+
+/* Return codes for various interface routines. */
+
+typedef enum {
+ CB_RC_OK = 0,
+ /* generic error */
+ CB_RC_ERR,
+ /* either file not found or no read access */
+ CB_RC_ACCESS,
+ CB_RC_NO_MEM
+} CB_RC;
+
+/* Read in target values for system call numbers, errno values, signals. */
+CB_RC cb_read_target_syscall_maps PARAMS ((host_callback *, const char *));
+
+/* Translate target to host syscall function numbers. */
+int cb_target_to_host_syscall PARAMS ((host_callback *, int));
+
+/* Translate host to target errno value. */
+int cb_host_to_target_errno PARAMS ((host_callback *, int));
+
+/* Translate target to host open flags. */
+int cb_target_to_host_open PARAMS ((host_callback *, int));
+
+/* Translate target signal number to host. */
+int cb_target_to_host_signal PARAMS ((host_callback *, int));
+
+/* Translate host signal number to target. */
+int cb_host_to_target_signal PARAMS ((host_callback *, int));
+
+/* Translate host stat struct to target.
+ If stat struct ptr is NULL, just compute target stat struct size.
+ Result is size of target stat struct or 0 if error. */
+int cb_host_to_target_stat PARAMS ((host_callback *, const struct stat *, PTR));
+
+/* Perform a system call. */
+CB_RC cb_syscall PARAMS ((host_callback *, CB_SYSCALL *));
+
+#endif
diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog
new file mode 100644
index 0000000..8ad6e0c
--- /dev/null
+++ b/include/coff/ChangeLog
@@ -0,0 +1,793 @@
+1999-04-21 Nick Clifton <nickc@cygnus.com>
+
+ * mcore.h (GET_LINENO_LNNO): New macro.
+ (PUT_LINENO_LNNO): New macro.
+
+1999-04-08 Nick Clifton <nickc@cygnus.com>
+
+ * mcore.h: New header file. Defines for Motorolla's MCore
+ processor.
+
+Sun Dec 6 21:36:37 1998 Mark Elbrecht <snowball3@usa.net>
+
+ * internal.h (C_WEAKEXT): Define.
+
+Wed Jan 27 13:35:35 1999 Stan Cox <scox@cygnus.com>
+
+ * coff/arm.h (F_PIC_INT, F_ARM_2, F_ARM_3, F_ARM_4, F_APCS26):
+ Changed values to avoid clashing with IMAGE_FILE_* coff header
+ flag values.
+
+Wed Apr 1 16:06:15 1998 Nick Clifton <nickc@cygnus.com>
+
+ * internal.h: Document numbers associated with Thumb symbol
+ types.
+
+Fri Mar 27 17:16:57 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (ISPTR, ISFCN, ISARY): Add casts to unsigned long.
+
+Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
+
+ * tic30.h: New file.
+
+Fri Dec 12 11:49:07 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (R_MPPCR15W): New relocation type, for 15 bit PC relative
+ offsets.
+
+Tue Dec 2 10:21:40 1997 Nick Clifton <nickc@cygnus.com>
+
+ * arm.h (COFFARM): New define.
+
+Sat Nov 22 15:10:14 1997 Nick Clifton <nickc@cygnus.com>
+
+ * internal.h (C_THUMBEXTFUNC, C_THUMBSTATFUNC): Constants to
+ define static and external functions.
+
+ * arm.h: Add bits to support PIC and APCS-FLOAT type binaries,
+ when implemented.
+
+Fri Oct 3 14:25:17 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (R_PPL16B): Make constant uppercase for consistency.
+
+Tue Jul 22 18:18:58 1997 Robert Hoehne <robert.hoehne@Mathematik.TU-Chemnitz.DE>
+
+ * go32exe.h: New file.
+
+Tue Jul 8 12:23:55 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_TARGET_ID): Add define.
+ * internal.h (struct internal_filehdr): Add f_target_id field.
+
+Tue Jun 3 16:44:18 1997 Nick Clifton <nickc@cygnus.com>
+
+ * internal.h: Add storage classes for Thumb symbols
+
+Mon May 26 14:07:55 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * tic80.h (R_PPL16B): Correct value.
+
+Sat May 3 08:24:59 1997 Fred Fish <fnf@cygnus.com>
+
+ * internal.h (C_UEXT, C_STATLAB, C_EXTLAB, C_SYSTEM):
+ New storage classes for TIc80.
+
+Fri Apr 18 11:52:55 1997 Niklas Hallqvist <niklas@appli.se>
+
+ * alpha.h (ALPHA_ECOFF_BADMAG): Recognize *BSD/alpha magic too.
+ (ALPHA_R_LITERALSLEAZY): Define.
+ * ecoff.h (ALPHA_MAGIC_BSD): Define.
+
+Wed Jan 29 11:31:51 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i960.h (R_IPR13, R_ALIGN): Define.
+
+Mon Jan 27 13:34:30 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (R_IPRMED, R_OPTCALL, R_OPTCALLX): Move definitions
+ from here...
+ * i960.h (R_IPRMED, R_OPTCALL, R_OPTCALLX): ...to here.
+
+Wed Jan 22 20:10:47 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80MAGIC): Renamed to TIC80_AOUTHDR_MAGIC.
+
+Fri Dec 27 22:05:45 1996 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h: New file for TIc80 support.
+
+Thu Dec 19 16:18:11 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * arm.h (_LIT): Define.
+
+Fri Jun 28 12:54:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * pe.h (FILHSZ): Define.
+
+Wed Jun 26 16:24:26 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * All files: Define FILHSZ, AOUTSZ, AOUTHDRSZ, SCNHSZ, SYMESZ,
+ AUXESZ, LINESZ, RELSZ as numeric constants rather than uses of
+ sizeof. Define AOUTHDRSZ in all files.
+ * pe.h (AOUTSZ): Define by adding to AOUTHDRSZ.
+
+Fri Jun 21 11:17:46 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha.h: Add declarations for relocation types added for Alpha
+ OSF/1 3.0.
+
+Tue Jun 18 16:04:29 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * h8300.h (H8300SMAGIC): Define.
+ (H8300SBADMAG): Define.
+
+Mon Jun 10 11:53:28 1996 Jeffrey A Law (law@cygnus.com)
+
+ * internal.h (R_BCC_INV, R_JMP_DEL): New relocations for
+ relaxing in the H8/300 series.
+
+Thu May 16 15:49:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * sh.h (R_SH_CODE, R_SH_DATA, R_SH_LABEL): Define.
+
+Tue May 7 00:36:39 1996 Jeffrey A Law (law@cygnus.com)
+
+ * internal.h (R_JMPL2): Renamed from R_JMPL_B8 to be
+ consistent with other similar relocs.
+
+ * internal.h (H8/300 specific relocs): Add comments better
+ explaining what each reloc is used for.
+ (R_MOV16B1, R_MOV16B2): Renamed from R_MOVB1 and R_MOVB2.
+ (R_MOV24B1, R_MOV24B2): Renamed from R_MOVLB1 and R_MOVLB2.
+ (R_MOVL1, R_MOVL2): New relocs.
+
+Fri May 3 13:01:12 1996 Jeffrey A Law (law@cygnus.com)
+
+ * internal.h (R_PCRWORD_B): Define for the h8300 relaxing
+ linker.
+
+Wed May 1 19:21:03 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (SCNNMLEN): Define.
+ (struct internal_scnhdr): Use SCNNMLEN for s_name field.
+
+Fri Mar 29 13:41:25 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * pe.h: Define IMAGE_COMDAT codes.
+
+Wed Mar 27 17:29:42 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * arm.h (union external_auxent): Add x_checksum, x_associated, and
+ x_comdat fields to x_scn struct.
+ * i386.h (union external_auxent): Likewise.
+ * powerpc.h (union external_auxent): Likewise.
+ * internal.h (union internal_auxent): Likewise.
+
+Thu Mar 21 16:25:57 1996 David Mosberger-Tang <davidm@azstarnet.com>
+
+ * ecoff.h (struct ecoff_find_line): Add caching fields.
+
+Thu Mar 14 15:22:44 1996 Jeffrey A Law (law@cygnus.com)
+
+ * internal.h (R_MEM_INDIRECT): New reloc for the h8300.
+
+Fri Feb 9 10:44:11 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * aux-coff.h: Rename from aux.h, to avoid problems on hapless DOS
+ systems which think that aux is a com port.
+
+Mon Feb 5 18:35:00 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i960.h (F_I960HX): Define.
+
+Wed Jan 31 13:11:54 1996 Richard Henderson <rth@tamu.edu>
+
+ * aux.h: New file.
+ * internal.h, m68k.h: Protect against multiple inclusion.
+
+Wed Nov 22 13:48:39 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.h (_RCONST, STYP_RCONST, RELOC_SECTION_RCONST): Define.
+ (NUM_RELOC_SECTIONS): Update.
+ * symconst.h (scRConst): Define.
+
+Tue Nov 14 18:54:29 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (C_NT_WEAK): Define.
+
+Thu Nov 9 14:08:30 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * rs6000.h (STYP_OVRFLO): Define.
+
+Tue Nov 7 14:38:45 1995 Kim Knuttila <krk@cygnus.com>
+
+ * coff/powerpc.h (IMAGE_NT_OPTIONAL_HDR_MAGIC): Added define.
+ * coff/pe.h: Added defines for file level flags
+
+Mon Nov 6 17:28:01 1995 Harry Dolan <dolan@ssd.intel.com>
+
+ * i860.h: New file, based on i386.h.
+
+Wed Nov 1 15:25:18 1995 Manfred Hollstein KS/EF4A 60/1F/110 #40283 <manfred@lts.sel.alcatel.de>
+
+ * m68k.h (PAGEMAGICEXECSWAPPED): Define.
+ (PAGEMAGICPEXECSWAPPED): Define.
+ (PAGEMAGICPEXECTSHLIB): Define.
+ (PAGEMAGICPEXECPAGED): Define.
+ (_COMMENT): DEFINE.
+ * m88k.h (_COMMENT): Define.
+
+Wed Oct 18 18:36:19 1995 Geoffrey Noer <noer@cygnus.com>
+
+ * sym.h: #if 0'd out runtime_pdr struct because it chokes
+ Visual C++ and there aren't any references to it elsewhere in gdb.
+
+Mon Oct 16 11:12:24 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * rs6000.h (SMALL_AOUTSZ): Define.
+
+ * internal.h (XMC_TD): Define.
+
+Tue Oct 10 18:41:03 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (struct internal_aouthdr): Add o_cputype field.
+ * rs6000.h (AOUTHDR): Rename o_resv1 to o_cputype.
+
+Mon Oct 9 14:45:46 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * rs6000.h (AOUTHDR): Add o_maxdata field. Add comments.
+ (_PAD, _LOADER): Define.
+ (STYP_LOADER): Define.
+ * internal.h (struct internal_aouthdr): Add o_maxdata field.
+
+Thu Oct 5 10:02:57 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.h: Define section name macros and STYP macros for various
+ Alpha sections: .got, .hash, .dynsym, .dynstr, .rel.dyn, .conflic,
+ .comment, .liblist, .dynamic.
+
+Wed Oct 4 10:56:35 1995 Kim Knuttila <krk@cygnus.com>
+
+ * pe.h: Moved DOSMAGIC and NT_SIGNATURE defines here
+ * powerpc.h: removed DOSMAGIC, NT_SIGNATURE, and DEFAULT_* defines
+ Also removed other unused defines (various MAGIC ones)
+ * i386.h: removed DOSMAGIC, NT_SIGNATURE, and DEFAULT_* defines
+ * arm.h: removed DOSMAGIC, NT_SIGNATURE, and DEFAULT_* defines
+ * apollo.h: removed unused DEFAULT_* defines
+ * alpha.h: removed unused DEFAULT_* defines
+ * h8500.h: removed unused DEFAULT_* defines
+ * h8300.h: removed unused DEFAULT_* defines
+ * i960.h: removed unused DEFAULT_* defines
+ * m88k.h: removed unused DEFAULT_* defines
+ * we32k.h: removed unused DEFAULT_* defines
+ * rs6000.h: removed unused DEFAULT_* defines
+ * mips.h: removed unused DEFAULT_* defines
+ * m68k.h: removed unused DEFAULT_* defines
+ * z8k.h: removed unused DEFAULT_* defines
+ * w65.h: removed unused DEFAULT_* defines
+ * sparc.h: removed unused DEFAULT_* defines
+ * sh.h: removed unused DEFAULT_* defines
+
+Fri Sep 29 08:40:08 1995 Kim Knuttila <krk@cygnus.com>
+
+ * powerpc.h: Reformatted to GNU coding conventions.
+
+Wed Sep 27 06:50:50 1995 Kim Knuttila <krk@nellie>
+
+ * pe.h: added defines for more section characteristics
+ * powerpc.h (new file): base coff definitions for ppc PE
+
+Tue Sep 12 12:08:20 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (struct internal_syment): Change n_numaux field from
+ char to unsigned char.
+
+Fri Sep 1 15:39:36 1995 Kazumoto Kojima <kkojima@info.kanagawa-u.ac.jp>
+
+ * mips.h (struct rpdr_ext): Define.
+
+Thu Aug 31 16:51:50 1995 steve chamberlain <sac@slash.cygnus.com>
+
+ * internal.h (internal_aouthdr, internal_filehdr):
+ don't indirect the pe stuff.
+
+Tue Aug 29 14:16:07 1995 steve chamberlain <sac@slash.cygnus.com>
+
+ * i386.h (NT_DEF_RESERVE, NT_DEF_COMMIT): Make the same
+ as 'the other' compiler.
+ * internal.h (NT_IMAGE_BASE): Deleted.
+ (NT_EXE_IMAGE_BASE, NT_DLL_IMAGE_BASE): New.
+ (PE_DEF_SECTION_ALIGNMENT, PE_DEF_FILE_ALIGNMENT): New.
+ (R_IMAGEBASE): New.
+
+Mon Aug 21 18:12:19 1995 steve chamberlain <sac@slash.cygnus.com>
+
+ * internal.h: (internal_filehdr): Moved PE stuff into
+ internal_extra_pe_filehdr.
+ (internal_aouthdr): Moved PE stuff into
+ interanl_extra_pe_aouthdr.
+
+Mon Jul 24 14:05:39 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h: Move R_SH_* relocs from here...
+ * sh.h: ...to here.
+ (R_SH_SWITCH16, R_SH_SWITCH32): Define.
+ (R_SH_USES, R_SH_COUNT, R_SH_ALIGN): Define.
+
+Thu Jun 29 00:04:25 1995 Steve Chamberlain <sac@slash.cygnus.com>
+
+ * internal.h (NT_DEF_RESERVE, NT_DEF_COMMIT): Increase a lot.
+
+Tue May 16 15:08:20 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * internal.h (NT_subsystem, NT_stack_heap): Delete
+
+Tue May 16 15:08:20 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * internal.h (NT_subsystem, NT_stack_heap): Now extern.
+
+Tue Feb 14 17:59:37 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.h (struct ecoff_fdrtab_entry): Define.
+ (struct ecoff_find_line): Define.
+
+Sat Feb 4 14:38:03 1995 David Mosberger-Tang <davidm@piston.cs.arizona.edu>
+
+ * sym.h (struct pdr): field "prof" added.
+
+ * alpha.h (PDR_BITS1_PROF_*): added, macros for PDR_BITS*_RESERVED_*
+ updated accordingly.
+
+Sun Jan 15 18:38:33 1995 Steve Chamberlain <sac@splat>
+
+ * w65.h: New file.
+
+Wed Nov 23 22:43:38 1994 Steve Chamberlain (sac@jonny.cygnus.com)
+
+ * sh.h (SH_ARCH_MAGIC_BIG, SH_ARCH_MAGIC_LITTLE): New.
+ (SHBADMAG): Changed to suit.
+
+Tue Jul 26 17:46:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i960.h (F_I960JX): New macro.
+
+Wed Jul 6 00:48:57 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
+
+ * alpha.h: Add definitions for alpha file header flags, encoding
+ the object type of the file.
+
+Mon Jun 20 13:47:01 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
+
+ * ecoff.h (ecoff_swap_tir_in): Remove declaration.
+ (ecoff_swap_tir_out): Likewise.
+ (ecoff_swap_rndx_in, ecoff_swap_rndx_out): Likewise.
+ (struct ecoff_debug_swap): Add new fields: swap_tir_in,
+ swap_rndx_in, swap_tir_out, swap_rndx_out, read_debug_info.
+
+Sun Jun 12 03:51:52 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
+
+ * symconst.h: Pick up SGI define for stIndirect.
+
+Fri Apr 22 13:05:28 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (REGINFO): Don't define.
+ (struct ecoff_reginfo): Don't define.
+
+ * sh.h (SH_ARCH_MAGIC): Rename from SHMAGIC. SHMAGIC is used by
+ several targets to mean a shared library.
+ (SHBADMAG): Corresponding change.
+
+Thu Apr 14 13:00:53 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (RELOC_BITS3_TYPE_BIG): Changed from 0x1e to 0x3e.
+ (RELOC_BITS3_TYPEHI_LITTLE): Define.
+ (RELOC_BITS3_TYPEHI_SH_LITTLE): Define.
+ (MIPS_R_PCREL16): Change value from 8 to 12 to match Irix 4.
+ (MIPS_R_RELHI): Define.
+ (MIPS_R_RELLO): Define.
+ (MIPS_R_SWITCH): Change value from 9 to 22.
+
+Thu Apr 7 14:19:35 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (MIPS_R_SWITCH): Define.
+
+Thu Mar 31 19:28:33 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * internal.h (internal_aouthdr): Added comments for Apollo fields.
+
+Thu Mar 31 16:28:02 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (STYP_ECOFF_LIB): Define as used on Irix 4.
+
+Fri Mar 25 17:16:55 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (struct ecoff_debug_info): Add adjust field.
+ (struct ecoff_value_adjust): Define.
+
+Tue Mar 22 13:22:47 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (MIPS_R_PCREL16): Define.
+
+Sat Feb 26 10:26:38 1994 Ian Lance Taylor (ian@cygnus.com)
+
+ * ecoff.h: Add casts to avoid warnings from SVR4 cc.
+
+Mon Feb 21 09:48:46 1994 Ian Lance Taylor (ian@lisa.cygnus.com)
+
+ * sym.h (struct runtime_pdr): Make field adr bfd_vma, not unsigned
+ long.
+ (SYMR): Make field value bfd_vma, not long.
+
+Fri Feb 4 23:35:53 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * rs6000.h (STYP_DEBUG): Define.
+
+Wed Feb 2 14:31:37 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * internal.h (union internal_auxent): Change x_csect.x_scnlen into
+ a union of a long and a pointer to a symbol. XCOFF sometimes uses
+ this field as a symbol index.
+
+Mon Jan 10 23:54:25 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (ecoff_debug_info): Remove fields line_end,
+ external_dnr_end, external_pdr_end, external_sym_end,
+ external_opt_end, external_aux_end, ss_end, external_fdr_end.
+ Replace ifdbase with ifdmap.
+
+Wed Jan 5 17:05:36 1994 Ken Raeburn (raeburn@deneb.cygnus.com)
+
+ * ecoff.h (STYP_EXTENDESC, STYP_COMMENT, STYP_XDATA, STYP_PDATA):
+ Define.
+
+Wed Jan 5 16:58:24 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (NUM_RELOC_SECTIONS): Define.
+
+Tue Dec 21 09:24:56 1993 Ken Raeburn (raeburn@rtl.cygnus.com)
+
+ * sparc.h (struct external_reloc): Rename field r_addend to
+ r_offset.
+
+Sat Dec 11 16:12:32 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * internal.h (R_DISP7, R_SH_IMM16): New reloc types.
+
+Tue Nov 23 14:23:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (struct ecoff_debug_swap): Added *_end fields for all
+ the symbolic information pointers.
+
+ * sym.h: Named the EXTR structure ecoff_extr.
+
+Fri Nov 19 08:21:18 1993 Ken Raeburn (raeburn@rover.cygnus.com)
+
+ * sparc.h (RELSZ): Use correct size.
+
+Wed Nov 17 17:18:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (struct ecoff_debug_info): Define.
+
+Tue Nov 2 17:56:57 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (struct ecoff_debug_swap): Define.
+
+Thu Oct 28 17:07:50 1993 Stan Shebs (shebs@rtl.cygnus.com)
+
+ * i386.h (I386LYNXMAGIC): Rename to LYNXCOFFMAGIC.
+ * m68k.h (LYNXCOFFMAGIC): Define.
+ * sparc.h: New file.
+
+Tue Oct 19 15:34:50 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * alpha.h (external_aouthdr): Split four byte padding field into
+ two byte bldrev field and two byte padding field.
+
+ * ecoff.h (_LITA, _PDATA, _XDATA, STYP_LITA): Defined.
+
+Wed Oct 13 15:52:34 1993 Ken Raeburn (raeburn@cygnus.com)
+
+ Sun Oct 10 17:27:10 1993 Troy Rollo (troy@cbme.unsw.edu.au)
+
+ * coff/internal.h: Added o_sri, o_inlib and o_vid for Apollos
+ as well as R_DIR16.
+
+ * coff/apollo.h: New file
+
+Mon Oct 11 17:16:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (REGINFO, struct ecoff_reginfo): Define.
+
+Tue Oct 5 10:52:53 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * rs6000.h: Change non-ASCII characters in comment to octal
+ escapes.
+
+Tue Sep 28 03:27:04 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
+
+ * ecoff.h (_FINI, STYP_ECOFF_FINI): Add to support .fini section.
+
+Fri Sep 24 11:53:53 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (BADMAG): Recognize MIPS_MAGIC_LITTLE3 and MIPS_MAGIC_BIG3.
+ * ecoff.h: Define MIPS_MAGIC_LITTLE3 and MIPS_MAGIC_BIG3.
+
+Thu Sep 23 21:07:14 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * mips.h (BADMAG): Recognize MIPS_MAGIC_LITTLE2 and MIPS_MAGIC_BIG2.
+ * ecoff.h: Define MIPS_MAGIC_LITTLE2 and MIPS_MAGIC_BIG2.
+
+Thu Sep 16 20:27:21 1993 Jim Kingdon (kingdon@cirdan.cygnus.com)
+
+ * sym.h, symconst.h: Add comment stating these files are not part
+ of GDB, GAS, etc. In 1991, when we asked rms whether we could
+ include these files in GDB (although they are copyrighted by
+ someone besides the FSF), he said it was OK if they were not
+ considered part of GDB.
+
+Fri Sep 10 17:40:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (AUX_PUT_ANY): Cast val argument to bfd_vma.
+
+ * alpha.c (external_aouthdr): Need four bytes of padding between
+ vstamp and tsize.
+
+Tue Sep 7 14:20:43 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff.h (AUX_GET_ANY, AUX_PUT_ANY): Changed to reflect further
+ change in bfd swapping routine names.
+
+Tue Sep 7 10:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * ecoff.h (AUX_GET_ANY): Change name of _do_getb32 to reflect bfd
+ changes.
+
+Fri Aug 13 14:30:32 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * ecoff.h (RELOC_SECTION_NONE): Define.
+
+Thu Aug 12 11:24:42 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * alpha.h (struct external_reloc): Add r_symndx field.
+ (RELSZ): Correct.
+ (RELOC_BITS*): Correct.
+ (ALPHA_R_*): Define.
+ * ecoff.h (RELOC_SECTION_{XDATA,PDATA,FINI,LITA,ABS}): Define.
+ (r_extern): Undefine.
+ * internal.h (struct internal_reloc): Make r_vaddr bfd_vma rather
+ than long. Add r_extern field.
+
+ * alpha.h (PDR_BITS*): Define.
+ * sym.h (PDR): Give correct names to new fields.
+
+ * ecoff.h: Moved MIPS reloc definitions from here...
+ * mips.h: to here.
+
+Tue Aug 3 11:17:53 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * alpha.h: Corrected external symbolic debugging structures to
+ match actual usage.
+ * internal.h (internal_filehdr, internal_aouthdr,
+ internal_scnhdr): Changed type of some fields to bfd_vma so they
+ can hold 64 bits.
+ * sym.h (HDRR, FDR, PDR, EXTR): Likewise.
+ (PDR): Added new fields found on Alpha.
+ * symconst.h (magicSym2): Define; new value found on Alpha.
+
+ * ecoff.h: New file.
+ * alpha.h, mips.h: Moved common information into ecoff.h. Moved
+ external structure definitions in from ecoff-ext.h.
+ * ecoff-ext.h: Removed; information now in alpha.h and mips.h.
+
+Sun Jul 18 21:43:59 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
+
+ * i386.h: Recognize I386PTXMAGIC.
+
+Fri Jul 16 09:54:35 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h (MIPS_AOUT_{OZ}MAGIC): Renamed from {OZ}MAGIC.
+
+Thu Jul 15 12:23:55 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * m88k.h (union external_auxent): Move x_fcn back inside x_fcnary.
+ ({GET,PUT}_FCN_{LNNOPTR,ENDNDX}): Adjust accordingly.
+
+Sun Jul 11 18:00:18 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * m68k.h: Define MC68KBCSMAGIC.
+
+Thu Jun 10 11:46:28 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h (_INIT, STYP_MIPS_INIT): Define (used on Irix4).
+ (STYP_OTHER_LOAD): Define as STYP_MIPS_INIT.
+
+Wed Jun 9 15:09:09 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h (OMAGIC): Define.
+
+Mon Apr 26 18:04:47 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * internal.h, sh.h: Support for SH.
+
+Sat Apr 24 21:34:59 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * a29k.h: Define _LIT.
+
+Fri Apr 23 18:41:23 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * alpha.h: New file.
+
+Thu Apr 8 12:36:34 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * internal.h (C_SHADOW, C_VERSION): Copied in from m88k.h.
+ * m88k.h, i386.h, we32k.h: Don't define all the storage classes;
+ they're already in internal.h.
+
+Wed Apr 7 11:51:24 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * internal.h: Change n_sclass to unsigned char.
+ Change C_EFCN to 0xff, change RS/6000 dbx symbols
+ to no longer be signed.
+
+Fri Mar 19 14:52:56 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * internal.h: Add H8/500 reloc types.
+
+Wed Mar 17 09:46:03 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * ecoff-ext.h (AUX_PUT_ANY): Don't use void values in branches of
+ conditional expression.
+
+Thu Mar 4 14:12:06 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * ecoff-ext.h (AUX_GET_*): Rewrote to use new macro AUX_GET_ANY.
+ (AUX_PUT_*): New macros corresponding to the AUX_GET macros.
+ (ecoff_swap_tir_out): Added prototype.
+
+ * mips.h (N_BTMASK, N_TMASK, N_BTSHFT, N_TSHIFT): Define; these
+ are needed to interpret gcc debugging output.
+
+Tue Feb 9 07:43:27 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * we32k.h (BTYPE, ISPTR, ISFCN, ISARY, DECREF): Removed
+ more definitions duplicated in internal.h.
+
+Wed Feb 3 09:18:24 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h (RELOC_BITS3_TYPE_*): Correct for big endian machines.
+
+Mon Jan 25 11:35:51 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * internal.h (internal_aouthdr): Added additional fields used only
+ by MIPS ECOFF.
+
+Thu Jan 21 10:28:38 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h (AOUTHDR): Added additional fields used by ECOFF.
+
+Tue Jan 19 12:21:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * i386.h, we32k.h (N_*, T_*, DT_*): Removed still more definitions
+ duplicated in internal.h.
+
+ * mips.h (RELOC_SECTION_*, ECOFF_R_*): Defined constants for ECOFF
+ relocs.
+
+Fri Jan 15 18:17:00 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff-ext.h: Added prototypes for new ECOFF swapping functions.
+ (opt_ext): New structure.
+ * mips.h (ZMAGIC): Defined to be 0413.
+ (_LIB): Defined to be ".lib"
+ (external_reloc): MIPS ECOFF relocs are only 8 bytes. Added
+ macros to aid in swapping.
+
+Fri Jan 8 16:19:26 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ecoff-ext.h: Added prototypes for ECOFF swapping functions.
+ * internal.h (internal_scnhdr): Always provide s_align field, not
+ just on i960.
+ (internal_reloc): Always provide r_size field, not just on
+ RS/6000.
+ * mips.h (_RDATA, _SDATA, _SBSS, _LIT4, _LIT8, STYP_RDATA,
+ STYP_SDATA, STYP_SBSS, STYP_LIT4, STYP_LIT8): Defined.
+ (CODE_MASK, MIPS_IS_STAB, MIPS_MARK_STAB, MIPS_UNMARK_STAB,
+ STABS_SYMBOL): Moved in from gdb/mipsread.c.
+
+Wed Jan 6 14:01:46 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * i386.h, we32k.h: removed STYP_* defines, since they duplicated
+ those in internal.h.
+
+Tue Dec 29 15:40:07 1992 Ian Lance Taylor (ian@cygnus.com)
+
+ * i386.h: define I386AIXMAGIC for Danbury AIX PS/2 compiler.
+
+Sat Dec 12 16:07:57 1992 Ian Lance Taylor (ian@cygnus.com)
+
+ * i386.h: don't define BTYPE, ISPTR, ISFCN, ISARY, DECREF: they
+ are defined in internal.h.
+
+Thu Nov 12 09:52:01 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * internal.h: (internal_reloc): r_offset is now a long.
+ * z8k.h: slight comment enhancement
+
+Wed Sep 30 07:46:08 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * internal.h: changed z8k reloc types
+
+Fri Aug 28 10:16:31 1992 Brendan Kehoe (brendan@cygnus.com)
+
+ * we32k.h: new file
+
+Thu Aug 27 13:00:01 1992 Brendan Kehoe (brendan@cygnus.com)
+
+ * symconst.h: comment out cruft at the end of #endif
+
+Tue Aug 25 15:06:49 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * internal.h: added #define for STYP_LIT, removed from a29k and
+ h8300.
+
+ * z8k.h: added z8000 support
+
+Thu Jul 16 16:32:00 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * internal.h: added R_RELLONG_NEG reloc type
+
+Fri Jun 12 20:11:04 1992 John Gilmore (gnu at cygnus.com)
+
+ * symconst.h: Fix unterminated comment.
+
+Wed Jun 10 07:57:49 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * i386.h: a.out magic numbers from
+ mohring@informatik.tu-muenchen.de
+
+Mon Jun 8 20:13:33 1992 John Gilmore (gnu at cygnus.com)
+
+ * ecoff-ext.h, mips.h: Use unsigned chars everywhere.
+ (Suggested by Antti Miettinen.)
+
+Tue Apr 14 15:18:44 1992 John Gilmore (gnu at cygnus.com)
+
+ * sym.h: Add comments.
+ * symconst.h: Merge with Fred's changes.
+
+Tue Apr 14 14:30:05 1992 Fred Fish (fnf@cygnus.com)
+
+ * symconst.h: Pick up SGI defines for stStruct, stUnion, stEnum,
+ langCplusplus, and langCplusplusV2.
+
+Thu Apr 2 19:47:43 1992 John Gilmore (gnu at cygnus.com)
+
+ * sym.h, symconst.h: MIPS has provided redistributable versions
+ of these files. Thanks!
+ * ecoff-ext.h: Add weakext bit to match new sym.h.
+
+Fri Mar 6 00:10:46 1992 John Gilmore (gnu at cygnus.com)
+
+ * ecoff-ext.h: Add relative file descriptors.
+
+Thu Feb 27 11:53:04 1992 John Gilmore (gnu at cygnus.com)
+
+ * ecoff-ext.h: New file for external (in-file) form of ecoff
+ symbol structures.
+
+Thu Feb 6 11:33:32 1992 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * h8300.h: made the external_lineno l_lnno field 4 bytes wide.
+ andded GET/PUT_LINENO_LNNO macros
+
+Sat Nov 30 20:38:35 1991 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * ChangeLog, a29k.h, h8300.h, i386.h, i960.h, internal.h, m68k.h,
+ m88k.h, mips.h, rs6000.h: move from above coff-<foo>.h
+
+
+Local Variables:
+version-control: never
+End:
diff --git a/include/coff/a29k.h b/include/coff/a29k.h
new file mode 100644
index 0000000..8c3a646
--- /dev/null
+++ b/include/coff/a29k.h
@@ -0,0 +1,305 @@
+/* COFF spec for AMD 290*0
+ Contributed by David Wood @ New York University.
+ */
+
+#ifndef AMD
+# define AMD
+#endif
+
+/****************************************************************/
+
+/*
+** File Header and related definitions
+*/
+
+struct external_filehdr
+{
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -*/
+
+/*
+** Magic numbers for Am29000
+** (AT&T will assign the "real" magic number)
+*/
+
+#define SIPFBOMAGIC 0572 /* Am29000 (Byte 0 is MSB) */
+#define SIPRBOMAGIC 0573 /* Am29000 (Byte 0 is LSB) */
+
+
+#define A29K_MAGIC_BIG SIPFBOMAGIC
+#define A29K_MAGIC_LITTLE SIPRBOMAGIC
+#define A29KBADMAG(x) (((x).f_magic!=A29K_MAGIC_BIG) && \
+ ((x).f_magic!=A29K_MAGIC_LITTLE))
+
+#define OMAGIC A29K_MAGIC_BIG
+/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -*/
+
+/*
+** File header flags currently known to us.
+**
+** Am29000 will use the F_AR32WR and F_AR32W flags to indicate
+** the byte ordering in the file.
+*/
+
+/*--------------------------------------------------------------*/
+
+/*
+** Optional (a.out) header
+*/
+
+typedef struct external_aouthdr
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+} AOUTHDR;
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+/* aouthdr magic numbers */
+#define NMAGIC 0410 /* separate i/d executable */
+#define SHMAGIC 0406 /* NYU/Ultra3 shared data executable
+ (writable text) */
+
+#define _ETEXT "_etext"
+
+/*--------------------------------------------------------------*/
+
+/*
+** Section header and related definitions
+*/
+
+struct external_scnhdr
+{
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _LIT ".lit"
+
+/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -*/
+
+/*
+** Section types - with additional section type for global
+** registers which will be relocatable for the Am29000.
+**
+** In instances where it is necessary for a linker to produce an
+** output file which contains text or data not based at virtual
+** address 0, e.g. for a ROM, then the linker should accept
+** address base information as command input and use PAD sections
+** to skip over unused addresses.
+*/
+
+#define STYP_BSSREG 0x1200 /* Global register area (like STYP_INFO) */
+#define STYP_ENVIR 0x2200 /* Environment (like STYP_INFO) */
+#define STYP_ABS 0x4000 /* Absolute (allocated, not reloc, loaded) */
+
+/*--------------------------------------------------------------*/
+
+/*
+** Relocation information declaration and related definitions
+*/
+
+struct external_reloc {
+ char r_vaddr[4]; /* (virtual) address of reference */
+ char r_symndx[4]; /* index into symbol table */
+ char r_type[2]; /* relocation type */
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 10 /* sizeof (RELOC) */
+
+/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -*/
+
+/*
+** Relocation types for the Am29000
+*/
+
+#define R_ABS 0 /* reference is absolute */
+
+#define R_IREL 030 /* instruction relative (jmp/call) */
+#define R_IABS 031 /* instruction absolute (jmp/call) */
+#define R_ILOHALF 032 /* instruction low half (const) */
+#define R_IHIHALF 033 /* instruction high half (consth) part 1 */
+#define R_IHCONST 034 /* instruction high half (consth) part 2 */
+ /* constant offset of R_IHIHALF relocation */
+#define R_BYTE 035 /* relocatable byte value */
+#define R_HWORD 036 /* relocatable halfword value */
+#define R_WORD 037 /* relocatable word value */
+
+#define R_IGLBLRC 040 /* instruction global register RC */
+#define R_IGLBLRA 041 /* instruction global register RA */
+#define R_IGLBLRB 042 /* instruction global register RB */
+
+/*
+NOTE:
+All the "I" forms refer to 29000 instruction formats. The linker is
+expected to know how the numeric information is split and/or aligned
+within the instruction word(s). R_BYTE works for instructions, too.
+
+If the parameter to a CONSTH instruction is a relocatable type, two
+relocation records are written. The first has an r_type of R_IHIHALF
+(33 octal) and a normal r_vaddr and r_symndx. The second relocation
+record has an r_type of R_IHCONST (34 octal), a normal r_vaddr (which
+is redundant), and an r_symndx containing the 32-bit constant offset
+to the relocation instead of the actual symbol table index. This
+second record is always written, even if the constant offset is zero.
+The constant fields of the instruction are set to zero.
+*/
+
+/*--------------------------------------------------------------*/
+
+/*
+** Line number entry declaration and related definitions
+*/
+
+struct external_lineno
+{
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+#define LINENO struct external_lineno
+#define LINESZ 6 /* sizeof (LINENO) */
+
+/*--------------------------------------------------------------*/
+
+/*
+** Symbol entry declaration and related definitions
+*/
+
+#define E_SYMNMLEN 8 /* Number of characters in a symbol name */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+
+/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -*/
+
+/*
+** Storage class definitions - new classes for global registers.
+*/
+
+#define C_GLBLREG 19 /* global register */
+#define C_EXTREG 20 /* external global register */
+#define C_DEFREG 21 /* ext. def. of global register */
+
+
+/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -*/
+
+/*
+** Derived symbol mask/shifts.
+*/
+
+#define N_BTMASK (0xf)
+#define N_BTSHFT (4)
+#define N_TMASK (0x30)
+#define N_TSHIFT (2)
+
+/*--------------------------------------------------------------*/
+
+/*
+** Auxiliary symbol table entry declaration and related
+** definitions.
+*/
+
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+};
+
+#define AUXENT union external_auxent
+#define AUXESZ 18
diff --git a/include/coff/alpha.h b/include/coff/alpha.h
new file mode 100644
index 0000000..076cbcb
--- /dev/null
+++ b/include/coff/alpha.h
@@ -0,0 +1,362 @@
+/* ECOFF support on Alpha machines.
+ coff/ecoff.h must be included before this file. */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ unsigned char f_magic[2]; /* magic number */
+ unsigned char f_nscns[2]; /* number of sections */
+ unsigned char f_timdat[4]; /* time & date stamp */
+ unsigned char f_symptr[8]; /* file pointer to symtab */
+ unsigned char f_nsyms[4]; /* number of symtab entries */
+ unsigned char f_opthdr[2]; /* sizeof(optional hdr) */
+ unsigned char f_flags[2]; /* flags */
+};
+
+/* Magic numbers are defined in coff/ecoff.h. */
+#define ALPHA_ECOFF_BADMAG(x) \
+ ((x).f_magic != ALPHA_MAGIC && (x).f_magic != ALPHA_MAGIC_BSD)
+
+/* The object type is encoded in the f_flags. */
+#define F_ALPHA_OBJECT_TYPE_MASK 0x3000
+#define F_ALPHA_NO_SHARED 0x1000
+#define F_ALPHA_SHARABLE 0x2000
+#define F_ALPHA_CALL_SHARED 0x3000
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 24
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct external_aouthdr
+{
+ unsigned char magic[2]; /* type of file */
+ unsigned char vstamp[2]; /* version stamp */
+ unsigned char bldrev[2]; /* ?? */
+ unsigned char padding[2]; /* pad to quadword boundary */
+ unsigned char tsize[8]; /* text size in bytes */
+ unsigned char dsize[8]; /* initialized data " " */
+ unsigned char bsize[8]; /* uninitialized data " " */
+ unsigned char entry[8]; /* entry pt. */
+ unsigned char text_start[8]; /* base of text used for this file */
+ unsigned char data_start[8]; /* base of data used for this file */
+ unsigned char bss_start[8]; /* base of bss used for this file */
+ unsigned char gprmask[4]; /* bitmask of general registers used */
+ unsigned char fprmask[4]; /* bitmask of floating point registers used */
+ unsigned char gp_value[8]; /* value for gp register */
+} AOUTHDR;
+
+/* compute size of a header */
+
+#define AOUTSZ 80
+#define AOUTHDRSZ 80
+
+/********************** SECTION HEADER **********************/
+
+struct external_scnhdr {
+ unsigned char s_name[8]; /* section name */
+ unsigned char s_paddr[8]; /* physical address, aliased s_nlib */
+ unsigned char s_vaddr[8]; /* virtual address */
+ unsigned char s_size[8]; /* section size */
+ unsigned char s_scnptr[8]; /* file ptr to raw data for section */
+ unsigned char s_relptr[8]; /* file ptr to relocation */
+ unsigned char s_lnnoptr[8]; /* file ptr to line numbers */
+ unsigned char s_nreloc[2]; /* number of relocation entries */
+ unsigned char s_nlnno[2]; /* number of line number entries*/
+ unsigned char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 64
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct external_reloc {
+ unsigned char r_vaddr[8];
+ unsigned char r_symndx[4];
+ unsigned char r_bits[4];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
+/* Constants to unpack the r_bits field. The Alpha seems to always be
+ little endian, so I haven't bothered to define big endian variants
+ of these. */
+
+#define RELOC_BITS0_TYPE_LITTLE 0xff
+#define RELOC_BITS0_TYPE_SH_LITTLE 0
+
+#define RELOC_BITS1_EXTERN_LITTLE 0x01
+
+#define RELOC_BITS1_OFFSET_LITTLE 0x7e
+#define RELOC_BITS1_OFFSET_SH_LITTLE 1
+
+#define RELOC_BITS1_RESERVED_LITTLE 0x80
+#define RELOC_BITS1_RESERVED_SH_LITTLE 7
+#define RELOC_BITS2_RESERVED_LITTLE 0xff
+#define RELOC_BITS2_RESERVED_SH_LEFT_LITTLE 1
+#define RELOC_BITS3_RESERVED_LITTLE 0x03
+#define RELOC_BITS3_RESERVED_SH_LEFT_LITTLE 9
+
+#define RELOC_BITS3_SIZE_LITTLE 0xfc
+#define RELOC_BITS3_SIZE_SH_LITTLE 2
+
+/* The r_type field in a reloc is one of the following values. */
+#define ALPHA_R_IGNORE 0
+#define ALPHA_R_REFLONG 1
+#define ALPHA_R_REFQUAD 2
+#define ALPHA_R_GPREL32 3
+#define ALPHA_R_LITERAL 4
+#define ALPHA_R_LITUSE 5
+#define ALPHA_R_GPDISP 6
+#define ALPHA_R_BRADDR 7
+#define ALPHA_R_HINT 8
+#define ALPHA_R_SREL16 9
+#define ALPHA_R_SREL32 10
+#define ALPHA_R_SREL64 11
+#define ALPHA_R_OP_PUSH 12
+#define ALPHA_R_OP_STORE 13
+#define ALPHA_R_OP_PSUB 14
+#define ALPHA_R_OP_PRSHIFT 15
+#define ALPHA_R_GPVALUE 16
+#define ALPHA_R_GPRELHIGH 17
+#define ALPHA_R_GPRELLOW 18
+#define ALPHA_R_IMMED 19
+
+/* Overloaded reloc value used by Net- and OpenBSD. */
+#define ALPHA_R_LITERALSLEAZY 17
+
+/* With ALPHA_R_LITUSE, the r_size field is one of the following values. */
+#define ALPHA_R_LU_BASE 1
+#define ALPHA_R_LU_BYTOFF 2
+#define ALPHA_R_LU_JSR 3
+
+/* With ALPHA_R_IMMED, the r_size field is one of the following values. */
+#define ALPHA_R_IMMED_GP_16 1
+#define ALPHA_R_IMMED_GP_HI32 2
+#define ALPHA_R_IMMED_SCN_HI32 3
+#define ALPHA_R_IMMED_BR_HI32 4
+#define ALPHA_R_IMMED_LO32 5
+
+/********************** SYMBOLIC INFORMATION **********************/
+
+/* Written by John Gilmore. */
+
+/* ECOFF uses COFF-like section structures, but its own symbol format.
+ This file defines the symbol format in fields whose size and alignment
+ will not vary on different host systems. */
+
+/* File header as a set of bytes */
+
+struct hdr_ext {
+ unsigned char h_magic[2];
+ unsigned char h_vstamp[2];
+ unsigned char h_ilineMax[4];
+ unsigned char h_idnMax[4];
+ unsigned char h_ipdMax[4];
+ unsigned char h_isymMax[4];
+ unsigned char h_ioptMax[4];
+ unsigned char h_iauxMax[4];
+ unsigned char h_issMax[4];
+ unsigned char h_issExtMax[4];
+ unsigned char h_ifdMax[4];
+ unsigned char h_crfd[4];
+ unsigned char h_iextMax[4];
+ unsigned char h_cbLine[8];
+ unsigned char h_cbLineOffset[8];
+ unsigned char h_cbDnOffset[8];
+ unsigned char h_cbPdOffset[8];
+ unsigned char h_cbSymOffset[8];
+ unsigned char h_cbOptOffset[8];
+ unsigned char h_cbAuxOffset[8];
+ unsigned char h_cbSsOffset[8];
+ unsigned char h_cbSsExtOffset[8];
+ unsigned char h_cbFdOffset[8];
+ unsigned char h_cbRfdOffset[8];
+ unsigned char h_cbExtOffset[8];
+};
+
+/* File descriptor external record */
+
+struct fdr_ext {
+ unsigned char f_adr[8];
+ unsigned char f_cbLineOffset[8];
+ unsigned char f_cbLine[8];
+ unsigned char f_cbSs[8];
+ unsigned char f_rss[4];
+ unsigned char f_issBase[4];
+ unsigned char f_isymBase[4];
+ unsigned char f_csym[4];
+ unsigned char f_ilineBase[4];
+ unsigned char f_cline[4];
+ unsigned char f_ioptBase[4];
+ unsigned char f_copt[4];
+ unsigned char f_ipdFirst[4];
+ unsigned char f_cpd[4];
+ unsigned char f_iauxBase[4];
+ unsigned char f_caux[4];
+ unsigned char f_rfdBase[4];
+ unsigned char f_crfd[4];
+ unsigned char f_bits1[1];
+ unsigned char f_bits2[3];
+ unsigned char f_padding[4];
+};
+
+#define FDR_BITS1_LANG_BIG 0xF8
+#define FDR_BITS1_LANG_SH_BIG 3
+#define FDR_BITS1_LANG_LITTLE 0x1F
+#define FDR_BITS1_LANG_SH_LITTLE 0
+
+#define FDR_BITS1_FMERGE_BIG 0x04
+#define FDR_BITS1_FMERGE_LITTLE 0x20
+
+#define FDR_BITS1_FREADIN_BIG 0x02
+#define FDR_BITS1_FREADIN_LITTLE 0x40
+
+#define FDR_BITS1_FBIGENDIAN_BIG 0x01
+#define FDR_BITS1_FBIGENDIAN_LITTLE 0x80
+
+#define FDR_BITS2_GLEVEL_BIG 0xC0
+#define FDR_BITS2_GLEVEL_SH_BIG 6
+#define FDR_BITS2_GLEVEL_LITTLE 0x03
+#define FDR_BITS2_GLEVEL_SH_LITTLE 0
+
+/* We ignore the `reserved' field in bits2. */
+
+/* Procedure descriptor external record */
+
+struct pdr_ext {
+ unsigned char p_adr[8];
+ unsigned char p_cbLineOffset[8];
+ unsigned char p_isym[4];
+ unsigned char p_iline[4];
+ unsigned char p_regmask[4];
+ unsigned char p_regoffset[4];
+ unsigned char p_iopt[4];
+ unsigned char p_fregmask[4];
+ unsigned char p_fregoffset[4];
+ unsigned char p_frameoffset[4];
+ unsigned char p_lnLow[4];
+ unsigned char p_lnHigh[4];
+ unsigned char p_gp_prologue[1];
+ unsigned char p_bits1[1];
+ unsigned char p_bits2[1];
+ unsigned char p_localoff[1];
+ unsigned char p_framereg[2];
+ unsigned char p_pcreg[2];
+};
+
+#define PDR_BITS1_GP_USED_BIG 0x80
+#define PDR_BITS1_REG_FRAME_BIG 0x40
+#define PDR_BITS1_PROF_BIG 0x20
+#define PDR_BITS1_RESERVED_BIG 0x1f
+#define PDR_BITS1_RESERVED_SH_LEFT_BIG 8
+#define PDR_BITS2_RESERVED_BIG 0xff
+#define PDR_BITS2_RESERVED_SH_BIG 0
+
+#define PDR_BITS1_GP_USED_LITTLE 0x01
+#define PDR_BITS1_REG_FRAME_LITTLE 0x02
+#define PDR_BITS1_PROF_LITTLE 0x04
+#define PDR_BITS1_RESERVED_LITTLE 0xf8
+#define PDR_BITS1_RESERVED_SH_LITTLE 3
+#define PDR_BITS2_RESERVED_LITTLE 0xff
+#define PDR_BITS2_RESERVED_SH_LEFT_LITTLE 5
+
+/* Line numbers */
+
+struct line_ext {
+ unsigned char l_line[4];
+};
+
+/* Symbol external record */
+
+struct sym_ext {
+ unsigned char s_value[8];
+ unsigned char s_iss[4];
+ unsigned char s_bits1[1];
+ unsigned char s_bits2[1];
+ unsigned char s_bits3[1];
+ unsigned char s_bits4[1];
+};
+
+#define SYM_BITS1_ST_BIG 0xFC
+#define SYM_BITS1_ST_SH_BIG 2
+#define SYM_BITS1_ST_LITTLE 0x3F
+#define SYM_BITS1_ST_SH_LITTLE 0
+
+#define SYM_BITS1_SC_BIG 0x03
+#define SYM_BITS1_SC_SH_LEFT_BIG 3
+#define SYM_BITS1_SC_LITTLE 0xC0
+#define SYM_BITS1_SC_SH_LITTLE 6
+
+#define SYM_BITS2_SC_BIG 0xE0
+#define SYM_BITS2_SC_SH_BIG 5
+#define SYM_BITS2_SC_LITTLE 0x07
+#define SYM_BITS2_SC_SH_LEFT_LITTLE 2
+
+#define SYM_BITS2_RESERVED_BIG 0x10
+#define SYM_BITS2_RESERVED_LITTLE 0x08
+
+#define SYM_BITS2_INDEX_BIG 0x0F
+#define SYM_BITS2_INDEX_SH_LEFT_BIG 16
+#define SYM_BITS2_INDEX_LITTLE 0xF0
+#define SYM_BITS2_INDEX_SH_LITTLE 4
+
+#define SYM_BITS3_INDEX_SH_LEFT_BIG 8
+#define SYM_BITS3_INDEX_SH_LEFT_LITTLE 4
+
+#define SYM_BITS4_INDEX_SH_LEFT_BIG 0
+#define SYM_BITS4_INDEX_SH_LEFT_LITTLE 12
+
+/* External symbol external record */
+
+struct ext_ext {
+ struct sym_ext es_asym;
+ unsigned char es_bits1[1];
+ unsigned char es_bits2[3];
+ unsigned char es_ifd[4];
+};
+
+#define EXT_BITS1_JMPTBL_BIG 0x80
+#define EXT_BITS1_JMPTBL_LITTLE 0x01
+
+#define EXT_BITS1_COBOL_MAIN_BIG 0x40
+#define EXT_BITS1_COBOL_MAIN_LITTLE 0x02
+
+#define EXT_BITS1_WEAKEXT_BIG 0x20
+#define EXT_BITS1_WEAKEXT_LITTLE 0x04
+
+/* Dense numbers external record */
+
+struct dnr_ext {
+ unsigned char d_rfd[4];
+ unsigned char d_index[4];
+};
+
+/* Relative file descriptor */
+
+struct rfd_ext {
+ unsigned char rfd[4];
+};
+
+/* Optimizer symbol external record */
+
+struct opt_ext {
+ unsigned char o_bits1[1];
+ unsigned char o_bits2[1];
+ unsigned char o_bits3[1];
+ unsigned char o_bits4[1];
+ struct rndx_ext o_rndx;
+ unsigned char o_offset[4];
+};
+
+#define OPT_BITS2_VALUE_SH_LEFT_BIG 16
+#define OPT_BITS2_VALUE_SH_LEFT_LITTLE 0
+
+#define OPT_BITS3_VALUE_SH_LEFT_BIG 8
+#define OPT_BITS3_VALUE_SH_LEFT_LITTLE 8
+
+#define OPT_BITS4_VALUE_SH_LEFT_BIG 0
+#define OPT_BITS4_VALUE_SH_LEFT_LITTLE 16
diff --git a/include/coff/apollo.h b/include/coff/apollo.h
new file mode 100644
index 0000000..d1347f1
--- /dev/null
+++ b/include/coff/apollo.h
@@ -0,0 +1,252 @@
+/*** coff information for Apollo M68K */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+/* Motorola 68000/68008/68010/68020 */
+#define MC68MAGIC 0520
+#define MC68KWRMAGIC 0520 /* writeable text segments */
+#define MC68TVMAGIC 0521
+#define MC68KROMAGIC 0521 /* readonly shareable text segments */
+#define MC68KPGMAGIC 0522 /* demand paged text segments */
+#define M68MAGIC 0210
+#define M68TVMAGIC 0211
+
+/* Apollo 68000-based machines have a different magic number. This comes
+ * from /usr/include/apollo/filehdr.h
+ */
+#define APOLLOM68KMAGIC 0627
+
+#define OMAGIC M68MAGIC
+#define M68KBADMAG(x) (((x).f_magic!=MC68MAGIC) && ((x).f_magic!=MC68KWRMAGIC) && ((x).f_magic!=MC68TVMAGIC) && \
+ ((x).f_magic!=MC68KROMAGIC) && ((x).f_magic!=MC68KPGMAGIC) && ((x).f_magic!=M68MAGIC) && ((x).f_magic!=M68TVMAGIC) && \
+ ((x).f_magic!=APOLLOM68KMAGIC) )
+
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+ char o_sri[4]; /* Apollo specific - .sri data pointer */
+ char o_inlib[4]; /* Apollo specific - .inlib data pointer */
+ char vid[8]; /* Apollo specific - 64 bit version ID */
+}
+AOUTHDR;
+
+#define APOLLO_COFF_VERSION_NUMBER 1 /* the value of the aouthdr magic */
+#define AOUTHDRSZ 44
+#define AOUTSZ 44
+
+
+
+/********************** SECTION HEADER **********************/
+
+struct external_scnhdr {
+ /* Apollo allow for larger section names by allowing it to be in
+ * the string table.
+ */
+ char s_name[8];
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/* If s_zeores is all zeroes, s_offset gives the real location of the name
+ * in the string table.
+ */
+
+#define s_zeroes section_name.s_name
+#define s_offset (section_name.s_name+4)
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _TV ".tv"
+#define _INIT ".init"
+#define _FINI ".fini"
+#define _LINES ".lines"
+#define _BLOCKS ".blocks"
+#define _SRI ".sri" /* Static Resource Information (systype,
+ et al.) */
+#define _MIR ".mir" /* Module Information Records */
+#define _APTV ".aptv" /* Apollo-style transfer vectors. */
+#define _INLIB ".inlib" /* Shared Library information */
+#define _RWDI ".rwdi" /* Read/write data initialization directives for
+ compressed sections */
+#define _UNWIND ".unwind" /* Stack unwind information */
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+#ifdef M68K_COFF_OFFSET
+ char r_offset[4];
+#endif
+
+};
+
+
+#define RELOC struct external_reloc
+
+#ifdef M68K_COFF_OFFSET
+#define RELSZ 14
+#else
+#define RELSZ 10
+#endif
+
+/* Apollo specific STYP flags */
+
+#define STYP_RELOCATED_NOT_LOADED 0x00010000 /* Section is relocated normally during linking, but need
+ not be loaded during program execution */
+#define STYP_DEBUG 0x00020000 /* debug section */
+#define STYP_OVERLAY 0x00040000 /* Section is overlayed */
+#define STYP_INSTRUCTION 0x00200000 /* Section contains executable code */
+
+#define STYP_ZERO 0x00800000 /* Section is initialized to zero */
+#define STYP_INSTALLED 0x02000000 /* Section should be installable in KGT */
+#define STYP_LOOK_INSTALLED 0x04000000 /* Look for section in KGT */
+#define STYP_SECALIGN1 0x08000000 /* Specially aligned section */
+#define STYP_SECALIGN2 0x10000000 /* " " " */
+#define STYP_COMPRESSED 0x20000000 /* No section data per se (s_scnptr = 0), but there are
+ initialization directives for it in .rwdi section
+ (used in conjunction with STYP_BSS) */
diff --git a/include/coff/arm.h b/include/coff/arm.h
new file mode 100644
index 0000000..dd578b1
--- /dev/null
+++ b/include/coff/arm.h
@@ -0,0 +1,258 @@
+/*** coff information for the ARM */
+
+#define COFFARM 1
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+/* Bits for f_flags:
+ * F_RELFLG relocation info stripped from file
+ * F_EXEC file is executable (no unresolved external references)
+ * F_LNNO line numbers stripped from file
+ * F_LSYMS local symbols stripped from file
+ * F_INTERWORK file supports switching between ARM and Thumb instruction sets
+ * F_INTERWORK_SET the F_INTERWORK bit is valid
+ * F_APCS_FLOAT code passes float arguments in float registers
+ * F_PIC code is reentrant/position-independent
+ * F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax)
+ * F_APCS_26 file uses 26 bit ARM Procedure Calling Standard
+ * F_APCS_SET the F_APCS_26, F_APCS_FLOAT and F_PIC bits have been initialised
+ */
+
+#define F_RELFLG (0x0001)
+#define F_EXEC (0x0002)
+#define F_LNNO (0x0004)
+#define F_LSYMS (0x0008)
+#define F_INTERWORK (0x0010)
+#define F_INTERWORK_SET (0x0020)
+#define F_APCS_FLOAT (0x0040)
+#undef F_AR16WR
+#define F_PIC (0x0080)
+#define F_AR32WR (0x0100)
+#define F_APCS_26 (0x0400)
+#define F_APCS_SET (0x0800)
+
+/* Bits stored in flags field of the internal_f structure */
+
+#define F_INTERWORK (0x0010)
+#define F_PIC_INT (0x0020)
+#define F_APCS_FLOAT (0x0040)
+#define F_ARM_ARCHITECTURE_MASK (0x0c00)
+#define F_ARM_2 (0x0000)
+#define F_ARM_2a (0x0000)
+#define F_ARM_3 (0x0400)
+#define F_ARM_3M (0x0400)
+#define F_ARM_4 (0x0800)
+#define F_ARM_4T (0x0c00)
+#define F_APCS26 (0x4000)
+
+/*
+ * ARMMAGIC ought to encoded the procesor type,
+ * but it is too late to change it now, instead
+ * the flags field of the internal_f structure
+ * is used as shown above.
+ *
+ * XXX - NC 5/6/97
+ */
+
+#define ARMMAGIC 0xa00 /* I just made this up */
+
+#define ARMBADMAG(x) (((x).f_magic != ARMMAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+
+
+}
+AOUTHDR;
+
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+#define OMAGIC 0404 /* object files, eg as output */
+#define ZMAGIC 0413 /* demand load format, eg normal ld output */
+#define STMAGIC 0401 /* target shlib */
+#define SHMAGIC 0443 /* host shlib */
+
+
+/* define some NT default values */
+/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
+#define NT_SECTION_ALIGNMENT 0x1000
+#define NT_FILE_ALIGNMENT 0x200
+#define NT_DEF_RESERVE 0x100000
+#define NT_DEF_COMMIT 0x1000
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _COMMENT ".comment"
+#define _LIB ".lib"
+
+/* We use the .rdata section to hold read only data. */
+#define _LIT ".rdata"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+#define N_BTMASK (0xf)
+#define N_TMASK (0x30)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ char x_checksum[4]; /* section COMDAT checksum */
+ char x_associated[2]; /* COMDAT associated section index */
+ char x_comdat[1]; /* COMDAT selection number */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+# define _ETEXT "etext"
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+ char r_offset[4];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 14
diff --git a/include/coff/aux-coff.h b/include/coff/aux-coff.h
new file mode 100644
index 0000000..c89c124
--- /dev/null
+++ b/include/coff/aux-coff.h
@@ -0,0 +1,31 @@
+/* Modifications of internal.h and m68k.h needed by A/UX
+ Suggested by Ian Lance Taylor <ian@cygnus.com> */
+
+#ifndef GNU_COFF_AUX_H
+#define GNU_COFF_AUX_H 1
+
+#include "coff/internal.h"
+#include "coff/m68k.h"
+
+/* Section contains 64-byte padded pathnames of shared libraries */
+#undef STYP_LIB
+#define STYP_LIB 0x200
+
+/* Section contains shared library initialization code */
+#undef STYP_INIT
+#define STYP_INIT 0x400
+
+/* Section contains .ident information */
+#undef STYP_IDENT
+#define STYP_IDENT 0x800
+
+/* Section types used by bfd and gas not defined (directly) by A/UX */
+#undef STYP_OVER
+#define STYP_OVER 0
+#undef STYP_INFO
+#define STYP_INFO STYP_IDENT
+
+/* Traditional name of the section tagged with STYP_LIB */
+#define _LIB ".lib"
+
+#endif /* GNU_COFF_AUX_H */
diff --git a/include/coff/ecoff.h b/include/coff/ecoff.h
new file mode 100644
index 0000000..9e4202e
--- /dev/null
+++ b/include/coff/ecoff.h
@@ -0,0 +1,421 @@
+#ifndef ECOFF_H
+#define ECOFF_H
+
+/* Generic ECOFF support.
+ This does not include symbol information, found in sym.h and
+ symconst.h. */
+
+/* Mips magic numbers used in filehdr. MIPS_MAGIC_LITTLE is used on
+ little endian machines. MIPS_MAGIC_BIG is used on big endian
+ machines. Where is MIPS_MAGIC_1 from? */
+#define MIPS_MAGIC_1 0x0180
+#define MIPS_MAGIC_LITTLE 0x0162
+#define MIPS_MAGIC_BIG 0x0160
+
+/* These are the magic numbers used for MIPS code compiled at ISA
+ level 2. */
+#define MIPS_MAGIC_LITTLE2 0x0166
+#define MIPS_MAGIC_BIG2 0x0163
+
+/* These are the magic numbers used for MIPS code compiled at ISA
+ level 3. */
+#define MIPS_MAGIC_LITTLE3 0x142
+#define MIPS_MAGIC_BIG3 0x140
+
+/* Alpha magic numbers used in filehdr. */
+#define ALPHA_MAGIC 0x183
+#define ALPHA_MAGIC_BSD 0x185
+
+/* Magic numbers used in a.out header. */
+#define ECOFF_AOUT_OMAGIC 0407 /* not demand paged (ld -N). */
+#define ECOFF_AOUT_ZMAGIC 0413 /* demand load format, eg normal ld output */
+
+/* Names of special sections. */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _RDATA ".rdata"
+#define _SDATA ".sdata"
+#define _SBSS ".sbss"
+#define _LITA ".lita"
+#define _LIT4 ".lit4"
+#define _LIT8 ".lit8"
+#define _LIB ".lib"
+#define _INIT ".init"
+#define _FINI ".fini"
+#define _PDATA ".pdata"
+#define _XDATA ".xdata"
+#define _GOT ".got"
+#define _HASH ".hash"
+#define _DYNSYM ".dynsym"
+#define _DYNSTR ".dynstr"
+#define _RELDYN ".rel.dyn"
+#define _CONFLIC ".conflic"
+#define _COMMENT ".comment"
+#define _LIBLIST ".liblist"
+#define _DYNAMIC ".dynamic"
+#define _RCONST ".rconst"
+
+/* ECOFF uses some additional section flags. */
+#define STYP_RDATA 0x100
+#define STYP_SDATA 0x200
+#define STYP_SBSS 0x400
+#define STYP_GOT 0x1000
+#define STYP_DYNAMIC 0x2000
+#define STYP_DYNSYM 0x4000
+#define STYP_RELDYN 0x8000
+#define STYP_DYNSTR 0x10000
+#define STYP_HASH 0x20000
+#define STYP_LIBLIST 0x40000
+#define STYP_CONFLIC 0x100000
+#define STYP_ECOFF_FINI 0x1000000
+#define STYP_EXTENDESC 0x2000000 /* 0x02FFF000 bits => scn type, rest clr */
+#define STYP_LITA 0x4000000
+#define STYP_LIT8 0x8000000
+#define STYP_LIT4 0x10000000
+#define STYP_ECOFF_LIB 0x40000000
+#define STYP_ECOFF_INIT 0x80000000
+#define STYP_OTHER_LOAD (STYP_ECOFF_INIT | STYP_ECOFF_FINI)
+
+/* extended section types */
+#define STYP_COMMENT 0x2100000
+#define STYP_RCONST 0x2200000
+#define STYP_XDATA 0x2400000
+#define STYP_PDATA 0x2800000
+
+/* The linker needs a section to hold small common variables while
+ linking. There is no convenient way to create it when the linker
+ needs it, so we always create one for each BFD. We then avoid
+ writing it out. */
+#define SCOMMON ".scommon"
+
+/* If the extern bit in a reloc is 1, then r_symndx is an index into
+ the external symbol table. If the extern bit is 0, then r_symndx
+ indicates a section, and is one of the following values. */
+#define RELOC_SECTION_NONE 0
+#define RELOC_SECTION_TEXT 1
+#define RELOC_SECTION_RDATA 2
+#define RELOC_SECTION_DATA 3
+#define RELOC_SECTION_SDATA 4
+#define RELOC_SECTION_SBSS 5
+#define RELOC_SECTION_BSS 6
+#define RELOC_SECTION_INIT 7
+#define RELOC_SECTION_LIT8 8
+#define RELOC_SECTION_LIT4 9
+#define RELOC_SECTION_XDATA 10
+#define RELOC_SECTION_PDATA 11
+#define RELOC_SECTION_FINI 12
+#define RELOC_SECTION_LITA 13
+#define RELOC_SECTION_ABS 14
+#define RELOC_SECTION_RCONST 15
+
+#define NUM_RELOC_SECTIONS 16
+
+/********************** STABS **********************/
+
+/* gcc uses mips-tfile to output type information in special stabs
+ entries. These must match the corresponding definition in
+ gcc/config/mips.h. At some point, these should probably go into a
+ shared include file, but currently gcc and gdb do not share any
+ directories. */
+#define CODE_MASK 0x8F300
+#define ECOFF_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
+#define ECOFF_MARK_STAB(code) ((code)+CODE_MASK)
+#define ECOFF_UNMARK_STAB(code) ((code)-CODE_MASK)
+#define STABS_SYMBOL "@stabs"
+
+/********************** COFF **********************/
+
+/* gcc also uses mips-tfile to output COFF debugging information.
+ These are the values it uses when outputting the .type directive.
+ These should also be in a shared include file. */
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+/********************** AUX **********************/
+
+/* The auxiliary type information is the same on all known ECOFF
+ targets. I can't see any reason that it would ever change, so I am
+ going to gamble and define the external structures here, in the
+ target independent ECOFF header file. The internal forms are
+ defined in coff/sym.h, which was originally donated by MIPS
+ Computer Systems. */
+
+/* Type information external record */
+
+struct tir_ext {
+ unsigned char t_bits1[1];
+ unsigned char t_tq45[1];
+ unsigned char t_tq01[1];
+ unsigned char t_tq23[1];
+};
+
+#define TIR_BITS1_FBITFIELD_BIG ((unsigned int) 0x80)
+#define TIR_BITS1_FBITFIELD_LITTLE ((unsigned int) 0x01)
+
+#define TIR_BITS1_CONTINUED_BIG ((unsigned int) 0x40)
+#define TIR_BITS1_CONTINUED_LITTLE ((unsigned int) 0x02)
+
+#define TIR_BITS1_BT_BIG ((unsigned int) 0x3F)
+#define TIR_BITS1_BT_SH_BIG 0
+#define TIR_BITS1_BT_LITTLE ((unsigned int) 0xFC)
+#define TIR_BITS1_BT_SH_LITTLE 2
+
+#define TIR_BITS_TQ4_BIG ((unsigned int) 0xF0)
+#define TIR_BITS_TQ4_SH_BIG 4
+#define TIR_BITS_TQ5_BIG ((unsigned int) 0x0F)
+#define TIR_BITS_TQ5_SH_BIG 0
+#define TIR_BITS_TQ4_LITTLE ((unsigned int) 0x0F)
+#define TIR_BITS_TQ4_SH_LITTLE 0
+#define TIR_BITS_TQ5_LITTLE ((unsigned int) 0xF0)
+#define TIR_BITS_TQ5_SH_LITTLE 4
+
+#define TIR_BITS_TQ0_BIG ((unsigned int) 0xF0)
+#define TIR_BITS_TQ0_SH_BIG 4
+#define TIR_BITS_TQ1_BIG ((unsigned int) 0x0F)
+#define TIR_BITS_TQ1_SH_BIG 0
+#define TIR_BITS_TQ0_LITTLE ((unsigned int) 0x0F)
+#define TIR_BITS_TQ0_SH_LITTLE 0
+#define TIR_BITS_TQ1_LITTLE ((unsigned int) 0xF0)
+#define TIR_BITS_TQ1_SH_LITTLE 4
+
+#define TIR_BITS_TQ2_BIG ((unsigned int) 0xF0)
+#define TIR_BITS_TQ2_SH_BIG 4
+#define TIR_BITS_TQ3_BIG ((unsigned int) 0x0F)
+#define TIR_BITS_TQ3_SH_BIG 0
+#define TIR_BITS_TQ2_LITTLE ((unsigned int) 0x0F)
+#define TIR_BITS_TQ2_SH_LITTLE 0
+#define TIR_BITS_TQ3_LITTLE ((unsigned int) 0xF0)
+#define TIR_BITS_TQ3_SH_LITTLE 4
+
+/* Relative symbol external record */
+
+struct rndx_ext {
+ unsigned char r_bits[4];
+};
+
+#define RNDX_BITS0_RFD_SH_LEFT_BIG 4
+#define RNDX_BITS1_RFD_BIG ((unsigned int) 0xF0)
+#define RNDX_BITS1_RFD_SH_BIG 4
+
+#define RNDX_BITS0_RFD_SH_LEFT_LITTLE 0
+#define RNDX_BITS1_RFD_LITTLE ((unsigned int) 0x0F)
+#define RNDX_BITS1_RFD_SH_LEFT_LITTLE 8
+
+#define RNDX_BITS1_INDEX_BIG ((unsigned int) 0x0F)
+#define RNDX_BITS1_INDEX_SH_LEFT_BIG 16
+#define RNDX_BITS2_INDEX_SH_LEFT_BIG 8
+#define RNDX_BITS3_INDEX_SH_LEFT_BIG 0
+
+#define RNDX_BITS1_INDEX_LITTLE ((unsigned int) 0xF0)
+#define RNDX_BITS1_INDEX_SH_LITTLE 4
+#define RNDX_BITS2_INDEX_SH_LEFT_LITTLE 4
+#define RNDX_BITS3_INDEX_SH_LEFT_LITTLE 12
+
+/* Auxiliary symbol information external record */
+
+union aux_ext {
+ struct tir_ext a_ti;
+ struct rndx_ext a_rndx;
+ unsigned char a_dnLow[4];
+ unsigned char a_dnHigh[4];
+ unsigned char a_isym[4];
+ unsigned char a_iss[4];
+ unsigned char a_width[4];
+ unsigned char a_count[4];
+};
+
+#define AUX_GET_ANY(bigend, ax, field) \
+ ((bigend) ? bfd_getb32 ((ax)->field) : bfd_getl32 ((ax)->field))
+
+#define AUX_GET_DNLOW(bigend, ax) AUX_GET_ANY ((bigend), (ax), a_dnLow)
+#define AUX_GET_DNHIGH(bigend, ax) AUX_GET_ANY ((bigend), (ax), a_dnHigh)
+#define AUX_GET_ISYM(bigend, ax) AUX_GET_ANY ((bigend), (ax), a_isym)
+#define AUX_GET_ISS(bigend, ax) AUX_GET_ANY ((bigend), (ax), a_iss)
+#define AUX_GET_WIDTH(bigend, ax) AUX_GET_ANY ((bigend), (ax), a_width)
+#define AUX_GET_COUNT(bigend, ax) AUX_GET_ANY ((bigend), (ax), a_count)
+
+#define AUX_PUT_ANY(bigend, val, ax, field) \
+ ((bigend) \
+ ? (bfd_putb32 ((bfd_vma) (val), (ax)->field), 0) \
+ : (bfd_putl32 ((bfd_vma) (val), (ax)->field), 0))
+
+#define AUX_PUT_DNLOW(bigend, val, ax) \
+ AUX_PUT_ANY ((bigend), (val), (ax), a_dnLow)
+#define AUX_PUT_DNHIGH(bigend, val, ax) \
+ AUX_PUT_ANY ((bigend), (val), (ax), a_dnHigh)
+#define AUX_PUT_ISYM(bigend, val, ax) \
+ AUX_PUT_ANY ((bigend), (val), (ax), a_isym)
+#define AUX_PUT_ISS(bigend, val, ax) \
+ AUX_PUT_ANY ((bigend), (val), (ax), a_iss)
+#define AUX_PUT_WIDTH(bigend, val, ax) \
+ AUX_PUT_ANY ((bigend), (val), (ax), a_width)
+#define AUX_PUT_COUNT(bigend, val, ax) \
+ AUX_PUT_ANY ((bigend), (val), (ax), a_count)
+
+/********************** SYMBOLS **********************/
+
+/* For efficiency, gdb deals directly with the unswapped symbolic
+ information (that way it only takes the time to swap information
+ that it really needs to read). gdb originally retrieved the
+ information directly from the BFD backend information, but that
+ strategy, besides being sort of ugly, does not work for MIPS ELF,
+ which also uses ECOFF debugging information. This structure holds
+ pointers to the (mostly) unswapped symbolic information. */
+
+struct ecoff_debug_info
+{
+ /* The swapped ECOFF symbolic header. */
+ HDRR symbolic_header;
+
+ /* Pointers to the unswapped symbolic information. Note that the
+ pointers to external structures point to different sorts of
+ information on different ECOFF targets. The ecoff_debug_swap
+ structure provides the sizes of the structures and the functions
+ needed to swap the information in and out. These pointers are
+ all pointers to arrays, not single structures. They will be NULL
+ if there are no instances of the relevant structure. These
+ fields are also used by the assembler to output ECOFF debugging
+ information. */
+ unsigned char *line;
+ PTR external_dnr; /* struct dnr_ext */
+ PTR external_pdr; /* struct pdr_ext */
+ PTR external_sym; /* struct sym_ext */
+ PTR external_opt; /* struct opt_ext */
+ union aux_ext *external_aux;
+ char *ss;
+ char *ssext;
+ PTR external_fdr; /* struct fdr_ext */
+ PTR external_rfd; /* struct rfd_ext */
+ PTR external_ext; /* struct ext_ext */
+
+ /* These fields are used when linking. They may disappear at some
+ point. */
+ char *ssext_end;
+ PTR external_ext_end;
+
+ /* When linking, this field holds a mapping from the input FDR
+ numbers to the output numbers, and is used when writing out the
+ external symbols. It is NULL if no mapping is required. */
+ RFDT *ifdmap;
+
+ /* The swapped FDR information. Currently this is never NULL, but
+ code using this structure should probably double-check in case
+ this changes in the future. This is a pointer to an array, not a
+ single structure. */
+ FDR *fdr;
+
+ /* When relaxing MIPS embedded PIC code, we may need to adjust
+ symbol values when they are output. This is a linked list of
+ structures indicating how values should be adjusted. There is no
+ requirement that the entries be in any order, or that they not
+ overlap. This field is normally NULL, in which case no
+ adjustments need to be made. */
+ struct ecoff_value_adjust *adjust;
+};
+
+/* This structure describes how to adjust symbol values when
+ outputting MIPS embedded PIC code. These adjustments only apply to
+ the internal symbols, as the external symbol values will come from
+ the hash table and have already been adjusted. */
+
+struct ecoff_value_adjust
+{
+ /* Next entry on adjustment list. */
+ struct ecoff_value_adjust *next;
+ /* Starting VMA of adjustment. This is the VMA in the ECOFF file,
+ not the offset from the start of the section. Thus it should
+ indicate a particular section. */
+ bfd_vma start;
+ /* Ending VMA of adjustment. */
+ bfd_vma end;
+ /* Adjustment. This should be added to the value of the symbol, or
+ FDR. This is zero for the last entry in the array. */
+ long adjust;
+};
+
+/* These structures are used by the ECOFF find_nearest_line function. */
+
+struct ecoff_fdrtab_entry
+{
+ /* Base address in .text of this FDR. */
+ bfd_vma base_addr;
+ FDR *fdr;
+};
+
+struct ecoff_find_line
+{
+ /* Allocated memory to hold function and file names. */
+ char *find_buffer;
+
+ /* FDR table, sorted by address: */
+ long fdrtab_len;
+ struct ecoff_fdrtab_entry *fdrtab;
+
+ /* Cache entry for most recently found line information. The sect
+ field is NULL if this cache does not contain valid information. */
+ struct
+ {
+ asection *sect;
+ bfd_vma start;
+ bfd_vma stop;
+ const char *filename;
+ const char *functionname;
+ unsigned int line_num;
+ } cache;
+};
+
+/********************** SWAPPING **********************/
+
+/* The generic ECOFF code needs to be able to swap debugging
+ information in and out in the specific format used by a particular
+ ECOFF implementation. This structure provides the information
+ needed to do this. */
+
+struct ecoff_debug_swap
+{
+ /* Symbol table magic number. */
+ int sym_magic;
+ /* Alignment of debugging information. E.g., 4. */
+ bfd_size_type debug_align;
+ /* Sizes of external symbolic information. */
+ bfd_size_type external_hdr_size;
+ bfd_size_type external_dnr_size;
+ bfd_size_type external_pdr_size;
+ bfd_size_type external_sym_size;
+ bfd_size_type external_opt_size;
+ bfd_size_type external_fdr_size;
+ bfd_size_type external_rfd_size;
+ bfd_size_type external_ext_size;
+ /* Functions to swap in external symbolic data. */
+ void (*swap_hdr_in) PARAMS ((bfd *, PTR, HDRR *));
+ void (*swap_dnr_in) PARAMS ((bfd *, PTR, DNR *));
+ void (*swap_pdr_in) PARAMS ((bfd *, PTR, PDR *));
+ void (*swap_sym_in) PARAMS ((bfd *, PTR, SYMR *));
+ void (*swap_opt_in) PARAMS ((bfd *, PTR, OPTR *));
+ void (*swap_fdr_in) PARAMS ((bfd *, PTR, FDR *));
+ void (*swap_rfd_in) PARAMS ((bfd *, PTR, RFDT *));
+ void (*swap_ext_in) PARAMS ((bfd *, PTR, EXTR *));
+ void (*swap_tir_in) PARAMS ((int, const struct tir_ext *, TIR *));
+ void (*swap_rndx_in) PARAMS ((int, const struct rndx_ext *, RNDXR *));
+ /* Functions to swap out external symbolic data. */
+ void (*swap_hdr_out) PARAMS ((bfd *, const HDRR *, PTR));
+ void (*swap_dnr_out) PARAMS ((bfd *, const DNR *, PTR));
+ void (*swap_pdr_out) PARAMS ((bfd *, const PDR *, PTR));
+ void (*swap_sym_out) PARAMS ((bfd *, const SYMR *, PTR));
+ void (*swap_opt_out) PARAMS ((bfd *, const OPTR *, PTR));
+ void (*swap_fdr_out) PARAMS ((bfd *, const FDR *, PTR));
+ void (*swap_rfd_out) PARAMS ((bfd *, const RFDT *, PTR));
+ void (*swap_ext_out) PARAMS ((bfd *, const EXTR *, PTR));
+ void (*swap_tir_out) PARAMS ((int, const TIR *, struct tir_ext *));
+ void (*swap_rndx_out) PARAMS ((int, const RNDXR *, struct rndx_ext *));
+ /* Function to read symbol data and set up pointers in
+ ecoff_debug_info structure. The section argument is used for
+ ELF, not straight ECOFF. */
+ boolean (*read_debug_info) PARAMS ((bfd *, asection *,
+ struct ecoff_debug_info *));
+};
+
+#endif /* ! defined (ECOFF_H) */
diff --git a/include/coff/go32exe.h b/include/coff/go32exe.h
new file mode 100644
index 0000000..5bd26c1
--- /dev/null
+++ b/include/coff/go32exe.h
@@ -0,0 +1,20 @@
+/* COFF information for PC running go32. */
+
+#define STUBSIZE 2048
+
+struct external_filehdr_go32_exe {
+ char stub[STUBSIZE]; /* the stub to load the image */
+ /* the standard COFF header */
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+#undef FILHDR
+#define FILHDR struct external_filehdr_go32_exe
+#undef FILHSZ
+#define FILHSZ STUBSIZE+20
diff --git a/include/coff/h8300.h b/include/coff/h8300.h
new file mode 100644
index 0000000..9b62394
--- /dev/null
+++ b/include/coff/h8300.h
@@ -0,0 +1,204 @@
+/*** coff information for Hitachi H8/300 and H8/300-H */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+
+#define H8300MAGIC 0x8300
+#define H8300HMAGIC 0x8301
+#define H8300SMAGIC 0x8302
+
+#define H8300BADMAG(x) (((x).f_magic!=H8300MAGIC))
+#define H8300HBADMAG(x) (((x).f_magic!=H8300HMAGIC))
+#define H8300SBADMAG(x) (((x).f_magic!=H8300SMAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[4]; /* line number */
+};
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+/* The external reloc has an offset field, because some of the reloc
+ types on the h8 don't have room in the instruction for the entire
+ offset - eg the strange jump and high page addressing modes */
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_offset[4];
+ char r_type[2];
+ char r_stuff[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
+
+
+
diff --git a/include/coff/h8500.h b/include/coff/h8500.h
new file mode 100644
index 0000000..0305bf2b
--- /dev/null
+++ b/include/coff/h8500.h
@@ -0,0 +1,201 @@
+/*** coff information for Hitachi H8/500 */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+
+#define H8500MAGIC 0x8500
+
+
+#define H8500BADMAG(x) ((0xffff && ((x).f_magic)!=H8500MAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[4]; /* line number */
+};
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+/* The external reloc has an offset field, because some of the reloc
+ types on the h8 don't have room in the instruction for the entire
+ offset - eg the strange jump and high page addressing modes */
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_offset[4];
+ char r_type[2];
+ char r_stuff[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
+
+
+
diff --git a/include/coff/i386.h b/include/coff/i386.h
new file mode 100644
index 0000000..5ebf4a2
--- /dev/null
+++ b/include/coff/i386.h
@@ -0,0 +1,228 @@
+/*** coff information for Intel 386/486. */
+
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+/* Bits for f_flags:
+ * F_RELFLG relocation info stripped from file
+ * F_EXEC file is executable (no unresolved external references)
+ * F_LNNO line numbers stripped from file
+ * F_LSYMS local symbols stripped from file
+ * F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax)
+ */
+
+#define F_RELFLG (0x0001)
+#define F_EXEC (0x0002)
+#define F_LNNO (0x0004)
+#define F_LSYMS (0x0008)
+
+
+
+#define I386MAGIC 0x14c
+#define I386PTXMAGIC 0x154
+#define I386AIXMAGIC 0x175
+
+/* This is Lynx's all-platform magic number for executables. */
+
+#define LYNXCOFFMAGIC 0415
+
+#define I386BADMAG(x) (((x).f_magic != I386MAGIC) \
+ && (x).f_magic != I386AIXMAGIC \
+ && (x).f_magic != I386PTXMAGIC \
+ && (x).f_magic != LYNXCOFFMAGIC)
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+
+
+}
+AOUTHDR;
+
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+#define OMAGIC 0404 /* object files, eg as output */
+#define ZMAGIC 0413 /* demand load format, eg normal ld output */
+#define STMAGIC 0401 /* target shlib */
+#define SHMAGIC 0443 /* host shlib */
+
+
+/* define some NT default values */
+/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
+#define NT_SECTION_ALIGNMENT 0x1000
+#define NT_FILE_ALIGNMENT 0x200
+#define NT_DEF_RESERVE 0x100000
+#define NT_DEF_COMMIT 0x1000
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _COMMENT ".comment"
+#define _LIB ".lib"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+#define N_BTMASK (0xf)
+#define N_TMASK (0x30)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ char x_checksum[4]; /* section COMDAT checksum */
+ char x_associated[2]; /* COMDAT associated section index */
+ char x_comdat[1]; /* COMDAT selection number */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+# define _ETEXT "etext"
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 10
+
diff --git a/include/coff/i860.h b/include/coff/i860.h
new file mode 100644
index 0000000..73686e9
--- /dev/null
+++ b/include/coff/i860.h
@@ -0,0 +1,205 @@
+/* This file was hacked from i386.h [dolan@ssd.intel.com] */
+
+/*** coff information for Intel 860. */
+
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+/* Bits for f_flags:
+ * F_RELFLG relocation info stripped from file
+ * F_EXEC file is executable (no unresolved external references)
+ * F_LNNO line numbers stripped from file
+ * F_LSYMS local symbols stripped from file
+ * F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax)
+ */
+
+#define F_RELFLG (0x0001)
+#define F_EXEC (0x0002)
+#define F_LNNO (0x0004)
+#define F_LSYMS (0x0008)
+
+
+
+#define I860MAGIC 0x14d
+
+#define I860BADMAG(x) ((x).f_magic != I860MAGIC)
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+/* FIXME: What are the a.out magic numbers? */
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _COMMENT ".comment"
+#define _LIB ".lib"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+#define N_BTMASK (0xf)
+#define N_TMASK (0x30)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+# define _ETEXT "etext"
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 10
diff --git a/include/coff/i960.h b/include/coff/i960.h
new file mode 100644
index 0000000..0935836
--- /dev/null
+++ b/include/coff/i960.h
@@ -0,0 +1,275 @@
+/*** coff information for 80960. Origins: Intel corp, natch. */
+
+/* NOTE: Tagentries (cf TAGBITS) are no longer used by the 960 */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+#define OMAGIC (0407) /* old impure format. data immediately
+ follows text. both sections are rw. */
+#define NMAGIC (0410) /* split i&d, read-only text */
+
+/*
+* Intel 80960 (I960) processor flags.
+* F_I960TYPE == mask for processor type field.
+*/
+
+#define F_I960TYPE (0xf000)
+#define F_I960CORE (0x1000)
+#define F_I960KB (0x2000)
+#define F_I960SB (0x2000)
+#define F_I960MC (0x3000)
+#define F_I960XA (0x4000)
+#define F_I960CA (0x5000)
+#define F_I960KA (0x6000)
+#define F_I960SA (0x6000)
+#define F_I960JX (0x7000)
+#define F_I960HX (0x8000)
+
+
+/** i80960 Magic Numbers
+*/
+
+#define I960ROMAGIC (0x160) /* read-only text segments */
+#define I960RWMAGIC (0x161) /* read-write text segments */
+
+#define I960BADMAG(x) (((x).f_magic!=I960ROMAGIC) && ((x).f_magic!=I960RWMAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+typedef struct {
+ unsigned long phys_addr;
+ unsigned long bitarray;
+} TAGBITS;
+
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+ char tagentries[4]; /* number of tag entries to follow */
+}
+AOUTHDR;
+
+/* return a pointer to the tag bits array */
+
+#define TAGPTR(aout) ((TAGBITS *) (&(aout.tagentries)+1))
+
+/* compute size of a header */
+
+/*#define AOUTSZ(aout) (sizeof(AOUTHDR)+(aout.tagentries*sizeof(TAGBITS)))*/
+#define AOUTSZ 32
+#define AOUTHDRSZ 32
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+ char s_align[4]; /* section alignment */
+};
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 44
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+ char padding[2]; /* force alignment */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_flags[2];
+ char e_type[4];
+ char e_sclass[1];
+ char e_numaux[1];
+ char pad2[2];
+};
+
+
+
+
+#define N_BTMASK (0x1f)
+#define N_TMASK (0x60)
+#define N_BTSHFT (5)
+#define N_TSHIFT (2)
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+ /******************************************
+ * I960-specific *2nd* aux. entry formats
+ ******************************************/
+ struct {
+ /* This is a very old typo that keeps getting propagated. */
+#define x_stdindx x_stindx
+ char x_stindx[4]; /* sys. table entry */
+ } x_sc; /* system call entry */
+
+ struct {
+ char x_balntry[4]; /* BAL entry point */
+ } x_bal; /* BAL-callable function */
+
+ struct {
+ char x_timestamp[4]; /* time stamp */
+ char x_idstring[20]; /* producer identity string */
+ } x_ident; /* Producer ident info */
+
+};
+
+
+
+#define SYMENT struct external_syment
+#define SYMESZ 24
+#define AUXENT union external_auxent
+#define AUXESZ 24
+
+# define _ETEXT "_etext"
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+ char pad[2];
+};
+
+/* r_type values for the i960. */
+
+/* The i960 uses R_RELLONG, which is defined in internal.h as 0x11.
+ It is an absolute 32 bit relocation. */
+
+#define R_IPRMED (0x19) /* 24-bit ip-relative relocation */
+#define R_OPTCALL (0x1b) /* 32-bit optimizable call (leafproc/sysproc) */
+#define R_OPTCALLX (0x1c) /* 64-bit optimizable call (leafproc/sysproc) */
+
+/* The following relocation types are defined use by relaxing linkers,
+ which convert 32 bit calls (which require a 64 bit instruction)
+ into 24 bit calls (which require a 32 bit instruction) when
+ possible. It will be possible whenever the target of the call is
+ within a 24 bit range of the call instruction.
+
+ It is always safe to ignore these relocations. They only serve to
+ mark points which the relaxing linker will have to consider. The
+ assembler must ensure that the correct code is generated even if
+ the relocations are ignored. In particular, this means that the
+ R_IPR13 relocation may not appear with an external symbol. */
+
+#define R_IPR13 (0x1d) /* 13 bit ip-relative branch */
+#define R_ALIGN (0x1e) /* alignment marker. This has no
+ associated symbol. Instead, the
+ r_symndx field indicates the
+ require alignment at this point in
+ the file. It must be a power of 2. */
+
+#define RELOC struct external_reloc
+#define RELSZ 12
+
diff --git a/include/coff/internal.h b/include/coff/internal.h
new file mode 100644
index 0000000..d5ea951
--- /dev/null
+++ b/include/coff/internal.h
@@ -0,0 +1,728 @@
+/* Internal format of COFF object file data structures, for GNU BFD.
+ This file is part of BFD, the Binary File Descriptor library. */
+
+#ifndef GNU_COFF_INTERNAL_H
+#define GNU_COFF_INTERNAL_H 1
+
+/* First, make "signed char" work, even on old compilers. */
+#ifndef signed
+#ifndef __STDC__
+#define signed /**/
+#endif
+#endif
+
+/********************** FILE HEADER **********************/
+
+/* extra stuff in a PE header. */
+
+struct internal_extra_pe_filehdr
+{
+ /* DOS header data follows for PE stuff */
+ unsigned short e_magic; /* Magic number, 0x5a4d */
+ unsigned short e_cblp; /* Bytes on last page of file, 0x90 */
+ unsigned short e_cp; /* Pages in file, 0x3 */
+ unsigned short e_crlc; /* Relocations, 0x0 */
+ unsigned short e_cparhdr; /* Size of header in paragraphs, 0x4 */
+ unsigned short e_minalloc; /* Minimum extra paragraphs needed, 0x0 */
+ unsigned short e_maxalloc; /* Maximum extra paragraphs needed, 0xFFFF */
+ unsigned short e_ss; /* Initial (relative) SS value, 0x0 */
+ unsigned short e_sp; /* Initial SP value, 0xb8 */
+ unsigned short e_csum; /* Checksum, 0x0 */
+ unsigned short e_ip; /* Initial IP value, 0x0 */
+ unsigned short e_cs; /* Initial (relative) CS value, 0x0 */
+ unsigned short e_lfarlc; /* File address of relocation table, 0x40 */
+ unsigned short e_ovno; /* Overlay number, 0x0 */
+ unsigned short e_res[4]; /* Reserved words, all 0x0 */
+ unsigned short e_oemid; /* OEM identifier (for e_oeminfo), 0x0 */
+ unsigned short e_oeminfo; /* OEM information; e_oemid specific, 0x0 */
+ unsigned short e_res2[10]; /* Reserved words, all 0x0 */
+ bfd_vma e_lfanew; /* File address of new exe header, 0x80 */
+ unsigned long dos_message[16]; /* text which always follows dos header */
+ bfd_vma nt_signature; /* required NT signature, 0x4550 */
+};
+
+struct internal_filehdr
+{
+ struct internal_extra_pe_filehdr pe;
+
+ /* standard coff internal info */
+ unsigned short f_magic; /* magic number */
+ unsigned short f_nscns; /* number of sections */
+ long f_timdat; /* time & date stamp */
+ bfd_vma f_symptr; /* file pointer to symtab */
+ long f_nsyms; /* number of symtab entries */
+ unsigned short f_opthdr; /* sizeof(optional hdr) */
+ unsigned short f_flags; /* flags */
+ unsigned short f_target_id; /* (TIc80 specific) */
+};
+
+
+/* Bits for f_flags:
+ * F_RELFLG relocation info stripped from file
+ * F_EXEC file is executable (no unresolved external references)
+ * F_LNNO line numbers stripped from file
+ * F_LSYMS local symbols stripped from file
+ * F_AR16WR file is 16-bit little-endian
+ * F_AR32WR file is 32-bit little-endian
+ * F_AR32W file is 32-bit big-endian
+ * F_DYNLOAD rs/6000 aix: dynamically loadable w/imports & exports
+ * F_SHROBJ rs/6000 aix: file is a shared object
+ * F_DLL PE format DLL
+ */
+
+#define F_RELFLG (0x0001)
+#define F_EXEC (0x0002)
+#define F_LNNO (0x0004)
+#define F_LSYMS (0x0008)
+#define F_AR16WR (0x0080)
+#define F_AR32WR (0x0100)
+#define F_AR32W (0x0200)
+#define F_DYNLOAD (0x1000)
+#define F_SHROBJ (0x2000)
+#define F_DLL (0x2000)
+
+/* extra structure which is used in the optional header */
+typedef struct _IMAGE_DATA_DIRECTORY
+{
+ bfd_vma VirtualAddress;
+ long Size;
+} IMAGE_DATA_DIRECTORY;
+#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16
+
+/* default image base for NT */
+#define NT_EXE_IMAGE_BASE 0x400000
+#define NT_DLL_IMAGE_BASE 0x10000000
+
+/* Extra stuff in a PE aouthdr */
+
+#define PE_DEF_SECTION_ALIGNMENT 0x1000
+#define PE_DEF_FILE_ALIGNMENT 0x200
+
+struct internal_extra_pe_aouthdr
+{
+ /* PE stuff */
+ bfd_vma ImageBase; /* address of specific location in memory that
+ file is located, NT default 0x10000 */
+
+ bfd_vma SectionAlignment; /* section alignment default 0x1000 */
+ bfd_vma FileAlignment; /* file alignment default 0x200 */
+ short MajorOperatingSystemVersion; /* minimum version of the operating */
+ short MinorOperatingSystemVersion; /* system req'd for exe, default to 1*/
+ short MajorImageVersion; /* user defineable field to store version of */
+ short MinorImageVersion; /* exe or dll being created, default to 0 */
+ short MajorSubsystemVersion; /* minimum subsystem version required to */
+ short MinorSubsystemVersion; /* run exe; default to 3.1 */
+ long Reserved1; /* seems to be 0 */
+ long SizeOfImage; /* size of memory to allocate for prog */
+ long SizeOfHeaders; /* size of PE header and section table */
+ long CheckSum; /* set to 0 */
+ short Subsystem;
+
+ /* type of subsystem exe uses for user interface,
+ possible values:
+ 1 - NATIVE Doesn't require a subsystem
+ 2 - WINDOWS_GUI runs in Windows GUI subsystem
+ 3 - WINDOWS_CUI runs in Windows char sub. (console app)
+ 5 - OS2_CUI runs in OS/2 character subsystem
+ 7 - POSIX_CUI runs in Posix character subsystem */
+ short DllCharacteristics; /* flags for DLL init, use 0 */
+ bfd_vma SizeOfStackReserve; /* amount of memory to reserve */
+ bfd_vma SizeOfStackCommit; /* amount of memory initially committed for
+ initial thread's stack, default is 0x1000 */
+ bfd_vma SizeOfHeapReserve; /* amount of virtual memory to reserve and */
+ bfd_vma SizeOfHeapCommit; /* commit, don't know what to defaut it to */
+ long LoaderFlags; /* can probably set to 0 */
+ long NumberOfRvaAndSizes; /* number of entries in next entry, 16 */
+ IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES];
+};
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+struct internal_aouthdr
+{
+ short magic; /* type of file */
+ short vstamp; /* version stamp */
+ bfd_vma tsize; /* text size in bytes, padded to FW bdry*/
+ bfd_vma dsize; /* initialized data " " */
+ bfd_vma bsize; /* uninitialized data " " */
+ bfd_vma entry; /* entry pt. */
+ bfd_vma text_start; /* base of text used for this file */
+ bfd_vma data_start; /* base of data used for this file */
+
+ /* i960 stuff */
+ unsigned long tagentries; /* number of tag entries to follow */
+
+ /* RS/6000 stuff */
+ unsigned long o_toc; /* address of TOC */
+ short o_snentry; /* section number for entry point */
+ short o_sntext; /* section number for text */
+ short o_sndata; /* section number for data */
+ short o_sntoc; /* section number for toc */
+ short o_snloader; /* section number for loader section */
+ short o_snbss; /* section number for bss */
+ short o_algntext; /* max alignment for text */
+ short o_algndata; /* max alignment for data */
+ short o_modtype; /* Module type field, 1R,RE,RO */
+ short o_cputype; /* Encoded CPU type */
+ unsigned long o_maxstack; /* max stack size allowed. */
+ unsigned long o_maxdata; /* max data size allowed. */
+
+ /* ECOFF stuff */
+ bfd_vma bss_start; /* Base of bss section. */
+ bfd_vma gp_value; /* GP register value. */
+ unsigned long gprmask; /* General registers used. */
+ unsigned long cprmask[4]; /* Coprocessor registers used. */
+ unsigned long fprmask; /* Floating pointer registers used. */
+
+ /* Apollo stuff */
+ long o_inlib; /* inlib data */
+ long o_sri; /* Static Resource Information */
+ long vid[2]; /* Version id */
+
+
+ struct internal_extra_pe_aouthdr pe;
+
+};
+
+/********************** STORAGE CLASSES **********************/
+
+/* This used to be defined as -1, but now n_sclass is unsigned. */
+#define C_EFCN 0xff /* physical end of function */
+#define C_NULL 0
+#define C_AUTO 1 /* automatic variable */
+#define C_EXT 2 /* external symbol */
+#define C_STAT 3 /* static */
+#define C_REG 4 /* register variable */
+#define C_EXTDEF 5 /* external definition */
+#define C_LABEL 6 /* label */
+#define C_ULABEL 7 /* undefined label */
+#define C_MOS 8 /* member of structure */
+#define C_ARG 9 /* function argument */
+#define C_STRTAG 10 /* structure tag */
+#define C_MOU 11 /* member of union */
+#define C_UNTAG 12 /* union tag */
+#define C_TPDEF 13 /* type definition */
+#define C_USTATIC 14 /* undefined static */
+#define C_ENTAG 15 /* enumeration tag */
+#define C_MOE 16 /* member of enumeration */
+#define C_REGPARM 17 /* register parameter */
+#define C_FIELD 18 /* bit field */
+#define C_AUTOARG 19 /* auto argument */
+#define C_LASTENT 20 /* dummy entry (end of block) */
+#define C_BLOCK 100 /* ".bb" or ".eb" */
+#define C_FCN 101 /* ".bf" or ".ef" */
+#define C_EOS 102 /* end of structure */
+#define C_FILE 103 /* file name */
+#define C_LINE 104 /* line # reformatted as symbol table entry */
+#define C_ALIAS 105 /* duplicate tag */
+#define C_HIDDEN 106 /* ext symbol in dmert public lib */
+
+#define C_WEAKEXT 127 /* weak symbol -- GNU extension */
+
+/* New storage classes for TIc80 */
+#define C_UEXT 19 /* Tentative external definition */
+#define C_STATLAB 20 /* Static load time label */
+#define C_EXTLAB 21 /* External load time label */
+#define C_SYSTEM 23 /* System Wide variable */
+
+/* New storage classes for WINDOWS_NT */
+#define C_SECTION 104 /* section name */
+#define C_NT_WEAK 105 /* weak external */
+
+ /* New storage classes for 80960 */
+
+/* C_LEAFPROC is obsolete. Use C_LEAFEXT or C_LEAFSTAT */
+#define C_LEAFPROC 108 /* Leaf procedure, "call" via BAL */
+
+#define C_SCALL 107 /* Procedure reachable via system call */
+#define C_LEAFEXT 108 /* External leaf */
+#define C_LEAFSTAT 113 /* Static leaf */
+#define C_OPTVAR 109 /* Optimized variable */
+#define C_DEFINE 110 /* Preprocessor #define */
+#define C_PRAGMA 111 /* Advice to compiler or linker */
+#define C_SEGMENT 112 /* 80960 segment name */
+
+ /* Storage classes for m88k */
+#define C_SHADOW 107 /* shadow symbol */
+#define C_VERSION 108 /* coff version symbol */
+
+ /* New storage classes for RS/6000 */
+#define C_HIDEXT 107 /* Un-named external symbol */
+#define C_BINCL 108 /* Marks beginning of include file */
+#define C_EINCL 109 /* Marks ending of include file */
+
+ /* storage classes for stab symbols for RS/6000 */
+#define C_GSYM (0x80)
+#define C_LSYM (0x81)
+#define C_PSYM (0x82)
+#define C_RSYM (0x83)
+#define C_RPSYM (0x84)
+#define C_STSYM (0x85)
+#define C_TCSYM (0x86)
+#define C_BCOMM (0x87)
+#define C_ECOML (0x88)
+#define C_ECOMM (0x89)
+#define C_DECL (0x8c)
+#define C_ENTRY (0x8d)
+#define C_FUN (0x8e)
+#define C_BSTAT (0x8f)
+#define C_ESTAT (0x90)
+
+/* Storage classes for Thumb symbols */
+#define C_THUMBEXT (128 + C_EXT) /* 130 */
+#define C_THUMBSTAT (128 + C_STAT) /* 131 */
+#define C_THUMBLABEL (128 + C_LABEL) /* 134 */
+#define C_THUMBEXTFUNC (C_THUMBEXT + 20) /* 150 */
+#define C_THUMBSTATFUNC (C_THUMBSTAT + 20) /* 151 */
+
+/********************** SECTION HEADER **********************/
+
+#define SCNNMLEN (8)
+
+struct internal_scnhdr
+{
+ char s_name[SCNNMLEN]; /* section name */
+
+ /* Physical address, aliased s_nlib.
+ In the pei format, this field is the virtual section size
+ (the size of the section after being loaded int memory),
+ NOT the physical address. */
+ bfd_vma s_paddr;
+
+ bfd_vma s_vaddr; /* virtual address */
+ bfd_vma s_size; /* section size */
+ bfd_vma s_scnptr; /* file ptr to raw data for section */
+ bfd_vma s_relptr; /* file ptr to relocation */
+ bfd_vma s_lnnoptr; /* file ptr to line numbers */
+ unsigned long s_nreloc; /* number of relocation entries */
+ unsigned long s_nlnno; /* number of line number entries*/
+ long s_flags; /* flags */
+ long s_align; /* used on I960 */
+};
+
+/*
+ * s_flags "type"
+ */
+#define STYP_REG (0x0000) /* "regular": allocated, relocated, loaded */
+#define STYP_DSECT (0x0001) /* "dummy": relocated only*/
+#define STYP_NOLOAD (0x0002) /* "noload": allocated, relocated, not loaded */
+#define STYP_GROUP (0x0004) /* "grouped": formed of input sections */
+#define STYP_PAD (0x0008) /* "padding": not allocated, not relocated, loaded */
+#define STYP_COPY (0x0010) /* "copy": for decision function used by field update; not allocated, not relocated,
+ loaded; reloc & lineno entries processed normally */
+#define STYP_TEXT (0x0020) /* section contains text only */
+#define S_SHRSEG (0x0020) /* In 3b Update files (output of ogen), sections which appear in SHARED segments of the Pfile
+ will have the S_SHRSEG flag set by ogen, to inform dufr that updating 1 copy of the proc. will
+ update all process invocations. */
+#define STYP_DATA (0x0040) /* section contains data only */
+#define STYP_BSS (0x0080) /* section contains bss only */
+#define S_NEWFCN (0x0100) /* In a minimal file or an update file, a new function (as compared with a replaced function) */
+#define STYP_INFO (0x0200) /* comment: not allocated not relocated, not loaded */
+#define STYP_OVER (0x0400) /* overlay: relocated not allocated or loaded */
+#define STYP_LIB (0x0800) /* for .lib: same as INFO */
+#define STYP_MERGE (0x2000) /* merge section -- combines with text, data or bss sections only */
+#define STYP_REVERSE_PAD (0x4000) /* section will be padded with no-op instructions wherever padding is necessary and there is a
+
+ word of contiguous bytes
+ beginning on a word boundary. */
+
+#define STYP_LIT 0x8020 /* Literal data (like STYP_TEXT) */
+
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+
+struct internal_lineno
+{
+ union
+ {
+ long l_symndx; /* function name symbol index, iff l_lnno == 0*/
+ long l_paddr; /* (physical) address of line number */
+ } l_addr;
+ unsigned long l_lnno; /* line number */
+};
+
+/********************** SYMBOLS **********************/
+
+#define SYMNMLEN 8 /* # characters in a symbol name */
+#define FILNMLEN 14 /* # characters in a file name */
+#define DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct internal_syment
+{
+ union
+ {
+ char _n_name[SYMNMLEN]; /* old COFF version */
+ struct
+ {
+ long _n_zeroes; /* new == 0 */
+ long _n_offset; /* offset into string table */
+ } _n_n;
+ char *_n_nptr[2]; /* allows for overlaying */
+ } _n;
+ long n_value; /* value of symbol */
+ short n_scnum; /* section number */
+ unsigned short n_flags; /* copy of flags from filhdr */
+ unsigned short n_type; /* type and derived type */
+ unsigned char n_sclass; /* storage class */
+ unsigned char n_numaux; /* number of aux. entries */
+};
+
+#define n_name _n._n_name
+#define n_zeroes _n._n_n._n_zeroes
+#define n_offset _n._n_n._n_offset
+
+
+/* Relocatable symbols have number of the section in which they are defined,
+ or one of the following: */
+
+#define N_UNDEF ((short)0) /* undefined symbol */
+#define N_ABS ((short)-1) /* value of symbol is absolute */
+#define N_DEBUG ((short)-2) /* debugging symbol -- value is meaningless */
+#define N_TV ((short)-3) /* indicates symbol needs preload transfer vector */
+#define P_TV ((short)-4) /* indicates symbol needs postload transfer vector*/
+
+/*
+ * Type of a symbol, in low N bits of the word
+ */
+#define T_NULL 0
+#define T_VOID 1 /* function argument (only used by compiler) */
+#define T_CHAR 2 /* character */
+#define T_SHORT 3 /* short integer */
+#define T_INT 4 /* integer */
+#define T_LONG 5 /* long integer */
+#define T_FLOAT 6 /* floating point */
+#define T_DOUBLE 7 /* double word */
+#define T_STRUCT 8 /* structure */
+#define T_UNION 9 /* union */
+#define T_ENUM 10 /* enumeration */
+#define T_MOE 11 /* member of enumeration*/
+#define T_UCHAR 12 /* unsigned character */
+#define T_USHORT 13 /* unsigned short */
+#define T_UINT 14 /* unsigned integer */
+#define T_ULONG 15 /* unsigned long */
+#define T_LNGDBL 16 /* long double */
+
+/*
+ * derived types, in n_type
+*/
+#define DT_NON (0) /* no derived type */
+#define DT_PTR (1) /* pointer */
+#define DT_FCN (2) /* function */
+#define DT_ARY (3) /* array */
+
+#define BTYPE(x) ((x) & N_BTMASK)
+
+#define ISPTR(x) \
+ (((unsigned long) (x) & N_TMASK) == ((unsigned long) DT_PTR << N_BTSHFT))
+#define ISFCN(x) \
+ (((unsigned long) (x) & N_TMASK) == ((unsigned long) DT_FCN << N_BTSHFT))
+#define ISARY(x) \
+ (((unsigned long) (x) & N_TMASK) == ((unsigned long) DT_ARY << N_BTSHFT))
+#define ISTAG(x) \
+ ((x) == C_STRTAG || (x) == C_UNTAG || (x) == C_ENTAG)
+#define DECREF(x) \
+ ((((x) >> N_TSHIFT) & ~ N_BTMASK) | ((x) & N_BTMASK))
+
+union internal_auxent
+{
+ struct
+ {
+
+ union
+ {
+ long l; /* str, un, or enum tag indx */
+ struct coff_ptr_struct *p;
+ } x_tagndx;
+
+ union
+ {
+ struct
+ {
+ unsigned short x_lnno; /* declaration line number */
+ unsigned short x_size; /* str/union/array size */
+ } x_lnsz;
+ long x_fsize; /* size of function */
+ } x_misc;
+
+ union
+ {
+ struct
+ { /* if ISFCN, tag, or .bb */
+ long x_lnnoptr; /* ptr to fcn line # */
+ union
+ { /* entry ndx past block end */
+ long l;
+ struct coff_ptr_struct *p;
+ } x_endndx;
+ } x_fcn;
+
+ struct
+ { /* if ISARY, up to 4 dimen. */
+ unsigned short x_dimen[DIMNUM];
+ } x_ary;
+ } x_fcnary;
+
+ unsigned short x_tvndx; /* tv index */
+ } x_sym;
+
+ union
+ {
+ char x_fname[FILNMLEN];
+ struct
+ {
+ long x_zeroes;
+ long x_offset;
+ } x_n;
+ } x_file;
+
+ struct
+ {
+ long x_scnlen; /* section length */
+ unsigned short x_nreloc; /* # relocation entries */
+ unsigned short x_nlinno; /* # line numbers */
+ unsigned long x_checksum; /* section COMDAT checksum for PE */
+ unsigned short x_associated; /* COMDAT associated section index for PE */
+ unsigned char x_comdat; /* COMDAT selection number for PE */
+ } x_scn;
+
+ struct
+ {
+ long x_tvfill; /* tv fill value */
+ unsigned short x_tvlen; /* length of .tv */
+ unsigned short x_tvran[2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+ /******************************************
+ * RS/6000-specific auxent - last auxent for every external symbol
+ ******************************************/
+ struct
+ {
+ union
+ { /* csect length or enclosing csect */
+ long l;
+ struct coff_ptr_struct *p;
+ } x_scnlen;
+ long x_parmhash; /* parm type hash index */
+ unsigned short x_snhash; /* sect num with parm hash */
+ unsigned char x_smtyp; /* symbol align and type */
+ /* 0-4 - Log 2 of alignment */
+ /* 5-7 - symbol type */
+ unsigned char x_smclas; /* storage mapping class */
+ long x_stab; /* dbx stab info index */
+ unsigned short x_snstab; /* sect num with dbx stab */
+ } x_csect; /* csect definition information */
+
+/* x_smtyp values: */
+
+#define SMTYP_ALIGN(x) ((x) >> 3) /* log2 of alignment */
+#define SMTYP_SMTYP(x) ((x) & 0x7) /* symbol type */
+/* Symbol type values: */
+#define XTY_ER 0 /* External reference */
+#define XTY_SD 1 /* Csect definition */
+#define XTY_LD 2 /* Label definition */
+#define XTY_CM 3 /* .BSS */
+#define XTY_EM 4 /* Error message */
+#define XTY_US 5 /* "Reserved for internal use" */
+
+/* x_smclas values: */
+
+#define XMC_PR 0 /* Read-only program code */
+#define XMC_RO 1 /* Read-only constant */
+#define XMC_DB 2 /* Read-only debug dictionary table */
+#define XMC_TC 3 /* Read-write general TOC entry */
+#define XMC_UA 4 /* Read-write unclassified */
+#define XMC_RW 5 /* Read-write data */
+#define XMC_GL 6 /* Read-only global linkage */
+#define XMC_XO 7 /* Read-only extended operation */
+#define XMC_SV 8 /* Read-only supervisor call */
+#define XMC_BS 9 /* Read-write BSS */
+#define XMC_DS 10 /* Read-write descriptor csect */
+#define XMC_UC 11 /* Read-write unnamed Fortran common */
+#define XMC_TI 12 /* Read-only traceback index csect */
+#define XMC_TB 13 /* Read-only traceback table csect */
+/* 14 ??? */
+#define XMC_TC0 15 /* Read-write TOC anchor */
+#define XMC_TD 16 /* Read-write data in TOC */
+
+ /******************************************
+ * I960-specific *2nd* aux. entry formats
+ ******************************************/
+ struct
+ {
+ /* This is a very old typo that keeps getting propagated. */
+#define x_stdindx x_stindx
+ long x_stindx; /* sys. table entry */
+ } x_sc; /* system call entry */
+
+ struct
+ {
+ unsigned long x_balntry; /* BAL entry point */
+ } x_bal; /* BAL-callable function */
+
+ struct
+ {
+ unsigned long x_timestamp; /* time stamp */
+ char x_idstring[20]; /* producer identity string */
+ } x_ident; /* Producer ident info */
+
+};
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct internal_reloc
+{
+ bfd_vma r_vaddr; /* Virtual address of reference */
+ long r_symndx; /* Index into symbol table */
+ unsigned short r_type; /* Relocation type */
+ unsigned char r_size; /* Used by RS/6000 and ECOFF */
+ unsigned char r_extern; /* Used by ECOFF */
+ unsigned long r_offset; /* Used by Alpha ECOFF, SPARC, others */
+};
+
+#define R_RELBYTE 017
+#define R_RELWORD 020
+#define R_PCRBYTE 022
+#define R_PCRWORD 023
+#define R_PCRLONG 024
+
+#define R_DIR16 01
+#define R_DIR32 06
+#define R_PCLONG 020
+#define R_RELBYTE 017
+#define R_RELWORD 020
+#define R_IMAGEBASE 07
+
+
+#define R_PCR16L 128
+#define R_PCR26L 129
+#define R_VRT16 130
+#define R_HVRT16 131
+#define R_LVRT16 132
+#define R_VRT32 133
+#define R_RELLONG (0x11) /* Direct 32-bit relocation */
+#define R_IPRSHORT (0x18)
+#define R_IPRLONG (0x1a)
+#define R_GETSEG (0x1d)
+#define R_GETPA (0x1e)
+#define R_TAGWORD (0x1f)
+#define R_JUMPTARG 0x20 /* strange 29k 00xx00xx reloc */
+
+
+/* This reloc identifies mov.b instructions with a 16bit absolute
+ address. The linker tries to turn insns with this reloc into
+ an absolute 8-bit address. */
+#define R_MOV16B1 0x41
+
+/* This reloc identifies mov.b instructions which had a 16bit
+ absolute address which have been shortened into a 8-bit
+ absolute address. */
+#define R_MOV16B2 0x42
+
+/* This reloc identifies jmp insns with a 16bit target address;
+ the linker tries to turn these insns into bra insns with
+ an 8bit pc-relative target. */
+#define R_JMP1 0x43
+
+/* This reloc identifies a bra with an 8-bit pc-relative
+ target that was formerlly a jmp insn with a 16bit target. */
+#define R_JMP2 0x44
+
+/* ??? */
+#define R_RELLONG_NEG 0x45
+
+/* This reloc identifies jmp insns with a 24bit target address;
+ the linker tries to turn these insns into bra insns with
+ an 8bit pc-relative target. */
+#define R_JMPL1 0x46
+
+/* This reloc identifies a bra with an 8-bit pc-relative
+ target that was formerlly a jmp insn with a 24bit target. */
+#define R_JMPL2 0x47
+
+/* This reloc identifies mov.b instructions with a 24bit absolute
+ address. The linker tries to turn insns with this reloc into
+ an absolute 8-bit address. */
+
+#define R_MOV24B1 0x48
+
+/* This reloc identifies mov.b instructions which had a 24bit
+ absolute address which have been shortened into a 8-bit
+ absolute address. */
+#define R_MOV24B2 0x49
+
+/* An h8300 memory indirect jump/call. Forces the address of the jump/call
+ target into the function vector (in page zero), and the address of the
+ vector entry to be placed in the jump/call instruction. */
+#define R_MEM_INDIRECT 0x4a
+
+/* This reloc identifies a 16bit pc-relative branch target which was
+ shortened into an 8bit pc-relative branch target. */
+#define R_PCRWORD_B 0x4b
+
+/* This reloc identifies mov.[wl] instructions with a 32/24 bit
+ absolute address; the linker may turn this into a mov.[wl]
+ insn with a 16bit absolute address. */
+#define R_MOVL1 0x4c
+
+/* This reloc identifies mov.[wl] insns which formerlly had
+ a 32/24bit absolute address and how have a 16bit absolute address. */
+#define R_MOVL2 0x4d
+
+/* This reloc identifies a bCC:8 which will have it's condition
+ inverted and its target redirected to the target of the branch
+ in the following insn. */
+#define R_BCC_INV 0x4e
+
+/* This reloc identifies a jmp instruction that has been deleted. */
+#define R_JMP_DEL 0x4f
+
+/* Z8k modes */
+#define R_IMM16 0x01 /* 16 bit abs */
+#define R_JR 0x02 /* jr 8 bit disp */
+#define R_IMM4L 0x23 /* low nibble */
+#define R_IMM8 0x22 /* 8 bit abs */
+#define R_IMM32 R_RELLONG /* 32 bit abs */
+#define R_CALL R_DA /* Absolute address which could be a callr */
+#define R_JP R_DA /* Absolute address which could be a jp */
+#define R_REL16 0x04 /* 16 bit PC rel */
+#define R_CALLR 0x05 /* callr 12 bit disp */
+#define R_SEG 0x10 /* set if in segmented mode */
+#define R_IMM4H 0x24 /* high nibble */
+#define R_DISP7 0x25 /* djnz displacement */
+
+/* H8500 modes */
+
+#define R_H8500_IMM8 1 /* 8 bit immediate */
+#define R_H8500_IMM16 2 /* 16 bit immediate */
+#define R_H8500_PCREL8 3 /* 8 bit pcrel */
+#define R_H8500_PCREL16 4 /* 16 bit pcrel */
+#define R_H8500_HIGH8 5 /* high 8 bits of 24 bit address */
+#define R_H8500_LOW16 7 /* low 16 bits of 24 bit immediate */
+#define R_H8500_IMM24 6 /* 24 bit immediate */
+#define R_H8500_IMM32 8 /* 32 bit immediate */
+#define R_H8500_HIGH16 9 /* high 16 bits of 32 bit immediate */
+
+/* W65 modes */
+
+#define R_W65_ABS8 1 /* addr & 0xff */
+#define R_W65_ABS16 2 /* addr & 0xffff */
+#define R_W65_ABS24 3 /* addr & 0xffffff */
+
+#define R_W65_ABS8S8 4 /* (addr >> 8) & 0xff */
+#define R_W65_ABS8S16 5 /* (addr >> 16) & 0xff */
+
+#define R_W65_ABS16S8 6 /* (addr >> 8) & 0ffff */
+#define R_W65_ABS16S16 7 /* (addr >> 16) & 0ffff */
+
+#define R_W65_PCR8 8
+#define R_W65_PCR16 9
+
+#define R_W65_DP 10 /* direct page 8 bits only */
+
+#endif /* GNU_COFF_INTERNAL_H */
diff --git a/include/coff/m68k.h b/include/coff/m68k.h
new file mode 100644
index 0000000..c9147ed
--- /dev/null
+++ b/include/coff/m68k.h
@@ -0,0 +1,225 @@
+/*** coff information for M68K */
+
+#ifndef GNU_COFF_M68K_H
+#define GNU_COFF_M68K_H 1
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+/* Motorola 68000/68008/68010/68020 */
+#define MC68MAGIC 0520
+#define MC68KWRMAGIC 0520 /* writeable text segments */
+#define MC68TVMAGIC 0521
+#define MC68KROMAGIC 0521 /* readonly shareable text segments */
+#define MC68KPGMAGIC 0522 /* demand paged text segments */
+#define M68MAGIC 0210
+#define M68TVMAGIC 0211
+
+/* this is the magic of the Bull dpx/2 */
+#define MC68KBCSMAGIC 0526
+
+/* This is Lynx's all-platform magic number for executables. */
+
+#define LYNXCOFFMAGIC 0415
+
+#define OMAGIC M68MAGIC
+
+/* This intentionally does not include MC68KBCSMAGIC; it only includes
+ magic numbers which imply that names do not have underscores. */
+#define M68KBADMAG(x) (((x).f_magic!=MC68MAGIC) && ((x).f_magic!=MC68KWRMAGIC) && ((x).f_magic!=MC68TVMAGIC) && \
+ ((x).f_magic!=MC68KROMAGIC) && ((x).f_magic!=MC68KPGMAGIC) && ((x).f_magic!=M68MAGIC) && ((x).f_magic!=M68TVMAGIC) && ((x).f_magic!=LYNXCOFFMAGIC) )
+
+/* Magic numbers for the a.out header. */
+
+#define PAGEMAGICEXECSWAPPED 0407 /* executable (swapped) */
+#define PAGEMAGICPEXECSWAPPED 0410 /* pure executable (swapped) */
+#define PAGEMAGICPEXECTSHLIB 0443 /* pure executable (target shared library) */
+#define PAGEMAGICPEXECPAGED 0413 /* pure executable (paged) */
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _COMMENT ".comment"
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+#ifdef M68K_COFF_OFFSET
+ char r_offset[4];
+#endif
+
+};
+
+
+#define RELOC struct external_reloc
+
+#ifdef M68K_COFF_OFFSET
+#define RELSZ 14
+#else
+#define RELSZ 10
+#endif
+
+#endif /* GNU_COFF_M68K_H */
diff --git a/include/coff/m88k.h b/include/coff/m88k.h
new file mode 100644
index 0000000..e06eb41
--- /dev/null
+++ b/include/coff/m88k.h
@@ -0,0 +1,219 @@
+/*** coff information for 88k bcs */
+
+/********************** FILE HEADER **********************/
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+#define MC88MAGIC 0540 /* 88k BCS executable */
+#define MC88DMAGIC 0541 /* DG/UX executable */
+#define MC88OMAGIC 0555 /* Object file */
+
+#define MC88BADMAG(x) (((x).f_magic!=MC88MAGIC) &&((x).f_magic!=MC88DMAGIC) && ((x).f_magic != MC88OMAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+#define PAGEMAGIC3 0414 /* Split i&d, zero mapped */
+#define PAGEMAGICBCS 0413
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+/* compute size of a header */
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr
+{
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[4]; /* number of relocation entries */
+ char s_nlnno[4]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 44
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _COMMENT ".comment"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno{
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+
+ char l_lnno[4];
+
+};
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+ char pad2[2];
+};
+
+
+
+
+#define N_BTMASK 017
+#define N_TMASK 060
+#define N_BTSHFT 4
+#define N_TSHIFT 2
+
+
+/* Note that this isn't the same shape as other coffs */
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ /* 4 */
+ union {
+ char x_fsize[4]; /* size of function */
+ struct {
+ char x_lnno[4]; /* declaration line number */
+ char x_size[4]; /* str/union/array size */
+ } x_lnsz;
+ } x_misc;
+
+ /* 12 */
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ /* 20 */
+
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[4]; /* # relocation entries */
+ char x_nlinno[4]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+};
+
+#define GET_FCN_LNNOPTR(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *)ext->x_sym.x_fcnary.x_fcn.x_lnnoptr)
+#define GET_FCN_ENDNDX(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) ext->x_sym.x_fcnary.x_fcn.x_endndx)
+#define PUT_FCN_LNNOPTR(abfd, in, ext) bfd_h_put_32(abfd, in, (bfd_byte *) ext->x_sym.x_fcnary.x_fcn.x_lnnoptr)
+#define PUT_FCN_ENDNDX(abfd, in, ext) bfd_h_put_32(abfd, in, (bfd_byte *) ext->x_sym.x_fcnary.x_fcn.x_endndx)
+#define GET_LNSZ_SIZE(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) ext->x_sym.x_misc.x_lnsz.x_size)
+#define GET_LNSZ_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) ext->x_sym.x_misc.x_lnsz.x_lnno)
+#define PUT_LNSZ_LNNO(abfd, in, ext) bfd_h_put_32(abfd, in, (bfd_byte *) ext->x_sym.x_misc.x_lnsz.x_lnno)
+#define PUT_LNSZ_SIZE(abfd, in, ext) bfd_h_put_32(abfd, in, (bfd_byte *) ext->x_sym.x_misc.x_lnsz.x_size)
+#define GET_SCN_SCNLEN(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) ext->x_scn.x_scnlen)
+#define GET_SCN_NRELOC(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) ext->x_scn.x_nreloc)
+#define GET_SCN_NLINNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) ext->x_scn.x_nlinno)
+#define PUT_SCN_SCNLEN(abfd,in, ext) bfd_h_put_32(abfd, in, (bfd_byte *) ext->x_scn.x_scnlen)
+#define PUT_SCN_NRELOC(abfd,in, ext) bfd_h_put_32(abfd, in, (bfd_byte *)ext->x_scn.x_nreloc)
+#define PUT_SCN_NLINNO(abfd,in, ext) bfd_h_put_32(abfd,in, (bfd_byte *) ext->x_scn.x_nlinno)
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) (ext->l_lnno))
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+
+
+#define SYMENT struct external_syment
+#define SYMESZ 20
+#define AUXENT union external_auxent
+#define AUXESZ 20
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+ char r_offset[2];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 12
+
+#define NO_TVNDX
diff --git a/include/coff/mcore.h b/include/coff/mcore.h
new file mode 100644
index 0000000..974b62e
--- /dev/null
+++ b/include/coff/mcore.h
@@ -0,0 +1,245 @@
+/* Motorolla MCore support for BFD.
+ Copyright (C) 1999 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the MCore COFF/PE ABI. */
+
+#ifndef _COFF_MORE_H
+#define _COFF_MORE_H
+
+
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+#define IMAGE_REL_MCORE_ABSOLUTE 0x0000
+#define IMAGE_REL_MCORE_ADDR32 0x0001
+#define IMAGE_REL_MCORE_PCREL_IMM8BY4 0x0002
+#define IMAGE_REL_MCORE_PCREL_IMM11BY2 0x0003
+#define IMAGE_REL_MCORE_PCREL_IMM4BY2 0x0004
+#define IMAGE_REL_MCORE_PCREL_32 0x0005
+#define IMAGE_REL_MCORE_PCREL_JSR_IMM11BY2 0x0006
+
+#define PEMCORE
+
+typedef struct
+{
+ char magic [2]; /* type of file */
+ char vstamp [2]; /* version stamp */
+ char tsize [4]; /* text size in bytes, padded to FW bdry*/
+ char dsize [4]; /* initialized data " " */
+ char bsize [4]; /* uninitialized data " " */
+ char entry [4]; /* entry pt. */
+ char text_start [4]; /* base of text used for this file */
+ char data_start [4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+#define OMAGIC 0404 /* object files, eg as output */
+#define ZMAGIC 0413 /* demand load format, eg normal ld output */
+#define STMAGIC 0401 /* target shlib */
+#define SHMAGIC 0443 /* host shlib */
+
+/* From winnt.h */
+#define IMAGE_NT_OPTIONAL_HDR_MAGIC 0x10b
+
+
+/* Define some NT default values. */
+#define NT_SECTION_ALIGNMENT 0x1000
+#define NT_FILE_ALIGNMENT 0x200
+#define NT_DEF_RESERVE 0x100000
+#define NT_DEF_COMMIT 0x1000
+
+
+struct external_reloc
+{
+ char r_vaddr [4];
+ char r_symndx [4];
+ char r_type [2];
+ char r_offset [4];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 14
+
+#define MCOREMAGIC 0xb00 /* I just made this up */
+
+#define MCOREBADMAG(x) (((x).f_magic!= MCOREMAGIC))
+
+struct external_filehdr
+{
+ char f_magic [2]; /* magic number */
+ char f_nscns [2]; /* number of sections */
+ char f_timdat [4]; /* time & date stamp */
+ char f_symptr [4]; /* file pointer to symtab */
+ char f_nsyms [4]; /* number of symtab entries */
+ char f_opthdr [2]; /* sizeof(optional hdr) */
+ char f_flags [2]; /* flags */
+};
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union
+ {
+ char e_name [E_SYMNMLEN];
+ struct
+ {
+ char e_zeroes [4];
+ char e_offset [4];
+ } e;
+ } e;
+
+ char e_value [4];
+ char e_scnum [2];
+ char e_type [2];
+ char e_sclass [1];
+ char e_numaux [1];
+};
+
+#define N_BTMASK 0xf
+#define N_TMASK 0x30
+#define N_BTSHFT 4
+#define N_TSHIFT 2
+
+union external_auxent
+{
+ struct
+ {
+ char x_tagndx [4]; /* str, un, or enum tag indx */
+
+ union
+ {
+ struct
+ {
+ char x_lnno [2]; /* declaration line number */
+ char x_size [2]; /* str/union/array size */
+ } x_lnsz;
+
+ char x_fsize [4]; /* size of function */
+
+ } x_misc;
+
+ union
+ {
+ struct /* if ISFCN, tag, or .bb */
+ {
+ char x_lnnoptr [4]; /* ptr to fcn line # */
+ char x_endndx [4]; /* entry ndx past block end */
+ } x_fcn;
+
+ struct /* if ISARY, up to 4 dimen. */
+ {
+ char x_dimen [E_DIMNUM][2];
+ } x_ary;
+
+ } x_fcnary;
+
+ char x_tvndx [2]; /* tv index */
+
+ } x_sym;
+
+ union
+ {
+ char x_fname [E_FILNMLEN];
+
+ struct
+ {
+ char x_zeroes [4];
+ char x_offset [4];
+ } x_n;
+
+ } x_file;
+
+ struct
+ {
+ char x_scnlen [4]; /* section length */
+ char x_nreloc [2]; /* # relocation entries */
+ char x_nlinno [2]; /* # line numbers */
+ char x_checksum [4]; /* section COMDAT checksum */
+ char x_associated [2]; /* COMDAT associated section index */
+ char x_comdat [1]; /* COMDAT selection number */
+ } x_scn;
+
+ struct
+ {
+ char x_tvfill [4]; /* tv fill value */
+ char x_tvlen [2]; /* length of .tv */
+ char x_tvran [2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ Line numbers are grouped on a per function basis; first entry in a function
+ grouping will have l_lnno = 0 and in place of physical address will be the
+ symbol table index of the function name. */
+struct external_lineno
+{
+ union
+ {
+ char l_symndx [4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr [4]; /* (physical) address of line number */
+ } l_addr;
+
+ char l_lnno [2]; /* line number */
+};
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32 (abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32 (abfd, val, (bfd_byte *) (ext->l_lnno));
+
+struct external_scnhdr
+{
+ char s_name [8]; /* section name */
+ char s_paddr [4]; /* physical address, aliased s_nlib */
+ char s_vaddr [4]; /* virtual address */
+ char s_size [4]; /* section size */
+ char s_scnptr [4]; /* file ptr to raw data for section */
+ char s_relptr [4]; /* file ptr to relocation */
+ char s_lnnoptr [4]; /* file ptr to line numbers */
+ char s_nreloc [2]; /* number of relocation entries */
+ char s_nlnno [2]; /* number of line number entries*/
+ char s_flags [4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/* Names of "special" sections. */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+
+
+#endif /* __COFF_MCORE_H */
diff --git a/include/coff/mips.h b/include/coff/mips.h
new file mode 100644
index 0000000..d4665b1
--- /dev/null
+++ b/include/coff/mips.h
@@ -0,0 +1,369 @@
+/* ECOFF support on MIPS machines.
+ coff/ecoff.h must be included before this file. */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ unsigned char f_magic[2]; /* magic number */
+ unsigned char f_nscns[2]; /* number of sections */
+ unsigned char f_timdat[4]; /* time & date stamp */
+ unsigned char f_symptr[4]; /* file pointer to symtab */
+ unsigned char f_nsyms[4]; /* number of symtab entries */
+ unsigned char f_opthdr[2]; /* sizeof(optional hdr) */
+ unsigned char f_flags[2]; /* flags */
+};
+
+/* Magic numbers are defined in coff/ecoff.h. */
+#define MIPS_ECOFF_BADMAG(x) (((x).f_magic!=MIPS_MAGIC_1) && \
+ ((x).f_magic!=MIPS_MAGIC_LITTLE) &&\
+ ((x).f_magic!=MIPS_MAGIC_BIG) && \
+ ((x).f_magic!=MIPS_MAGIC_LITTLE2) && \
+ ((x).f_magic!=MIPS_MAGIC_BIG2) && \
+ ((x).f_magic!=MIPS_MAGIC_LITTLE3) && \
+ ((x).f_magic!=MIPS_MAGIC_BIG3))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct external_aouthdr
+{
+ unsigned char magic[2]; /* type of file */
+ unsigned char vstamp[2]; /* version stamp */
+ unsigned char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ unsigned char dsize[4]; /* initialized data " " */
+ unsigned char bsize[4]; /* uninitialized data " " */
+ unsigned char entry[4]; /* entry pt. */
+ unsigned char text_start[4]; /* base of text used for this file */
+ unsigned char data_start[4]; /* base of data used for this file */
+ unsigned char bss_start[4]; /* base of bss used for this file */
+ unsigned char gprmask[4]; /* ?? */
+ unsigned char cprmask[4][4]; /* ?? */
+ unsigned char gp_value[4]; /* value for gp register */
+} AOUTHDR;
+
+/* compute size of a header */
+
+#define AOUTSZ 56
+#define AOUTHDRSZ 56
+
+/********************** SECTION HEADER **********************/
+
+struct external_scnhdr {
+ unsigned char s_name[8]; /* section name */
+ unsigned char s_paddr[4]; /* physical address, aliased s_nlib */
+ unsigned char s_vaddr[4]; /* virtual address */
+ unsigned char s_size[4]; /* section size */
+ unsigned char s_scnptr[4]; /* file ptr to raw data for section */
+ unsigned char s_relptr[4]; /* file ptr to relocation */
+ unsigned char s_lnnoptr[4]; /* file ptr to line numbers */
+ unsigned char s_nreloc[2]; /* number of relocation entries */
+ unsigned char s_nlnno[2]; /* number of line number entries*/
+ unsigned char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct external_reloc {
+ unsigned char r_vaddr[4];
+ unsigned char r_bits[4];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 8
+
+/* MIPS ECOFF uses a packed 8 byte format for relocs. These constants
+ are used to unpack the r_bits field. */
+
+#define RELOC_BITS0_SYMNDX_SH_LEFT_BIG 16
+#define RELOC_BITS0_SYMNDX_SH_LEFT_LITTLE 0
+
+#define RELOC_BITS1_SYMNDX_SH_LEFT_BIG 8
+#define RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE 8
+
+#define RELOC_BITS2_SYMNDX_SH_LEFT_BIG 0
+#define RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE 16
+
+/* Originally, ECOFF used four bits for the reloc type and had three
+ reserved bits. Irix 4 added another bit for the reloc type, which
+ was easy because it was big endian and one of the spare bits became
+ the new most significant bit. To make this also work for little
+ endian ECOFF, we need to wrap one of the reserved bits around to
+ become the most significant bit of the reloc type. */
+#define RELOC_BITS3_TYPE_BIG 0x3E
+#define RELOC_BITS3_TYPE_SH_BIG 1
+#define RELOC_BITS3_TYPE_LITTLE 0x78
+#define RELOC_BITS3_TYPE_SH_LITTLE 3
+#define RELOC_BITS3_TYPEHI_LITTLE 0x04
+#define RELOC_BITS3_TYPEHI_SH_LITTLE 2
+
+#define RELOC_BITS3_EXTERN_BIG 0x01
+#define RELOC_BITS3_EXTERN_LITTLE 0x80
+
+/* The r_type field in a reloc is one of the following values. I
+ don't know if any other values can appear. These seem to be all
+ that occur in the Ultrix 4.2 libraries. */
+#define MIPS_R_IGNORE 0
+#define MIPS_R_REFHALF 1
+#define MIPS_R_REFWORD 2
+#define MIPS_R_JMPADDR 3
+#define MIPS_R_REFHI 4
+#define MIPS_R_REFLO 5
+#define MIPS_R_GPREL 6
+#define MIPS_R_LITERAL 7
+
+/* These reloc types are a Cygnus extension used when generating
+ position independent code for embedded systems. The numbers are
+ taken from Irix 4, but at least for internal relocs Irix 5 does not
+ give them the same meaning. For an internal reloc the symbol index
+ of RELHI and RELLO is modified as described below for
+ MIPS_R_SWITCH. */
+#define MIPS_R_PCREL16 12
+#define MIPS_R_RELHI 13
+#define MIPS_R_RELLO 14
+
+/* This reloc type is a Cygnus extension used when generating position
+ independent code for embedded systems. It is used for an entry in
+ a switch table, which looks like this:
+ .word $L3-$LS12
+ The object file will contain the correct difference, and does not
+ require adjustment. However, when the linker is relaxing PC
+ relative calls, it is possible for $L3 to move farther away. This
+ reloc always appears in the .text section, and is always against
+ the .text section. However, the symbol index is not
+ RELOC_SECTION_TEXT. It is, instead, the distance between this
+ switch table entry and $LS12. Thus, the original value of $L12 is
+ vaddr - symndx
+ and the original value of $L3 is
+ vaddr - symndx + addend
+ where addend is the value in the object file. Knowing this, the
+ linker can know whether the addend in the object file must be
+ adjusted. */
+#define MIPS_R_SWITCH 22
+
+/********************** STABS **********************/
+
+#define MIPS_IS_STAB ECOFF_IS_STAB
+#define MIPS_MARK_STAB ECOFF_MARK_STAB
+#define MIPS_UNMARK_STAB ECOFF_UNMARK_STAB
+
+/********************** SYMBOLIC INFORMATION **********************/
+
+/* Written by John Gilmore. */
+
+/* ECOFF uses COFF-like section structures, but its own symbol format.
+ This file defines the symbol format in fields whose size and alignment
+ will not vary on different host systems. */
+
+/* File header as a set of bytes */
+
+struct hdr_ext {
+ unsigned char h_magic[2];
+ unsigned char h_vstamp[2];
+ unsigned char h_ilineMax[4];
+ unsigned char h_cbLine[4];
+ unsigned char h_cbLineOffset[4];
+ unsigned char h_idnMax[4];
+ unsigned char h_cbDnOffset[4];
+ unsigned char h_ipdMax[4];
+ unsigned char h_cbPdOffset[4];
+ unsigned char h_isymMax[4];
+ unsigned char h_cbSymOffset[4];
+ unsigned char h_ioptMax[4];
+ unsigned char h_cbOptOffset[4];
+ unsigned char h_iauxMax[4];
+ unsigned char h_cbAuxOffset[4];
+ unsigned char h_issMax[4];
+ unsigned char h_cbSsOffset[4];
+ unsigned char h_issExtMax[4];
+ unsigned char h_cbSsExtOffset[4];
+ unsigned char h_ifdMax[4];
+ unsigned char h_cbFdOffset[4];
+ unsigned char h_crfd[4];
+ unsigned char h_cbRfdOffset[4];
+ unsigned char h_iextMax[4];
+ unsigned char h_cbExtOffset[4];
+};
+
+/* File descriptor external record */
+
+struct fdr_ext {
+ unsigned char f_adr[4];
+ unsigned char f_rss[4];
+ unsigned char f_issBase[4];
+ unsigned char f_cbSs[4];
+ unsigned char f_isymBase[4];
+ unsigned char f_csym[4];
+ unsigned char f_ilineBase[4];
+ unsigned char f_cline[4];
+ unsigned char f_ioptBase[4];
+ unsigned char f_copt[4];
+ unsigned char f_ipdFirst[2];
+ unsigned char f_cpd[2];
+ unsigned char f_iauxBase[4];
+ unsigned char f_caux[4];
+ unsigned char f_rfdBase[4];
+ unsigned char f_crfd[4];
+ unsigned char f_bits1[1];
+ unsigned char f_bits2[3];
+ unsigned char f_cbLineOffset[4];
+ unsigned char f_cbLine[4];
+};
+
+#define FDR_BITS1_LANG_BIG 0xF8
+#define FDR_BITS1_LANG_SH_BIG 3
+#define FDR_BITS1_LANG_LITTLE 0x1F
+#define FDR_BITS1_LANG_SH_LITTLE 0
+
+#define FDR_BITS1_FMERGE_BIG 0x04
+#define FDR_BITS1_FMERGE_LITTLE 0x20
+
+#define FDR_BITS1_FREADIN_BIG 0x02
+#define FDR_BITS1_FREADIN_LITTLE 0x40
+
+#define FDR_BITS1_FBIGENDIAN_BIG 0x01
+#define FDR_BITS1_FBIGENDIAN_LITTLE 0x80
+
+#define FDR_BITS2_GLEVEL_BIG 0xC0
+#define FDR_BITS2_GLEVEL_SH_BIG 6
+#define FDR_BITS2_GLEVEL_LITTLE 0x03
+#define FDR_BITS2_GLEVEL_SH_LITTLE 0
+
+/* We ignore the `reserved' field in bits2. */
+
+/* Procedure descriptor external record */
+
+struct pdr_ext {
+ unsigned char p_adr[4];
+ unsigned char p_isym[4];
+ unsigned char p_iline[4];
+ unsigned char p_regmask[4];
+ unsigned char p_regoffset[4];
+ unsigned char p_iopt[4];
+ unsigned char p_fregmask[4];
+ unsigned char p_fregoffset[4];
+ unsigned char p_frameoffset[4];
+ unsigned char p_framereg[2];
+ unsigned char p_pcreg[2];
+ unsigned char p_lnLow[4];
+ unsigned char p_lnHigh[4];
+ unsigned char p_cbLineOffset[4];
+};
+
+/* Runtime procedure table */
+
+struct rpdr_ext {
+ unsigned char p_adr[4];
+ unsigned char p_regmask[4];
+ unsigned char p_regoffset[4];
+ unsigned char p_fregmask[4];
+ unsigned char p_fregoffset[4];
+ unsigned char p_frameoffset[4];
+ unsigned char p_framereg[2];
+ unsigned char p_pcreg[2];
+ unsigned char p_irpss[4];
+ unsigned char p_reserved[4];
+ unsigned char p_exception_info[4];
+};
+
+/* Line numbers */
+
+struct line_ext {
+ unsigned char l_line[4];
+};
+
+/* Symbol external record */
+
+struct sym_ext {
+ unsigned char s_iss[4];
+ unsigned char s_value[4];
+ unsigned char s_bits1[1];
+ unsigned char s_bits2[1];
+ unsigned char s_bits3[1];
+ unsigned char s_bits4[1];
+};
+
+#define SYM_BITS1_ST_BIG 0xFC
+#define SYM_BITS1_ST_SH_BIG 2
+#define SYM_BITS1_ST_LITTLE 0x3F
+#define SYM_BITS1_ST_SH_LITTLE 0
+
+#define SYM_BITS1_SC_BIG 0x03
+#define SYM_BITS1_SC_SH_LEFT_BIG 3
+#define SYM_BITS1_SC_LITTLE 0xC0
+#define SYM_BITS1_SC_SH_LITTLE 6
+
+#define SYM_BITS2_SC_BIG 0xE0
+#define SYM_BITS2_SC_SH_BIG 5
+#define SYM_BITS2_SC_LITTLE 0x07
+#define SYM_BITS2_SC_SH_LEFT_LITTLE 2
+
+#define SYM_BITS2_RESERVED_BIG 0x10
+#define SYM_BITS2_RESERVED_LITTLE 0x08
+
+#define SYM_BITS2_INDEX_BIG 0x0F
+#define SYM_BITS2_INDEX_SH_LEFT_BIG 16
+#define SYM_BITS2_INDEX_LITTLE 0xF0
+#define SYM_BITS2_INDEX_SH_LITTLE 4
+
+#define SYM_BITS3_INDEX_SH_LEFT_BIG 8
+#define SYM_BITS3_INDEX_SH_LEFT_LITTLE 4
+
+#define SYM_BITS4_INDEX_SH_LEFT_BIG 0
+#define SYM_BITS4_INDEX_SH_LEFT_LITTLE 12
+
+/* External symbol external record */
+
+struct ext_ext {
+ unsigned char es_bits1[1];
+ unsigned char es_bits2[1];
+ unsigned char es_ifd[2];
+ struct sym_ext es_asym;
+};
+
+#define EXT_BITS1_JMPTBL_BIG 0x80
+#define EXT_BITS1_JMPTBL_LITTLE 0x01
+
+#define EXT_BITS1_COBOL_MAIN_BIG 0x40
+#define EXT_BITS1_COBOL_MAIN_LITTLE 0x02
+
+#define EXT_BITS1_WEAKEXT_BIG 0x20
+#define EXT_BITS1_WEAKEXT_LITTLE 0x04
+
+/* Dense numbers external record */
+
+struct dnr_ext {
+ unsigned char d_rfd[4];
+ unsigned char d_index[4];
+};
+
+/* Relative file descriptor */
+
+struct rfd_ext {
+ unsigned char rfd[4];
+};
+
+/* Optimizer symbol external record */
+
+struct opt_ext {
+ unsigned char o_bits1[1];
+ unsigned char o_bits2[1];
+ unsigned char o_bits3[1];
+ unsigned char o_bits4[1];
+ struct rndx_ext o_rndx;
+ unsigned char o_offset[4];
+};
+
+#define OPT_BITS2_VALUE_SH_LEFT_BIG 16
+#define OPT_BITS2_VALUE_SH_LEFT_LITTLE 0
+
+#define OPT_BITS3_VALUE_SH_LEFT_BIG 8
+#define OPT_BITS3_VALUE_SH_LEFT_LITTLE 8
+
+#define OPT_BITS4_VALUE_SH_LEFT_BIG 0
+#define OPT_BITS4_VALUE_SH_LEFT_LITTLE 16
diff --git a/include/coff/pe.h b/include/coff/pe.h
new file mode 100644
index 0000000..7e676a5
--- /dev/null
+++ b/include/coff/pe.h
@@ -0,0 +1,169 @@
+/* PE COFF header information */
+
+#ifndef _PE_H
+#define _PE_H
+
+/* NT specific file attributes */
+#define IMAGE_FILE_RELOCS_STRIPPED 0x0001
+#define IMAGE_FILE_EXECUTABLE_IMAGE 0x0002
+#define IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004
+#define IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008
+#define IMAGE_FILE_BYTES_REVERSED_LO 0x0080
+#define IMAGE_FILE_32BIT_MACHINE 0x0100
+#define IMAGE_FILE_DEBUG_STRIPPED 0x0200
+#define IMAGE_FILE_SYSTEM 0x1000
+#define IMAGE_FILE_DLL 0x2000
+#define IMAGE_FILE_BYTES_REVERSED_HI 0x8000
+
+/* additional flags to be set for section headers to allow the NT loader to
+ read and write to the section data (to replace the addresses of data in
+ dlls for one thing); also to execute the section in .text's case */
+#define IMAGE_SCN_MEM_DISCARDABLE 0x02000000
+#define IMAGE_SCN_MEM_EXECUTE 0x20000000
+#define IMAGE_SCN_MEM_READ 0x40000000
+#define IMAGE_SCN_MEM_WRITE 0x80000000
+
+/*
+ * Section characteristics added for ppc-nt
+ */
+
+#define IMAGE_SCN_TYPE_NO_PAD 0x00000008 /* Reserved. */
+
+#define IMAGE_SCN_CNT_CODE 0x00000020 /* Section contains code. */
+#define IMAGE_SCN_CNT_INITIALIZED_DATA 0x00000040 /* Section contains initialized data. */
+#define IMAGE_SCN_CNT_UNINITIALIZED_DATA 0x00000080 /* Section contains uninitialized data. */
+
+#define IMAGE_SCN_LNK_OTHER 0x00000100 /* Reserved. */
+#define IMAGE_SCN_LNK_INFO 0x00000200 /* Section contains comments or some other type of information. */
+#define IMAGE_SCN_LNK_REMOVE 0x00000800 /* Section contents will not become part of image. */
+#define IMAGE_SCN_LNK_COMDAT 0x00001000 /* Section contents comdat. */
+
+#define IMAGE_SCN_MEM_FARDATA 0x00008000
+
+#define IMAGE_SCN_MEM_PURGEABLE 0x00020000
+#define IMAGE_SCN_MEM_16BIT 0x00020000
+#define IMAGE_SCN_MEM_LOCKED 0x00040000
+#define IMAGE_SCN_MEM_PRELOAD 0x00080000
+
+#define IMAGE_SCN_ALIGN_1BYTES 0x00100000
+#define IMAGE_SCN_ALIGN_2BYTES 0x00200000
+#define IMAGE_SCN_ALIGN_4BYTES 0x00300000
+#define IMAGE_SCN_ALIGN_8BYTES 0x00400000
+#define IMAGE_SCN_ALIGN_16BYTES 0x00500000 /* Default alignment if no others are specified. */
+#define IMAGE_SCN_ALIGN_32BYTES 0x00600000
+#define IMAGE_SCN_ALIGN_64BYTES 0x00700000
+
+
+#define IMAGE_SCN_LNK_NRELOC_OVFL 0x01000000 /* Section contains extended relocations. */
+#define IMAGE_SCN_MEM_NOT_CACHED 0x04000000 /* Section is not cachable. */
+#define IMAGE_SCN_MEM_NOT_PAGED 0x08000000 /* Section is not pageable. */
+#define IMAGE_SCN_MEM_SHARED 0x10000000 /* Section is shareable. */
+
+/* COMDAT selection codes. */
+
+#define IMAGE_COMDAT_SELECT_NODUPLICATES (1) /* Warn if duplicates. */
+#define IMAGE_COMDAT_SELECT_ANY (2) /* No warning. */
+#define IMAGE_COMDAT_SELECT_SAME_SIZE (3) /* Warn if different size. */
+#define IMAGE_COMDAT_SELECT_EXACT_MATCH (4) /* Warn if different. */
+#define IMAGE_COMDAT_SELECT_ASSOCIATIVE (5) /* Base on other section. */
+
+/* Magic values that are true for all dos/nt implementations */
+#define DOSMAGIC 0x5a4d
+#define NT_SIGNATURE 0x00004550
+
+ /* NT allows long filenames, we want to accommodate this. This may break
+ some of the bfd functions */
+#undef FILNMLEN
+#define FILNMLEN 18 /* # characters in a file name */
+
+
+#ifdef COFF_IMAGE_WITH_PE
+/* The filehdr is only weired in images */
+
+#undef FILHDR
+struct external_PE_filehdr
+{
+ /* DOS header fields */
+ char e_magic[2]; /* Magic number, 0x5a4d */
+ char e_cblp[2]; /* Bytes on last page of file, 0x90 */
+ char e_cp[2]; /* Pages in file, 0x3 */
+ char e_crlc[2]; /* Relocations, 0x0 */
+ char e_cparhdr[2]; /* Size of header in paragraphs, 0x4 */
+ char e_minalloc[2]; /* Minimum extra paragraphs needed, 0x0 */
+ char e_maxalloc[2]; /* Maximum extra paragraphs needed, 0xFFFF */
+ char e_ss[2]; /* Initial (relative) SS value, 0x0 */
+ char e_sp[2]; /* Initial SP value, 0xb8 */
+ char e_csum[2]; /* Checksum, 0x0 */
+ char e_ip[2]; /* Initial IP value, 0x0 */
+ char e_cs[2]; /* Initial (relative) CS value, 0x0 */
+ char e_lfarlc[2]; /* File address of relocation table, 0x40 */
+ char e_ovno[2]; /* Overlay number, 0x0 */
+ char e_res[4][2]; /* Reserved words, all 0x0 */
+ char e_oemid[2]; /* OEM identifier (for e_oeminfo), 0x0 */
+ char e_oeminfo[2]; /* OEM information; e_oemid specific, 0x0 */
+ char e_res2[10][2]; /* Reserved words, all 0x0 */
+ char e_lfanew[4]; /* File address of new exe header, 0x80 */
+ char dos_message[16][4]; /* other stuff, always follow DOS header */
+ char nt_signature[4]; /* required NT signature, 0x4550 */
+
+ /* From standard header */
+
+
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+
+};
+
+
+#define FILHDR struct external_PE_filehdr
+#undef FILHSZ
+#define FILHSZ 152
+
+#endif
+
+typedef struct
+{
+ AOUTHDR standard;
+
+ /* NT extra fields; see internal.h for descriptions */
+ char ImageBase[4];
+ char SectionAlignment[4];
+ char FileAlignment[4];
+ char MajorOperatingSystemVersion[2];
+ char MinorOperatingSystemVersion[2];
+ char MajorImageVersion[2];
+ char MinorImageVersion[2];
+ char MajorSubsystemVersion[2];
+ char MinorSubsystemVersion[2];
+ char Reserved1[4];
+ char SizeOfImage[4];
+ char SizeOfHeaders[4];
+ char CheckSum[4];
+ char Subsystem[2];
+ char DllCharacteristics[2];
+ char SizeOfStackReserve[4];
+ char SizeOfStackCommit[4];
+ char SizeOfHeapReserve[4];
+ char SizeOfHeapCommit[4];
+ char LoaderFlags[4];
+ char NumberOfRvaAndSizes[4];
+ /* IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES]; */
+ char DataDirectory[16][2][4]; /* 16 entries, 2 elements/entry, 4 chars */
+
+} PEAOUTHDR;
+
+
+#undef AOUTSZ
+#define AOUTSZ (AOUTHDRSZ + 196)
+
+#undef E_FILNMLEN
+#define E_FILNMLEN 18 /* # characters in a file name */
+#endif
+
+
+
diff --git a/include/coff/powerpc.h b/include/coff/powerpc.h
new file mode 100644
index 0000000..9552cf9
--- /dev/null
+++ b/include/coff/powerpc.h
@@ -0,0 +1,199 @@
+/* Basic coff information for the PowerPC
+ *
+ * Based on coff/rs6000.h, coff/i386.h and others.
+ *
+ * Initial release: Kim Knuttila (krk@cygnus.com)
+ */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+/* Bits for f_flags:
+ * F_RELFLG relocation info stripped from file
+ * F_EXEC file is executable (no unresolved external references)
+ * F_LNNO line numbers stripped from file
+ * F_LSYMS local symbols stripped from file
+ * F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax)
+ */
+
+#define F_RELFLG (0x0001)
+#define F_EXEC (0x0002)
+#define F_LNNO (0x0004)
+#define F_LSYMS (0x0008)
+
+/* extra NT defines */
+#define PPCMAGIC 0760 /* peeked on aa PowerPC Windows NT box */
+#define DOSMAGIC 0x5a4d /* from arm.h, i386.h */
+#define NT_SIGNATURE 0x00004550 /* from arm.h, i386.h */
+
+/* from winnt.h */
+#define IMAGE_NT_OPTIONAL_HDR_MAGIC 0x10b
+
+#define PPCBADMAG(x) ((x).f_magic != PPCMAGIC)
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+/********************** SECTION HEADER **********************/
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries */
+ char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _COMMENT ".comment"
+#define _LIB ".lib"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0 */
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+
+/* Allow the file name length to be overridden in the including file */
+#ifndef E_FILNMLEN
+#define E_FILNMLEN 14
+#endif
+
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+
+#define N_BTMASK (0xf)
+#define N_TMASK (0x30)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ char x_checksum[4]; /* section COMDAT checksum */
+ char x_associated[2]; /* COMDAT associated section index */
+ char x_comdat[1]; /* COMDAT selection number */
+ } x_scn;
+};
+
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+#define _ETEXT "etext"
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 10
+
diff --git a/include/coff/rs6000.h b/include/coff/rs6000.h
new file mode 100644
index 0000000..0def1d9
--- /dev/null
+++ b/include/coff/rs6000.h
@@ -0,0 +1,243 @@
+/* IBM RS/6000 "XCOFF" file definitions for BFD.
+ Copyright (C) 1990, 1991 Free Software Foundation, Inc.
+ FIXME: Can someone provide a transliteration of this name into ASCII?
+ Using the following chars caused a compiler warning on HIUX (so I replaced
+ them with octal escapes), and isn't useful without an understanding of what
+ character set it is.
+ Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM
+ and John Gilmore of Cygnus Support. */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+ /* IBM RS/6000 */
+#define U802WRMAGIC 0730 /* writeable text segments **chh** */
+#define U802ROMAGIC 0735 /* readonly sharable text segments */
+#define U802TOCMAGIC 0737 /* readonly text segments and TOC */
+
+#define BADMAG(x) \
+ ((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \
+ (x).f_magic != U802TOCMAGIC)
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ unsigned char magic[2]; /* type of file */
+ unsigned char vstamp[2]; /* version stamp */
+ unsigned char tsize[4]; /* text size in bytes, padded to FW bdry */
+ unsigned char dsize[4]; /* initialized data " " */
+ unsigned char bsize[4]; /* uninitialized data " " */
+ unsigned char entry[4]; /* entry pt. */
+ unsigned char text_start[4]; /* base of text used for this file */
+ unsigned char data_start[4]; /* base of data used for this file */
+ unsigned char o_toc[4]; /* address of TOC */
+ unsigned char o_snentry[2]; /* section number of entry point */
+ unsigned char o_sntext[2]; /* section number of .text section */
+ unsigned char o_sndata[2]; /* section number of .data section */
+ unsigned char o_sntoc[2]; /* section number of TOC */
+ unsigned char o_snloader[2]; /* section number of .loader section */
+ unsigned char o_snbss[2]; /* section number of .bss section */
+ unsigned char o_algntext[2]; /* .text alignment */
+ unsigned char o_algndata[2]; /* .data alignment */
+ unsigned char o_modtype[2]; /* module type (??) */
+ unsigned char o_cputype[2]; /* cpu type */
+ unsigned char o_maxstack[4]; /* max stack size (??) */
+ unsigned char o_maxdata[4]; /* max data size (??) */
+ unsigned char o_resv2[12]; /* reserved */
+}
+AOUTHDR;
+
+#define AOUTSZ 72
+#define SMALL_AOUTSZ (28)
+#define AOUTHDRSZ 72
+
+#define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */
+#define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */
+#define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _PAD ".pad"
+#define _LOADER ".loader"
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/* XCOFF uses a special .loader section with type STYP_LOADER. */
+#define STYP_LOADER 0x1000
+
+/* XCOFF uses a special .debug section with type STYP_DEBUG. */
+#define STYP_DEBUG 0x2000
+
+/* XCOFF handles line number or relocation overflow by creating
+ another section header with STYP_OVRFLO set. */
+#define STYP_OVRFLO 0x8000
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+ struct {
+ unsigned char x_scnlen[4];
+ unsigned char x_parmhash[4];
+ unsigned char x_snhash[2];
+ unsigned char x_smtyp[1];
+ unsigned char x_smclas[1];
+ unsigned char x_stab[4];
+ unsigned char x_snstab[2];
+ } x_csect;
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+#define DBXMASK 0x80 /* for dbx storage mask */
+#define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK)
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_size[1];
+ char r_type[1];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 10
+
+#define DEFAULT_DATA_SECTION_ALIGNMENT 4
+#define DEFAULT_BSS_SECTION_ALIGNMENT 4
+#define DEFAULT_TEXT_SECTION_ALIGNMENT 4
+/* For new sections we havn't heard of before */
+#define DEFAULT_SECTION_ALIGNMENT 4
diff --git a/include/coff/sh.h b/include/coff/sh.h
new file mode 100644
index 0000000..41957df
--- /dev/null
+++ b/include/coff/sh.h
@@ -0,0 +1,269 @@
+/*** coff information for Hitachi SH */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+
+#define SH_ARCH_MAGIC_BIG 0x0500
+#define SH_ARCH_MAGIC_LITTLE 0x0550 /* Little endian SH */
+
+
+#define SHBADMAG(x) \
+ (((x).f_magic!=SH_ARCH_MAGIC_BIG) && \
+ ((x).f_magic!=SH_ARCH_MAGIC_LITTLE))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[4]; /* line number */
+};
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+/* The external reloc has an offset field, because some of the reloc
+ types on the h8 don't have room in the instruction for the entire
+ offset - eg the strange jump and high page addressing modes */
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_offset[4];
+ char r_type[2];
+ char r_stuff[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
+/* SH relocation types. Not all of these are actually used. */
+
+#define R_SH_UNUSED 0 /* only used internally */
+#define R_SH_PCREL8 3 /* 8 bit pcrel */
+#define R_SH_PCREL16 4 /* 16 bit pcrel */
+#define R_SH_HIGH8 5 /* high 8 bits of 24 bit address */
+#define R_SH_LOW16 7 /* low 16 bits of 24 bit immediate */
+#define R_SH_IMM24 6 /* 24 bit immediate */
+#define R_SH_PCDISP8BY4 9 /* PC rel 8 bits *4 +ve */
+#define R_SH_PCDISP8BY2 10 /* PC rel 8 bits *2 +ve */
+#define R_SH_PCDISP8 11 /* 8 bit branch */
+#define R_SH_PCDISP 12 /* 12 bit branch */
+#define R_SH_IMM32 14 /* 32 bit immediate */
+#define R_SH_IMM8 16 /* 8 bit immediate */
+#define R_SH_IMM8BY2 17 /* 8 bit immediate *2 */
+#define R_SH_IMM8BY4 18 /* 8 bit immediate *4 */
+#define R_SH_IMM4 19 /* 4 bit immediate */
+#define R_SH_IMM4BY2 20 /* 4 bit immediate *2 */
+#define R_SH_IMM4BY4 21 /* 4 bit immediate *4 */
+#define R_SH_PCRELIMM8BY2 22 /* PC rel 8 bits *2 unsigned */
+#define R_SH_PCRELIMM8BY4 23 /* PC rel 8 bits *4 unsigned */
+#define R_SH_IMM16 24 /* 16 bit immediate */
+
+/* The switch table reloc types are used for relaxing. They are
+ generated for expressions such as
+ .word L1 - L2
+ The r_offset field holds the difference between the reloc address
+ and L2. */
+#define R_SH_SWITCH8 33 /* 8 bit switch table entry */
+#define R_SH_SWITCH16 25 /* 16 bit switch table entry */
+#define R_SH_SWITCH32 26 /* 32 bit switch table entry */
+
+/* The USES reloc type is used for relaxing. The compiler will
+ generate .uses pseudo-ops when it finds a function call which it
+ can relax. The r_offset field of the USES reloc holds the PC
+ relative offset to the instruction which loads the register used in
+ the function call. */
+#define R_SH_USES 27 /* .uses pseudo-op */
+
+/* The COUNT reloc type is used for relaxing. The assembler will
+ generate COUNT relocs for addresses referred to by the register
+ loads associated with USES relocs. The r_offset field of the COUNT
+ reloc holds the number of times the address is referenced in the
+ object file. */
+#define R_SH_COUNT 28 /* Count of constant pool uses */
+
+/* The ALIGN reloc type is used for relaxing. The r_offset field is
+ the power of two to which subsequent portions of the object file
+ must be aligned. */
+#define R_SH_ALIGN 29 /* .align pseudo-op */
+
+/* The CODE and DATA reloc types are used for aligning load and store
+ instructions. The assembler will generate a CODE reloc before a
+ block of instructions. It will generate a DATA reloc before data.
+ A section should be processed assuming it contains data, unless a
+ CODE reloc is seen. The only relevant pieces of information in the
+ CODE and DATA relocs are the section and the address. The symbol
+ and offset are meaningless. */
+#define R_SH_CODE 30 /* start of code */
+#define R_SH_DATA 31 /* start of data */
+
+/* The LABEL reloc type is used for aligning load and store
+ instructions. The assembler will generate a LABEL reloc for each
+ label within a block of instructions. This permits the linker to
+ avoid swapping instructions which are the targets of branches. */
+#define R_SH_LABEL 32 /* label */
+
+/* NB: R_SH_SWITCH8 is 33 */
diff --git a/include/coff/sparc.h b/include/coff/sparc.h
new file mode 100644
index 0000000..82a24f0
--- /dev/null
+++ b/include/coff/sparc.h
@@ -0,0 +1,210 @@
+/*** coff information for Sparc. */
+
+/* This file is an amalgamation of several standard include files that
+ define coff format, such as filehdr.h, aouthdr.h, and so forth. In
+ addition, all datatypes have been translated into character arrays of
+ (presumed) equivalent size. This is necessary so that this file can
+ be used with different systems while still yielding the same results. */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr
+{
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+#define F_RELFLG (0x0001) /* relocation info stripped */
+#define F_EXEC (0x0002) /* file is executable */
+#define F_LNNO (0x0004) /* line numbers stripped */
+#define F_LSYMS (0x0008) /* local symbols stripped */
+
+#define SPARCMAGIC (0540)
+
+/* This is Lynx's all-platform magic number for executables. */
+
+#define LYNXCOFFMAGIC (0415)
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+#define OMAGIC 0404 /* object files, eg as output */
+#define ZMAGIC 0413 /* demand load format, eg normal ld output */
+#define STMAGIC 0401 /* target shlib */
+#define SHMAGIC 0443 /* host shlib */
+
+/********************** SECTION HEADER **********************/
+
+struct external_scnhdr
+{
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/* Names of "special" sections. */
+
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _TV ".tv"
+#define _INIT ".init"
+#define _FINI ".fini"
+#define _COMMENT ".comment"
+#define _LIB ".lib"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ Line numbers are grouped on a per function basis; first entry in a function
+ grouping will have l_lnno = 0 and in place of physical address will be the
+ symbol table index of the function name. */
+
+struct external_lineno
+{
+ union {
+ char l_symndx[4]; /* fn name symbol index, iff l_lnno == 0 */
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+#define LINENO struct external_lineno
+#define LINESZ (6)
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN (8) /* # characters in a symbol name */
+#define E_FILNMLEN (14) /* # characters in a file name */
+#define E_DIMNUM (4) /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+#if 0 /* of doubtful value */
+ char e_nptr[2][4];
+ struct {
+ char e_leading_zero[1];
+ char e_dbx_type[1];
+ char e_dbx_desc[2];
+ } e_dbx;
+#endif
+ } e;
+
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+ char padding[2];
+};
+
+#define N_BTMASK (0xf)
+#define N_TMASK (0x30)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+union external_auxent
+{
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* .tv section info (in auxent of sym .tv)) */
+
+ char x_fill[20]; /* forces to 20-byte size */
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 20
+#define AUXENT union external_auxent
+#define AUXESZ 20
+
+#define _ETEXT "etext"
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+ char r_spare[2];
+ char r_offset[4];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
diff --git a/include/coff/sym.h b/include/coff/sym.h
new file mode 100644
index 0000000..76204af
--- /dev/null
+++ b/include/coff/sym.h
@@ -0,0 +1,484 @@
+/* Declarations of internal format of MIPS ECOFF symbols.
+ Originally contributed by MIPS Computer Systems and Third Eye Software.
+ Changes contributed by Cygnus Support are in the public domain.
+
+ This file is just aggregated with the files that make up the GNU
+ release; it is not considered part of GAS, GDB, or other GNU
+ programs. */
+
+/*
+ * |-----------------------------------------------------------|
+ * | Copyright (c) 1992, 1991, 1990 MIPS Computer Systems, Inc.|
+ * | MIPS Computer Systems, Inc. grants reproduction and use |
+ * | rights to all parties, PROVIDED that this comment is |
+ * | maintained in the copy. |
+ * |-----------------------------------------------------------|
+ */
+#ifndef _SYM_H
+#define _SYM_H
+
+/* (C) Copyright 1984 by Third Eye Software, Inc.
+ *
+ * Third Eye Software, Inc. grants reproduction and use rights to
+ * all parties, PROVIDED that this comment is maintained in the copy.
+ *
+ * Third Eye makes no claims about the applicability of this
+ * symbol table to a particular use.
+ */
+
+/*
+ * This file contains the definition of the Third Eye Symbol Table.
+ *
+ * Symbols are assumed to be in 'encounter order' - i.e. the order that
+ * the things they represent were encountered by the compiler/assembler/loader.
+ * EXCEPT for globals! These are assumed to be bunched together,
+ * probably right after the last 'normal' symbol. Globals ARE sorted
+ * in ascending order.
+ *
+ * -----------------------------------------------------------------------
+ * A brief word about Third Eye naming/use conventions:
+ *
+ * All arrays and index's are 0 based.
+ * All "ifooMax" values are the highest legal value PLUS ONE. This makes
+ * them good for allocating arrays, etc. All checks are "ifoo < ifooMax".
+ *
+ * "isym" Index into the SYMbol table.
+ * "ipd" Index into the Procedure Descriptor array.
+ * "ifd" Index into the File Descriptor array.
+ * "iss" Index into String Space.
+ * "cb" Count of Bytes.
+ * "rgPd" array whose domain is "0..ipdMax-1" and RanGe is PDR.
+ * "rgFd" array whose domain is "0..ifdMax-1" and RanGe is FDR.
+ */
+
+
+/*
+ * Symbolic Header (HDR) structure.
+ * As long as all the pointers are set correctly,
+ * we don't care WHAT order the various sections come out in!
+ *
+ * A file produced solely for the use of CDB will probably NOT have
+ * any instructions or data areas in it, as these are available
+ * in the original.
+ */
+
+typedef struct {
+ short magic; /* to verify validity of the table */
+ short vstamp; /* version stamp */
+ long ilineMax; /* number of line number entries */
+ bfd_vma cbLine; /* number of bytes for line number entries */
+ bfd_vma cbLineOffset; /* offset to start of line number entries*/
+ long idnMax; /* max index into dense number table */
+ bfd_vma cbDnOffset; /* offset to start dense number table */
+ long ipdMax; /* number of procedures */
+ bfd_vma cbPdOffset; /* offset to procedure descriptor table */
+ long isymMax; /* number of local symbols */
+ bfd_vma cbSymOffset; /* offset to start of local symbols*/
+ long ioptMax; /* max index into optimization symbol entries */
+ bfd_vma cbOptOffset; /* offset to optimization symbol entries */
+ long iauxMax; /* number of auxillary symbol entries */
+ bfd_vma cbAuxOffset; /* offset to start of auxillary symbol entries*/
+ long issMax; /* max index into local strings */
+ bfd_vma cbSsOffset; /* offset to start of local strings */
+ long issExtMax; /* max index into external strings */
+ bfd_vma cbSsExtOffset; /* offset to start of external strings */
+ long ifdMax; /* number of file descriptor entries */
+ bfd_vma cbFdOffset; /* offset to file descriptor table */
+ long crfd; /* number of relative file descriptor entries */
+ bfd_vma cbRfdOffset; /* offset to relative file descriptor table */
+ long iextMax; /* max index into external symbols */
+ bfd_vma cbExtOffset; /* offset to start of external symbol entries*/
+ /* If you add machine dependent fields, add them here */
+ } HDRR, *pHDRR;
+#define cbHDRR sizeof(HDRR)
+#define hdrNil ((pHDRR)0)
+
+/*
+ * The FDR and PDR structures speed mapping of address <-> name.
+ * They are sorted in ascending memory order and are kept in
+ * memory by CDB at runtime.
+ */
+
+/*
+ * File Descriptor
+ *
+ * There is one of these for EVERY FILE, whether compiled with
+ * full debugging symbols or not. The name of a file should be
+ * the path name given to the compiler. This allows the user
+ * to simply specify the names of the directories where the COMPILES
+ * were done, and we will be able to find their files.
+ * A field whose comment starts with "R - " indicates that it will be
+ * setup at runtime.
+ */
+typedef struct fdr {
+ bfd_vma adr; /* memory address of beginning of file */
+ long rss; /* file name (of source, if known) */
+ long issBase; /* file's string space */
+ bfd_vma cbSs; /* number of bytes in the ss */
+ long isymBase; /* beginning of symbols */
+ long csym; /* count file's of symbols */
+ long ilineBase; /* file's line symbols */
+ long cline; /* count of file's line symbols */
+ long ioptBase; /* file's optimization entries */
+ long copt; /* count of file's optimization entries */
+ unsigned short ipdFirst;/* start of procedures for this file */
+ short cpd; /* count of procedures for this file */
+ long iauxBase; /* file's auxiliary entries */
+ long caux; /* count of file's auxiliary entries */
+ long rfdBase; /* index into the file indirect table */
+ long crfd; /* count file indirect entries */
+ unsigned lang: 5; /* language for this file */
+ unsigned fMerge : 1; /* whether this file can be merged */
+ unsigned fReadin : 1; /* true if it was read in (not just created) */
+ unsigned fBigendian : 1;/* if set, was compiled on big endian machine */
+ /* aux's will be in compile host's sex */
+ unsigned glevel : 2; /* level this file was compiled with */
+ unsigned reserved : 22; /* reserved for future use */
+ bfd_vma cbLineOffset; /* byte offset from header for this file ln's */
+ bfd_vma cbLine; /* size of lines for this file */
+ } FDR, *pFDR;
+#define cbFDR sizeof(FDR)
+#define fdNil ((pFDR)0)
+#define ifdNil -1
+#define ifdTemp 0
+#define ilnNil -1
+
+
+/*
+ * Procedure Descriptor
+ *
+ * There is one of these for EVERY TEXT LABEL.
+ * If a procedure is in a file with full symbols, then isym
+ * will point to the PROC symbols, else it will point to the
+ * global symbol for the label.
+ */
+
+typedef struct pdr {
+ bfd_vma adr; /* memory address of start of procedure */
+ long isym; /* start of local symbol entries */
+ long iline; /* start of line number entries*/
+ long regmask; /* save register mask */
+ long regoffset; /* save register offset */
+ long iopt; /* start of optimization symbol entries*/
+ long fregmask; /* save floating point register mask */
+ long fregoffset; /* save floating point register offset */
+ long frameoffset; /* frame size */
+ short framereg; /* frame pointer register */
+ short pcreg; /* offset or reg of return pc */
+ long lnLow; /* lowest line in the procedure */
+ long lnHigh; /* highest line in the procedure */
+ bfd_vma cbLineOffset; /* byte offset for this procedure from the fd base */
+ /* These fields are new for 64 bit ECOFF. */
+ unsigned gp_prologue : 8; /* byte size of GP prologue */
+ unsigned gp_used : 1; /* true if the procedure uses GP */
+ unsigned reg_frame : 1; /* true if register frame procedure */
+ unsigned prof : 1; /* true if compiled with -pg */
+ unsigned reserved : 13; /* reserved: must be zero */
+ unsigned localoff : 8; /* offset of local variables from vfp */
+ } PDR, *pPDR;
+#define cbPDR sizeof(PDR)
+#define pdNil ((pPDR) 0)
+#define ipdNil -1
+
+/*
+ * The structure of the runtime procedure descriptor created by the loader
+ * for use by the static exception system.
+ */
+/*
+ * If 0'd out because exception_info chokes Visual C++ and because there
+ * don't seem to be any references to this structure elsewhere in gdb.
+ */
+#if 0
+typedef struct runtime_pdr {
+ bfd_vma adr; /* memory address of start of procedure */
+ long regmask; /* save register mask */
+ long regoffset; /* save register offset */
+ long fregmask; /* save floating point register mask */
+ long fregoffset; /* save floating point register offset */
+ long frameoffset; /* frame size */
+ short framereg; /* frame pointer register */
+ short pcreg; /* offset or reg of return pc */
+ long irpss; /* index into the runtime string table */
+ long reserved;
+ struct exception_info *exception_info;/* pointer to exception array */
+} RPDR, *pRPDR;
+#define cbRPDR sizeof(RPDR)
+#define rpdNil ((pRPDR) 0)
+#endif
+
+/*
+ * Line Numbers
+ *
+ * Line Numbers are segregated from the normal symbols because they
+ * are [1] smaller , [2] are of no interest to your
+ * average loader, and [3] are never needed in the middle of normal
+ * scanning and therefore slow things down.
+ *
+ * By definition, the first LINER for any given procedure will have
+ * the first line of a procedure and represent the first address.
+ */
+
+typedef long LINER, *pLINER;
+#define lineNil ((pLINER)0)
+#define cbLINER sizeof(LINER)
+#define ilineNil -1
+
+
+
+/*
+ * The Symbol Structure (GFW, to those who Know!)
+ */
+
+typedef struct {
+ long iss; /* index into String Space of name */
+ bfd_vma value; /* value of symbol */
+ unsigned st : 6; /* symbol type */
+ unsigned sc : 5; /* storage class - text, data, etc */
+ unsigned reserved : 1; /* reserved */
+ unsigned index : 20; /* index into sym/aux table */
+ } SYMR, *pSYMR;
+#define symNil ((pSYMR)0)
+#define cbSYMR sizeof(SYMR)
+#define isymNil -1
+#define indexNil 0xfffff
+#define issNil -1
+#define issNull 0
+
+
+/* The following converts a memory resident string to an iss.
+ * This hack is recognized in SbFIss, in sym.c of the debugger.
+ */
+#define IssFSb(sb) (0x80000000 | ((unsigned long)(sb)))
+
+/* E X T E R N A L S Y M B O L R E C O R D
+ *
+ * Same as the SYMR except it contains file context to determine where
+ * the index is.
+ */
+typedef struct ecoff_extr {
+ unsigned jmptbl:1; /* symbol is a jump table entry for shlibs */
+ unsigned cobol_main:1; /* symbol is a cobol main procedure */
+ unsigned weakext:1; /* symbol is weak external */
+ unsigned reserved:13; /* reserved for future use */
+ int ifd; /* where the iss and index fields point into */
+ SYMR asym; /* symbol for the external */
+ } EXTR, *pEXTR;
+#define extNil ((pEXTR)0)
+#define cbEXTR sizeof(EXTR)
+
+
+/* A U X I L L A R Y T Y P E I N F O R M A T I O N */
+
+/*
+ * Type Information Record
+ */
+typedef struct {
+ unsigned fBitfield : 1; /* set if bit width is specified */
+ unsigned continued : 1; /* indicates additional TQ info in next AUX */
+ unsigned bt : 6; /* basic type */
+ unsigned tq4 : 4;
+ unsigned tq5 : 4;
+ /* ---- 16 bit boundary ---- */
+ unsigned tq0 : 4;
+ unsigned tq1 : 4; /* 6 type qualifiers - tqPtr, etc. */
+ unsigned tq2 : 4;
+ unsigned tq3 : 4;
+ } TIR, *pTIR;
+#define cbTIR sizeof(TIR)
+#define tiNil ((pTIR)0)
+#define itqMax 6
+
+/*
+ * Relative symbol record
+ *
+ * If the rfd field is 4095, the index field indexes into the global symbol
+ * table.
+ */
+
+typedef struct {
+ unsigned rfd : 12; /* index into the file indirect table */
+ unsigned index : 20; /* index int sym/aux/iss tables */
+ } RNDXR, *pRNDXR;
+#define cbRNDXR sizeof(RNDXR)
+#define rndxNil ((pRNDXR)0)
+
+/* dense numbers or sometimes called block numbers are stored in this type,
+ * a rfd of 0xffffffff is an index into the global table.
+ */
+typedef struct {
+ unsigned long rfd; /* index into the file table */
+ unsigned long index; /* index int sym/aux/iss tables */
+ } DNR, *pDNR;
+#define cbDNR sizeof(DNR)
+#define dnNil ((pDNR)0)
+
+
+
+/*
+ * Auxillary information occurs only if needed.
+ * It ALWAYS occurs in this order when present.
+
+ isymMac used by stProc only
+ TIR type info
+ TIR additional TQ info (if first TIR was not enough)
+ rndx if (bt == btStruct,btUnion,btEnum,btSet,btRange,
+ btTypedef):
+ rsym.index == iaux for btSet or btRange
+ else rsym.index == isym
+ dimLow btRange, btSet
+ dimMac btRange, btSet
+ rndx0 As many as there are tq arrays
+ dimLow0
+ dimHigh0
+ ...
+ rndxMax-1
+ dimLowMax-1
+ dimHighMax-1
+ width in bits if (bit field), width in bits.
+ */
+#define cAuxMax (6 + (idimMax*3))
+
+/* a union of all possible info in the AUX universe */
+typedef union {
+ TIR ti; /* type information record */
+ RNDXR rndx; /* relative index into symbol table */
+ long dnLow; /* low dimension */
+ long dnHigh; /* high dimension */
+ long isym; /* symbol table index (end of proc) */
+ long iss; /* index into string space (not used) */
+ long width; /* width for non-default sized struc fields */
+ long count; /* count of ranges for variant arm */
+ } AUXU, *pAUXU;
+#define cbAUXU sizeof(AUXU)
+#define auxNil ((pAUXU)0)
+#define iauxNil -1
+
+
+/*
+ * Optimization symbols
+ *
+ * Optimization symbols contain some overlap information with the normal
+ * symbol table. In particular, the proc information
+ * is somewhat redundant but necessary to easily find the other information
+ * present.
+ *
+ * All of the offsets are relative to the beginning of the last otProc
+ */
+
+typedef struct {
+ unsigned ot: 8; /* optimization type */
+ unsigned value: 24; /* address where we are moving it to */
+ RNDXR rndx; /* points to a symbol or opt entry */
+ unsigned long offset; /* relative offset this occured */
+ } OPTR, *pOPTR;
+#define optNil ((pOPTR) 0)
+#define cbOPTR sizeof(OPTR)
+#define ioptNil -1
+
+/*
+ * File Indirect
+ *
+ * When a symbol is referenced across files the following procedure is used:
+ * 1) use the file index to get the File indirect entry.
+ * 2) use the file indirect entry to get the File descriptor.
+ * 3) add the sym index to the base of that file's sym table
+ *
+ */
+
+typedef long RFDT, *pRFDT;
+#define cbRFDT sizeof(RFDT)
+#define rfdNil -1
+
+/*
+ * The file indirect table in the mips loader is known as an array of FITs.
+ * This is done to keep the code in the loader readable in the area where
+ * these tables are merged. Note this is only a name change.
+ */
+typedef long FIT, *pFIT;
+#define cbFIT sizeof(FIT)
+#define ifiNil -1
+#define fiNil ((pFIT) 0)
+
+#ifdef _LANGUAGE_PASCAL
+#define ifdNil -1
+#define ilnNil -1
+#define ipdNil -1
+#define ilineNil -1
+#define isymNil -1
+#define indexNil 16#fffff
+#define issNil -1
+#define issNull 0
+#define itqMax 6
+#define iauxNil -1
+#define ioptNil -1
+#define rfdNil -1
+#define ifiNil -1
+#endif /* _LANGUAGE_PASCAL */
+
+
+/* Dense numbers
+ *
+ * Rather than use file index, symbol index pairs to represent symbols
+ * and globals, we use dense number so that they can be easily embeded
+ * in intermediate code and the programs that process them can
+ * use direct access tabls instead of hash table (which would be
+ * necesary otherwise because of the sparse name space caused by
+ * file index, symbol index pairs. Dense number are represented
+ * by RNDXRs.
+ */
+
+/*
+ * The following table defines the meaning of each SYM field as
+ * a function of the "st". (scD/B == scData OR scBss)
+ *
+ * Note: the value "isymMac" is used by symbols that have the concept
+ * of enclosing a block of related information. This value is the
+ * isym of the first symbol AFTER the end associated with the primary
+ * symbol. For example if a procedure was at isym==90 and had an
+ * isymMac==155, the associated end would be at isym==154, and the
+ * symbol at 155 would probably (although not necessarily) be the
+ * symbol for the next procedure. This allows rapid skipping over
+ * internal information of various sorts. "stEnd"s ALWAYS have the
+ * isym of the primary symbol that started the block.
+ *
+
+ST SC VALUE INDEX
+-------- ------ -------- ------
+stFile scText address isymMac
+stLabel scText address ---
+stGlobal scD/B address iaux
+stStatic scD/B address iaux
+stParam scAbs offset iaux
+stLocal scAbs offset iaux
+stProc scText address iaux (isymMac is first AUX)
+stStaticProc scText address iaux (isymMac is first AUX)
+
+stMember scNil ordinal --- (if member of enum)
+ (mipsread thinks the case below has a bit, not byte, offset.)
+stMember scNil byte offset iaux (if member of struct/union)
+stMember scBits bit offset iaux (bit field spec)
+
+stBlock scText address isymMac (text block)
+ (the code seems to think that rather than scNil, we see scInfo for
+ the two cases below.)
+stBlock scNil cb isymMac (struct/union member define)
+stBlock scNil cMembers isymMac (enum member define)
+
+ (New types added by SGI to simplify things:)
+stStruct scInfo cb isymMac (struct type define)
+stUnion scInfo cb isymMac (union type define)
+stEnum scInfo cMembers isymMac (enum type define)
+
+stEnd scText address isymStart
+stEnd scNil ------- isymStart (struct/union/enum)
+
+stTypedef scNil ------- iaux
+stRegReloc sc??? value old register number
+stForward sc??? new address isym to original symbol
+
+stConstant scInfo value --- (scalar)
+stConstant scInfo iss --- (complex, e.g. string)
+
+ *
+ */
+#endif
diff --git a/include/coff/symconst.h b/include/coff/symconst.h
new file mode 100644
index 0000000..f40eef2
--- /dev/null
+++ b/include/coff/symconst.h
@@ -0,0 +1,177 @@
+/* Declarations of constants for internal format of MIPS ECOFF symbols.
+ Originally contributed by MIPS Computer Systems and Third Eye Software.
+ Changes contributed by Cygnus Support are in the public domain.
+
+ This file is just aggregated with the files that make up the GNU
+ release; it is not considered part of GAS, GDB, or other GNU
+ programs. */
+
+/*
+ * |-----------------------------------------------------------|
+ * | Copyright (c) 1992, 1991, 1990 MIPS Computer Systems, Inc.|
+ * | MIPS Computer Systems, Inc. grants reproduction and use |
+ * | rights to all parties, PROVIDED that this comment is |
+ * | maintained in the copy. |
+ * |-----------------------------------------------------------|
+ */
+
+/* (C) Copyright 1984 by Third Eye Software, Inc.
+ *
+ * Third Eye Software, Inc. grants reproduction and use rights to
+ * all parties, PROVIDED that this comment is maintained in the copy.
+ *
+ * Third Eye makes no claims about the applicability of this
+ * symbol table to a particular use.
+ */
+
+/* glevels for field in FDR */
+#define GLEVEL_0 2
+#define GLEVEL_1 1
+#define GLEVEL_2 0 /* for upward compat reasons. */
+#define GLEVEL_3 3
+
+/* magic number fo symheader */
+#define magicSym 0x7009
+/* The Alpha uses this value instead, for some reason. */
+#define magicSym2 0x1992
+
+/* Language codes */
+#define langC 0
+#define langPascal 1
+#define langFortran 2
+#define langAssembler 3 /* one Assembley inst might map to many mach */
+#define langMachine 4
+#define langNil 5
+#define langAda 6
+#define langPl1 7
+#define langCobol 8
+#define langStdc 9 /* FIXME: Collides with SGI langCplusplus */
+#define langCplusplus 9 /* FIXME: Collides with langStdc */
+#define langCplusplusV2 10 /* SGI addition */
+#define langMax 11 /* maximun allowed 32 -- 5 bits */
+
+/* The following are value definitions for the fields in the SYMR */
+
+/*
+ * Storage Classes
+ */
+
+#define scNil 0
+#define scText 1 /* text symbol */
+#define scData 2 /* initialized data symbol */
+#define scBss 3 /* un-initialized data symbol */
+#define scRegister 4 /* value of symbol is register number */
+#define scAbs 5 /* value of symbol is absolute */
+#define scUndefined 6 /* who knows? */
+#define scCdbLocal 7 /* variable's value is IN se->va.?? */
+#define scBits 8 /* this is a bit field */
+#define scCdbSystem 9 /* variable's value is IN CDB's address space */
+#define scDbx 9 /* overlap dbx internal use */
+#define scRegImage 10 /* register value saved on stack */
+#define scInfo 11 /* symbol contains debugger information */
+#define scUserStruct 12 /* address in struct user for current process */
+#define scSData 13 /* load time only small data */
+#define scSBss 14 /* load time only small common */
+#define scRData 15 /* load time only read only data */
+#define scVar 16 /* Var parameter (fortran,pascal) */
+#define scCommon 17 /* common variable */
+#define scSCommon 18 /* small common */
+#define scVarRegister 19 /* Var parameter in a register */
+#define scVariant 20 /* Variant record */
+#define scSUndefined 21 /* small undefined(external) data */
+#define scInit 22 /* .init section symbol */
+#define scBasedVar 23 /* Fortran or PL/1 ptr based var */
+#define scXData 24 /* exception handling data */
+#define scPData 25 /* Procedure section */
+#define scFini 26 /* .fini section */
+#define scRConst 27 /* .rconst section */
+#define scMax 32
+
+
+/*
+ * Symbol Types
+ */
+
+#define stNil 0 /* Nuthin' special */
+#define stGlobal 1 /* external symbol */
+#define stStatic 2 /* static */
+#define stParam 3 /* procedure argument */
+#define stLocal 4 /* local variable */
+#define stLabel 5 /* label */
+#define stProc 6 /* " " Procedure */
+#define stBlock 7 /* beginnning of block */
+#define stEnd 8 /* end (of anything) */
+#define stMember 9 /* member (of anything - struct/union/enum */
+#define stTypedef 10 /* type definition */
+#define stFile 11 /* file name */
+#define stRegReloc 12 /* register relocation */
+#define stForward 13 /* forwarding address */
+#define stStaticProc 14 /* load time only static procs */
+#define stConstant 15 /* const */
+#define stStaParam 16 /* Fortran static parameters */
+ /* These new symbol types have been recently added to SGI machines. */
+#define stStruct 26 /* Beginning of block defining a struct type */
+#define stUnion 27 /* Beginning of block defining a union type */
+#define stEnum 28 /* Beginning of block defining an enum type */
+#define stIndirect 34 /* Indirect type specification */
+ /* Pseudo-symbols - internal to debugger */
+#define stStr 60 /* string */
+#define stNumber 61 /* pure number (ie. 4 NOR 2+2) */
+#define stExpr 62 /* 2+2 vs. 4 */
+#define stType 63 /* post-coersion SER */
+#define stMax 64
+
+/* definitions for fields in TIR */
+
+/* type qualifiers for ti.tq0 -> ti.(itqMax-1) */
+#define tqNil 0 /* bt is what you see */
+#define tqPtr 1 /* pointer */
+#define tqProc 2 /* procedure */
+#define tqArray 3 /* duh */
+#define tqFar 4 /* longer addressing - 8086/8 land */
+#define tqVol 5 /* volatile */
+#define tqConst 6 /* const */
+#define tqMax 8
+
+/* basic types as seen in ti.bt */
+#define btNil 0 /* undefined (also, enum members) */
+#define btAdr 1 /* address - integer same size as pointer */
+#define btChar 2 /* character */
+#define btUChar 3 /* unsigned character */
+#define btShort 4 /* short */
+#define btUShort 5 /* unsigned short */
+#define btInt 6 /* int */
+#define btUInt 7 /* unsigned int */
+#define btLong 8 /* long */
+#define btULong 9 /* unsigned long */
+#define btFloat 10 /* float (real) */
+#define btDouble 11 /* Double (real) */
+#define btStruct 12 /* Structure (Record) */
+#define btUnion 13 /* Union (variant) */
+#define btEnum 14 /* Enumerated */
+#define btTypedef 15 /* defined via a typedef, isymRef points */
+#define btRange 16 /* subrange of int */
+#define btSet 17 /* pascal sets */
+#define btComplex 18 /* fortran complex */
+#define btDComplex 19 /* fortran double complex */
+#define btIndirect 20 /* forward or unnamed typedef */
+#define btFixedDec 21 /* Fixed Decimal */
+#define btFloatDec 22 /* Float Decimal */
+#define btString 23 /* Varying Length Character String */
+#define btBit 24 /* Aligned Bit String */
+#define btPicture 25 /* Picture */
+#define btVoid 26 /* void */
+#define btLongLong 27 /* long long */
+#define btULongLong 28 /* unsigned long long */
+#define btMax 64
+
+#if (_MFG == _MIPS)
+/* optimization type codes */
+#define otNil 0
+#define otReg 1 /* move var to reg */
+#define otBlock 2 /* begin basic block */
+#define otProc 3 /* procedure */
+#define otInline 4 /* inline procedure */
+#define otEnd 5 /* whatever you started */
+#define otMax 6 /* KEEP UP TO DATE */
+#endif /* (_MFG == _MIPS) */
diff --git a/include/coff/tic30.h b/include/coff/tic30.h
new file mode 100644
index 0000000..10b026c
--- /dev/null
+++ b/include/coff/tic30.h
@@ -0,0 +1,203 @@
+/*** coff information for Texas Instruments TMS320C3X */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+#define TIC30MAGIC 0xC000
+
+#define TIC30BADMAG(x) (((x).f_magic!=TIC30MAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[4]; /* line number */
+};
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+/* The external reloc has an offset field, because some of the reloc
+ types on the z8k don't have room in the instruction for the entire
+ offset - eg with segments */
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_offset[4];
+ char r_type[2];
+ char r_stuff[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
+/* TMS320C30 relocation types. */
+
+#define R_TIC30_ABS16 0x100 /* 16 bit absolute. */
+#define R_TIC30_ABS24 0x101 /* 24 bit absolute. */
+#define R_TIC30_ABS32 0x102 /* 32 bit absolute. */
+#define R_TIC30_LDP 0x103 /* LDP bits 23-16 to 7-0. */
+#define R_TIC30_PC16 0x104 /* 16 bit pc relative. */
diff --git a/include/coff/tic80.h b/include/coff/tic80.h
new file mode 100644
index 0000000..5d938f7
--- /dev/null
+++ b/include/coff/tic80.h
@@ -0,0 +1,228 @@
+/*** coff information for TI TMS320C80 (MVP) */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+ char f_target_id[2]; /* target id (TIc80 specific) */
+};
+
+#define TIC80_ARCH_MAGIC 0x0C1 /* Goes in the file header magic number field */
+#define TIC80_TARGET_ID 0x95 /* Goes in the target id field */
+
+#define TIC80BADMAG(x) ((x).f_magic != TIC80_ARCH_MAGIC)
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 22
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+#define TIC80_AOUTHDR_MAGIC 0x108 /* Goes in the optional file header magic number field */
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[2]; /* flags */
+ char s_reserved[1]; /* reserved (TIc80 specific) */
+ char s_mempage[1]; /* memory page number (TIc80) */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _CINIT ".cinit"
+#define _CONST ".const"
+#define _SWITCH ".switch"
+#define _STACK ".stack"
+#define _SYSMEM ".sysmem"
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_16(abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_16(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+/* FIXME - need to correlate with TIc80 Code Generation Tools User's Guide, CG:A-25 */
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+/* The external reloc has an offset field, because some of the reloc
+ types on the h8 don't have room in the instruction for the entire
+ offset - eg the strange jump and high page addressing modes */
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_reserved[2];
+ char r_type[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 12
+
+/* TIc80 relocation types. */
+
+#define R_ABS 0x00 /* Absolute address - no relocation */
+#define R_RELLONGX 0x11 /* PP: 32 bits, direct */
+#define R_PPBASE 0x34 /* PP: Global base address type */
+#define R_PPLBASE 0x35 /* PP: Local base address type */
+#define R_PP15 0x38 /* PP: Global 15 bit offset */
+#define R_PP15W 0x39 /* PP: Global 15 bit offset divided by 4 */
+#define R_PP15H 0x3A /* PP: Global 15 bit offset divided by 2 */
+#define R_PP16B 0x3B /* PP: Global 16 bit offset for bytes */
+#define R_PPL15 0x3C /* PP: Local 15 bit offset */
+#define R_PPL15W 0x3D /* PP: Local 15 bit offset divided by 4 */
+#define R_PPL15H 0x3E /* PP: Local 15 bit offset divided by 2 */
+#define R_PPL16B 0x3F /* PP: Local 16 bit offset for bytes */
+#define R_PPN15 0x40 /* PP: Global 15 bit negative offset */
+#define R_PPN15W 0x41 /* PP: Global 15 bit negative offset divided by 4 */
+#define R_PPN15H 0x42 /* PP: Global 15 bit negative offset divided by 2 */
+#define R_PPN16B 0x43 /* PP: Global 16 bit negative byte offset */
+#define R_PPLN15 0x44 /* PP: Local 15 bit negative offset */
+#define R_PPLN15W 0x45 /* PP: Local 15 bit negative offset divided by 4 */
+#define R_PPLN15H 0x46 /* PP: Local 15 bit negative offset divided by 2 */
+#define R_PPLN16B 0x47 /* PP: Local 16 bit negative byte offset */
+#define R_MPPCR15W 0x4E /* MP: 15 bit PC-relative divided by 4 */
+#define R_MPPCR 0x4F /* MP: 32 bit PC-relative divided by 4 */
diff --git a/include/coff/w65.h b/include/coff/w65.h
new file mode 100644
index 0000000..3378c23
--- /dev/null
+++ b/include/coff/w65.h
@@ -0,0 +1,201 @@
+/*** coff information for WDC 65816 */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+
+#define W65MAGIC 0x6500
+
+
+#define W65BADMAG(x) (((x).f_magic!=W65MAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[4]; /* line number */
+};
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+/* The external reloc has an offset field, because some of the reloc
+ types on the w65 don't have room in the instruction for the entire
+ offset - eg the strange jump and high page addressing modes */
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_offset[4];
+ char r_type[2];
+ char r_stuff[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
+
+
+
diff --git a/include/coff/we32k.h b/include/coff/we32k.h
new file mode 100644
index 0000000..553fa35
--- /dev/null
+++ b/include/coff/we32k.h
@@ -0,0 +1,206 @@
+/*** coff information for we32k */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+/* Bits for f_flags:
+ * F_RELFLG relocation info stripped from file
+ * F_EXEC file is executable (no unresolved external references)
+ * F_LNNO line numbers stripped from file
+ * F_LSYMS local symbols stripped from file
+ * F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax)
+ */
+
+#define F_RELFLG (0x0001)
+#define F_EXEC (0x0002)
+#define F_LNNO (0x0004)
+#define F_LSYMS (0x0008)
+#define F_BM32B (0020000)
+#define F_BM32MAU (0040000)
+
+#define WE32KMAGIC 0x170 /* we32k sans transfer vector */
+#define FBOMAGIC 0x170 /* we32k sans transfer vector */
+#define MTVMAGIC 0x171 /* we32k with transfer vector */
+#define RBOMAGIC 0x172 /* reserved */
+#define WE32KBADMAG(x) (((x).f_magic != WE32KMAGIC) \
+ && ((x).f_magic != FBOMAGIC) \
+ && ((x).f_magic != RBOMAGIC) \
+ && ((x).f_magic != MTVMAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _TV ".tv"
+#define _INIT ".init"
+#define _FINI ".fini"
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+#define N_BTMASK (0xf)
+#define N_TMASK (0x30)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+# define _ETEXT "etext"
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 10
+
diff --git a/include/coff/z8k.h b/include/coff/z8k.h
new file mode 100644
index 0000000..19b846c
--- /dev/null
+++ b/include/coff/z8k.h
@@ -0,0 +1,201 @@
+/*** coff information for Zilog Z800N */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+};
+
+
+/* Type of cpu is stored in flags */
+#define F_Z8001 0x1000
+#define F_Z8002 0x2000
+#define F_MACHMASK 0xf000
+
+#define Z8KMAGIC 0x8000
+
+#define Z8KBADMAG(x) (((x).f_magic!=Z8KMAGIC))
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 20
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+
+
+/********************** SECTION HEADER **********************/
+
+
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+};
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+
+
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ 40
+
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[4]; /* line number */
+};
+
+#define GET_LINENO_LNNO(abfd, ext) bfd_h_get_32(abfd, (bfd_byte *) (ext->l_lnno));
+#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
+
+#define LINENO struct external_lineno
+#define LINESZ 8
+
+
+/********************** SYMBOLS **********************/
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+/* The external reloc has an offset field, because some of the reloc
+ types on the z8k don't have room in the instruction for the entire
+ offset - eg with segments */
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_offset[4];
+ char r_type[2];
+ char r_stuff[2];
+};
+
+
+#define RELOC struct external_reloc
+#define RELSZ 16
+
diff --git a/include/demangle.h b/include/demangle.h
new file mode 100644
index 0000000..63fe5e2
--- /dev/null
+++ b/include/demangle.h
@@ -0,0 +1,95 @@
+/* Defs for interface to demanglers.
+ Copyright 1992, 1995, 1996 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330,
+ Boston, MA 02111-1307, USA. */
+
+
+#if !defined (DEMANGLE_H)
+#define DEMANGLE_H
+
+#include <ansidecl.h>
+
+/* Options passed to cplus_demangle (in 2nd parameter). */
+
+#define DMGL_NO_OPTS 0 /* For readability... */
+#define DMGL_PARAMS (1 << 0) /* Include function args */
+#define DMGL_ANSI (1 << 1) /* Include const, volatile, etc */
+#define DMGL_JAVA (1 << 2) /* Demangle as Java rather than C++. */
+
+#define DMGL_AUTO (1 << 8)
+#define DMGL_GNU (1 << 9)
+#define DMGL_LUCID (1 << 10)
+#define DMGL_ARM (1 << 11)
+#define DMGL_HP (1 << 12) /* For the HP aCC compiler; same as ARM
+ except for template arguments, etc. */
+#define DMGL_EDG (1 << 13)
+
+/* If none of these are set, use 'current_demangling_style' as the default. */
+#define DMGL_STYLE_MASK (DMGL_AUTO|DMGL_GNU|DMGL_LUCID|DMGL_ARM|DMGL_HP|DMGL_EDG)
+
+/* Enumeration of possible demangling styles.
+
+ Lucid and ARM styles are still kept logically distinct, even though
+ they now both behave identically. The resulting style is actual the
+ union of both. I.E. either style recognizes both "__pt__" and "__rf__"
+ for operator "->", even though the first is lucid style and the second
+ is ARM style. (FIXME?) */
+
+extern enum demangling_styles
+{
+ unknown_demangling = 0,
+ auto_demangling = DMGL_AUTO,
+ gnu_demangling = DMGL_GNU,
+ lucid_demangling = DMGL_LUCID,
+ arm_demangling = DMGL_ARM,
+ hp_demangling = DMGL_HP,
+ edg_demangling = DMGL_EDG
+} current_demangling_style;
+
+/* Define string names for the various demangling styles. */
+
+#define AUTO_DEMANGLING_STYLE_STRING "auto"
+#define GNU_DEMANGLING_STYLE_STRING "gnu"
+#define LUCID_DEMANGLING_STYLE_STRING "lucid"
+#define ARM_DEMANGLING_STYLE_STRING "arm"
+#define HP_DEMANGLING_STYLE_STRING "hp"
+#define EDG_DEMANGLING_STYLE_STRING "edg"
+
+/* Some macros to test what demangling style is active. */
+
+#define CURRENT_DEMANGLING_STYLE current_demangling_style
+#define AUTO_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_AUTO)
+#define GNU_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_GNU)
+#define LUCID_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_LUCID)
+#define ARM_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_ARM)
+#define HP_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_HP)
+#define EDG_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_EDG)
+
+extern char *
+cplus_demangle PARAMS ((const char *mangled, int options));
+
+extern int
+cplus_demangle_opname PARAMS ((const char *opname, char *result, int options));
+
+extern const char *
+cplus_mangle_opname PARAMS ((const char *opname, int options));
+
+/* Note: This sets global state. FIXME if you care about multi-threading. */
+
+extern void
+set_cplus_marker_for_demangling PARAMS ((int ch));
+
+#endif /* DEMANGLE_H */
diff --git a/include/dis-asm.h b/include/dis-asm.h
new file mode 100644
index 0000000..666ed69
--- /dev/null
+++ b/include/dis-asm.h
@@ -0,0 +1,243 @@
+/* Interface between the opcode library and its callers.
+ Written by Cygnus Support, 1993.
+
+ The opcode library (libopcodes.a) provides instruction decoders for
+ a large variety of instruction sets, callable with an identical
+ interface, for making instruction-processing programs more independent
+ of the instruction set being processed. */
+
+#ifndef DIS_ASM_H
+#define DIS_ASM_H
+
+#include <stdio.h>
+#include "bfd.h"
+
+typedef int (*fprintf_ftype) PARAMS((PTR, const char*, ...));
+
+enum dis_insn_type {
+ dis_noninsn, /* Not a valid instruction */
+ dis_nonbranch, /* Not a branch instruction */
+ dis_branch, /* Unconditional branch */
+ dis_condbranch, /* Conditional branch */
+ dis_jsr, /* Jump to subroutine */
+ dis_condjsr, /* Conditional jump to subroutine */
+ dis_dref, /* Data reference instruction */
+ dis_dref2 /* Two data references in instruction */
+};
+
+/* This struct is passed into the instruction decoding routine,
+ and is passed back out into each callback. The various fields are used
+ for conveying information from your main routine into your callbacks,
+ for passing information into the instruction decoders (such as the
+ addresses of the callback functions), or for passing information
+ back from the instruction decoders to their callers.
+
+ It must be initialized before it is first passed; this can be done
+ by hand, or using one of the initialization macros below. */
+
+typedef struct disassemble_info {
+ fprintf_ftype fprintf_func;
+ PTR stream;
+ PTR application_data;
+
+ /* Target description. We could replace this with a pointer to the bfd,
+ but that would require one. There currently isn't any such requirement
+ so to avoid introducing one we record these explicitly. */
+ /* The bfd_flavour. This can be bfd_target_unknown_flavour. */
+ enum bfd_flavour flavour;
+ /* The bfd_arch value. */
+ enum bfd_architecture arch;
+ /* The bfd_mach value. */
+ unsigned long mach;
+ /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
+ enum bfd_endian endian;
+
+ /* An array of pointers to symbols either at the location being disassembled
+ or at the start of the function being disassembled. The array is sorted
+ so that the first symbol is intended to be the one used. The others are
+ present for any misc. purposes. This is not set reliably, but if it is
+ not NULL, it is correct. */
+ asymbol **symbols;
+ /* Number of symbols in array. */
+ int num_symbols;
+
+ /* For use by the disassembler.
+ The top 16 bits are reserved for public use (and are documented here).
+ The bottom 16 bits are for the internal use of the disassembler. */
+ unsigned long flags;
+#define INSN_HAS_RELOC 0x80000000
+ PTR private_data;
+
+ /* Function used to get bytes to disassemble. MEMADDR is the
+ address of the stuff to be disassembled, MYADDR is the address to
+ put the bytes in, and LENGTH is the number of bytes to read.
+ INFO is a pointer to this struct.
+ Returns an errno value or 0 for success. */
+ int (*read_memory_func)
+ PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length,
+ struct disassemble_info *info));
+
+ /* Function which should be called if we get an error that we can't
+ recover from. STATUS is the errno value from read_memory_func and
+ MEMADDR is the address that we were trying to read. INFO is a
+ pointer to this struct. */
+ void (*memory_error_func)
+ PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info));
+
+ /* Function called to print ADDR. */
+ void (*print_address_func)
+ PARAMS ((bfd_vma addr, struct disassemble_info *info));
+
+ /* Function called to determine if there is a symbol at the given ADDR.
+ If there is, the function returns 1, otherwise it returns 0.
+ This is used by ports which support an overlay manager where
+ the overlay number is held in the top part of an address. In
+ some circumstances we want to include the overlay number in the
+ address, (normally because there is a symbol associated with
+ that address), but sometimes we want to mask out the overlay bits. */
+ int (* symbol_at_address_func)
+ PARAMS ((bfd_vma addr, struct disassemble_info * info));
+
+ /* These are for buffer_read_memory. */
+ bfd_byte *buffer;
+ bfd_vma buffer_vma;
+ int buffer_length;
+
+ /* This variable may be set by the instruction decoder. It suggests
+ the number of bytes objdump should display on a single line. If
+ the instruction decoder sets this, it should always set it to
+ the same value in order to get reasonable looking output. */
+ int bytes_per_line;
+
+ /* the next two variables control the way objdump displays the raw data */
+ /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
+ /* output will look like this:
+ 00: 00000000 00000000
+ with the chunks displayed according to "display_endian". */
+ int bytes_per_chunk;
+ enum bfd_endian display_endian;
+
+ /* Results from instruction decoders. Not all decoders yet support
+ this information. This info is set each time an instruction is
+ decoded, and is only valid for the last such instruction.
+
+ To determine whether this decoder supports this information, set
+ insn_info_valid to 0, decode an instruction, then check it. */
+
+ char insn_info_valid; /* Branch info has been set. */
+ char branch_delay_insns; /* How many sequential insn's will run before
+ a branch takes effect. (0 = normal) */
+ char data_size; /* Size of data reference in insn, in bytes */
+ enum dis_insn_type insn_type; /* Type of instruction */
+ bfd_vma target; /* Target address of branch or dref, if known;
+ zero if unknown. */
+ bfd_vma target2; /* Second target address for dref2 */
+
+} disassemble_info;
+
+
+/* Standard disassemblers. Disassemble one instruction at the given
+ target address. Return number of bytes processed. */
+typedef int (*disassembler_ftype)
+ PARAMS((bfd_vma, disassemble_info *));
+
+extern int print_insn_big_mips PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_little_mips PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_i386_att PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_i386_intel PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_m68k PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_z8001 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_z8002 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_h8300 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_h8300h PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_h8300s PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_h8500 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*));
+extern disassembler_ftype arc_get_disassembler PARAMS ((int, int));
+extern int print_insn_big_arm PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_little_arm PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_sparc PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_big_a29k PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_little_a29k PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_i960 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_sh PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_shl PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_hppa PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_fr30 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_m32r PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_m88k PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_mcore PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_big_powerpc PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_little_powerpc PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_d10v PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_d30v PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_vax PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_tic80 PARAMS ((bfd_vma, disassemble_info*));
+
+/* Fetch the disassembler for a given BFD, if that support is available. */
+extern disassembler_ftype disassembler PARAMS ((bfd *));
+
+
+/* This block of definitions is for particular callers who read instructions
+ into a buffer before calling the instruction decoder. */
+
+/* Here is a function which callers may wish to use for read_memory_func.
+ It gets bytes from a buffer. */
+extern int buffer_read_memory
+ PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
+
+/* This function goes with buffer_read_memory.
+ It prints a message using info->fprintf_func and info->stream. */
+extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *));
+
+
+/* Just print the address in hex. This is included for completeness even
+ though both GDB and objdump provide their own (to print symbolic
+ addresses). */
+extern void generic_print_address
+ PARAMS ((bfd_vma, struct disassemble_info *));
+
+/* Always true. */
+extern int generic_symbol_at_address
+ PARAMS ((bfd_vma, struct disassemble_info *));
+
+/* Macro to initialize a disassemble_info struct. This should be called
+ by all applications creating such a struct. */
+#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
+ (INFO).flavour = bfd_target_unknown_flavour, \
+ (INFO).arch = bfd_arch_unknown, \
+ (INFO).mach = 0, \
+ (INFO).endian = BFD_ENDIAN_UNKNOWN, \
+ INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
+
+/* Call this macro to initialize only the internal variables for the
+ disassembler. Architecture dependent things such as byte order, or machine
+ variant are not touched by this macro. This makes things much easier for
+ GDB which must initialize these things seperatly. */
+
+#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
+ (INFO).fprintf_func = (fprintf_ftype)(FPRINTF_FUNC), \
+ (INFO).stream = (PTR)(STREAM), \
+ (INFO).symbols = NULL, \
+ (INFO).num_symbols = 0, \
+ (INFO).buffer = NULL, \
+ (INFO).buffer_vma = 0, \
+ (INFO).buffer_length = 0, \
+ (INFO).read_memory_func = buffer_read_memory, \
+ (INFO).memory_error_func = perror_memory, \
+ (INFO).print_address_func = generic_print_address, \
+ (INFO).symbol_at_address_func = generic_symbol_at_address, \
+ (INFO).flags = 0, \
+ (INFO).bytes_per_line = 0, \
+ (INFO).bytes_per_chunk = 0, \
+ (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
+ (INFO).insn_info_valid = 0
+
+#endif /* ! defined (DIS_ASM_H) */
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
new file mode 100644
index 0000000..deaccd4
--- /dev/null
+++ b/include/elf/ChangeLog
@@ -0,0 +1,719 @@
+1999-04-21 Nick Clifton <nickc@cygnus.com>
+
+ * reloc-macros.h (START_RELOC_NUMBERS): Prepend an underscore to
+ fake reloc entry name (if possible), in order to avoid conflicts
+ with typedefs of the same name.
+
+1999-04-16 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips.h (EF_MIPS_32BITMODE): New.
+
+1999-04-08 Nick Clifton <nickc@cygnus.com>
+
+ * mcore.h: New header file. Defines for Motorolla's MCore
+ processor.
+
+1999-04-08 Nick Clifton <nickc@cygnus.com>
+
+ * common.h: Add new constants defined in: "System V Application
+ Binary Interface - DRAFT - April 29, 1998" found at the web site:
+ http://www.sco.com/developer/gabi/contents.html
+
+ (EM_MMA): Removed. Replaced with EM_MCORE as Motorolla own this
+ value.
+
+1999-03-31 Nick Clifton <nickc@cygnus.com>
+
+ * reloc-macros.h: Fixed to not generate an enum with a trailing
+ comma.
+
+1999-03-16 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips.h (E_MIPS_MACH_5000): New.
+
+1999-03-10 Ulrich Drepper <drepper@cygnus.com>
+
+ * common.h: Add definitions for a few more Solaris ELF extensions.
+
+Thu Feb 18 18:58:26 1999 Ian Lance Taylor <ian@cygnus.com>
+
+ * external.h: Only use attribute if __GNUC__ is defined.
+
+1999-02-17 Nick Clifton <nickc@cygnus.com>
+
+ Patch submitted by: Scott Bambrough <scottb@corelcomputer.com>
+
+ * elf/external.h: struct Elf_External_Versym must be packed on
+ ARM. Code uses sizeof(Elf_External_Versym) and assumes it is
+ equal to sizeof(char[2]). Reported by Jim Pick <jim@jimpick.com>
+
+1999-02-02 Nick Clifton <nickc@cygnus.com>
+
+ * dwarf2.h (DWARF2_External_ARange): New structure.
+ (DWARF2_Internal_ARange): New structure.
+
+Mon Feb 1 11:33:56 1999 Catherine Moore <clm@cygnus.com>
+
+ * arm.h: Renumber relocs to conform to standard.
+ (EF_NEW_ABI): Define.
+ (EF_OLD_ABI): Define.
+ * arm-oabi.h: New file.
+
+1999-01-28 Nick Clifton <nickc@cygnus.com>
+
+ * fr30.h: Add R_FR30_GNU_VT{INHERIT,ENTRY} relocs.
+
+1999-01-27 Nick Clifton <nickc@cygnus.com>
+
+ * dwarf2.h: Add typedefs for structures found in dwarf2 sections.
+
+1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips.h (E_MIPS_MACH_4111): New.
+
+1998-12-15 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips.h (EF_MIPS_ABI,E_MIPS_ABI_O32,E_MIPS_ABI_O64,
+ E_MIPS_ABI_EABI32,E_MIPS_ABI_EABI64):
+
+1998-12-03 Nick Clifton <nickc@cygnus.com>
+
+ * fr30.h: Add R_FR30_48 reloc.
+
+1998-12-02 Ulrich Drepper <drepper@cygnus.com>
+
+ * mips.h: Add external data type for conflict section.
+
+ * mips.h: Add more LL_* options from Irix 6.5.
+
+ * mips.h: Add R_MIPS_JALR and adjust R_MIPS_max appropriately.
+
+Tue Nov 10 15:12:28 1998 Nick Clifton <nickc@cygnus.com>
+
+ * common.h (EM_CYGNUS_FR30): Reduce to a 16 bit value.
+
+Tue Nov 10 15:17:28 1998 Catherine Moore <clm@cygnus.com>
+
+ * d10v.h: Add vtable relocs.
+
+Wed Nov 4 15:56:50 1998 Nick Clifton <nickc@cygnus.com>
+
+ * common.h (EM_CYGNUS_FR30): New machine number.
+
+ * fr30.h: New file: Definitions for the FR30.
+
+Fri Oct 30 11:54:15 1998 Catherine Moore <clm@cygnus.com>
+
+ From Philip Blundell <pb@nexus.co.uk>:
+ * arm.h (R_ARM_COPY, et al.): New relocs, used by Linux for PIC.
+ (EF_ALIGN8): New flag.
+
+Tue Oct 20 11:19:50 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * common.h (NT_LWPSTATUS): Close comment accidentally left open.
+
+Mon Oct 19 20:24:11 1998 Catherine Moore <clm@cygnus.com>
+
+ * sh.h: Add vtable relocs.
+
+Mon Oct 19 01:44:42 1998 Felix Lee <flee@cygnus.com>
+
+ * common.h (NT_PSTATUS, NT_FPREGS, NT_PSINFO,
+ NT_LWPSTATUS,NT_LWPSINFO): added.
+ * internal.h (Elf_Internal_Note): new structure members.
+
+Fri Oct 16 14:11:25 1998 Catherine Moore <clm@cygnus.com>
+
+ * m32r.h: Add vtable relocs.
+
+Tue Oct 6 09:22:22 1998 Catherine Moore <clm@cygnus.com>
+
+ * sparc.h: Add vtable relocs.
+
+Mon Oct 5 09:39:22 1998 Catherine Moore <clm@cygnus.com>
+
+ * v850.h: Add vtable relocs.
+
+Sun Oct 4 21:17:51 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h (R_386_max): Change from 252 to 24.
+
+Mon Sep 21 12:24:44 1998 Catherine Moore <clm@cygnus.com>
+
+ * i386.h: Change vtable reloc numbers.
+
+Sun Sep 20 00:54:22 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * m68k.h: Add vtable relocs and R_68K_max.
+
+Tue Sep 15 09:56:49 CDT 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm.h: Add vtable relocs.
+
+Mon Aug 31 11:25:27 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm.h: Define STT_ARM_TFUNC. Remove ST_THUMB_xxxx
+ definitions.
+
+Sat Aug 29 22:25:51 1998 Richard Henderson <rth@cygnus.com>
+
+ * i386.h: Add vtable relocs.
+
+1998-08-25 16:42 Ulrich Drepper <drepper@cygnus.com>
+
+ * common.h: Add SYMINFO_* macros to access Elf*_Syminfo information.
+
+ * external.h: Add Elf_External_Syminfo definition.
+
+ * internal.h: Add Elf_Internal_Syminfo, Elf32_Internal_Syminfo,
+ and Elf64_Syminfo definitions.
+
+Sun Aug 9 20:26:49 CDT 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm.h: Add ST_THUMB definitions.
+
+Wed Aug 5 15:52:35 1998 Nick Clifton <nickc@cygnus.com>
+
+ * arm.h: Add ELF header flags to specify compile time optins:
+ EF_INTERWORK: New flag.
+ EF_APCS_26: New flag.
+ EF_APCS_FLOAT: New flag.
+ EF_PIC: New flag.
+
+1998-07-31 21:28 Ulrich Drepper <drepper@cygnus.com>
+
+ * mips.h: Add missing RHF_* constants.
+
+Fri Jul 31 10:01:40 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm.h: Add R_ARM_THM_PC9 relocation.
+
+1998-07-30 16:25 Ulrich Drepper <drepper@cygnus.com>
+
+ * common.h: Add new DT_* entries and there flag macros from Solaris.
+
+Tue Jul 28 18:14:07 1998 Stan Cox <scox@equinox.cygnus.com>
+
+ * sparc.h: (R_SPARC_REV32): Added for little endian data e.g. sparc 86x.
+
+Fri Jul 24 11:22:06 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h: Add R_MN10300_24 relocation.
+
+1998-07-24 Ulrich Drepper <drepper@cygnus.com>
+
+ * mips.h: Add MIPS64 relocation names and values.
+
+Wed Jul 22 19:29:00 Catherine Moore <clm@cygnus.com>
+
+ * arm.h: Rename relocations.
+
+1998-07-22 Ulrich Drepper <drepper@cygnus.com>
+
+ * ppc.h: Define enum as elf_ppc_reloc_type.
+
+Wed Jul 22 16:22:11 1998 Nick Clifton <nickc@cygnus.com>
+
+ * reloc-macros.h: New file. Provides relocation macros:
+ START_RELOC_NUMBERS, RELOC_NUMBER, FAKE_RELOC, EMPTY_RELOC and
+ END_RELOC_NUMBERS used by other elf header files.
+
+ * alpha.h: Use reloc-macros.h.
+ * arc.h: Use reloc-macros.h.
+ * arm.h: Use reloc-macros.h.
+ * d10v.h: Use reloc-macros.h.
+ * d30v.h: Use reloc-macros.h.
+ * hppa.h: Use reloc-macros.h.
+ * i386.h: Use reloc-macros.h.
+ * m32r.h: Use reloc-macros.h.
+ * m68k.h: Use reloc-macros.h.
+ * mips.h: Use reloc-macros.h.
+ * mn10200.h: Use reloc-macros.h.
+ * mn10300.h: Use reloc-macros.h.
+ * ppc.h: Use reloc-macros.h.
+ * sh.h: Use reloc-macros.h.
+ * sparc.h: Use reloc-macros.h.
+ * v850.h: Use reloc-macros.h.
+
+1998-07-22 13:07 Ulrich Drepper <drepper@cygnus.com>
+
+ * mn10300.h: Rewrite relocation definition using macros.
+ * mips.h: Likewise.
+ * ppc.h: Likewise.
+ * alpha.h: Likewise.
+ * arm.h: Likewise.
+ * d10v.h: Likewise.
+ * d30v.h: Likewise.
+ * m32r.h: Likewise.
+ * m68k.h: Likewise.
+ * mn10200.h: Likewise.
+ * sh.h: Likewise.
+ * sparc.h: Likewise.
+
+1998-07-21 13:07 Ulrich Drepper <drepper@cygnus.com>
+
+ * arm.h: New file.
+ * d10v.h: New file.
+ * d30v.h: New file.
+ * i386.h: New file.
+ * m68k.h: New file.
+ * mn10200.h: New file.
+ * sh.h: New file.
+
+ * mips.h: Add R_MIPS_* and SHT_MIPS_* entries.
+
+ * mn10300.h: Add R_MN10300_* entries.
+
+ * ppc.h: Add R_PPC_* entries.
+
+1998-07-20 07:11 Ulrich Drepper <drepper@cygnus.com>
+
+ * mips.h: Add ODK_*, OEX_*, OPAD_*, OHW_*, and OGP_* constants.
+ Define Elf32_External_Lib.
+
+1998-07-19 15:24 Ulrich Drepper <drepper@cygnus.com>
+
+ * mips.h (PT_MIPS_OPTIONS): New symbol.
+ Add lots of DT_MIPS_* symbols.
+
+Fri Jun 26 10:46:35 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h: New file.
+
+Thu Jun 18 19:27:56 1998 Nick Clifton <nickc@cygnus.com>
+
+ * common.h (EM_960, EM_V800, EM_FR20, EM_RH32, EM_MMA,
+ EM_OLD_ALPHA): Add these constants.
+
+Thu Jun 11 17:59:01 1998 Nick Clifton <nickc@cygnus.com>
+
+ * common.h (EM_486, EM_S370): Add these constants.
+
+Tue Jun 9 09:35:29 1998 Nick Clifton <nickc@cygnus.com>
+
+ * common.h (EM_ARM): Add this constant.
+
+Wed May 6 09:45:30 1998 Gavin Koch <gavin@cygnus.com>
+
+ * mips.h (EF_MIPS_MACH,E_MIPS_MACH_*): Added.
+
+Sat Apr 25 18:35:06 1998 Richard Henderson <rth@cygnus.com>
+
+ * alpha.h (STO_ALPHA_NOPV, STO_ALPHA_STD_GPLOAD): New.
+
+Wed Apr 15 15:42:45 1998 Richard Henderson <rth@cygnus.com>
+
+ * common.h (EM_SPARC64): Move and rename to EM_OLD_SPARCV9.
+ (EM_SPARCV9): New. This is the official ABI name and number.
+
+Sat Feb 28 17:04:41 1998 Richard Henderson <rth@cygnus.com>
+
+ * alpha.h (EF_ALPHA_32BIT, EF_ALPHA_CANRELAX): New.
+
+Mon Dec 15 15:07:49 1997 Nick Clifton <nickc@cygnus.com>
+
+ * m32r.h (EF_M32R_ARCH, E_M32R_ARCH): New flags to
+ specify machine architecture.
+
+Fri Dec 5 11:20:08 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h: New constants: SHN_V850_SCOMMON, SHN_V850_TCOMMON,
+ SHN_V850_ZCOMMON, SHT_V850_SCOMMON, SHT_V850_TCOMMON,
+ SHT_V850_ZCOMMON to handle v850 common sections.
+ enum reloc_type renamed to v850_reloc_type to avoid name
+ conflict.
+
+Thu Oct 23 13:55:24 1997 Richard Henderson <rth@cygnus.com>
+
+ * sparc.h (enum elf_sparc_reloc_type): Add UA64 & UA16.
+
+Thu Oct 23 00:42:04 1997 Richard Henderson <rth@dot.cygnus.com>
+
+ * sparc.h (DT_SPARC_REGISTER): New macro.
+ (DT_SPARC_PLTFMT): In support of old sparc64-linux .plts; will
+ go away soon.
+
+Tue Sep 30 13:26:58 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (EF_SPARC_HAL_R1, EF_SPARC_EXT_MASK): New macros.
+ (EF_SPARCV9_{MM,TSO,PSO,RMO}): New macros.
+ (SHN_BEFORE,SHN_AFTER): New macros.
+ (SHF_EXCLUDE,SHF_ORDERED): New macros.
+ (STT_REGISTER): New macro.
+ (R_SPARC_GLOB_JMP): Deleted, but slot reserved.
+ (R_SPARC_{DISP64,PLT64,HIX22,LOX10}): New relocations.
+ (R_SPARC_{H44,M44,L44,REGISTER}): New relocations.
+ (ELF64_R_TYPE_{DATA,ID,INFO}): New macros.
+
+Wed Sep 17 16:41:42 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h: Add R_V850_CALLT_6_7_OFFSET and R_V850_CALLT_16_16_OFFSET.
+
+Tue Sep 16 14:16:17 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (reloc_type): Add R_V850_TDA_16_16_OFFSET.
+
+Wed Sep 3 15:11:14 1997 Richard Henderson <rth@cygnus.com>
+
+ * mips.h: Correct typo in comment.
+
+Wed Sep 3 11:25:57 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (reloc_type): Remove R_V850_16_PCREL.
+
+Tue Sep 2 17:41:05 1997 Nick Clifton <nickc@cygnus.com>
+
+ * common.h: Remove magic number for V850E.
+ * common.h: Remove magic number for V850EA.
+ * v850.h: Add new flags for e_flags field in elf header.
+
+Mon Aug 25 16:06:47 1997 Nick Clifton <nickc@cygnus.com>
+
+ * common.h (EM_CYGNUS_V850E): backend magic number for v850e.
+ * common.h (EM_CYGNUS_V850EA): backend magic number for v850ea.
+
+Mon Aug 18 11:05:23 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (reloc_type): Add 16 bit PC relative relocation.
+
+Fri Aug 15 05:10:09 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h (enum reloc): Move here from elf32-arc.c.
+
+Fri Aug 8 17:05:29 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h: New file.
+ * common.h (EM_CYGNUS_ARC): Define.
+
+Mon Jun 16 14:46:12 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (Elf_Internal_Ehdr): Change e_phoff and e_shoff from
+ bfd_signed_vma to bfd_size_type, as they are not signed.
+
+Wed Mar 5 15:35:26 1997 Doug Evans <dje@seba.cygnus.com>
+
+ * m32r.h (SHF_M32R_CAN_RELAX): Define.
+
+Mon Feb 24 17:49:01 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * external.h: Dump the 32/64 bit specific forms of the version
+ structures, and just define them as size independent.
+
+ * common.h (VERSYM_HIDDEN, VERSYM_VERSION): Define.
+
+Fri Feb 21 13:00:34 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * m32r.h (enum reloc_type): Add R_M32R_SDA16.
+ (SHN_M32R_SCOMMON): Define.
+
+Wed Feb 19 15:35:31 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ From Eric Youngdale <eric@andante.jic.com>:
+ * external.h, internal.h, common.h: Added new structures and
+ definitions for ELF versions.
+
+Tue Feb 18 17:40:36 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * common.h (EM_CYGNUS_D30V): Define.
+
+Mon Jan 27 11:54:44 1997 Doug Evans <dje@seba.cygnus.com>
+
+ * m32r.h (enum reloc_type): Add R_M32R_HI16_[SU]LO,R_M32R_LO16.
+
+Fri Jan 3 11:32:51 1997 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * v850.h (V850_OTHER_{TDA_BYTE,ERROR}): New bits for the st_other
+ field.
+ (SHN_V850_*): Remove v850 specific section indexes, which are not
+ needed.
+ (enum reloc_type): Move the v850 relocations here from
+ elf32-v850.c
+
+Thu Jan 2 19:30:23 1997 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * v850.h: New file, provide V850 specific definitions.
+
+Tue Dec 31 14:44:32 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * common.h (DT_AUXILIARY): Define.
+ (DT_FILTER): Define.
+
+Wed Dec 4 05:03:37 1996 Jason Merrill <jason@yorick.cygnus.com>
+
+ * dwarf2.h: Update.
+
+Tue Nov 26 10:44:47 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (STO_MIPS16): Define.
+
+Tue Nov 12 15:45:42 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h: Remove empty file.
+
+Tue Oct 8 11:31:24 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (EF_MIPS_ABI2): Define.
+
+Thu Oct 3 10:01:40 1996 Jeffrey A Law (law@cygnus.com)
+
+ * common.h: Break mn10x00 support into mn10200 and mn10300.
+
+Wed Oct 2 21:26:43 1996 Jeffrey A Law (law@cygnus.com)
+
+ * common.h (EM_CYGNUS_MN10x00): Define.
+
+Mon Sep 23 09:18:04 1996 Doug Evans <dje@seba.cygnus.com>
+
+ * m32r.h: New file.
+
+Fri Aug 30 17:06:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * common.h (EM_SH): Define.
+
+Tue Aug 20 14:47:54 1996 J.T. Conklin <jtc@hippo.cygnus.com>
+
+ * common.h (EM_CYGNUS_V850): Define.
+
+Mon Aug 19 10:59:10 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * common.h (EM_CYGNUS_M32R): Define.
+
+Mon Jul 22 18:59:55 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (SHT_MIPS_IFACE, SHT_MIPS_CONTENT): Define.
+ (SHT_MIPS_SYMBOL_LIB): Define.
+ (SHF_MIPS_MERGE, SHF_MIPS_ADDR32, SHF_MIPS_ADDR64): Define.
+ (SHF_MIPS_NOSTRIP, SHF_MIPS_LOCAL, SHF_MIPS_NAMES): Define.
+
+Thu Jul 18 19:12:15 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * dwarf2.h: New file.
+
+Jul 18 13:20:39 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * common.h (EM_CYGNUS_D10V): Define.
+ * d10v.h: New file.
+
+Fri Jun 21 12:33:24 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha.h: New file.
+ * common.h (EM_ALPHA): Define.
+
+Fri May 31 17:28:05 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (Elf_External_Options, Elf_Internal_Options): Define.
+ (bfd_mips_elf_swap_options_in): Declare.
+ (bfd_mips_elf_swap_options_out): Declare.
+ (ODK_*): Define.
+ (Elf64_External_RegInfo, Elf64_Internal_RegInfo): Define.
+ (bfd_mips_elf64_swap_reginfo_in): Declare.
+ (bfd_mips_elf64_swap_reginfo_out): Declare.
+
+Thu May 30 12:35:57 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (E_MIPS_ARCH_4): Define.
+
+Wed May 29 15:35:33 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (Elf64_Mips_External_Rel): Define.
+ (Elf64_Mips_Internal_Rel): Define.
+ (Elf64_Mips_External_Rela, Elf64_Mips_Internal_Rela): Define.
+ (RSS_*): Define.
+
+Mon Apr 22 18:26:30 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (R_SPARC_[56]): Always define.
+
+Mon Feb 19 01:55:56 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (R_SPARC_{PLT32,HIPLT22,LOPLT10,PCPLT32,PCPLT22,
+ PCPLT10,5,6}): Don't define ifdef SPARC64_OLD_RELOCS.
+
+Tue Feb 6 11:33:58 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (enum sparc_elf_reloc_type): Define.
+
+Wed Jan 17 09:09:16 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * common.h: Define EM_SPARC32PLUS.
+ * sparc.h: New file.
+
+Thu Jan 11 16:27:34 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * ppc.h (SHF_EXCLUDE, SHT_ORDERED): New fields from the abi.
+
+Thu Nov 30 16:47:18 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (struct elf_segment_map): Add includes_filehdr and
+ includes_phdrs fields.
+
+Tue Nov 28 16:58:10 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * internal.h (struct elf_segment_map): Define.
+
+Tue Oct 31 15:19:36 1995 Fred Fish <fnf@cygnus.com>
+
+ * common.h, dwarf.h, external.h, hppa.h, internal.h,
+ mips.h, ppc.h: Protect against multiple inclusions.
+
+Thu Sep 21 13:51:58 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * ppc.h (EF_PPC_RELOCATABLE_LIB): Add new flag bit.
+
+Fri Sep 1 15:32:17 1995 Kazumoto Kojima <kkojima@info.kanagawa-u.ac.jp>
+
+ * mips.h: Add some definitions used on Irix 5.
+
+Tue Jun 20 10:18:28 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hppa.h (CPU_PA_RISC1_0): Protect from redefinitions.
+ (CPU_PA_RISC1_1): Likewise.
+
+Wed Mar 8 18:14:37 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * ppc.h: New file for PowerPC support.
+
+Tue Feb 14 13:59:13 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * common.h (EM_PPC): Use offical value of 20, not 17.
+ (EM_PPC_OLD): Define this to be the old value of EM_PPC.
+
+Tue Jan 24 09:40:59 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * common.h (EM_PPC): New macro, PowerPC machine id.
+
+Tue Jan 17 10:51:38 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * mips.h (SHT_MIPS_MSYM, SHT_MIPS_DWARF, SHT_MIPS_EVENTS): Define.
+
+Mon Oct 17 13:43:59 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * internal.h (Elf_Internal_Shdr): Remove rawdata and size fields.
+ Add bfd_section field.
+
+Tue May 24 16:11:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (Elf32_External_gptab): Define.
+
+Mon May 16 13:22:04 1994 Jeff Law (law@snake.cs.utah.edu)
+
+ * common.h (EM_HPPA): Delete.
+ (EM_PARISC): Add.
+ * hppa.h: New file.
+
+Mon May 9 13:27:03 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * common.h (SHN_LORESERVE): Rename from SHN_LORESERV.
+ (ELF32_R_TYPE, ELF32_R_INFO): Don't rely on size of unsigned char.
+ (ELF64_R_TYPE): Don't rely on size of unsigned long.
+
+Mon Apr 25 15:53:09 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * internal.h (Elf_Internal_Shdr): Use PTR, not void *.
+
+Fri Mar 11 00:34:59 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
+
+ * mips.h (SHN_MIPS_TEXT, SHN_MIPS_DATA): Define.
+
+Sat Mar 5 14:08:54 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
+
+ * internal.h: Remove Elf32_*, Elf64_* typedefs. These names
+ cause conflicts with system headers, e.g. link.h in gdb/solib.c.
+ Combine 32- and 64-bit versions of *_Internal_Dyn.
+ * common.h: Replace uses of Elf64_Word, Elf64_Xword typedefs
+ by their expansion.
+ * mips.h: Replace uses of Elf32_Word, Elf32_Sword, Elf32_Addr
+ typedefs by their expansion. Add DT_MIPS_RLD_MAP definition.
+
+Fri Feb 18 10:39:54 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * common.h (EM_CYGNUS_POWERPC): Define. This may be temporary,
+ depending upon how quickly I can find a real PowerPC ABI.
+
+Mon Feb 7 08:27:13 1994 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * internal.h: Change HOST_64_BIT to BFD_HOST_64_BIT.
+
+Wed Feb 2 14:12:18 1994 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * common.h: Add comments regarding value of EM_HPPA and how to
+ pick an unofficial value.
+
+Wed Nov 17 17:14:26 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (SHT_MIPS_OPTIONS): Define.
+
+Mon Nov 8 17:57:00 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h: Added some more MIPS ABI macro definitions.
+
+Wed Nov 3 22:07:17 1993 Ken Raeburn (raeburn@rtl.cygnus.com)
+
+ * common.h (EM_MIPS_RS4_BE): New macro.
+
+Tue Oct 12 07:28:18 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h: New file. MIPS ABI specific information.
+
+Mon Jun 21 13:13:43 1993 Ken Raeburn (raeburn@poseidon.cygnus.com)
+
+ * internal.h: Combined 32- and 64-bit versions of all structures
+ except *_Internal_Dyn. This will simply the assembler interface,
+ and some bfd code.
+
+Tue May 25 02:00:16 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * external.h, internal.h, common.h: Added 64-bit versions of some
+ structures and macros. Renamed old versions to put "32" in the
+ name. Some are unchanged.
+
+Thu Apr 29 12:12:20 1993 Ken Raeburn (raeburn@deneb.cygnus.com)
+
+ * common.h (EM_HPPA, NT_VERSION, STN_UNDEF, DT_*): New macros.
+ * external.h (Elf_External_Dyn): New type.
+
+ * internal.h (Elf_Intenral_Shdr): New field `size'.
+ (Elf_Internal_Dyn): New type.
+
+Tue Apr 20 16:03:45 1993 Fred Fish (fnf@cygnus.com)
+
+ * dwarf.h (LANG_CHILL): Change value to one randomly picked in
+ the user defined range, to reduce probability of collisions.
+
+Sun Nov 15 09:34:02 1992 Fred Fish (fnf@cygnus.com)
+
+ * dwarf.h (AT_src_coords): Whitespace change only.
+ * dwarf.h (AT_body_begin, AT_body_end, LANG_MODULA2):
+ Add from latest gcc.
+ * dwarf.h (LANG_CHILL): Add as GNU extension.
+
+Sat Aug 1 13:46:53 1992 Fred Fish (fnf@cygnus.com)
+
+ * dwarf.h: Replace with current version from gcc distribution.
+
+Fri Jun 19 19:05:09 1992 John Gilmore (gnu at cygnus.com)
+
+ * internal.h: Add real struct tags to all the Type_Defs, so they
+ can be used in prototypes where the Type_Defs are not known.
+
+Fri Apr 3 20:58:58 1992 Mark Eichin (eichin at cygnus.com)
+
+ * common.h: added ELF_R_{SYM,TYPE,INFO} for handling relocation
+ info
+ added EM_MIPS, and corrected value of EM_860 based on System V ABI
+ manual.
+
+ * external.h: added Elf_External_{Rel,Rela}.
+
+ * internal.h: added Elf_Internal_{Rel,Rela}.
+ added rawdata to Elf_Internal_Shdr.
+
+Sat Nov 30 20:43:59 1991 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * common.h, dwarf.h, external.h, internal.h, ChangeLog; moved from
+ ../elf-<foo>
+
+
+Local Variables:
+version-control: never
+End:
diff --git a/include/elf/alpha.h b/include/elf/alpha.h
new file mode 100644
index 0000000..1ae9d5e
--- /dev/null
+++ b/include/elf/alpha.h
@@ -0,0 +1,108 @@
+/* ALPHA ELF support for BFD.
+ Copyright (C) 1996, 1998 Free Software Foundation, Inc.
+
+ By Eric Youngdale, <eric@aib.com>. No processor supplement available
+ for this platform.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the ALPHA ELF ABI. Note
+ that most of this is not actually implemented by BFD. */
+
+#ifndef _ELF_ALPHA_H
+#define _ELF_ALPHA_H
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* All addresses must be below 2GB. */
+#define EF_ALPHA_32BIT 0x00000001
+
+/* All relocations needed for relaxation with code movement are present. */
+#define EF_ALPHA_CANRELAX 0x00000002
+
+/* Processor specific section flags. */
+
+/* This section must be in the global data area. */
+#define SHF_ALPHA_GPREL 0x10000000
+
+/* Section contains some sort of debugging information. The exact
+ format is unspecified. It's probably ECOFF symbols. */
+#define SHT_ALPHA_DEBUG 0x70000001
+
+/* Section contains register usage information. */
+#define SHT_ALPHA_REGINFO 0x70000002
+
+/* A section of type SHT_MIPS_REGINFO contains the following
+ structure. */
+typedef struct
+{
+ /* Mask of general purpose registers used. */
+ unsigned long ri_gprmask;
+ /* Mask of co-processor registers used. */
+ unsigned long ri_cprmask[4];
+ /* GP register value for this object file. */
+ long ri_gp_value;
+} Elf64_RegInfo;
+
+/* Special values for the st_other field in the symbol table. */
+
+#define STO_ALPHA_NOPV 0x80
+#define STO_ALPHA_STD_GPLOAD 0x88
+
+#include "elf/reloc-macros.h"
+
+/* Alpha relocs. */
+START_RELOC_NUMBERS (elf_alpha_reloc_type)
+ RELOC_NUMBER (R_ALPHA_NONE, 0) /* No reloc */
+ RELOC_NUMBER (R_ALPHA_REFLONG, 1) /* Direct 32 bit */
+ RELOC_NUMBER (R_ALPHA_REFQUAD, 2) /* Direct 64 bit */
+ RELOC_NUMBER (R_ALPHA_GPREL32, 3) /* GP relative 32 bit */
+ RELOC_NUMBER (R_ALPHA_LITERAL, 4) /* GP relative 16 bit w/optimization */
+ RELOC_NUMBER (R_ALPHA_LITUSE, 5) /* Optimization hint for LITERAL */
+ RELOC_NUMBER (R_ALPHA_GPDISP, 6) /* Add displacement to GP */
+ RELOC_NUMBER (R_ALPHA_BRADDR, 7) /* PC+4 relative 23 bit shifted */
+ RELOC_NUMBER (R_ALPHA_HINT, 8) /* PC+4 relative 16 bit shifted */
+ RELOC_NUMBER (R_ALPHA_SREL16, 9) /* PC relative 16 bit */
+ RELOC_NUMBER (R_ALPHA_SREL32, 10) /* PC relative 32 bit */
+ RELOC_NUMBER (R_ALPHA_SREL64, 11) /* PC relative 64 bit */
+
+/* Inherited these from ECOFF, but they are not particularly useful
+ and are depreciated. And not implemented in the BFD, btw. */
+ RELOC_NUMBER (R_ALPHA_OP_PUSH, 12) /* OP stack push */
+ RELOC_NUMBER (R_ALPHA_OP_STORE, 13) /* OP stack pop and store */
+ RELOC_NUMBER (R_ALPHA_OP_PSUB, 14) /* OP stack subtract */
+ RELOC_NUMBER (R_ALPHA_OP_PRSHIFT, 15) /* OP stack right shift */
+
+ RELOC_NUMBER (R_ALPHA_GPVALUE, 16)
+ RELOC_NUMBER (R_ALPHA_GPRELHIGH, 17)
+ RELOC_NUMBER (R_ALPHA_GPRELLOW, 18)
+ RELOC_NUMBER (R_ALPHA_IMMED_GP_16, 19)
+ RELOC_NUMBER (R_ALPHA_IMMED_GP_HI32, 20)
+ RELOC_NUMBER (R_ALPHA_IMMED_SCN_HI32, 21)
+ RELOC_NUMBER (R_ALPHA_IMMED_BR_HI32, 22)
+ RELOC_NUMBER (R_ALPHA_IMMED_LO32, 23)
+
+/* These relocations are specific to shared libraries. */
+ RELOC_NUMBER (R_ALPHA_COPY, 24) /* Copy symbol at runtime */
+ RELOC_NUMBER (R_ALPHA_GLOB_DAT, 25) /* Create GOT entry */
+ RELOC_NUMBER (R_ALPHA_JMP_SLOT, 26) /* Create PLT entry */
+ RELOC_NUMBER (R_ALPHA_RELATIVE, 27) /* Adjust by program base */
+
+ EMPTY_RELOC (R_ALPHA_max)
+END_RELOC_NUMBERS
+
+#endif /* _ELF_ALPHA_H */
diff --git a/include/elf/arc.h b/include/elf/arc.h
new file mode 100644
index 0000000..334b55f
--- /dev/null
+++ b/include/elf/arc.h
@@ -0,0 +1,54 @@
+/* ARC ELF support for BFD.
+ Copyright (C) 1995, 1997 Free Software Foundation, Inc.
+ Contributed by Doug Evans, (dje@cygnus.com)
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the ARC ELF ABI. */
+
+#ifndef _ELF_ARC_H
+#define _ELF_ARC_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_arc_reloc_type)
+ RELOC_NUMBER (R_ARC_NONE, 0)
+ RELOC_NUMBER (R_ARC_32, 1)
+ RELOC_NUMBER (R_ARC_B26, 2)
+ RELOC_NUMBER (R_ARC_B22_PCREL, 3)
+ EMPTY_RELOC (R_ARC_max)
+END_RELOC_NUMBERS
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* Four bit ARC machine type field. */
+#define EF_ARC_MACH 0x0000000f
+
+/* Various CPU types. */
+#define E_ARC_MACH_BASE 0x00000000
+#define E_ARC_MACH_UNUSED1 0x00000001
+#define E_ARC_MACH_UNUSED2 0x00000002
+#define E_ARC_MACH_UNUSED4 0x00000003
+
+/* Leave bits 0xf0 alone in case we ever have more than 16 cpu types.
+ Highly unlikely, but what the heck. */
+
+/* File contains position independent code. */
+#define EF_ARC_PIC 0x00000100
+
+#endif /* _ELF_ARC_H */
diff --git a/include/elf/arm-oabi.h b/include/elf/arm-oabi.h
new file mode 100644
index 0000000..6109842
--- /dev/null
+++ b/include/elf/arm-oabi.h
@@ -0,0 +1,87 @@
+/* ARM ELF support for BFD.
+ Copyright (C) 1998, 1999 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_ARM_H
+#define _ELF_ARM_H
+
+#include "elf/reloc-macros.h"
+
+/* Processor specific flags for the ELF header e_flags field. */
+#define EF_ARM_RELEXEC 0x01
+#define EF_ARM_HASENTRY 0x02
+#define EF_INTERWORK 0x04
+#define EF_APCS_26 0x08
+#define EF_APCS_FLOAT 0x10
+#define EF_PIC 0x20
+#define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */
+#define EF_NEW_ABI 0x80
+#define EF_OLD_ABI 0x100
+
+/* Local aliases for some flags to match names used by COFF port. */
+#define F_INTERWORK EF_INTERWORK
+#define F_APCS26 EF_APCS_26
+#define F_APCS_FLOAT EF_APCS_FLOAT
+#define F_PIC EF_PIC
+
+/* Additional symbol types for Thumb */
+#define STT_ARM_TFUNC 0xd
+
+/* ARM-specific values for sh_flags */
+#define SHF_ENTRYSECT 0x10000000 /* Section contains an entry point */
+#define SHF_COMDEF 0x80000000 /* Section may be multiply defined in the input to a link step */
+
+/* ARM-specific program header flags */
+#define PF_ARM_SB 0x10000000 /* Segment contains the location addressed by the static base */
+
+/* Relocation types. */
+START_RELOC_NUMBERS (elf_arm_reloc_type)
+ RELOC_NUMBER (R_ARM_NONE, 0)
+ RELOC_NUMBER (R_ARM_PC24, 1)
+ RELOC_NUMBER (R_ARM_ABS32, 2)
+ RELOC_NUMBER (R_ARM_REL32, 3)
+ RELOC_NUMBER (R_ARM_ABS8, 4)
+ RELOC_NUMBER (R_ARM_ABS16, 5)
+ RELOC_NUMBER (R_ARM_ABS12, 6)
+ RELOC_NUMBER (R_ARM_THM_ABS5, 7)
+ RELOC_NUMBER (R_ARM_THM_PC22, 8)
+ RELOC_NUMBER (R_ARM_SBREL32, 9)
+ RELOC_NUMBER (R_ARM_AMP_VCALL9, 10)
+ RELOC_NUMBER (R_ARM_THM_PC11, 11) /* cygnus extension to abi: thumb unconditional branch */
+ RELOC_NUMBER (R_ARM_THM_PC9, 12) /* cygnus extension to abi: thumb conditional branch */
+ RELOC_NUMBER (R_ARM_GNU_VTINHERIT, 13)
+ RELOC_NUMBER (R_ARM_GNU_VTENTRY, 14)
+ RELOC_NUMBER (R_ARM_COPY, 20) /* copy symbol at runtime */
+ RELOC_NUMBER (R_ARM_GLOB_DAT, 21) /* create GOT entry */
+ RELOC_NUMBER (R_ARM_JUMP_SLOT, 22) /* create PLT entry */
+ RELOC_NUMBER (R_ARM_RELATIVE, 23) /* adjust by program base */
+ RELOC_NUMBER (R_ARM_GOTOFF, 24) /* 32 bit offset to GOT */
+ RELOC_NUMBER (R_ARM_GOTPC, 25) /* 32 bit PC relative offset to GOT */
+ RELOC_NUMBER (R_ARM_GOT32, 26) /* 32 bit GOT entry */
+ RELOC_NUMBER (R_ARM_PLT32, 27) /* 32 bit PLT address */
+ FAKE_RELOC (FIRST_INVALID_RELOC, 28)
+ FAKE_RELOC (LAST_INVALID_RELOC, 249)
+ RELOC_NUMBER (R_ARM_RSBREL32, 250)
+ RELOC_NUMBER (R_ARM_THM_RPC22, 251)
+ RELOC_NUMBER (R_ARM_RREL32, 252)
+ RELOC_NUMBER (R_ARM_RABS32, 253)
+ RELOC_NUMBER (R_ARM_RPC24, 254)
+ RELOC_NUMBER (R_ARM_RBASE, 255)
+END_RELOC_NUMBERS
+
+#endif
diff --git a/include/elf/arm.h b/include/elf/arm.h
new file mode 100644
index 0000000..2c94b13
--- /dev/null
+++ b/include/elf/arm.h
@@ -0,0 +1,96 @@
+/* ARM ELF support for BFD.
+ Copyright (C) 1998, 1999 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_ARM_H
+#define _ELF_ARM_H
+
+#include "elf/reloc-macros.h"
+
+/* Processor specific flags for the ELF header e_flags field. */
+#define EF_ARM_RELEXEC 0x01
+#define EF_ARM_HASENTRY 0x02
+#define EF_INTERWORK 0x04
+#define EF_APCS_26 0x08
+#define EF_APCS_FLOAT 0x10
+#define EF_PIC 0x20
+#define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */
+#define EF_NEW_ABI 0x80
+#define EF_OLD_ABI 0x100
+
+/* Local aliases for some flags to match names used by COFF port. */
+#define F_INTERWORK EF_INTERWORK
+#define F_APCS26 EF_APCS_26
+#define F_APCS_FLOAT EF_APCS_FLOAT
+#define F_PIC EF_PIC
+
+/* Additional symbol types for Thumb */
+#define STT_ARM_TFUNC 0xd
+
+/* ARM-specific values for sh_flags */
+#define SHF_ENTRYSECT 0x10000000 /* Section contains an entry point */
+#define SHF_COMDEF 0x80000000 /* Section may be multiply defined in the input to a link step */
+
+/* ARM-specific program header flags */
+#define PF_ARM_SB 0x10000000 /* Segment contains the location addressed by the static base */
+
+/* Relocation types. */
+START_RELOC_NUMBERS (elf_arm_reloc_type)
+ RELOC_NUMBER (R_ARM_NONE, 0)
+ RELOC_NUMBER (R_ARM_PC24, 1)
+ RELOC_NUMBER (R_ARM_ABS32, 2)
+ RELOC_NUMBER (R_ARM_REL32, 3)
+ RELOC_NUMBER (R_ARM_PC13, 4)
+ RELOC_NUMBER (R_ARM_ABS16, 5)
+ RELOC_NUMBER (R_ARM_ABS12, 6)
+ RELOC_NUMBER (R_ARM_THM_ABS5, 7)
+ RELOC_NUMBER (R_ARM_ABS8, 8)
+ RELOC_NUMBER (R_ARM_SBREL32, 9)
+ RELOC_NUMBER (R_ARM_THM_PC22, 10)
+ RELOC_NUMBER (R_ARM_THM_PC8, 11)
+ RELOC_NUMBER (R_ARM_AMP_VCALL9, 12)
+ RELOC_NUMBER (R_ARM_SWI24, 13)
+ RELOC_NUMBER (R_ARM_THM_SWI8, 14)
+ RELOC_NUMBER (R_ARM_XPC25, 15)
+ RELOC_NUMBER (R_ARM_THM_XPC22, 16)
+ RELOC_NUMBER (R_ARM_COPY, 20) /* copy symbol at runtime */
+ RELOC_NUMBER (R_ARM_GLOB_DAT, 21) /* create GOT entry */
+ RELOC_NUMBER (R_ARM_JUMP_SLOT, 22) /* create PLT entry */
+ RELOC_NUMBER (R_ARM_RELATIVE, 23) /* adjust by program base */
+ RELOC_NUMBER (R_ARM_GOTOFF, 24) /* 32 bit offset to GOT */
+ RELOC_NUMBER (R_ARM_GOTPC, 25) /* 32 bit PC relative offset to GOT */
+ RELOC_NUMBER (R_ARM_GOT32, 26) /* 32 bit GOT entry */
+ RELOC_NUMBER (R_ARM_PLT32, 27) /* 32 bit PLT address */
+ FAKE_RELOC (FIRST_INVALID_RELOC1, 28)
+ FAKE_RELOC (LAST_INVALID_RELOC1, 99)
+ RELOC_NUMBER (R_ARM_GNU_VTENTRY, 100)
+ RELOC_NUMBER (R_ARM_GNU_VTINHERIT, 101)
+ RELOC_NUMBER (R_ARM_THM_PC11, 102) /* cygnus extension to abi: thumb unconditional branch */
+ RELOC_NUMBER (R_ARM_THM_PC9, 103) /* cygnus extension to abi: thumb conditional branch */
+ FAKE_RELOC (FIRST_INVALID_RELOC2, 104)
+ FAKE_RELOC (LAST_INVALID_RELOC2, 248)
+ RELOC_NUMBER (R_ARM_RXPC25, 249)
+ RELOC_NUMBER (R_ARM_RSBREL32, 250)
+ RELOC_NUMBER (R_ARM_THM_RPC22, 251)
+ RELOC_NUMBER (R_ARM_RREL32, 252)
+ RELOC_NUMBER (R_ARM_RABS32, 253)
+ RELOC_NUMBER (R_ARM_RPC24, 254)
+ RELOC_NUMBER (R_ARM_RBASE, 255)
+END_RELOC_NUMBERS
+
+#endif
diff --git a/include/elf/common.h b/include/elf/common.h
new file mode 100644
index 0000000..cda3ba0
--- /dev/null
+++ b/include/elf/common.h
@@ -0,0 +1,454 @@
+/* ELF support for BFD.
+ Copyright (C) 1991,92,93,94,95,96,97,98,99 Free Software Foundation, Inc.
+
+ Written by Fred Fish @ Cygnus Support, from information published
+ in "UNIX System V Release 4, Programmers Guide: ANSI C and
+ Programming Support Tools".
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+/* This file is part of ELF support for BFD, and contains the portions
+ that are common to both the internal and external representations.
+ For example, ELFMAG0 is the byte 0x7F in both the internal (in-memory)
+ and external (in-file) representations. */
+
+#ifndef _ELF_COMMON_H
+#define _ELF_COMMON_H
+
+/* Fields in e_ident[] */
+
+#define EI_MAG0 0 /* File identification byte 0 index */
+#define ELFMAG0 0x7F /* Magic number byte 0 */
+
+#define EI_MAG1 1 /* File identification byte 1 index */
+#define ELFMAG1 'E' /* Magic number byte 1 */
+
+#define EI_MAG2 2 /* File identification byte 2 index */
+#define ELFMAG2 'L' /* Magic number byte 2 */
+
+#define EI_MAG3 3 /* File identification byte 3 index */
+#define ELFMAG3 'F' /* Magic number byte 3 */
+
+#define EI_CLASS 4 /* File class */
+#define ELFCLASSNONE 0 /* Invalid class */
+#define ELFCLASS32 1 /* 32-bit objects */
+#define ELFCLASS64 2 /* 64-bit objects */
+
+#define EI_DATA 5 /* Data encoding */
+#define ELFDATANONE 0 /* Invalid data encoding */
+#define ELFDATA2LSB 1 /* 2's complement, little endian */
+#define ELFDATA2MSB 2 /* 2's complement, big endian */
+
+#define EI_VERSION 6 /* File version */
+
+#define EI_OSABI 7 /* Operating System/ABI indication */
+#define ELFOSABI_SYSV 0 /* UNIX System V ABI */
+#define ELFOSABI_HPUX 1 /* HP-UX operating system */
+#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
+
+#define EI_ABIVERSION 8 /* ABI version */
+
+#define EI_PAD 9 /* Start of padding bytes */
+
+
+/* Values for e_type, which identifies the object file type */
+
+#define ET_NONE 0 /* No file type */
+#define ET_REL 1 /* Relocatable file */
+#define ET_EXEC 2 /* Executable file */
+#define ET_DYN 3 /* Shared object file */
+#define ET_CORE 4 /* Core file */
+#define ET_LOOS 0xFE00 /* Operating system-specific */
+#define ET_HIOS 0xFEFF /* Operating system-specific */
+#define ET_LOPROC 0xFF00 /* Processor-specific */
+#define ET_HIPROC 0xFFFF /* Processor-specific */
+
+/* Values for e_machine, which identifies the architecture */
+
+#define EM_NONE 0 /* No machine */
+#define EM_M32 1 /* AT&T WE 32100 */
+#define EM_SPARC 2 /* SUN SPARC */
+#define EM_386 3 /* Intel 80386 */
+#define EM_68K 4 /* Motorola m68k family */
+#define EM_88K 5 /* Motorola m88k family */
+#define EM_486 6 /* Intel 80486 */
+#define EM_860 7 /* Intel 80860 */
+#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
+#define EM_S370 9 /* Amdahl */
+#define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */
+
+#define EM_PARISC 15 /* HPPA */
+#define EM_VPP550 17 /* Fujitsu VPP500 */
+#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
+#define EM_960 19 /* Intel 80960 */
+#define EM_PPC 20 /* PowerPC */
+
+#define EM_V800 36 /* NEC V800 series */
+#define EM_FR20 37 /* Fujitsu FR20 */
+#define EM_RH32 38 /* TRW RH32 */
+#define EM_MCORE 39 /* Motorolla MCore */ /* May also be taken by Fujitsu MMA */
+#define EM_ARM 40 /* ARM */
+#define EM_OLD_ALPHA 41 /* Digital Alpha */
+#define EM_SH 42 /* Hitachi SH */
+#define EM_SPARCV9 43 /* SPARC v9 64-bit */
+#define EM_TRICORE 44 /* Siemens Tricore embedded processor */
+#define EM_ARC 45 /* Argonaut RISC Core, Argonaut Technologies Inc. */
+#define EM_H8_300 46 /* Hitachi H8/300 */
+#define EM_H8_300H 47 /* Hitachi H8/300H */
+#define EM_H8S 48 /* Hitachi H8S */
+#define EM_H8_500 49 /* Hitachi H8/500 */
+#define EM_IA_64 50 /* Intel MercedTM Processor */
+#define EM_MIPS_X 51 /* Stanford MIPS-X */
+#define EM_COLDFIRE 52 /* Motorola Coldfire */
+#define EM_68HC12 53 /* Motorola M68HC12 */
+
+/* If it is necessary to assign new unofficial EM_* values, please pick large
+ random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
+ with official or non-GNU unofficial values.
+
+ NOTE: Do not just increment the most recent number by one.
+ Somebody else somewhere will do exactly the same thing, and you
+ will have a collision. Instead, pick a random number. */
+
+/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
+#define EM_CYGNUS_POWERPC 0x9025
+
+/* Old version of Sparc v9, from before the ABI; this should be
+ removed shortly. */
+#define EM_OLD_SPARCV9 11
+
+/* Old version of PowerPC, this should be removed shortly. */
+#define EM_PPC_OLD 17
+
+/* Cygnus ARC ELF backend. Written in the absence of an ABI. */
+#define EM_CYGNUS_ARC 0x9040
+
+/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
+#define EM_CYGNUS_M32R 0x9041
+
+/* Alpha backend magic number. Written in the absence of an ABI. */
+#define EM_ALPHA 0x9026
+
+/* D10V backend magic number. Written in the absence of an ABI. */
+#define EM_CYGNUS_D10V 0x7650
+
+/* D30V backend magic number. Written in the absence of an ABI. */
+#define EM_CYGNUS_D30V 0x7676
+
+/* V850 backend magic number. Written in the absense of an ABI. */
+#define EM_CYGNUS_V850 0x9080
+
+/* mn10200 and mn10300 backend magic numbers.
+ Written in the absense of an ABI. */
+#define EM_CYGNUS_MN10200 0xdead
+#define EM_CYGNUS_MN10300 0xbeef
+
+/* FR30 magic number - no EABI available. */
+#define EM_CYGNUS_FR30 0x3330
+
+/* See the above comment before you add a new EM_* value here. */
+
+/* Values for e_version */
+
+#define EV_NONE 0 /* Invalid ELF version */
+#define EV_CURRENT 1 /* Current version */
+
+/* Values for program header, p_type field */
+
+#define PT_NULL 0 /* Program header table entry unused */
+#define PT_LOAD 1 /* Loadable program segment */
+#define PT_DYNAMIC 2 /* Dynamic linking information */
+#define PT_INTERP 3 /* Program interpreter */
+#define PT_NOTE 4 /* Auxiliary information */
+#define PT_SHLIB 5 /* Reserved, unspecified semantics */
+#define PT_PHDR 6 /* Entry for header table itself */
+#define PT_LOOS 0x60000000 /* OS-specific */
+#define PT_HIOS 0x6fffffff /* OS-specific */
+#define PT_LOPROC 0x70000000 /* Processor-specific */
+#define PT_HIPROC 0x7FFFFFFF /* Processor-specific */
+
+/* Program segment permissions, in program header p_flags field */
+
+#define PF_X (1 << 0) /* Segment is executable */
+#define PF_W (1 << 1) /* Segment is writable */
+#define PF_R (1 << 2) /* Segment is readable */
+#define PF_MASKOS 0x0F000000 /* OS-specific reserved bits */
+#define PF_MASKPROC 0xF0000000 /* Processor-specific reserved bits */
+
+/* Values for section header, sh_type field */
+
+#define SHT_NULL 0 /* Section header table entry unused */
+#define SHT_PROGBITS 1 /* Program specific (private) data */
+#define SHT_SYMTAB 2 /* Link editing symbol table */
+#define SHT_STRTAB 3 /* A string table */
+#define SHT_RELA 4 /* Relocation entries with addends */
+#define SHT_HASH 5 /* A symbol hash table */
+#define SHT_DYNAMIC 6 /* Information for dynamic linking */
+#define SHT_NOTE 7 /* Information that marks file */
+#define SHT_NOBITS 8 /* Section occupies no space in file */
+#define SHT_REL 9 /* Relocation entries, no addends */
+#define SHT_SHLIB 10 /* Reserved, unspecified semantics */
+#define SHT_DYNSYM 11 /* Dynamic linking symbol table */
+
+#define SHT_LOOS 0x60000000 /* Operating system specific semantics, lo */
+#define SHT_HIOS 0x6fffffff /* Operating system specific semantics, hi */
+
+/* The next three section types are defined by Solaris, and are named
+ SHT_SUNW*. We use them in GNU code, so we also define SHT_GNU*
+ versions. */
+#define SHT_SUNW_verdef 0x6ffffffd /* Versions defined by file */
+#define SHT_SUNW_verneed 0x6ffffffe /* Versions needed by file */
+#define SHT_SUNW_versym 0x6fffffff /* Symbol versions */
+
+#define SHT_GNU_verdef SHT_SUNW_verdef
+#define SHT_GNU_verneed SHT_SUNW_verneed
+#define SHT_GNU_versym SHT_SUNW_versym
+
+#define SHT_LOPROC 0x70000000 /* Processor-specific semantics, lo */
+#define SHT_HIPROC 0x7FFFFFFF /* Processor-specific semantics, hi */
+#define SHT_LOUSER 0x80000000 /* Application-specific semantics */
+#define SHT_HIUSER 0x8FFFFFFF /* Application-specific semantics */
+
+/* Values for section header, sh_flags field */
+
+#define SHF_WRITE (1 << 0) /* Writable data during execution */
+#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */
+#define SHF_EXECINSTR (1 << 2) /* Executable machine instructions */
+#define SHF_MASKOS 0x0F000000 /* OS-specific semantics */
+#define SHF_MASKPROC 0xF0000000 /* Processor-specific semantics */
+
+/* Values of note segment descriptor types for core files. */
+
+#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */
+#define NT_FPREGSET 2 /* Contains copy of fpregset struct */
+#define NT_PRPSINFO 3 /* Contains copy of prpsinfo struct */
+
+/* Note segments for core files on dir-style procfs systems. */
+
+#define NT_PSTATUS 10 /* Has a struct pstatus */
+#define NT_FPREGS 12 /* Has a struct fpregset */
+#define NT_PSINFO 13 /* Has a struct psinfo */
+#define NT_LWPSTATUS 16 /* Has a struct lwpstatus_t */
+#define NT_LWPSINFO 17 /* Has a struct lwpsinfo_t */
+
+/* Values of note segment descriptor types for object files. */
+/* (Only for hppa right now. Should this be moved elsewhere?) */
+
+#define NT_VERSION 1 /* Contains a version string. */
+
+/* These three macros disassemble and assemble a symbol table st_info field,
+ which contains the symbol binding and symbol type. The STB_ and STT_
+ defines identify the binding and type. */
+
+#define ELF_ST_BIND(val) (((unsigned int)(val)) >> 4)
+#define ELF_ST_TYPE(val) ((val) & 0xF)
+#define ELF_ST_INFO(bind,type) (((bind) << 4) + ((type) & 0xF))
+
+#define STN_UNDEF 0 /* undefined symbol index */
+
+#define STB_LOCAL 0 /* Symbol not visible outside obj */
+#define STB_GLOBAL 1 /* Symbol visible outside obj */
+#define STB_WEAK 2 /* Like globals, lower precedence */
+#define STB_LOOS 10 /* OS-specific semantics */
+#define STB_HIOS 12 /* OS-specific semantics */
+#define STB_LOPROC 13 /* Application-specific semantics */
+#define STB_HIPROC 15 /* Application-specific semantics */
+
+#define STT_NOTYPE 0 /* Symbol type is unspecified */
+#define STT_OBJECT 1 /* Symbol is a data object */
+#define STT_FUNC 2 /* Symbol is a code object */
+#define STT_SECTION 3 /* Symbol associated with a section */
+#define STT_FILE 4 /* Symbol gives a file name */
+#define STT_LOOS 10 /* OS-specific semantics */
+#define STT_HIOS 12 /* OS-specific semantics */
+#define STT_LOPROC 13 /* Application-specific semantics */
+#define STT_HIPROC 15 /* Application-specific semantics */
+
+/* Special section indices, which may show up in st_shndx fields, among
+ other places. */
+
+#define SHN_UNDEF 0 /* Undefined section reference */
+#define SHN_LORESERVE 0xFF00 /* Begin range of reserved indices */
+#define SHN_LOPROC 0xFF00 /* Begin range of appl-specific */
+#define SHN_HIPROC 0xFF1F /* End range of appl-specific */
+#define SHN_LOOS 0xFF20 /* OS specific semantics, lo */
+#define SHN_HIOS 0xFF3F /* OS specific semantics, hi */
+#define SHN_ABS 0xFFF1 /* Associated symbol is absolute */
+#define SHN_COMMON 0xFFF2 /* Associated symbol is in common */
+#define SHN_HIRESERVE 0xFFFF /* End range of reserved indices */
+
+/* relocation info handling macros */
+
+#define ELF32_R_SYM(i) ((i) >> 8)
+#define ELF32_R_TYPE(i) ((i) & 0xff)
+#define ELF32_R_INFO(s,t) (((s) << 8) + ((t) & 0xff))
+
+#define ELF64_R_SYM(i) ((i) >> 32)
+#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
+#define ELF64_R_INFO(s,t) (((bfd_vma) (s) << 32) + (bfd_vma) (t))
+
+/* Dynamic section tags */
+
+#define DT_NULL 0
+#define DT_NEEDED 1
+#define DT_PLTRELSZ 2
+#define DT_PLTGOT 3
+#define DT_HASH 4
+#define DT_STRTAB 5
+#define DT_SYMTAB 6
+#define DT_RELA 7
+#define DT_RELASZ 8
+#define DT_RELAENT 9
+#define DT_STRSZ 10
+#define DT_SYMENT 11
+#define DT_INIT 12
+#define DT_FINI 13
+#define DT_SONAME 14
+#define DT_RPATH 15
+#define DT_SYMBOLIC 16
+#define DT_REL 17
+#define DT_RELSZ 18
+#define DT_RELENT 19
+#define DT_PLTREL 20
+#define DT_DEBUG 21
+#define DT_TEXTREL 22
+#define DT_JMPREL 23
+#define DT_BIND_NOW 24
+#define DT_INIT_ARRAY 25
+#define DT_FINI_ARRAY 26
+#define DT_INIT_ARRAYSZ 27
+#define DT_FINI_ARRAYSZ 28
+
+#define DT_LOOS 0x60000000
+#define DT_HIOS 0x6fffffff
+
+/* The next four dynamic tags are used on Solaris. We support them
+ everywhere. */
+#define DT_VALRNGLO 0x6ffffd00
+#define DT_PLTPADSZ 0x6ffffdf9
+#define DT_MOVEENT 0x6ffffdfa
+#define DT_MOVESZ 0x6ffffdfb
+#define DT_FEATURE_1 0x6ffffdfc
+#define DT_POSFLAG_1 0x6ffffdfd
+#define DT_SYMINSZ 0x6ffffdfe
+#define DT_SYMINENT 0x6ffffdff
+#define DT_VALRNGHI 0x6ffffdff
+
+#define DT_ADDRRNGLO 0x6ffffe00
+#define DT_SYMINFO 0x6ffffeff
+#define DT_ADDRRNGHI 0x6ffffeff
+
+#define DT_RELACOUNT 0x6ffffff9
+#define DT_RELCOUNT 0x6ffffffa
+#define DT_FLAGS_1 0x6ffffffb
+#define DT_VERDEF 0x6ffffffc
+#define DT_VERDEFNUM 0x6ffffffd
+#define DT_VERNEED 0x6ffffffe
+#define DT_VERNEEDNUM 0x6fffffff
+
+/* This tag is a GNU extension to the Solaris version scheme. */
+#define DT_VERSYM 0x6ffffff0
+
+#define DT_LOPROC 0x70000000
+#define DT_HIPROC 0x7fffffff
+
+/* These section tags are used on Solaris. We support them
+ everywhere, and hope they do not conflict. */
+
+#define DT_AUXILIARY 0x7ffffffd
+#define DT_USED 0x7ffffffe
+#define DT_FILTER 0x7fffffff
+
+/* Values used in DT_FEATURE_1 .dynamic entry. */
+#define DTF_1_PARINIT 0x00000001
+
+/* Flag values used in the DT_POSFLAG_1 .dynamic entry. */
+#define DF_P1_LAZYLOAD 0x00000001
+#define DF_P1_GROUPPERM 0x00000002
+
+/* Flag value in in the DT_1_FLAGS .dynamic entry. */
+#define DF_1_NOW 0x00000001
+#define DF_1_GLOBAL 0x00000002
+#define DF_1_GROUP 0x00000004
+#define DF_1_NODELETE 0x00000008
+#define DF_1_LOADFLTR 0x00000010
+#define DF_1_INITFIRST 0x00000020
+#define DF_1_NOOPEN 0x00000040
+#define DF_1_ORIGIN 0x00000080
+#define DF_1_DIRECT 0x00000100
+#define DF_1_TRANS 0x00000200
+#define DF_1_INTERPOSE 0x00000400
+
+/* These constants are used for the version number of a Elf32_Verdef
+ structure. */
+
+#define VER_DEF_NONE 0
+#define VER_DEF_CURRENT 1
+
+/* These constants appear in the vd_flags field of a Elf32_Verdef
+ structure. */
+
+#define VER_FLG_BASE 0x1
+#define VER_FLG_WEAK 0x2
+
+/* These special constants can be found in an Elf32_Versym field. */
+
+#define VER_NDX_LOCAL 0
+#define VER_NDX_GLOBAL 1
+
+/* These constants are used for the version number of a Elf32_Verneed
+ structure. */
+
+#define VER_NEED_NONE 0
+#define VER_NEED_CURRENT 1
+
+/* This flag appears in a Versym structure. It means that the symbol
+ is hidden, and is only visible with an explicit version number.
+ This is a GNU extension. */
+
+#define VERSYM_HIDDEN 0x8000
+
+/* This is the mask for the rest of the Versym information. */
+
+#define VERSYM_VERSION 0x7fff
+
+/* This is a special token which appears as part of a symbol name. It
+ indictes that the rest of the name is actually the name of a
+ version node, and is not part of the actual name. This is a GNU
+ extension. For example, the symbol name `stat@ver2' is taken to
+ mean the symbol `stat' in version `ver2'. */
+
+#define ELF_VER_CHR '@'
+
+/* Possible values for si_boundto. */
+#define SYMINFO_BT_SELF 0xffff /* Symbol bound to self */
+#define SYMINFO_BT_PARENT 0xfffe /* Symbol bound to parent */
+#define SYMINFO_BT_LOWRESERVE 0xff00 /* Beginning of reserved entries */
+
+/* Possible bitmasks for si_flags. */
+#define SYMINFO_FLG_DIRECT 0x0001 /* Direct bound symbol */
+#define SYMINFO_FLG_PASSTHRU 0x0002 /* Pass-thru symbol for translator */
+#define SYMINFO_FLG_COPY 0x0004 /* Symbol is a copy-reloc */
+#define SYMINFO_FLG_LAZYLOAD 0x0008 /* Symbol bound to object to be lazy
+ loaded */
+/* Syminfo version values. */
+#define SYMINFO_NONE 0
+#define SYMINFO_CURRENT 1
+#define SYMINFO_NUM 2
+
+#endif /* _ELF_COMMON_H */
diff --git a/include/elf/d10v.h b/include/elf/d10v.h
new file mode 100644
index 0000000..63b79c8
--- /dev/null
+++ b/include/elf/d10v.h
@@ -0,0 +1,38 @@
+/* d10v ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_D10V_H
+#define _ELF_D10V_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocation types. */
+START_RELOC_NUMBERS (elf_d10v_reloc_type)
+ RELOC_NUMBER (R_D10V_NONE, 0)
+ RELOC_NUMBER (R_D10V_10_PCREL_R, 1)
+ RELOC_NUMBER (R_D10V_10_PCREL_L, 2)
+ RELOC_NUMBER (R_D10V_16, 3)
+ RELOC_NUMBER (R_D10V_18, 4)
+ RELOC_NUMBER (R_D10V_18_PCREL, 5)
+ RELOC_NUMBER (R_D10V_32, 6)
+ RELOC_NUMBER (R_D10V_GNU_VTINHERIT, 7)
+ RELOC_NUMBER (R_D10V_GNU_VTENTRY, 8)
+END_RELOC_NUMBERS
+
+#endif
diff --git a/include/elf/d30v.h b/include/elf/d30v.h
new file mode 100644
index 0000000..adbad19
--- /dev/null
+++ b/include/elf/d30v.h
@@ -0,0 +1,42 @@
+/* d30v ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_D30V_H
+#define _ELF_D30V_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_d30v_reloc_type)
+ RELOC_NUMBER (R_D30V_NONE, 0)
+ RELOC_NUMBER (R_D30V_6, 1)
+ RELOC_NUMBER (R_D30V_9_PCREL, 2)
+ RELOC_NUMBER (R_D30V_9_PCREL_R, 3)
+ RELOC_NUMBER (R_D30V_15, 4)
+ RELOC_NUMBER (R_D30V_15_PCREL, 5)
+ RELOC_NUMBER (R_D30V_15_PCREL_R, 6)
+ RELOC_NUMBER (R_D30V_21, 7)
+ RELOC_NUMBER (R_D30V_21_PCREL, 8)
+ RELOC_NUMBER (R_D30V_21_PCREL_R, 9)
+ RELOC_NUMBER (R_D30V_32, 10)
+ RELOC_NUMBER (R_D30V_32_PCREL, 11)
+ RELOC_NUMBER (R_D30V_32_NORMAL, 12)
+END_RELOC_NUMBERS
+
+#endif
diff --git a/include/elf/dwarf.h b/include/elf/dwarf.h
new file mode 100644
index 0000000..4333d5e
--- /dev/null
+++ b/include/elf/dwarf.h
@@ -0,0 +1,319 @@
+/* Declarations and definitions of codes relating to the DWARF symbolic
+ debugging information format.
+
+ Written by Ron Guilmette (rfg@ncd.com)
+
+Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file is derived from the DWARF specification (a public document)
+ Revision 1.0.1 (April 8, 1992) developed by the UNIX International
+ Programming Languages Special Interest Group (UI/PLSIG) and distributed
+ by UNIX International. Copies of this specification are available from
+ UNIX International, 20 Waterview Boulevard, Parsippany, NJ, 07054.
+*/
+
+#ifndef _ELF_DWARF_H
+#define _ELF_DWARF_H
+
+/* Tag names and codes. */
+
+enum dwarf_tag {
+ TAG_padding = 0x0000,
+ TAG_array_type = 0x0001,
+ TAG_class_type = 0x0002,
+ TAG_entry_point = 0x0003,
+ TAG_enumeration_type = 0x0004,
+ TAG_formal_parameter = 0x0005,
+ TAG_global_subroutine = 0x0006,
+ TAG_global_variable = 0x0007,
+ /* 0x0008 -- reserved */
+ /* 0x0009 -- reserved */
+ TAG_label = 0x000a,
+ TAG_lexical_block = 0x000b,
+ TAG_local_variable = 0x000c,
+ TAG_member = 0x000d,
+ /* 0x000e -- reserved */
+ TAG_pointer_type = 0x000f,
+ TAG_reference_type = 0x0010,
+ TAG_compile_unit = 0x0011,
+ TAG_string_type = 0x0012,
+ TAG_structure_type = 0x0013,
+ TAG_subroutine = 0x0014,
+ TAG_subroutine_type = 0x0015,
+ TAG_typedef = 0x0016,
+ TAG_union_type = 0x0017,
+ TAG_unspecified_parameters = 0x0018,
+ TAG_variant = 0x0019,
+ TAG_common_block = 0x001a,
+ TAG_common_inclusion = 0x001b,
+ TAG_inheritance = 0x001c,
+ TAG_inlined_subroutine = 0x001d,
+ TAG_module = 0x001e,
+ TAG_ptr_to_member_type = 0x001f,
+ TAG_set_type = 0x0020,
+ TAG_subrange_type = 0x0021,
+ TAG_with_stmt = 0x0022,
+
+ /* GNU extensions */
+
+ TAG_format_label = 0x8000, /* for FORTRAN 77 and Fortran 90 */
+ TAG_namelist = 0x8001, /* For Fortran 90 */
+ TAG_function_template = 0x8002, /* for C++ */
+ TAG_class_template = 0x8003 /* for C++ */
+};
+
+#define TAG_lo_user 0x8000 /* implementation-defined range start */
+#define TAG_hi_user 0xffff /* implementation-defined range end */
+#define TAG_source_file TAG_compile_unit /* for backward compatibility */
+
+/* Form names and codes. */
+
+enum dwarf_form {
+ FORM_ADDR = 0x1,
+ FORM_REF = 0x2,
+ FORM_BLOCK2 = 0x3,
+ FORM_BLOCK4 = 0x4,
+ FORM_DATA2 = 0x5,
+ FORM_DATA4 = 0x6,
+ FORM_DATA8 = 0x7,
+ FORM_STRING = 0x8
+};
+
+/* Attribute names and codes. */
+
+enum dwarf_attribute {
+ AT_sibling = (0x0010|FORM_REF),
+ AT_location = (0x0020|FORM_BLOCK2),
+ AT_name = (0x0030|FORM_STRING),
+ AT_fund_type = (0x0050|FORM_DATA2),
+ AT_mod_fund_type = (0x0060|FORM_BLOCK2),
+ AT_user_def_type = (0x0070|FORM_REF),
+ AT_mod_u_d_type = (0x0080|FORM_BLOCK2),
+ AT_ordering = (0x0090|FORM_DATA2),
+ AT_subscr_data = (0x00a0|FORM_BLOCK2),
+ AT_byte_size = (0x00b0|FORM_DATA4),
+ AT_bit_offset = (0x00c0|FORM_DATA2),
+ AT_bit_size = (0x00d0|FORM_DATA4),
+ /* (0x00e0|FORM_xxxx) -- reserved */
+ AT_element_list = (0x00f0|FORM_BLOCK4),
+ AT_stmt_list = (0x0100|FORM_DATA4),
+ AT_low_pc = (0x0110|FORM_ADDR),
+ AT_high_pc = (0x0120|FORM_ADDR),
+ AT_language = (0x0130|FORM_DATA4),
+ AT_member = (0x0140|FORM_REF),
+ AT_discr = (0x0150|FORM_REF),
+ AT_discr_value = (0x0160|FORM_BLOCK2),
+ /* (0x0170|FORM_xxxx) -- reserved */
+ /* (0x0180|FORM_xxxx) -- reserved */
+ AT_string_length = (0x0190|FORM_BLOCK2),
+ AT_common_reference = (0x01a0|FORM_REF),
+ AT_comp_dir = (0x01b0|FORM_STRING),
+ AT_const_value_string = (0x01c0|FORM_STRING),
+ AT_const_value_data2 = (0x01c0|FORM_DATA2),
+ AT_const_value_data4 = (0x01c0|FORM_DATA4),
+ AT_const_value_data8 = (0x01c0|FORM_DATA8),
+ AT_const_value_block2 = (0x01c0|FORM_BLOCK2),
+ AT_const_value_block4 = (0x01c0|FORM_BLOCK4),
+ AT_containing_type = (0x01d0|FORM_REF),
+ AT_default_value_addr = (0x01e0|FORM_ADDR),
+ AT_default_value_data2 = (0x01e0|FORM_DATA2),
+ AT_default_value_data4 = (0x01e0|FORM_DATA4),
+ AT_default_value_data8 = (0x01e0|FORM_DATA8),
+ AT_default_value_string = (0x01e0|FORM_STRING),
+ AT_friends = (0x01f0|FORM_BLOCK2),
+ AT_inline = (0x0200|FORM_STRING),
+ AT_is_optional = (0x0210|FORM_STRING),
+ AT_lower_bound_ref = (0x0220|FORM_REF),
+ AT_lower_bound_data2 = (0x0220|FORM_DATA2),
+ AT_lower_bound_data4 = (0x0220|FORM_DATA4),
+ AT_lower_bound_data8 = (0x0220|FORM_DATA8),
+ AT_private = (0x0240|FORM_STRING),
+ AT_producer = (0x0250|FORM_STRING),
+ AT_program = (0x0230|FORM_STRING),
+ AT_protected = (0x0260|FORM_STRING),
+ AT_prototyped = (0x0270|FORM_STRING),
+ AT_public = (0x0280|FORM_STRING),
+ AT_pure_virtual = (0x0290|FORM_STRING),
+ AT_return_addr = (0x02a0|FORM_BLOCK2),
+ AT_abstract_origin = (0x02b0|FORM_REF),
+ AT_start_scope = (0x02c0|FORM_DATA4),
+ AT_stride_size = (0x02e0|FORM_DATA4),
+ AT_upper_bound_ref = (0x02f0|FORM_REF),
+ AT_upper_bound_data2 = (0x02f0|FORM_DATA2),
+ AT_upper_bound_data4 = (0x02f0|FORM_DATA4),
+ AT_upper_bound_data8 = (0x02f0|FORM_DATA8),
+ AT_virtual = (0x0300|FORM_STRING),
+
+ /* GNU extensions. */
+
+ AT_sf_names = (0x8000|FORM_DATA4),
+ AT_src_info = (0x8010|FORM_DATA4),
+ AT_mac_info = (0x8020|FORM_DATA4),
+ AT_src_coords = (0x8030|FORM_DATA4),
+ AT_body_begin = (0x8040|FORM_ADDR),
+ AT_body_end = (0x8050|FORM_ADDR)
+};
+
+#define AT_lo_user 0x8000 /* implementation-defined range start */
+#define AT_hi_user 0xffff /* implementation-defined range end */
+
+/* Location atom names and codes. */
+
+enum dwarf_location_atom {
+ OP_REG = 0x01,
+ OP_BASEREG = 0x02,
+ OP_ADDR = 0x03,
+ OP_CONST = 0x04,
+ OP_DEREF2 = 0x05,
+ OP_DEREF4 = 0x06,
+ OP_ADD = 0x07
+};
+
+#define OP_LO_USER 0x80 /* implementation-defined range start */
+#define OP_HI_USER 0xff /* implementation-defined range end */
+
+/* Fundamental type names and codes. */
+
+enum dwarf_fundamental_type {
+ FT_char = 0x0001,
+ FT_signed_char = 0x0002,
+ FT_unsigned_char = 0x0003,
+ FT_short = 0x0004,
+ FT_signed_short = 0x0005,
+ FT_unsigned_short = 0x0006,
+ FT_integer = 0x0007,
+ FT_signed_integer = 0x0008,
+ FT_unsigned_integer = 0x0009,
+ FT_long = 0x000a,
+ FT_signed_long = 0x000b,
+ FT_unsigned_long = 0x000c,
+ FT_pointer = 0x000d, /* an alias for (void *) */
+ FT_float = 0x000e,
+ FT_dbl_prec_float = 0x000f,
+ FT_ext_prec_float = 0x0010, /* breaks "classic" svr4 SDB */
+ FT_complex = 0x0011, /* breaks "classic" svr4 SDB */
+ FT_dbl_prec_complex = 0x0012, /* breaks "classic" svr4 SDB */
+ /* 0x0013 -- reserved */
+ FT_void = 0x0014,
+ FT_boolean = 0x0015, /* breaks "classic" svr4 SDB */
+ FT_ext_prec_complex = 0x0016, /* breaks "classic" svr4 SDB */
+ FT_label = 0x0017,
+
+ /* GNU extensions
+ The low order byte must indicate the size (in bytes) for the type.
+ All of these types will probably break "classic" svr4 SDB */
+
+ FT_long_long = 0x8008,
+ FT_signed_long_long = 0x8108,
+ FT_unsigned_long_long = 0x8208,
+
+ FT_int8 = 0x9001,
+ FT_signed_int8 = 0x9101,
+ FT_unsigned_int8 = 0x9201,
+ FT_int16 = 0x9302,
+ FT_signed_int16 = 0x9402,
+ FT_unsigned_int16 = 0x9502,
+ FT_int32 = 0x9604,
+ FT_signed_int32 = 0x9704,
+ FT_unsigned_int32 = 0x9804,
+ FT_int64 = 0x9908,
+ FT_signed_int64 = 0x9a08,
+ FT_unsigned_int64 = 0x9b08,
+
+ FT_real32 = 0xa004,
+ FT_real64 = 0xa108,
+ FT_real96 = 0xa20c,
+ FT_real128 = 0xa310
+};
+
+#define FT_lo_user 0x8000 /* implementation-defined range start */
+#define FT_hi_user 0xffff /* implementation defined range end */
+
+/* Type modifier names and codes. */
+
+enum dwarf_type_modifier {
+ MOD_pointer_to = 0x01,
+ MOD_reference_to = 0x02,
+ MOD_const = 0x03,
+ MOD_volatile = 0x04
+};
+
+#define MOD_lo_user 0x80 /* implementation-defined range start */
+#define MOD_hi_user 0xff /* implementation-defined range end */
+
+/* Array ordering names and codes. */
+
+enum dwarf_array_dim_ordering {
+ ORD_row_major = 0,
+ ORD_col_major = 1
+};
+
+/* Array subscript format names and codes. */
+
+enum dwarf_subscr_data_formats {
+ FMT_FT_C_C = 0x0,
+ FMT_FT_C_X = 0x1,
+ FMT_FT_X_C = 0x2,
+ FMT_FT_X_X = 0x3,
+ FMT_UT_C_C = 0x4,
+ FMT_UT_C_X = 0x5,
+ FMT_UT_X_C = 0x6,
+ FMT_UT_X_X = 0x7,
+ FMT_ET = 0x8
+};
+
+/* Derived from above for ease of use. */
+
+#define FMT_CODE(_FUNDAMENTAL_TYPE_P, _UB_CONST_P, _LB_CONST_P) \
+ (((_FUNDAMENTAL_TYPE_P) ? 0 : 4) \
+ | ((_UB_CONST_P) ? 0 : 2) \
+ | ((_LB_CONST_P) ? 0 : 1))
+
+/* Source language names and codes. */
+
+enum dwarf_source_language {
+ LANG_C89 = 0x00000001,
+ LANG_C = 0x00000002,
+ LANG_ADA83 = 0x00000003,
+ LANG_C_PLUS_PLUS = 0x00000004,
+ LANG_COBOL74 = 0x00000005,
+ LANG_COBOL85 = 0x00000006,
+ LANG_FORTRAN77 = 0x00000007,
+ LANG_FORTRAN90 = 0x00000008,
+ LANG_PASCAL83 = 0x00000009,
+ LANG_MODULA2 = 0x0000000a,
+
+ /* GNU extensions */
+
+ LANG_CHILL = 0x00009af3 /* random value for GNU Chill */
+};
+
+#define LANG_lo_user 0x00008000 /* implementation-defined range start */
+#define LANG_hi_user 0x0000ffff /* implementation-defined range end */
+
+/* Names and codes for GNU "macinfo" extension. */
+
+enum dwarf_macinfo_record_type {
+ MACINFO_start = 's',
+ MACINFO_resume = 'r',
+ MACINFO_define = 'd',
+ MACINFO_undef = 'u'
+};
+
+#endif /* _ELF_DWARF_H */
diff --git a/include/elf/dwarf2.h b/include/elf/dwarf2.h
new file mode 100644
index 0000000..b2cbb24
--- /dev/null
+++ b/include/elf/dwarf2.h
@@ -0,0 +1,637 @@
+/* Declarations and definitions of codes relating to the DWARF symbolic
+ debugging information format.
+ Copyright (C) 1992, 1993, 1995, 1996, 1999 Free Software Foundation, Inc.
+
+ Written by Gary Funck (gary@intrepid.com) The Ada Joint Program
+ Office (AJPO), Florida State Unviversity and Silicon Graphics Inc.
+ provided support for this effort -- June 21, 1995.
+
+ Derived from the DWARF 1 implementation written by Ron Guilmette
+ (rfg@netcom.com), November 1990.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+GNU CC is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file is derived from the DWARF specification (a public document)
+ Revision 2.0.0 (July 27, 1993) developed by the UNIX International
+ Programming Languages Special Interest Group (UI/PLSIG) and distributed
+ by UNIX International. Copies of this specification are available from
+ UNIX International, 20 Waterview Boulevard, Parsippany, NJ, 07054. */
+
+#ifndef _ELF_DWARF2_H
+#define _ELF_DWARF2_H
+
+/* Structure found in the .debug_line section. */
+typedef struct
+{
+ unsigned char li_length [4];
+ unsigned char li_version [2];
+ unsigned char li_prologue_length [4];
+ unsigned char li_min_insn_length [1];
+ unsigned char li_default_is_stmt [1];
+ unsigned char li_line_base [1];
+ unsigned char li_line_range [1];
+ unsigned char li_opcode_base [1];
+}
+DWARF2_External_LineInfo;
+
+typedef struct
+{
+ unsigned long li_length;
+ unsigned short li_version;
+ unsigned int li_prologue_length;
+ unsigned char li_min_insn_length;
+ unsigned char li_default_is_stmt;
+ int li_line_base;
+ unsigned char li_line_range;
+ unsigned char li_opcode_base;
+}
+DWARF2_Internal_LineInfo;
+
+/* Structure found in .debug_pubnames section. */
+typedef struct
+{
+ unsigned char pn_length [4];
+ unsigned char pn_version [2];
+ unsigned char pn_offset [4];
+ unsigned char pn_size [4];
+}
+DWARF2_External_PubNames;
+
+typedef struct
+{
+ unsigned long pn_length;
+ unsigned short pn_version;
+ unsigned long pn_offset;
+ unsigned long pn_size;
+}
+DWARF2_Internal_PubNames;
+
+/* Strcuture found in .debug_info section. */
+typedef struct
+{
+ unsigned char cu_length [4];
+ unsigned char cu_version [2];
+ unsigned char cu_abbrev_offset [4];
+ unsigned char cu_pointer_size [1];
+}
+DWARF2_External_CompUnit;
+
+typedef struct
+{
+ unsigned long cu_length;
+ unsigned short cu_version;
+ unsigned long cu_abbrev_offset;
+ unsigned char cu_pointer_size;
+}
+DWARF2_Internal_CompUnit;
+
+typedef struct
+{
+ unsigned char ar_length [4];
+ unsigned char ar_version [2];
+ unsigned char ar_info_offset [4];
+ unsigned char ar_pointer_size [1];
+ unsigned char ar_segment_size [1];
+}
+DWARF2_External_ARange;
+
+typedef struct
+{
+ unsigned long ar_length;
+ unsigned short ar_version;
+ unsigned long ar_info_offset;
+ unsigned char ar_pointer_size;
+ unsigned char ar_segment_size;
+}
+DWARF2_Internal_ARange;
+
+
+/* Tag names and codes. */
+
+enum dwarf_tag
+ {
+ DW_TAG_padding = 0x00,
+ DW_TAG_array_type = 0x01,
+ DW_TAG_class_type = 0x02,
+ DW_TAG_entry_point = 0x03,
+ DW_TAG_enumeration_type = 0x04,
+ DW_TAG_formal_parameter = 0x05,
+ DW_TAG_imported_declaration = 0x08,
+ DW_TAG_label = 0x0a,
+ DW_TAG_lexical_block = 0x0b,
+ DW_TAG_member = 0x0d,
+ DW_TAG_pointer_type = 0x0f,
+ DW_TAG_reference_type = 0x10,
+ DW_TAG_compile_unit = 0x11,
+ DW_TAG_string_type = 0x12,
+ DW_TAG_structure_type = 0x13,
+ DW_TAG_subroutine_type = 0x15,
+ DW_TAG_typedef = 0x16,
+ DW_TAG_union_type = 0x17,
+ DW_TAG_unspecified_parameters = 0x18,
+ DW_TAG_variant = 0x19,
+ DW_TAG_common_block = 0x1a,
+ DW_TAG_common_inclusion = 0x1b,
+ DW_TAG_inheritance = 0x1c,
+ DW_TAG_inlined_subroutine = 0x1d,
+ DW_TAG_module = 0x1e,
+ DW_TAG_ptr_to_member_type = 0x1f,
+ DW_TAG_set_type = 0x20,
+ DW_TAG_subrange_type = 0x21,
+ DW_TAG_with_stmt = 0x22,
+ DW_TAG_access_declaration = 0x23,
+ DW_TAG_base_type = 0x24,
+ DW_TAG_catch_block = 0x25,
+ DW_TAG_const_type = 0x26,
+ DW_TAG_constant = 0x27,
+ DW_TAG_enumerator = 0x28,
+ DW_TAG_file_type = 0x29,
+ DW_TAG_friend = 0x2a,
+ DW_TAG_namelist = 0x2b,
+ DW_TAG_namelist_item = 0x2c,
+ DW_TAG_packed_type = 0x2d,
+ DW_TAG_subprogram = 0x2e,
+ DW_TAG_template_type_param = 0x2f,
+ DW_TAG_template_value_param = 0x30,
+ DW_TAG_thrown_type = 0x31,
+ DW_TAG_try_block = 0x32,
+ DW_TAG_variant_part = 0x33,
+ DW_TAG_variable = 0x34,
+ DW_TAG_volatile_type = 0x35,
+ /* SGI/MIPS Extensions */
+ DW_TAG_MIPS_loop = 0x4081,
+ /* GNU extensions */
+ DW_TAG_format_label = 0x4101, /* for FORTRAN 77 and Fortran 90 */
+ DW_TAG_function_template = 0x4102, /* for C++ */
+ DW_TAG_class_template = 0x4103 /* for C++ */
+ };
+
+#define DW_TAG_lo_user 0x4080
+#define DW_TAG_hi_user 0xffff
+
+/* flag that tells whether entry has a child or not */
+#define DW_children_no 0
+#define DW_children_yes 1
+
+/* Form names and codes. */
+enum dwarf_form
+ {
+ DW_FORM_addr = 0x01,
+ DW_FORM_block2 = 0x03,
+ DW_FORM_block4 = 0x04,
+ DW_FORM_data2 = 0x05,
+ DW_FORM_data4 = 0x06,
+ DW_FORM_data8 = 0x07,
+ DW_FORM_string = 0x08,
+ DW_FORM_block = 0x09,
+ DW_FORM_block1 = 0x0a,
+ DW_FORM_data1 = 0x0b,
+ DW_FORM_flag = 0x0c,
+ DW_FORM_sdata = 0x0d,
+ DW_FORM_strp = 0x0e,
+ DW_FORM_udata = 0x0f,
+ DW_FORM_ref_addr = 0x10,
+ DW_FORM_ref1 = 0x11,
+ DW_FORM_ref2 = 0x12,
+ DW_FORM_ref4 = 0x13,
+ DW_FORM_ref8 = 0x14,
+ DW_FORM_ref_udata = 0x15,
+ DW_FORM_indirect = 0x16
+ };
+
+/* Attribute names and codes. */
+
+enum dwarf_attribute
+ {
+ DW_AT_sibling = 0x01,
+ DW_AT_location = 0x02,
+ DW_AT_name = 0x03,
+ DW_AT_ordering = 0x09,
+ DW_AT_subscr_data = 0x0a,
+ DW_AT_byte_size = 0x0b,
+ DW_AT_bit_offset = 0x0c,
+ DW_AT_bit_size = 0x0d,
+ DW_AT_element_list = 0x0f,
+ DW_AT_stmt_list = 0x10,
+ DW_AT_low_pc = 0x11,
+ DW_AT_high_pc = 0x12,
+ DW_AT_language = 0x13,
+ DW_AT_member = 0x14,
+ DW_AT_discr = 0x15,
+ DW_AT_discr_value = 0x16,
+ DW_AT_visibility = 0x17,
+ DW_AT_import = 0x18,
+ DW_AT_string_length = 0x19,
+ DW_AT_common_reference = 0x1a,
+ DW_AT_comp_dir = 0x1b,
+ DW_AT_const_value = 0x1c,
+ DW_AT_containing_type = 0x1d,
+ DW_AT_default_value = 0x1e,
+ DW_AT_inline = 0x20,
+ DW_AT_is_optional = 0x21,
+ DW_AT_lower_bound = 0x22,
+ DW_AT_producer = 0x25,
+ DW_AT_prototyped = 0x27,
+ DW_AT_return_addr = 0x2a,
+ DW_AT_start_scope = 0x2c,
+ DW_AT_stride_size = 0x2e,
+ DW_AT_upper_bound = 0x2f,
+ DW_AT_abstract_origin = 0x31,
+ DW_AT_accessibility = 0x32,
+ DW_AT_address_class = 0x33,
+ DW_AT_artificial = 0x34,
+ DW_AT_base_types = 0x35,
+ DW_AT_calling_convention = 0x36,
+ DW_AT_count = 0x37,
+ DW_AT_data_member_location = 0x38,
+ DW_AT_decl_column = 0x39,
+ DW_AT_decl_file = 0x3a,
+ DW_AT_decl_line = 0x3b,
+ DW_AT_declaration = 0x3c,
+ DW_AT_discr_list = 0x3d,
+ DW_AT_encoding = 0x3e,
+ DW_AT_external = 0x3f,
+ DW_AT_frame_base = 0x40,
+ DW_AT_friend = 0x41,
+ DW_AT_identifier_case = 0x42,
+ DW_AT_macro_info = 0x43,
+ DW_AT_namelist_items = 0x44,
+ DW_AT_priority = 0x45,
+ DW_AT_segment = 0x46,
+ DW_AT_specification = 0x47,
+ DW_AT_static_link = 0x48,
+ DW_AT_type = 0x49,
+ DW_AT_use_location = 0x4a,
+ DW_AT_variable_parameter = 0x4b,
+ DW_AT_virtuality = 0x4c,
+ DW_AT_vtable_elem_location = 0x4d,
+ /* SGI/MIPS Extensions */
+ DW_AT_MIPS_fde = 0x2001,
+ DW_AT_MIPS_loop_begin = 0x2002,
+ DW_AT_MIPS_tail_loop_begin = 0x2003,
+ DW_AT_MIPS_epilog_begin = 0x2004,
+ DW_AT_MIPS_loop_unroll_factor = 0x2005,
+ DW_AT_MIPS_software_pipeline_depth = 0x2006,
+ DW_AT_MIPS_linkage_name = 0x2007,
+ DW_AT_MIPS_stride = 0x2008,
+ DW_AT_MIPS_abstract_name = 0x2009,
+ DW_AT_MIPS_clone_origin = 0x200a,
+ DW_AT_MIPS_has_inlines = 0x200b,
+ /* GNU extensions. */
+ DW_AT_sf_names = 0x2101,
+ DW_AT_src_info = 0x2102,
+ DW_AT_mac_info = 0x2103,
+ DW_AT_src_coords = 0x2104,
+ DW_AT_body_begin = 0x2105,
+ DW_AT_body_end = 0x2106
+ };
+
+#define DW_AT_lo_user 0x2000 /* implementation-defined range start */
+#define DW_AT_hi_user 0x3ff0 /* implementation-defined range end */
+
+/* Location atom names and codes. */
+
+enum dwarf_location_atom
+ {
+ DW_OP_addr = 0x03,
+ DW_OP_deref = 0x06,
+ DW_OP_const1u = 0x08,
+ DW_OP_const1s = 0x09,
+ DW_OP_const2u = 0x0a,
+ DW_OP_const2s = 0x0b,
+ DW_OP_const4u = 0x0c,
+ DW_OP_const4s = 0x0d,
+ DW_OP_const8u = 0x0e,
+ DW_OP_const8s = 0x0f,
+ DW_OP_constu = 0x10,
+ DW_OP_consts = 0x11,
+ DW_OP_dup = 0x12,
+ DW_OP_drop = 0x13,
+ DW_OP_over = 0x14,
+ DW_OP_pick = 0x15,
+ DW_OP_swap = 0x16,
+ DW_OP_rot = 0x17,
+ DW_OP_xderef = 0x18,
+ DW_OP_abs = 0x19,
+ DW_OP_and = 0x1a,
+ DW_OP_div = 0x1b,
+ DW_OP_minus = 0x1c,
+ DW_OP_mod = 0x1d,
+ DW_OP_mul = 0x1e,
+ DW_OP_neg = 0x1f,
+ DW_OP_not = 0x20,
+ DW_OP_or = 0x21,
+ DW_OP_plus = 0x22,
+ DW_OP_plus_uconst = 0x23,
+ DW_OP_shl = 0x24,
+ DW_OP_shr = 0x25,
+ DW_OP_shra = 0x26,
+ DW_OP_xor = 0x27,
+ DW_OP_bra = 0x28,
+ DW_OP_eq = 0x29,
+ DW_OP_ge = 0x2a,
+ DW_OP_gt = 0x2b,
+ DW_OP_le = 0x2c,
+ DW_OP_lt = 0x2d,
+ DW_OP_ne = 0x2e,
+ DW_OP_skip = 0x2f,
+ DW_OP_lit0 = 0x30,
+ DW_OP_lit1 = 0x31,
+ DW_OP_lit2 = 0x32,
+ DW_OP_lit3 = 0x33,
+ DW_OP_lit4 = 0x34,
+ DW_OP_lit5 = 0x35,
+ DW_OP_lit6 = 0x36,
+ DW_OP_lit7 = 0x37,
+ DW_OP_lit8 = 0x38,
+ DW_OP_lit9 = 0x39,
+ DW_OP_lit10 = 0x3a,
+ DW_OP_lit11 = 0x3b,
+ DW_OP_lit12 = 0x3c,
+ DW_OP_lit13 = 0x3d,
+ DW_OP_lit14 = 0x3e,
+ DW_OP_lit15 = 0x3f,
+ DW_OP_lit16 = 0x40,
+ DW_OP_lit17 = 0x41,
+ DW_OP_lit18 = 0x42,
+ DW_OP_lit19 = 0x43,
+ DW_OP_lit20 = 0x44,
+ DW_OP_lit21 = 0x45,
+ DW_OP_lit22 = 0x46,
+ DW_OP_lit23 = 0x47,
+ DW_OP_lit24 = 0x48,
+ DW_OP_lit25 = 0x49,
+ DW_OP_lit26 = 0x4a,
+ DW_OP_lit27 = 0x4b,
+ DW_OP_lit28 = 0x4c,
+ DW_OP_lit29 = 0x4d,
+ DW_OP_lit30 = 0x4e,
+ DW_OP_lit31 = 0x4f,
+ DW_OP_reg0 = 0x50,
+ DW_OP_reg1 = 0x51,
+ DW_OP_reg2 = 0x52,
+ DW_OP_reg3 = 0x53,
+ DW_OP_reg4 = 0x54,
+ DW_OP_reg5 = 0x55,
+ DW_OP_reg6 = 0x56,
+ DW_OP_reg7 = 0x57,
+ DW_OP_reg8 = 0x58,
+ DW_OP_reg9 = 0x59,
+ DW_OP_reg10 = 0x5a,
+ DW_OP_reg11 = 0x5b,
+ DW_OP_reg12 = 0x5c,
+ DW_OP_reg13 = 0x5d,
+ DW_OP_reg14 = 0x5e,
+ DW_OP_reg15 = 0x5f,
+ DW_OP_reg16 = 0x60,
+ DW_OP_reg17 = 0x61,
+ DW_OP_reg18 = 0x62,
+ DW_OP_reg19 = 0x63,
+ DW_OP_reg20 = 0x64,
+ DW_OP_reg21 = 0x65,
+ DW_OP_reg22 = 0x66,
+ DW_OP_reg23 = 0x67,
+ DW_OP_reg24 = 0x68,
+ DW_OP_reg25 = 0x69,
+ DW_OP_reg26 = 0x6a,
+ DW_OP_reg27 = 0x6b,
+ DW_OP_reg28 = 0x6c,
+ DW_OP_reg29 = 0x6d,
+ DW_OP_reg30 = 0x6e,
+ DW_OP_reg31 = 0x6f,
+ DW_OP_breg0 = 0x70,
+ DW_OP_breg1 = 0x71,
+ DW_OP_breg2 = 0x72,
+ DW_OP_breg3 = 0x73,
+ DW_OP_breg4 = 0x74,
+ DW_OP_breg5 = 0x75,
+ DW_OP_breg6 = 0x76,
+ DW_OP_breg7 = 0x77,
+ DW_OP_breg8 = 0x78,
+ DW_OP_breg9 = 0x79,
+ DW_OP_breg10 = 0x7a,
+ DW_OP_breg11 = 0x7b,
+ DW_OP_breg12 = 0x7c,
+ DW_OP_breg13 = 0x7d,
+ DW_OP_breg14 = 0x7e,
+ DW_OP_breg15 = 0x7f,
+ DW_OP_breg16 = 0x80,
+ DW_OP_breg17 = 0x81,
+ DW_OP_breg18 = 0x82,
+ DW_OP_breg19 = 0x83,
+ DW_OP_breg20 = 0x84,
+ DW_OP_breg21 = 0x85,
+ DW_OP_breg22 = 0x86,
+ DW_OP_breg23 = 0x87,
+ DW_OP_breg24 = 0x88,
+ DW_OP_breg25 = 0x89,
+ DW_OP_breg26 = 0x8a,
+ DW_OP_breg27 = 0x8b,
+ DW_OP_breg28 = 0x8c,
+ DW_OP_breg29 = 0x8d,
+ DW_OP_breg30 = 0x8e,
+ DW_OP_breg31 = 0x8f,
+ DW_OP_regx = 0x90,
+ DW_OP_fbreg = 0x91,
+ DW_OP_bregx = 0x92,
+ DW_OP_piece = 0x93,
+ DW_OP_deref_size = 0x94,
+ DW_OP_xderef_size = 0x95,
+ DW_OP_nop = 0x96
+ };
+
+#define DW_OP_lo_user 0x80 /* implementation-defined range start */
+#define DW_OP_hi_user 0xff /* implementation-defined range end */
+
+/* Type encodings. */
+
+enum dwarf_type
+ {
+ DW_ATE_void = 0x0,
+ DW_ATE_address = 0x1,
+ DW_ATE_boolean = 0x2,
+ DW_ATE_complex_float = 0x3,
+ DW_ATE_float = 0x4,
+ DW_ATE_signed = 0x5,
+ DW_ATE_signed_char = 0x6,
+ DW_ATE_unsigned = 0x7,
+ DW_ATE_unsigned_char = 0x8
+ };
+
+#define DW_ATE_lo_user 0x80
+#define DW_ATE_hi_user 0xff
+
+/* Array ordering names and codes. */
+enum dwarf_array_dim_ordering
+ {
+ DW_ORD_row_major = 0,
+ DW_ORD_col_major = 1
+ };
+
+/* access attribute */
+enum dwarf_access_attribute
+ {
+ DW_ACCESS_public = 1,
+ DW_ACCESS_protected = 2,
+ DW_ACCESS_private = 3
+ };
+
+/* visibility */
+enum dwarf_visibility_attribute
+ {
+ DW_VIS_local = 1,
+ DW_VIS_exported = 2,
+ DW_VIS_qualified = 3
+ };
+
+/* virtuality */
+enum dwarf_virtuality_attribute
+ {
+ DW_VIRTUALITY_none = 0,
+ DW_VIRTUALITY_virtual = 1,
+ DW_VIRTUALITY_pure_virtual = 2
+ };
+
+/* case sensitivity */
+enum dwarf_id_case
+ {
+ DW_ID_case_sensitive = 0,
+ DW_ID_up_case = 1,
+ DW_ID_down_case = 2,
+ DW_ID_case_insensitive = 3
+ };
+
+/* calling convention */
+enum dwarf_calling_convention
+ {
+ DW_CC_normal = 0x1,
+ DW_CC_program = 0x2,
+ DW_CC_nocall = 0x3
+ };
+
+#define DW_CC_lo_user 0x40
+#define DW_CC_hi_user 0xff
+
+/* inline attribute */
+enum dwarf_inline_attribute
+ {
+ DW_INL_not_inlined = 0,
+ DW_INL_inlined = 1,
+ DW_INL_declared_not_inlined = 2,
+ DW_INL_declared_inlined = 3
+ };
+
+/* descriminant lists */
+enum dwarf_descrim_list
+ {
+ DW_DSC_label = 0,
+ DW_DSC_range = 1
+ };
+
+/* line number opcodes */
+enum dwarf_line_number_ops
+ {
+ DW_LNS_extended_op = 0,
+ DW_LNS_copy = 1,
+ DW_LNS_advance_pc = 2,
+ DW_LNS_advance_line = 3,
+ DW_LNS_set_file = 4,
+ DW_LNS_set_column = 5,
+ DW_LNS_negate_stmt = 6,
+ DW_LNS_set_basic_block = 7,
+ DW_LNS_const_add_pc = 8,
+ DW_LNS_fixed_advance_pc = 9
+ };
+
+/* line number extended opcodes */
+enum dwarf_line_number_x_ops
+ {
+ DW_LNE_end_sequence = 1,
+ DW_LNE_set_address = 2,
+ DW_LNE_define_file = 3
+ };
+
+/* call frame information */
+enum dwarf_call_frame_info
+ {
+ DW_CFA_advance_loc = 0x40,
+ DW_CFA_offset = 0x80,
+ DW_CFA_restore = 0xc0,
+ DW_CFA_nop = 0x00,
+ DW_CFA_set_loc = 0x01,
+ DW_CFA_advance_loc1 = 0x02,
+ DW_CFA_advance_loc2 = 0x03,
+ DW_CFA_advance_loc4 = 0x04,
+ DW_CFA_offset_extended = 0x05,
+ DW_CFA_restore_extended = 0x06,
+ DW_CFA_undefined = 0x07,
+ DW_CFA_same_value = 0x08,
+ DW_CFA_register = 0x09,
+ DW_CFA_remember_state = 0x0a,
+ DW_CFA_restore_state = 0x0b,
+ DW_CFA_def_cfa = 0x0c,
+ DW_CFA_def_cfa_register = 0x0d,
+ DW_CFA_def_cfa_offset = 0x0e,
+ /* SGI/MIPS specific */
+ DW_CFA_MIPS_advance_loc8 = 0x1d
+ };
+
+#define DW_CIE_ID 0xffffffff
+#define DW_CIE_VERSION 1
+
+#define DW_CFA_extended 0
+#define DW_CFA_low_user 0x1c
+#define DW_CFA_high_user 0x3f
+
+#define DW_CHILDREN_no 0x00
+#define DW_CHILDREN_yes 0x01
+
+#define DW_ADDR_none 0
+
+/* Source language names and codes. */
+
+enum dwarf_source_language
+ {
+ DW_LANG_C89 = 0x0001,
+ DW_LANG_C = 0x0002,
+ DW_LANG_Ada83 = 0x0003,
+ DW_LANG_C_plus_plus = 0x0004,
+ DW_LANG_Cobol74 = 0x0005,
+ DW_LANG_Cobol85 = 0x0006,
+ DW_LANG_Fortran77 = 0x0007,
+ DW_LANG_Fortran90 = 0x0008,
+ DW_LANG_Pascal83 = 0x0009,
+ DW_LANG_Modula2 = 0x000a,
+ DW_LANG_Mips_Assembler = 0x8001
+ };
+
+
+#define DW_LANG_lo_user 0x8000 /* implementation-defined range start */
+#define DW_LANG_hi_user 0xffff /* implementation-defined range start */
+
+/* Names and codes for macro information. */
+
+enum dwarf_macinfo_record_type
+ {
+ DW_MACINFO_define = 1,
+ DW_MACINFO_undef = 2,
+ DW_MACINFO_start_file = 3,
+ DW_MACINFO_end_file = 4,
+ DW_MACINFO_vendor_ext = 255
+ };
+
+#endif /* _ELF_DWARF2_H */
diff --git a/include/elf/external.h b/include/elf/external.h
new file mode 100644
index 0000000..5cab77e
--- /dev/null
+++ b/include/elf/external.h
@@ -0,0 +1,256 @@
+/* ELF support for BFD.
+ Copyright (C) 1991, 92, 93, 95, 97, 98, 1999 Free Software Foundation, Inc.
+
+ Written by Fred Fish @ Cygnus Support, from information published
+ in "UNIX System V Release 4, Programmers Guide: ANSI C and
+ Programming Support Tools".
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+/* This file is part of ELF support for BFD, and contains the portions
+ that describe how ELF is represented externally by the BFD library.
+ I.E. it describes the in-file representation of ELF. It requires
+ the elf-common.h file which contains the portions that are common to
+ both the internal and external representations. */
+
+/* The 64-bit stuff is kind of random. Perhaps someone will publish a
+ spec someday. */
+
+#ifndef _ELF_EXTERNAL_H
+#define _ELF_EXTERNAL_H
+
+/* ELF Header (32-bit implementations) */
+
+typedef struct {
+ unsigned char e_ident[16]; /* ELF "magic number" */
+ unsigned char e_type[2]; /* Identifies object file type */
+ unsigned char e_machine[2]; /* Specifies required architecture */
+ unsigned char e_version[4]; /* Identifies object file version */
+ unsigned char e_entry[4]; /* Entry point virtual address */
+ unsigned char e_phoff[4]; /* Program header table file offset */
+ unsigned char e_shoff[4]; /* Section header table file offset */
+ unsigned char e_flags[4]; /* Processor-specific flags */
+ unsigned char e_ehsize[2]; /* ELF header size in bytes */
+ unsigned char e_phentsize[2]; /* Program header table entry size */
+ unsigned char e_phnum[2]; /* Program header table entry count */
+ unsigned char e_shentsize[2]; /* Section header table entry size */
+ unsigned char e_shnum[2]; /* Section header table entry count */
+ unsigned char e_shstrndx[2]; /* Section header string table index */
+} Elf32_External_Ehdr;
+
+typedef struct {
+ unsigned char e_ident[16]; /* ELF "magic number" */
+ unsigned char e_type[2]; /* Identifies object file type */
+ unsigned char e_machine[2]; /* Specifies required architecture */
+ unsigned char e_version[4]; /* Identifies object file version */
+ unsigned char e_entry[8]; /* Entry point virtual address */
+ unsigned char e_phoff[8]; /* Program header table file offset */
+ unsigned char e_shoff[8]; /* Section header table file offset */
+ unsigned char e_flags[4]; /* Processor-specific flags */
+ unsigned char e_ehsize[2]; /* ELF header size in bytes */
+ unsigned char e_phentsize[2]; /* Program header table entry size */
+ unsigned char e_phnum[2]; /* Program header table entry count */
+ unsigned char e_shentsize[2]; /* Section header table entry size */
+ unsigned char e_shnum[2]; /* Section header table entry count */
+ unsigned char e_shstrndx[2]; /* Section header string table index */
+} Elf64_External_Ehdr;
+
+/* Program header */
+
+typedef struct {
+ unsigned char p_type[4]; /* Identifies program segment type */
+ unsigned char p_offset[4]; /* Segment file offset */
+ unsigned char p_vaddr[4]; /* Segment virtual address */
+ unsigned char p_paddr[4]; /* Segment physical address */
+ unsigned char p_filesz[4]; /* Segment size in file */
+ unsigned char p_memsz[4]; /* Segment size in memory */
+ unsigned char p_flags[4]; /* Segment flags */
+ unsigned char p_align[4]; /* Segment alignment, file & memory */
+} Elf32_External_Phdr;
+
+typedef struct {
+ unsigned char p_type[4]; /* Identifies program segment type */
+ unsigned char p_flags[4]; /* Segment flags */
+ unsigned char p_offset[8]; /* Segment file offset */
+ unsigned char p_vaddr[8]; /* Segment virtual address */
+ unsigned char p_paddr[8]; /* Segment physical address */
+ unsigned char p_filesz[8]; /* Segment size in file */
+ unsigned char p_memsz[8]; /* Segment size in memory */
+ unsigned char p_align[8]; /* Segment alignment, file & memory */
+} Elf64_External_Phdr;
+
+/* Section header */
+
+typedef struct {
+ unsigned char sh_name[4]; /* Section name, index in string tbl */
+ unsigned char sh_type[4]; /* Type of section */
+ unsigned char sh_flags[4]; /* Miscellaneous section attributes */
+ unsigned char sh_addr[4]; /* Section virtual addr at execution */
+ unsigned char sh_offset[4]; /* Section file offset */
+ unsigned char sh_size[4]; /* Size of section in bytes */
+ unsigned char sh_link[4]; /* Index of another section */
+ unsigned char sh_info[4]; /* Additional section information */
+ unsigned char sh_addralign[4]; /* Section alignment */
+ unsigned char sh_entsize[4]; /* Entry size if section holds table */
+} Elf32_External_Shdr;
+
+typedef struct {
+ unsigned char sh_name[4]; /* Section name, index in string tbl */
+ unsigned char sh_type[4]; /* Type of section */
+ unsigned char sh_flags[8]; /* Miscellaneous section attributes */
+ unsigned char sh_addr[8]; /* Section virtual addr at execution */
+ unsigned char sh_offset[8]; /* Section file offset */
+ unsigned char sh_size[8]; /* Size of section in bytes */
+ unsigned char sh_link[4]; /* Index of another section */
+ unsigned char sh_info[4]; /* Additional section information */
+ unsigned char sh_addralign[8]; /* Section alignment */
+ unsigned char sh_entsize[8]; /* Entry size if section holds table */
+} Elf64_External_Shdr;
+
+/* Symbol table entry */
+
+typedef struct {
+ unsigned char st_name[4]; /* Symbol name, index in string tbl */
+ unsigned char st_value[4]; /* Value of the symbol */
+ unsigned char st_size[4]; /* Associated symbol size */
+ unsigned char st_info[1]; /* Type and binding attributes */
+ unsigned char st_other[1]; /* No defined meaning, 0 */
+ unsigned char st_shndx[2]; /* Associated section index */
+} Elf32_External_Sym;
+
+typedef struct {
+ unsigned char st_name[4]; /* Symbol name, index in string tbl */
+ unsigned char st_info[1]; /* Type and binding attributes */
+ unsigned char st_other[1]; /* No defined meaning, 0 */
+ unsigned char st_shndx[2]; /* Associated section index */
+ unsigned char st_value[8]; /* Value of the symbol */
+ unsigned char st_size[8]; /* Associated symbol size */
+} Elf64_External_Sym;
+
+/* Note segments */
+
+typedef struct {
+ unsigned char namesz[4]; /* Size of entry's owner string */
+ unsigned char descsz[4]; /* Size of the note descriptor */
+ unsigned char type[4]; /* Interpretation of the descriptor */
+ char name[1]; /* Start of the name+desc data */
+} Elf_External_Note;
+
+/* Relocation Entries */
+typedef struct {
+ unsigned char r_offset[4]; /* Location at which to apply the action */
+ unsigned char r_info[4]; /* index and type of relocation */
+} Elf32_External_Rel;
+
+typedef struct {
+ unsigned char r_offset[4]; /* Location at which to apply the action */
+ unsigned char r_info[4]; /* index and type of relocation */
+ unsigned char r_addend[4]; /* Constant addend used to compute value */
+} Elf32_External_Rela;
+
+typedef struct {
+ unsigned char r_offset[8]; /* Location at which to apply the action */
+ unsigned char r_info[8]; /* index and type of relocation */
+} Elf64_External_Rel;
+
+typedef struct {
+ unsigned char r_offset[8]; /* Location at which to apply the action */
+ unsigned char r_info[8]; /* index and type of relocation */
+ unsigned char r_addend[8]; /* Constant addend used to compute value */
+} Elf64_External_Rela;
+
+/* dynamic section structure */
+
+typedef struct {
+ unsigned char d_tag[4]; /* entry tag value */
+ union {
+ unsigned char d_val[4];
+ unsigned char d_ptr[4];
+ } d_un;
+} Elf32_External_Dyn;
+
+typedef struct {
+ unsigned char d_tag[8]; /* entry tag value */
+ union {
+ unsigned char d_val[8];
+ unsigned char d_ptr[8];
+ } d_un;
+} Elf64_External_Dyn;
+
+/* The version structures are currently size independent. They are
+ named without a 32 or 64. If that ever changes, these structures
+ will need to be renamed. */
+
+/* This structure appears in a SHT_GNU_verdef section. */
+
+typedef struct {
+ unsigned char vd_version[2];
+ unsigned char vd_flags[2];
+ unsigned char vd_ndx[2];
+ unsigned char vd_cnt[2];
+ unsigned char vd_hash[4];
+ unsigned char vd_aux[4];
+ unsigned char vd_next[4];
+} Elf_External_Verdef;
+
+/* This structure appears in a SHT_GNU_verdef section. */
+
+typedef struct {
+ unsigned char vda_name[4];
+ unsigned char vda_next[4];
+} Elf_External_Verdaux;
+
+/* This structure appears in a SHT_GNU_verneed section. */
+
+typedef struct {
+ unsigned char vn_version[2];
+ unsigned char vn_cnt[2];
+ unsigned char vn_file[4];
+ unsigned char vn_aux[4];
+ unsigned char vn_next[4];
+} Elf_External_Verneed;
+
+/* This structure appears in a SHT_GNU_verneed section. */
+
+typedef struct {
+ unsigned char vna_hash[4];
+ unsigned char vna_flags[2];
+ unsigned char vna_other[2];
+ unsigned char vna_name[4];
+ unsigned char vna_next[4];
+} Elf_External_Vernaux;
+
+/* This structure appears in a SHT_GNU_versym section. This is not a
+ standard ELF structure; ELF just uses Elf32_Half. */
+
+typedef struct {
+ unsigned char vs_vers[2];
+}
+#ifdef __GNUC__
+ __attribute__ ((packed))
+#endif
+ Elf_External_Versym;
+
+/* Structure for syminfo section. */
+typedef struct
+{
+ unsigned char si_boundto[2];
+ unsigned char si_flags[2];
+} Elf_External_Syminfo;
+
+#endif /* _ELF_EXTERNAL_H */
diff --git a/include/elf/fr30.h b/include/elf/fr30.h
new file mode 100644
index 0000000..223b052
--- /dev/null
+++ b/include/elf/fr30.h
@@ -0,0 +1,43 @@
+/* FR30 ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_FR30_H
+#define _ELF_FR30_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_fr30_reloc_type)
+ RELOC_NUMBER (R_FR30_NONE, 0)
+ RELOC_NUMBER (R_FR30_8, 1)
+ RELOC_NUMBER (R_FR30_20, 2)
+ RELOC_NUMBER (R_FR30_32, 3)
+ RELOC_NUMBER (R_FR30_48, 4)
+ RELOC_NUMBER (R_FR30_6_IN_4, 5)
+ RELOC_NUMBER (R_FR30_8_IN_8, 6)
+ RELOC_NUMBER (R_FR30_9_IN_8, 7)
+ RELOC_NUMBER (R_FR30_10_IN_8, 8)
+ RELOC_NUMBER (R_FR30_9_PCREL, 9)
+ RELOC_NUMBER (R_FR30_12_PCREL, 10)
+ RELOC_NUMBER (R_FR30_GNU_VTINHERIT, 11)
+ RELOC_NUMBER (R_FR30_GNU_VTENTRY, 12)
+ EMPTY_RELOC (R_FR30_max)
+END_RELOC_NUMBERS
+
+#endif /* _ELF_FR30_H */
diff --git a/include/elf/hppa.h b/include/elf/hppa.h
new file mode 100644
index 0000000..2952e23
--- /dev/null
+++ b/include/elf/hppa.h
@@ -0,0 +1,187 @@
+/* HPPA ELF support for BFD.
+ Copyright (C) 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the HPPA ELF ABI. Note
+ that most of this is not actually implemented by BFD. */
+
+#ifndef _ELF_HPPA_H
+#define _ELF_HPPA_H
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* Target processor IDs to be placed in the low 16 bits of the flags
+ field. Note these names are shared with SOM, and therefore do not
+ follow ELF naming conventions. */
+
+/* PA 1.0 big endian. */
+#ifndef CPU_PA_RISC1_0
+#define CPU_PA_RISC1_0 0x0000020b
+#endif
+
+/* PA 1.1 big endian. */
+#ifndef CPU_PA_RISC1_1
+#define CPU_PA_RISC1_1 0x00000210
+#endif
+
+/* PA 1.0 little endian (unsupported) is 0x0000028b. */
+/* PA 1.1 little endian (unsupported) is 0x00000290. */
+
+/* Trap null address dereferences. */
+#define ELF_PARISC_TRAPNIL 0x00010000
+
+/* .PARISC.archext section is present. */
+#define EF_PARISC_EXT 0x00020000
+
+/* Processor specific section types. */
+
+/* Holds the global offset table, a table of pointers to external
+ data. */
+#define SHT_PARISC_GOT SHT_LOPROC+0
+
+/* Nonloadable section containing information in architecture
+ extensions used by the code. */
+#define SHT_PARISC_ARCH SHT_LOPROC+1
+
+/* Section in which $global$ is defined. */
+#define SHT_PARISC_GLOBAL SHT_LOPROC+2
+
+/* Section holding millicode routines (mul, div, rem, dyncall, etc. */
+#define SHT_PARISC_MILLI SHT_LOPROC+3
+
+/* Section holding unwind information for use by debuggers. */
+#define SHT_PARISC_UNWIND SHT_LOPROC+4
+
+/* Section holding the procedure linkage table. */
+#define SHT_PARISC_PLT SHT_LOPROC+5
+
+/* Short initialized and uninitialized data. */
+#define SHT_PARISC_SDATA SHT_LOPROC+6
+#define SHT_PARISC_SBSS SHT_LOPROC+7
+
+/* Optional section holding argument location/relocation info. */
+#define SHT_PARISC_SYMEXTN SHT_LOPROC+8
+
+/* Option section for linker stubs. */
+#define SHT_PARISC_STUBS SHT_LOPROC+9
+
+/* Processor specific section flags. */
+
+/* This section is near the global data pointer and thus allows short
+ addressing modes to be used. */
+#define SHF_PARISC_SHORT 0x20000000
+
+/* Processor specific symbol types. */
+
+/* Millicode function entry point. */
+#define STT_PARISC_MILLICODE STT_LOPROC+0
+
+
+/* ELF/HPPA relocation types */
+
+#include "reloc-macros.h"
+
+START_RELOC_NUMBERS (elf32_hppa_reloc_type)
+ RELOC_NUMBER (R_PARISC_NONE, 0) /* No reloc */
+
+ /* These relocation types do simple base + offset relocations. */
+
+ RELOC_NUMBER (R_PARISC_DIR32, 0x01)
+ RELOC_NUMBER (R_PARISC_DIR21L, 0x02)
+ RELOC_NUMBER (R_PARISC_DIR17R, 0x03)
+ RELOC_NUMBER (R_PARISC_DIR17F, 0x04)
+ RELOC_NUMBER (R_PARISC_DIR14R, 0x06)
+
+ /* PC-relative relocation types
+ Typically used for calls.
+ Note PCREL17C and PCREL17F differ only in overflow handling.
+ PCREL17C never reports a relocation error.
+
+ When supporting argument relocations, function calls must be
+ accompanied by parameter relocation information. This information is
+ carried in the ten high-order bits of the addend field. The remaining
+ 22 bits of of the addend field are sign-extended to form the Addend.
+
+ Note the code to build argument relocations depends on the
+ addend being zero. A consequence of this limitation is GAS
+ can not perform relocation reductions for function symbols. */
+
+ RELOC_NUMBER (R_PARISC_PCREL21L, 0x0a)
+ RELOC_NUMBER (R_PARISC_PCREL17R, 0x0b)
+ RELOC_NUMBER (R_PARISC_PCREL17F, 0x0c)
+ RELOC_NUMBER (R_PARISC_PCREL17C, 0x0d)
+ RELOC_NUMBER (R_PARISC_PCREL14R, 0x0e)
+ RELOC_NUMBER (R_PARISC_PCREL14F, 0x0f)
+
+ /* DP-relative relocation types. */
+ RELOC_NUMBER (R_PARISC_DPREL21L, 0x12)
+ RELOC_NUMBER (R_PARISC_DPREL14R, 0x16)
+ RELOC_NUMBER (R_PARISC_DPREL14F, 0x17)
+
+ /* Data linkage table (DLT) relocation types
+
+ SOM DLT_REL fixup requests are used to for static data references
+ from position-independent code within shared libraries. They are
+ similar to the GOT relocation types in some SVR4 implementations. */
+
+ RELOC_NUMBER (R_PARISC_DLTREL21L, 0x1a)
+ RELOC_NUMBER (R_PARISC_DLTREL14R, 0x1e)
+ RELOC_NUMBER (R_PARISC_DLTREL14F, 0x1f)
+
+ /* DLT indirect relocation types */
+ RELOC_NUMBER (R_PARISC_DLTIND21L, 0x22)
+ RELOC_NUMBER (R_PARISC_DLTIND14R, 0x26)
+ RELOC_NUMBER (R_PARISC_DLTIND14F, 0x27)
+
+ /* Base relative relocation types. Ugh. These imply lots of state */
+ RELOC_NUMBER (R_PARISC_SETBASE, 0x28)
+ RELOC_NUMBER (R_PARISC_BASEREL32, 0x29)
+ RELOC_NUMBER (R_PARISC_BASEREL21L, 0x2a)
+ RELOC_NUMBER (R_PARISC_BASEREL17R, 0x2b)
+ RELOC_NUMBER (R_PARISC_BASEREL17F, 0x2c)
+ RELOC_NUMBER (R_PARISC_BASEREL14R, 0x2e)
+ RELOC_NUMBER (R_PARISC_BASEREL14F, 0x2f)
+
+ /* Segment relative relocation types. */
+ RELOC_NUMBER (R_PARISC_TEXTREL32, 0x31)
+ RELOC_NUMBER (R_PARISC_DATAREL32, 0x39)
+
+ /* Plabel relocation types. */
+ RELOC_NUMBER (R_PARISC_PLABEL32, 0x41)
+ RELOC_NUMBER (R_PARISC_PLABEL21L, 0x42)
+ RELOC_NUMBER (R_PARISC_PLABEL14R, 0x46)
+
+ /* PLT relocations. */
+ RELOC_NUMBER (R_PARISC_PLTIND21L, 0x82)
+ RELOC_NUMBER (R_PARISC_PLTIND14R, 0x86)
+ RELOC_NUMBER (R_PARISC_PLTIND14F, 0x87)
+
+ /* Misc relocation types. */
+ RELOC_NUMBER (R_PARISC_COPY, 0x88)
+ RELOC_NUMBER (R_PARISC_GLOB_DAT, 0x89)
+ RELOC_NUMBER (R_PARISC_JMP_SLOT, 0x8a)
+ RELOC_NUMBER (R_PARISC_RELATIVE, 0x8b)
+
+ EMPTY_RELOC (R_PARISC_UNIMPLEMENTED)
+END_RELOC_NUMBERS
+
+#ifndef RELOC_MACROS_GEN_FUNC
+typedef enum elf32_hppa_reloc_type elf32_hppa_reloc_type;
+#endif
+
+#endif /* _ELF_HPPA_H */
diff --git a/include/elf/i386.h b/include/elf/i386.h
new file mode 100644
index 0000000..219f105
--- /dev/null
+++ b/include/elf/i386.h
@@ -0,0 +1,49 @@
+/* ix86 ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_I386_H
+#define _ELF_I386_H
+
+#include "reloc-macros.h"
+
+START_RELOC_NUMBERS (elf_i386_reloc_type)
+ RELOC_NUMBER (R_386_NONE, 0) /* No reloc */
+ RELOC_NUMBER (R_386_32, 1) /* Direct 32 bit */
+ RELOC_NUMBER (R_386_PC32, 2) /* PC relative 32 bit */
+ RELOC_NUMBER (R_386_GOT32, 3) /* 32 bit GOT entry */
+ RELOC_NUMBER (R_386_PLT32, 4) /* 32 bit PLT address */
+ RELOC_NUMBER (R_386_COPY, 5) /* Copy symbol at runtime */
+ RELOC_NUMBER (R_386_GLOB_DAT, 6) /* Create GOT entry */
+ RELOC_NUMBER (R_386_JUMP_SLOT, 7) /* Create PLT entry */
+ RELOC_NUMBER (R_386_RELATIVE, 8) /* Adjust by program base */
+ RELOC_NUMBER (R_386_GOTOFF, 9) /* 32 bit offset to GOT */
+ RELOC_NUMBER (R_386_GOTPC, 10) /* 32 bit PC relative offset to GOT */
+ FAKE_RELOC (FIRST_INVALID_RELOC, 11)
+ FAKE_RELOC (LAST_INVALID_RELOC, 19)
+ RELOC_NUMBER (R_386_16, 20)
+ RELOC_NUMBER (R_386_PC16, 21)
+ RELOC_NUMBER (R_386_8, 22)
+ RELOC_NUMBER (R_386_PC8, 23)
+ RELOC_NUMBER (R_386_max, 24)
+ /* These are GNU extensions to enable C++ vtable garbage collection. */
+ RELOC_NUMBER (R_386_GNU_VTINHERIT, 250)
+ RELOC_NUMBER (R_386_GNU_VTENTRY, 251)
+END_RELOC_NUMBERS
+
+#endif
diff --git a/include/elf/internal.h b/include/elf/internal.h
new file mode 100644
index 0000000..a9b81a0
--- /dev/null
+++ b/include/elf/internal.h
@@ -0,0 +1,312 @@
+/* ELF support for BFD.
+ Copyright (C) 1991, 92, 93, 94, 95, 97, 1998 Free Software Foundation, Inc.
+
+ Written by Fred Fish @ Cygnus Support, from information published
+ in "UNIX System V Release 4, Programmers Guide: ANSI C and
+ Programming Support Tools".
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+/* This file is part of ELF support for BFD, and contains the portions
+ that describe how ELF is represented internally in the BFD library.
+ I.E. it describes the in-memory representation of ELF. It requires
+ the elf-common.h file which contains the portions that are common to
+ both the internal and external representations. */
+
+
+/* NOTE that these structures are not kept in the same order as they appear
+ in the object file. In some cases they've been reordered for more optimal
+ packing under various circumstances. */
+
+#ifndef _ELF_INTERNAL_H
+#define _ELF_INTERNAL_H
+
+/* ELF Header */
+
+#define EI_NIDENT 16 /* Size of e_ident[] */
+
+typedef struct elf_internal_ehdr {
+ unsigned char e_ident[EI_NIDENT]; /* ELF "magic number" */
+ bfd_vma e_entry; /* Entry point virtual address */
+ bfd_size_type e_phoff; /* Program header table file offset */
+ bfd_size_type e_shoff; /* Section header table file offset */
+ unsigned long e_version; /* Identifies object file version */
+ unsigned long e_flags; /* Processor-specific flags */
+ unsigned short e_type; /* Identifies object file type */
+ unsigned short e_machine; /* Specifies required architecture */
+ unsigned short e_ehsize; /* ELF header size in bytes */
+ unsigned short e_phentsize; /* Program header table entry size */
+ unsigned short e_phnum; /* Program header table entry count */
+ unsigned short e_shentsize; /* Section header table entry size */
+ unsigned short e_shnum; /* Section header table entry count */
+ unsigned short e_shstrndx; /* Section header string table index */
+} Elf_Internal_Ehdr;
+
+#define elf32_internal_ehdr elf_internal_ehdr
+#define Elf32_Internal_Ehdr Elf_Internal_Ehdr
+#define elf64_internal_ehdr elf_internal_ehdr
+#define Elf64_Internal_Ehdr Elf_Internal_Ehdr
+
+/* Program header */
+
+struct elf_internal_phdr {
+ unsigned long p_type; /* Identifies program segment type */
+ unsigned long p_flags; /* Segment flags */
+ bfd_vma p_offset; /* Segment file offset */
+ bfd_vma p_vaddr; /* Segment virtual address */
+ bfd_vma p_paddr; /* Segment physical address */
+ bfd_vma p_filesz; /* Segment size in file */
+ bfd_vma p_memsz; /* Segment size in memory */
+ bfd_vma p_align; /* Segment alignment, file & memory */
+};
+
+typedef struct elf_internal_phdr Elf_Internal_Phdr;
+#define elf32_internal_phdr elf_internal_phdr
+#define Elf32_Internal_Phdr Elf_Internal_Phdr
+#define elf64_internal_phdr elf_internal_phdr
+#define Elf64_Internal_Phdr Elf_Internal_Phdr
+
+/* Section header */
+
+typedef struct elf_internal_shdr {
+ unsigned int sh_name; /* Section name, index in string tbl */
+ unsigned int sh_type; /* Type of section */
+ bfd_vma sh_flags; /* Miscellaneous section attributes */
+ bfd_vma sh_addr; /* Section virtual addr at execution */
+ bfd_size_type sh_size; /* Size of section in bytes */
+ bfd_size_type sh_entsize; /* Entry size if section holds table */
+ unsigned long sh_link; /* Index of another section */
+ unsigned long sh_info; /* Additional section information */
+ file_ptr sh_offset; /* Section file offset */
+ unsigned int sh_addralign; /* Section alignment */
+
+ /* The internal rep also has some cached info associated with it. */
+ asection * bfd_section; /* Associated BFD section. */
+ PTR contents; /* Section contents. */
+} Elf_Internal_Shdr;
+
+#define elf32_internal_shdr elf_internal_shdr
+#define Elf32_Internal_Shdr Elf_Internal_Shdr
+#define elf64_internal_shdr elf_internal_shdr
+#define Elf64_Internal_Shdr Elf_Internal_Shdr
+
+/* Symbol table entry */
+
+struct elf_internal_sym {
+ bfd_vma st_value; /* Value of the symbol */
+ bfd_vma st_size; /* Associated symbol size */
+ unsigned long st_name; /* Symbol name, index in string tbl */
+ unsigned char st_info; /* Type and binding attributes */
+ unsigned char st_other; /* No defined meaning, 0 */
+ unsigned short st_shndx; /* Associated section index */
+};
+
+typedef struct elf_internal_sym Elf_Internal_Sym;
+
+#define elf32_internal_sym elf_internal_sym
+#define elf64_internal_sym elf_internal_sym
+#define Elf32_Internal_Sym Elf_Internal_Sym
+#define Elf64_Internal_Sym Elf_Internal_Sym
+
+/* Note segments */
+
+typedef struct elf_internal_note {
+ unsigned long namesz; /* Size of entry's owner string */
+ unsigned long descsz; /* Size of the note descriptor */
+ unsigned long type; /* Interpretation of the descriptor */
+ char * namedata; /* Start of the name+desc data */
+ char * descdata; /* Start of the desc data */
+ bfd_vma descpos; /* File offset of the descdata */
+} Elf_Internal_Note;
+#define Elf32_Internal_Note Elf_Internal_Note
+#define elf32_internal_note elf_internal_note
+
+/* Relocation Entries */
+
+typedef struct elf_internal_rel {
+ bfd_vma r_offset; /* Location at which to apply the action */
+ /* This needs to support 64-bit values in elf64. */
+ bfd_vma r_info; /* index and type of relocation */
+} Elf_Internal_Rel;
+
+#define elf32_internal_rel elf_internal_rel
+#define Elf32_Internal_Rel Elf_Internal_Rel
+#define elf64_internal_rel elf_internal_rel
+#define Elf64_Internal_Rel Elf_Internal_Rel
+
+typedef struct elf_internal_rela {
+ bfd_vma r_offset; /* Location at which to apply the action */
+ bfd_vma r_info; /* Index and Type of relocation */
+ bfd_signed_vma r_addend; /* Constant addend used to compute value */
+} Elf_Internal_Rela;
+
+#define elf32_internal_rela elf_internal_rela
+#define elf64_internal_rela elf_internal_rela
+#define Elf32_Internal_Rela Elf_Internal_Rela
+#define Elf64_Internal_Rela Elf_Internal_Rela
+
+/* dynamic section structure */
+
+typedef struct elf_internal_dyn {
+ /* This needs to support 64-bit values in elf64. */
+ bfd_vma d_tag; /* entry tag value */
+ union {
+ /* This needs to support 64-bit values in elf64. */
+ bfd_vma d_val;
+ bfd_vma d_ptr;
+ } d_un;
+} Elf_Internal_Dyn;
+
+#define elf32_internal_dyn elf_internal_dyn
+#define elf64_internal_dyn elf_internal_dyn
+#define Elf32_Internal_Dyn Elf_Internal_Dyn
+#define Elf64_Internal_Dyn Elf_Internal_Dyn
+
+/* This structure appears in a SHT_GNU_verdef section. */
+
+typedef struct elf_internal_verdef {
+ unsigned short vd_version; /* Version number of structure. */
+ unsigned short vd_flags; /* Flags (VER_FLG_*). */
+ unsigned short vd_ndx; /* Version index. */
+ unsigned short vd_cnt; /* Number of verdaux entries. */
+ unsigned long vd_hash; /* Hash of name. */
+ unsigned long vd_aux; /* Offset to verdaux entries. */
+ unsigned long vd_next; /* Offset to next verdef. */
+
+ /* These fields are set up when BFD reads in the structure. FIXME:
+ It would be cleaner to store these in a different structure. */
+ bfd *vd_bfd; /* BFD. */
+ const char *vd_nodename; /* Version name. */
+ struct elf_internal_verdef *vd_nextdef; /* vd_next as pointer. */
+ struct elf_internal_verdaux *vd_auxptr; /* vd_aux as pointer. */
+ unsigned int vd_exp_refno; /* Used by the linker. */
+} Elf_Internal_Verdef;
+
+/* This structure appears in a SHT_GNU_verdef section. */
+
+typedef struct elf_internal_verdaux {
+ unsigned long vda_name; /* String table offset of name. */
+ unsigned long vda_next; /* Offset to next verdaux. */
+
+ /* These fields are set up when BFD reads in the structure. FIXME:
+ It would be cleaner to store these in a different structure. */
+ const char *vda_nodename; /* vda_name as pointer. */
+ struct elf_internal_verdaux *vda_nextptr; /* vda_next as pointer. */
+} Elf_Internal_Verdaux;
+
+/* This structure appears in a SHT_GNU_verneed section. */
+
+typedef struct elf_internal_verneed {
+ unsigned short vn_version; /* Version number of structure. */
+ unsigned short vn_cnt; /* Number of vernaux entries. */
+ unsigned long vn_file; /* String table offset of library name. */
+ unsigned long vn_aux; /* Offset to vernaux entries. */
+ unsigned long vn_next; /* Offset to next verneed. */
+
+ /* These fields are set up when BFD reads in the structure. FIXME:
+ It would be cleaner to store these in a different structure. */
+ bfd *vn_bfd; /* BFD. */
+ const char *vn_filename; /* vn_file as pointer. */
+ struct elf_internal_vernaux *vn_auxptr; /* vn_aux as pointer. */
+ struct elf_internal_verneed *vn_nextref; /* vn_nextref as pointer. */
+} Elf_Internal_Verneed;
+
+/* This structure appears in a SHT_GNU_verneed section. */
+
+typedef struct elf_internal_vernaux {
+ unsigned long vna_hash; /* Hash of dependency name. */
+ unsigned short vna_flags; /* Flags (VER_FLG_*). */
+ unsigned short vna_other; /* Unused. */
+ unsigned long vna_name; /* String table offset to version name. */
+ unsigned long vna_next; /* Offset to next vernaux. */
+
+ /* These fields are set up when BFD reads in the structure. FIXME:
+ It would be cleaner to store these in a different structure. */
+ const char *vna_nodename; /* vna_name as pointer. */
+ struct elf_internal_vernaux *vna_nextptr; /* vna_next as pointer. */
+} Elf_Internal_Vernaux;
+
+/* This structure appears in a SHT_GNU_versym section. This is not a
+ standard ELF structure; ELF just uses Elf32_Half. */
+
+typedef struct elf_internal_versym {
+ unsigned short vs_vers;
+} Elf_Internal_Versym;
+
+/* Structure for syminfo section. */
+typedef struct
+{
+ unsigned short int si_boundto;
+ unsigned short int si_flags;
+} Elf_Internal_Syminfo;
+
+
+#define elf32_internal_verdef elf_internal_verdef
+#define elf64_internal_verdef elf_internal_verdef
+#define elf32_internal_verdaux elf_internal_verdaux
+#define elf64_internal_verdaux elf_internal_verdaux
+#define elf32_internal_verneed elf_internal_verneed
+#define elf64_internal_verneed elf_internal_verneed
+#define elf32_internal_vernaux elf_internal_vernaux
+#define elf64_internal_vernaux elf_internal_vernaux
+#define elf32_internal_versym elf_internal_versym
+#define elf64_internal_versym elf_internal_versym
+
+#define Elf32_Internal_Verdef Elf_Internal_Verdef
+#define Elf64_Internal_Verdef Elf_Internal_Verdef
+#define Elf32_Internal_Verdaux Elf_Internal_Verdaux
+#define Elf64_Internal_Verdaux Elf_Internal_Verdaux
+#define Elf32_Internal_Verneed Elf_Internal_Verneed
+#define Elf64_Internal_Verneed Elf_Internal_Verneed
+#define Elf32_Internal_Vernaux Elf_Internal_Vernaux
+#define Elf64_Internal_Vernaux Elf_Internal_Vernaux
+#define Elf32_Internal_Versym Elf_Internal_Versym
+#define Elf64_Internal_Versym Elf_Internal_Versym
+#define Elf32_Internal_Syminfo Elf_Internal_Syminfo
+#define Elf64_Internal_Syminfo Elf_Internal_Syminfo
+
+/* This structure is used to describe how sections should be assigned
+ to program segments. */
+
+struct elf_segment_map
+{
+ /* Next program segment. */
+ struct elf_segment_map *next;
+ /* Program segment type. */
+ unsigned long p_type;
+ /* Program segment flags. */
+ unsigned long p_flags;
+ /* Program segment physical address. */
+ bfd_vma p_paddr;
+ /* Whether the p_flags field is valid; if not, the flags are based
+ on the section flags. */
+ unsigned int p_flags_valid : 1;
+ /* Whether the p_paddr field is valid; if not, the physical address
+ is based on the section lma values. */
+ unsigned int p_paddr_valid : 1;
+ /* Whether this segment includes the file header. */
+ unsigned int includes_filehdr : 1;
+ /* Whether this segment includes the program headers. */
+ unsigned int includes_phdrs : 1;
+ /* Number of sections (may be 0). */
+ unsigned int count;
+ /* Sections. Actual number of elements is in count field. */
+ asection *sections[1];
+};
+
+#endif /* _ELF_INTERNAL_H */
diff --git a/include/elf/m32r.h b/include/elf/m32r.h
new file mode 100644
index 0000000..0537d13
--- /dev/null
+++ b/include/elf/m32r.h
@@ -0,0 +1,66 @@
+/* M32R ELF support for BFD.
+ Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_M32R_H
+#define _ELF_M32R_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_m32r_reloc_type)
+ RELOC_NUMBER (R_M32R_NONE, 0)
+ RELOC_NUMBER (R_M32R_16, 1)
+ RELOC_NUMBER (R_M32R_32, 2)
+ RELOC_NUMBER (R_M32R_24, 3)
+ RELOC_NUMBER (R_M32R_10_PCREL, 4)
+ RELOC_NUMBER (R_M32R_18_PCREL, 5)
+ RELOC_NUMBER (R_M32R_26_PCREL, 6)
+ RELOC_NUMBER (R_M32R_HI16_ULO, 7)
+ RELOC_NUMBER (R_M32R_HI16_SLO, 8)
+ RELOC_NUMBER (R_M32R_LO16, 9)
+ RELOC_NUMBER (R_M32R_SDA16, 10)
+ RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)
+ RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12)
+ EMPTY_RELOC (R_M32R_max)
+END_RELOC_NUMBERS
+
+/* Processor specific section indices. These sections do not actually
+ exist. Symbols with a st_shndx field corresponding to one of these
+ values have a special meaning. */
+
+/* Small common symbol. */
+#define SHN_M32R_SCOMMON 0xff00
+
+/* Processor specific section flags. */
+
+/* This section contains sufficient relocs to be relaxed.
+ When relaxing, even relocs of branch instructions the assembler could
+ complete must be present because relaxing may cause the branch target to
+ move. */
+#define SHF_M32R_CAN_RELAX 0x10000000
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* Two bit m32r architecture field. */
+#define EF_M32R_ARCH 0x30000000
+
+/* m32r code. */
+#define E_M32R_ARCH 0x00000000
+
+#endif
diff --git a/include/elf/m68k.h b/include/elf/m68k.h
new file mode 100644
index 0000000..db31cdcd
--- /dev/null
+++ b/include/elf/m68k.h
@@ -0,0 +1,56 @@
+/* MC68k ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_M68K_H
+#define _ELF_M68K_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocation types. */
+START_RELOC_NUMBERS (elf_m68k_reloc_type)
+ RELOC_NUMBER (R_68K_NONE, 0) /* No reloc */
+ RELOC_NUMBER (R_68K_32, 1) /* Direct 32 bit */
+ RELOC_NUMBER (R_68K_16, 2) /* Direct 16 bit */
+ RELOC_NUMBER (R_68K_8, 3) /* Direct 8 bit */
+ RELOC_NUMBER (R_68K_PC32, 4) /* PC relative 32 bit */
+ RELOC_NUMBER (R_68K_PC16, 5) /* PC relative 16 bit */
+ RELOC_NUMBER (R_68K_PC8, 6) /* PC relative 8 bit */
+ RELOC_NUMBER (R_68K_GOT32, 7) /* 32 bit PC relative GOT entry */
+ RELOC_NUMBER (R_68K_GOT16, 8) /* 16 bit PC relative GOT entry */
+ RELOC_NUMBER (R_68K_GOT8, 9) /* 8 bit PC relative GOT entry */
+ RELOC_NUMBER (R_68K_GOT32O, 10) /* 32 bit GOT offset */
+ RELOC_NUMBER (R_68K_GOT16O, 11) /* 16 bit GOT offset */
+ RELOC_NUMBER (R_68K_GOT8O, 12) /* 8 bit GOT offset */
+ RELOC_NUMBER (R_68K_PLT32, 13) /* 32 bit PC relative PLT address */
+ RELOC_NUMBER (R_68K_PLT16, 14) /* 16 bit PC relative PLT address */
+ RELOC_NUMBER (R_68K_PLT8, 15) /* 8 bit PC relative PLT address */
+ RELOC_NUMBER (R_68K_PLT32O, 16) /* 32 bit PLT offset */
+ RELOC_NUMBER (R_68K_PLT16O, 17) /* 16 bit PLT offset */
+ RELOC_NUMBER (R_68K_PLT8O, 18) /* 8 bit PLT offset */
+ RELOC_NUMBER (R_68K_COPY, 19) /* Copy symbol at runtime */
+ RELOC_NUMBER (R_68K_GLOB_DAT, 20) /* Create GOT entry */
+ RELOC_NUMBER (R_68K_JMP_SLOT, 21) /* Create PLT entry */
+ RELOC_NUMBER (R_68K_RELATIVE, 22) /* Adjust by program base */
+ /* These are GNU extensions to enable C++ vtable garbage collection. */
+ RELOC_NUMBER (R_68K_GNU_VTINHERIT, 23)
+ RELOC_NUMBER (R_68K_GNU_VTENTRY, 24)
+ EMPTY_RELOC (R_68K_max)
+END_RELOC_NUMBERS
+
+#endif
diff --git a/include/elf/mcore.h b/include/elf/mcore.h
new file mode 100644
index 0000000..a7c4dad
--- /dev/null
+++ b/include/elf/mcore.h
@@ -0,0 +1,43 @@
+/* Motorolla MCore support for BFD.
+ Copyright (C) 1995, 1999 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the MCore ELF ABI. */
+#ifndef _ELF_MORE_H
+#define _ELF_MORE_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_mcore_reloc_type)
+ RELOC_NUMBER (R_MCORE_NONE, 0)
+ RELOC_NUMBER (R_MCORE_ADDR32, 1)
+ RELOC_NUMBER (R_MCORE_PCRELIMM8BY4, 2)
+ RELOC_NUMBER (R_MCORE_PCRELIMM11BY2, 3)
+ RELOC_NUMBER (R_MCORE_PCRELIMM4BY2, 4)
+ RELOC_NUMBER (R_MCORE_PCREL32, 5)
+ RELOC_NUMBER (R_MCORE_PCRELJSR_IMM11BY2, 6)
+ RELOC_NUMBER (R_MCORE_GNU_VTINHERIT, 7)
+ RELOC_NUMBER (R_MCORE_GNU_VTENTRY, 8)
+ EMPTY_RELOC (R_MCORE_max)
+END_RELOC_NUMBERS
+
+/* Section Attributes. */
+#define SHF_MCORE_NOREAD 0x80000000
+
+#endif /* _ELF_MCORE_H */
diff --git a/include/elf/mips.h b/include/elf/mips.h
new file mode 100644
index 0000000..c967248
--- /dev/null
+++ b/include/elf/mips.h
@@ -0,0 +1,860 @@
+/* MIPS ELF support for BFD.
+ Copyright (C) 1993, 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
+
+ By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
+ information in the System V Application Binary Interface, MIPS
+ Processor Supplement.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the MIPS ELF ABI. Note
+ that most of this is not actually implemented by BFD. */
+
+#ifndef _ELF_MIPS_H
+#define _ELF_MIPS_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocation types. */
+START_RELOC_NUMBERS (elf_mips_reloc_type)
+ RELOC_NUMBER (R_MIPS_NONE, 0)
+ RELOC_NUMBER (R_MIPS_16, 1)
+ RELOC_NUMBER (R_MIPS_32, 2)
+ RELOC_NUMBER (R_MIPS_REL32, 3)
+ RELOC_NUMBER (R_MIPS_26, 4)
+ RELOC_NUMBER (R_MIPS_HI16, 5)
+ RELOC_NUMBER (R_MIPS_LO16, 6)
+ RELOC_NUMBER (R_MIPS_GPREL16, 7)
+ RELOC_NUMBER (R_MIPS_LITERAL, 8)
+ RELOC_NUMBER (R_MIPS_GOT16, 9)
+ RELOC_NUMBER (R_MIPS_PC16, 10)
+ RELOC_NUMBER (R_MIPS_CALL16, 11)
+ RELOC_NUMBER (R_MIPS_GPREL32, 12)
+ /* The remaining relocs are defined on Irix, although they are not
+ in the MIPS ELF ABI. */
+ RELOC_NUMBER (R_MIPS_UNUSED1, 13)
+ RELOC_NUMBER (R_MIPS_UNUSED2, 14)
+ RELOC_NUMBER (R_MIPS_UNUSED3, 15)
+ RELOC_NUMBER (R_MIPS_SHIFT5, 16)
+ RELOC_NUMBER (R_MIPS_SHIFT6, 17)
+ RELOC_NUMBER (R_MIPS_64, 18)
+ RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
+ RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
+ RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
+ RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
+ RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
+ RELOC_NUMBER (R_MIPS_SUB, 24)
+ RELOC_NUMBER (R_MIPS_INSERT_A, 25)
+ RELOC_NUMBER (R_MIPS_INSERT_B, 26)
+ RELOC_NUMBER (R_MIPS_DELETE, 27)
+ RELOC_NUMBER (R_MIPS_HIGHER, 28)
+ RELOC_NUMBER (R_MIPS_HIGHEST, 29)
+ RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
+ RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
+ RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
+ RELOC_NUMBER (R_MIPS_REL16, 33)
+ RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
+ RELOC_NUMBER (R_MIPS_PJUMP, 35)
+ RELOC_NUMBER (R_MIPS_RELGOT, 36)
+ RELOC_NUMBER (R_MIPS_JALR, 37)
+ RELOC_NUMBER (R_MIPS_max, 38)
+ /* These relocs are used for the mips16. */
+ RELOC_NUMBER (R_MIPS16_26, 100)
+ RELOC_NUMBER (R_MIPS16_GPREL, 101)
+ /* These are GNU extensions to enable C++ vtable garbage collection. */
+ RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
+ RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
+END_RELOC_NUMBERS
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* At least one .noreorder directive appears in the source. */
+#define EF_MIPS_NOREORDER 0x00000001
+
+/* File contains position independent code. */
+#define EF_MIPS_PIC 0x00000002
+
+/* Code in file uses the standard calling sequence for calling
+ position independent code. */
+#define EF_MIPS_CPIC 0x00000004
+
+/* Code in file uses new ABI (-n32 on Irix 6). */
+#define EF_MIPS_ABI2 0x00000020
+
+/* Indicates code compiled for a 64-bit machine in 32-bit mode.
+ (regs are 32-bits wide.) */
+#define EF_MIPS_32BITMODE 0x00000100
+
+/* Four bit MIPS architecture field. */
+#define EF_MIPS_ARCH 0xf0000000
+
+/* -mips1 code. */
+#define E_MIPS_ARCH_1 0x00000000
+
+/* -mips2 code. */
+#define E_MIPS_ARCH_2 0x10000000
+
+/* -mips3 code. */
+#define E_MIPS_ARCH_3 0x20000000
+
+/* -mips4 code. */
+#define E_MIPS_ARCH_4 0x30000000
+
+/* The ABI of the file. Also see EF_MIPS_ABI2 above. */
+#define EF_MIPS_ABI 0x0000F000
+
+/* The original o32 abi. */
+#define E_MIPS_ABI_O32 0x00001000
+
+/* O32 extended to work on 64 bit architectures */
+#define E_MIPS_ABI_O64 0x00002000
+
+/* EABI in 32 bit mode */
+#define E_MIPS_ABI_EABI32 0x00003000
+
+/* EABI in 64 bit mode */
+#define E_MIPS_ABI_EABI64 0x00004000
+
+
+/* Machine variant if we know it. This field was invented at Cygnus,
+ but it is hoped that other vendors will adopt it. If some standard
+ is developed, this code should be changed to follow it. */
+
+#define EF_MIPS_MACH 0x00FF0000
+
+/* Cygnus is choosing values between 80 and 9F;
+ 00 - 7F should be left for a future standard;
+ the rest are open. */
+
+#define E_MIPS_MACH_3900 0x00810000
+
+#define E_MIPS_MACH_4010 0x00820000
+#define E_MIPS_MACH_4100 0x00830000
+#define E_MIPS_MACH_4650 0x00850000
+#define E_MIPS_MACH_4111 0x00880000
+
+
+/* Processor specific section indices. These sections do not actually
+ exist. Symbols with a st_shndx field corresponding to one of these
+ values have a special meaning. */
+
+/* Defined and allocated common symbol. Value is virtual address. If
+ relocated, alignment must be preserved. */
+#define SHN_MIPS_ACOMMON 0xff00
+
+/* Defined and allocated text symbol. Value is virtual address.
+ Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
+#define SHN_MIPS_TEXT 0xff01
+
+/* Defined and allocated data symbol. Value is virtual address.
+ Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
+#define SHN_MIPS_DATA 0xff02
+
+/* Small common symbol. */
+#define SHN_MIPS_SCOMMON 0xff03
+
+/* Small undefined symbol. */
+#define SHN_MIPS_SUNDEFINED 0xff04
+
+/* Processor specific section types. */
+
+/* Section contains the set of dynamic shared objects used when
+ statically linking. */
+#define SHT_MIPS_LIBLIST 0x70000000
+
+/* I'm not sure what this is, but it's used on Irix 5. */
+#define SHT_MIPS_MSYM 0x70000001
+
+/* Section contains list of symbols whose definitions conflict with
+ symbols defined in shared objects. */
+#define SHT_MIPS_CONFLICT 0x70000002
+
+/* Section contains the global pointer table. */
+#define SHT_MIPS_GPTAB 0x70000003
+
+/* Section contains microcode information. The exact format is
+ unspecified. */
+#define SHT_MIPS_UCODE 0x70000004
+
+/* Section contains some sort of debugging information. The exact
+ format is unspecified. It's probably ECOFF symbols. */
+#define SHT_MIPS_DEBUG 0x70000005
+
+/* Section contains register usage information. */
+#define SHT_MIPS_REGINFO 0x70000006
+
+/* ??? */
+#define SHT_MIPS_PACKAGE 0x70000007
+
+/* ??? */
+#define SHT_MIPS_PACKSYM 0x70000008
+
+/* ??? */
+#define SHT_MIPS_RELD 0x70000009
+
+/* Section contains interface information. */
+#define SHT_MIPS_IFACE 0x7000000b
+
+/* Section contains description of contents of another section. */
+#define SHT_MIPS_CONTENT 0x7000000c
+
+/* Section contains miscellaneous options. */
+#define SHT_MIPS_OPTIONS 0x7000000d
+
+/* ??? */
+#define SHT_MIPS_SHDR 0x70000010
+
+/* ??? */
+#define SHT_MIPS_FDESC 0x70000011
+
+/* ??? */
+#define SHT_MIPS_EXTSYM 0x70000012
+
+/* ??? */
+#define SHT_MIPS_DENSE 0x70000013
+
+/* ??? */
+#define SHT_MIPS_PDESC 0x70000014
+
+/* ??? */
+#define SHT_MIPS_LOCSYM 0x70000015
+
+/* ??? */
+#define SHT_MIPS_AUXSYM 0x70000016
+
+/* ??? */
+#define SHT_MIPS_OPTSYM 0x70000017
+
+/* ??? */
+#define SHT_MIPS_LOCSTR 0x70000018
+
+/* ??? */
+#define SHT_MIPS_LINE 0x70000019
+
+/* ??? */
+#define SHT_MIPS_RFDESC 0x7000001a
+
+/* ??? */
+#define SHT_MIPS_DELTASYM 0x7000001b
+
+/* ??? */
+#define SHT_MIPS_DELTAINST 0x7000001c
+
+/* ??? */
+#define SHT_MIPS_DELTACLASS 0x7000001d
+
+/* DWARF debugging section. */
+#define SHT_MIPS_DWARF 0x7000001e
+
+/* ??? */
+#define SHT_MIPS_DELTADECL 0x7000001f
+
+/* List of libraries the binary depends on. Includes a time stamp, version
+ number. */
+#define SHT_MIPS_SYMBOL_LIB 0x70000020
+
+/* Events section. */
+#define SHT_MIPS_EVENTS 0x70000021
+
+/* ??? */
+#define SHT_MIPS_TRANSLATE 0x70000022
+
+/* ??? */
+#define SHT_MIPS_PIXIE 0x70000023
+
+/* ??? */
+#define SHT_MIPS_XLATE 0x70000024
+
+/* ??? */
+#define SHT_MIPS_XLATE_DEBUG 0x70000025
+
+/* ??? */
+#define SHT_MIPS_WHIRL 0x70000026
+
+/* ??? */
+#define SHT_MIPS_EH_REGION 0x70000027
+
+/* ??? */
+#define SHT_MIPS_XLATE_OLD 0x70000028
+
+/* ??? */
+#define SHT_MIPS_PDR_EXCEPTION 0x70000029
+
+
+/* A section of type SHT_MIPS_LIBLIST contains an array of the
+ following structure. The sh_link field is the section index of the
+ string table. The sh_info field is the number of entries in the
+ section. */
+typedef struct
+{
+ /* String table index for name of shared object. */
+ unsigned long l_name;
+ /* Time stamp. */
+ unsigned long l_time_stamp;
+ /* Checksum of symbol names and common sizes. */
+ unsigned long l_checksum;
+ /* String table index for version. */
+ unsigned long l_version;
+ /* Flags. */
+ unsigned long l_flags;
+} Elf32_Lib;
+
+/* The external version of Elf32_Lib. */
+typedef struct
+{
+ unsigned char l_name[4];
+ unsigned char l_time_stamp[4];
+ unsigned char l_checksum[4];
+ unsigned char l_version[4];
+ unsigned char l_flags[4];
+} Elf32_External_Lib;
+
+/* The l_flags field of an Elf32_Lib structure may contain the
+ following flags. */
+
+/* Require an exact match at runtime. */
+#define LL_EXACT_MATCH 0x00000001
+
+/* Ignore version incompatibilities at runtime. */
+#define LL_IGNORE_INT_VER 0x00000002
+
+/* Require matching minor version number. */
+#define LL_REQUIRE_MINOR 0x00000004
+
+/* ??? */
+#define LL_EXPORTS 0x00000008
+
+/* Delay loading of this library until really needed. */
+#define LL_DELAY_LOAD 0x00000010
+
+/* ??? Delta C++ stuff ??? */
+#define LL_DELTA 0x00000020
+
+
+/* A section of type SHT_MIPS_CONFLICT is an array of indices into the
+ .dynsym section. Each element has the following type. */
+typedef unsigned long Elf32_Conflict;
+typedef unsigned char Elf32_External_Conflict[4];
+
+typedef unsigned long Elf64_Conflict;
+typedef unsigned char Elf64_External_Conflict[8];
+
+/* A section of type SHT_MIPS_GPTAB contains information about how
+ much GP space would be required for different -G arguments. This
+ information is only used so that the linker can provide informative
+ suggestions as to the best -G value to use. The sh_info field is
+ the index of the section for which this information applies. The
+ contents of the section are an array of the following union. The
+ first element uses the gt_header field. The remaining elements use
+ the gt_entry field. */
+typedef union
+{
+ struct
+ {
+ /* -G value actually used for this object file. */
+ unsigned long gt_current_g_value;
+ /* Unused. */
+ unsigned long gt_unused;
+ } gt_header;
+ struct
+ {
+ /* If this -G argument has been used... */
+ unsigned long gt_g_value;
+ /* ...this many GP section bytes would be required. */
+ unsigned long gt_bytes;
+ } gt_entry;
+} Elf32_gptab;
+
+/* The external version of Elf32_gptab. */
+
+typedef union
+{
+ struct
+ {
+ unsigned char gt_current_g_value[4];
+ unsigned char gt_unused[4];
+ } gt_header;
+ struct
+ {
+ unsigned char gt_g_value[4];
+ unsigned char gt_bytes[4];
+ } gt_entry;
+} Elf32_External_gptab;
+
+/* A section of type SHT_MIPS_REGINFO contains the following
+ structure. */
+typedef struct
+{
+ /* Mask of general purpose registers used. */
+ unsigned long ri_gprmask;
+ /* Mask of co-processor registers used. */
+ unsigned long ri_cprmask[4];
+ /* GP register value for this object file. */
+ long ri_gp_value;
+} Elf32_RegInfo;
+
+/* The external version of the Elf_RegInfo structure. */
+typedef struct
+{
+ unsigned char ri_gprmask[4];
+ unsigned char ri_cprmask[4][4];
+ unsigned char ri_gp_value[4];
+} Elf32_External_RegInfo;
+
+/* MIPS ELF .reginfo swapping routines. */
+extern void bfd_mips_elf32_swap_reginfo_in
+ PARAMS ((bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *));
+extern void bfd_mips_elf32_swap_reginfo_out
+ PARAMS ((bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *));
+
+/* Processor specific section flags. */
+
+/* This section must be in the global data area. */
+#define SHF_MIPS_GPREL 0x10000000
+
+/* This section should be merged. */
+#define SHF_MIPS_MERGE 0x20000000
+
+/* This section contains 32 bit addresses. */
+#define SHF_MIPS_ADDR32 0x40000000
+
+/* This section contains 64 bit addresses. */
+#define SHF_MIPS_ADDR64 0x80000000
+
+/* This section may not be stripped. */
+#define SHF_MIPS_NOSTRIP 0x08000000
+
+/* This section is local to threads. */
+#define SHF_MIPS_LOCAL 0x04000000
+
+/* Linker should generate implicit weak names for this section. */
+#define SHF_MIPS_NAMES 0x02000000
+
+/* Processor specific program header types. */
+
+/* Register usage information. Identifies one .reginfo section. */
+#define PT_MIPS_REGINFO 0x70000000
+
+/* Runtime procedure table. */
+#define PT_MIPS_RTPROC 0x70000001
+
+/* Options (for what ???). */
+#define PT_MIPS_OPTIONS 0x70000002
+
+/* Processor specific dynamic array tags. */
+
+/* 32 bit version number for runtime linker interface. */
+#define DT_MIPS_RLD_VERSION 0x70000001
+
+/* Time stamp. */
+#define DT_MIPS_TIME_STAMP 0x70000002
+
+/* Checksum of external strings and common sizes. */
+#define DT_MIPS_ICHECKSUM 0x70000003
+
+/* Index of version string in string table. */
+#define DT_MIPS_IVERSION 0x70000004
+
+/* 32 bits of flags. */
+#define DT_MIPS_FLAGS 0x70000005
+
+/* Base address of the segment. */
+#define DT_MIPS_BASE_ADDRESS 0x70000006
+
+/* ??? */
+#define DT_MIPS_MSYM 0x70000007
+
+/* Address of .conflict section. */
+#define DT_MIPS_CONFLICT 0x70000008
+
+/* Address of .liblist section. */
+#define DT_MIPS_LIBLIST 0x70000009
+
+/* Number of local global offset table entries. */
+#define DT_MIPS_LOCAL_GOTNO 0x7000000a
+
+/* Number of entries in the .conflict section. */
+#define DT_MIPS_CONFLICTNO 0x7000000b
+
+/* Number of entries in the .liblist section. */
+#define DT_MIPS_LIBLISTNO 0x70000010
+
+/* Number of entries in the .dynsym section. */
+#define DT_MIPS_SYMTABNO 0x70000011
+
+/* Index of first external dynamic symbol not referenced locally. */
+#define DT_MIPS_UNREFEXTNO 0x70000012
+
+/* Index of first dynamic symbol in global offset table. */
+#define DT_MIPS_GOTSYM 0x70000013
+
+/* Number of page table entries in global offset table. */
+#define DT_MIPS_HIPAGENO 0x70000014
+
+/* Address of run time loader map, used for debugging. */
+#define DT_MIPS_RLD_MAP 0x70000016
+
+/* Delta C++ class definition. */
+#define DT_MIPS_DELTA_CLASS 0x70000017
+
+/* Number of entries in DT_MIPS_DELTA_CLASS. */
+#define DT_MIPS_DELTA_CLASS_NO 0x70000018
+
+/* Delta C++ class instances. */
+#define DT_MIPS_DELTA_INSTANCE 0x70000019
+
+/* Number of entries in DT_MIPS_DELTA_INSTANCE. */
+#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a
+
+/* Delta relocations. */
+#define DT_MIPS_DELTA_RELOC 0x7000001b
+
+/* Number of entries in DT_MIPS_DELTA_RELOC. */
+#define DT_MIPS_DELTA_RELOC_NO 0x7000001c
+
+/* Delta symbols that Delta relocations refer to. */
+#define DT_MIPS_DELTA_SYM 0x7000001d
+
+/* Number of entries in DT_MIPS_DELTA_SYM. */
+#define DT_MIPS_DELTA_SYM_NO 0x7000001e
+
+/* Delta symbols that hold class declarations. */
+#define DT_MIPS_DELTA_CLASSSYM 0x70000020
+
+/* Number of entries in DT_MIPS_DELTA_CLASSSYM. */
+#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021
+
+/* Flags indicating information about C++ flavor. */
+#define DT_MIPS_CXX_FLAGS 0x70000022
+
+/* Pixie information (???). */
+#define DT_MIPS_PIXIE_INIT 0x70000023
+
+/* ??? */
+#define DT_MIPS_SYMBOL_LIB 0x70000024
+
+/* ??? */
+#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
+
+/* ??? */
+#define DT_MIPS_LOCAL_GOTIDX 0x70000026
+
+/* ??? */
+#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
+
+/* ??? */
+#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
+
+/* Address of `.MIPS.options'. */
+#define DT_MIPS_OPTIONS 0x70000029
+
+/* Address of `.interface'. */
+#define DT_MIPS_INTERFACE 0x7000002a
+
+/* ??? */
+#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
+
+/* Size of the .interface section. */
+#define DT_MIPS_INTERFACE_SIZE 0x7000002c
+
+/* Size of rld_text_resolve function stored in the GOT. */
+#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d
+
+/* Default suffix of DSO to be added by rld on dlopen() calls. */
+#define DT_MIPS_PERF_SUFFIX 0x7000002e
+
+/* Size of compact relocation section (O32). */
+#define DT_MIPS_COMPACT_SIZE 0x7000002f
+
+/* GP value for auxiliary GOTs. */
+#define DT_MIPS_GP_VALUE 0x70000030
+
+/* Address of auxiliary .dynamic. */
+#define DT_MIPS_AUX_DYNAMIC 0x70000031
+
+/* Flags which may appear in a DT_MIPS_FLAGS entry. */
+
+/* No flags. */
+#define RHF_NONE 0x00000000
+
+/* Uses shortcut pointers. */
+#define RHF_QUICKSTART 0x00000001
+
+/* Hash size is not a power of two. */
+#define RHF_NOTPOT 0x00000002
+
+/* Ignore LD_LIBRARY_PATH. */
+#define RHS_NO_LIBRARY_REPLACEMENT \
+ 0x00000004
+
+#define RHF_NO_MOVE 0x00000008
+#define RHF_SGI_ONLY 0x00000010
+#define RHF_GUARANTEE_INIT 0x00000020
+#define RHF_DELTA_C_PLUS_PLUS 0x00000040
+#define RHF_GUARANTEE_START_INIT 0x00000080
+#define RHF_PIXIE 0x00000100
+#define RHF_DEFAULT_DELAY_LOAD 0x00000200
+#define RHF_REQUICKSTART 0x00000400
+#define RHF_REQUICKSTARTED 0x00000800
+#define RHF_CORD 0x00001000
+#define RHF_NO_UNRES_UNDEF 0x00002000
+#define RHF_RLD_ORDER_SAFE 0x00004000
+
+/* Special values for the st_other field in the symbol table. These
+ are used in an Irix 5 dynamic symbol table. */
+
+#define STO_DEFAULT 0x00
+#define STO_INTERNAL 0x01
+#define STO_HIDDEN 0x02
+#define STO_PROTECTED 0x03
+
+/* This value is used for a mips16 .text symbol. */
+#define STO_MIPS16 0xf0
+
+/* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
+ relocation entry specifies up to three actual relocations, all at
+ the same address. The first relocation which required a symbol
+ uses the symbol in the r_sym field. The second relocation which
+ requires a symbol uses the symbol in the r_ssym field. If all
+ three relocations require a symbol, the third one uses a zero
+ value. */
+
+/* An entry in a 64 bit SHT_REL section. */
+
+typedef struct
+{
+ /* Address of relocation. */
+ unsigned char r_offset[8];
+ /* Symbol index. */
+ unsigned char r_sym[4];
+ /* Special symbol. */
+ unsigned char r_ssym[1];
+ /* Third relocation. */
+ unsigned char r_type3[1];
+ /* Second relocation. */
+ unsigned char r_type2[1];
+ /* First relocation. */
+ unsigned char r_type[1];
+} Elf64_Mips_External_Rel;
+
+typedef struct
+{
+ /* Address of relocation. */
+ bfd_vma r_offset;
+ /* Symbol index. */
+ unsigned long r_sym;
+ /* Special symbol. */
+ unsigned char r_ssym;
+ /* Third relocation. */
+ unsigned char r_type3;
+ /* Second relocation. */
+ unsigned char r_type2;
+ /* First relocation. */
+ unsigned char r_type;
+} Elf64_Mips_Internal_Rel;
+
+/* An entry in a 64 bit SHT_RELA section. */
+
+typedef struct
+{
+ /* Address of relocation. */
+ unsigned char r_offset[8];
+ /* Symbol index. */
+ unsigned char r_sym[4];
+ /* Special symbol. */
+ unsigned char r_ssym[1];
+ /* Third relocation. */
+ unsigned char r_type3[1];
+ /* Second relocation. */
+ unsigned char r_type2[1];
+ /* First relocation. */
+ unsigned char r_type[1];
+ /* Addend. */
+ unsigned char r_addend[8];
+} Elf64_Mips_External_Rela;
+
+typedef struct
+{
+ /* Address of relocation. */
+ bfd_vma r_offset;
+ /* Symbol index. */
+ unsigned long r_sym;
+ /* Special symbol. */
+ unsigned char r_ssym;
+ /* Third relocation. */
+ unsigned char r_type3;
+ /* Second relocation. */
+ unsigned char r_type2;
+ /* First relocation. */
+ unsigned char r_type;
+ /* Addend. */
+ bfd_signed_vma r_addend;
+} Elf64_Mips_Internal_Rela;
+
+/* Values found in the r_ssym field of a relocation entry. */
+
+/* No relocation. */
+#define RSS_UNDEF 0
+
+/* Value of GP. */
+#define RSS_GP 1
+
+/* Value of GP in object being relocated. */
+#define RSS_GP0 2
+
+/* Address of location being relocated. */
+#define RSS_LOC 3
+
+/* A SHT_MIPS_OPTIONS section contains a series of options, each of
+ which starts with this header. */
+
+typedef struct
+{
+ /* Type of option. */
+ unsigned char kind[1];
+ /* Size of option descriptor, including header. */
+ unsigned char size[1];
+ /* Section index of affected section, or 0 for global option. */
+ unsigned char section[2];
+ /* Information specific to this kind of option. */
+ unsigned char info[4];
+} Elf_External_Options;
+
+typedef struct
+{
+ /* Type of option. */
+ unsigned char kind;
+ /* Size of option descriptor, including header. */
+ unsigned char size;
+ /* Section index of affected section, or 0 for global option. */
+ unsigned short section;
+ /* Information specific to this kind of option. */
+ unsigned long info;
+} Elf_Internal_Options;
+
+/* MIPS ELF option header swapping routines. */
+extern void bfd_mips_elf_swap_options_in
+ PARAMS ((bfd *, const Elf_External_Options *, Elf_Internal_Options *));
+extern void bfd_mips_elf_swap_options_out
+ PARAMS ((bfd *, const Elf_Internal_Options *, Elf_External_Options *));
+
+/* Values which may appear in the kind field of an Elf_Options
+ structure. */
+
+/* Undefined. */
+#define ODK_NULL 0
+
+/* Register usage and GP value. */
+#define ODK_REGINFO 1
+
+/* Exception processing information. */
+#define ODK_EXCEPTIONS 2
+
+/* Section padding information. */
+#define ODK_PAD 3
+
+/* Hardware workarounds performed. */
+#define ODK_HWPATCH 4
+
+/* Fill value used by the linker. */
+#define ODK_FILL 5
+
+/* Reserved space for desktop tools. */
+#define ODK_TAGS 6
+
+/* Hardware workarounds, AND bits when merging. */
+#define ODK_HWAND 7
+
+/* Hardware workarounds, OR bits when merging. */
+#define ODK_HWOR 8
+
+/* GP group to use for text/data sections. */
+#define ODK_GP_GROUP 9
+
+/* ID information. */
+#define ODK_IDENT 10
+
+/* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
+ structure. In the 64 bit ABI, it is the following structure. The
+ info field of the options header is not used. */
+
+typedef struct
+{
+ /* Mask of general purpose registers used. */
+ unsigned char ri_gprmask[4];
+ /* Padding. */
+ unsigned char ri_pad[4];
+ /* Mask of co-processor registers used. */
+ unsigned char ri_cprmask[4][4];
+ /* GP register value for this object file. */
+ unsigned char ri_gp_value[8];
+} Elf64_External_RegInfo;
+
+typedef struct
+{
+ /* Mask of general purpose registers used. */
+ unsigned long ri_gprmask;
+ /* Padding. */
+ unsigned long ri_pad;
+ /* Mask of co-processor registers used. */
+ unsigned long ri_cprmask[4];
+ /* GP register value for this object file. */
+ bfd_vma ri_gp_value;
+} Elf64_Internal_RegInfo;
+
+/* MIPS ELF reginfo swapping routines. */
+extern void bfd_mips_elf64_swap_reginfo_in
+ PARAMS ((bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *));
+extern void bfd_mips_elf64_swap_reginfo_out
+ PARAMS ((bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *));
+
+/* Masks for the info work of an ODK_EXCEPTIONS descriptor. */
+#define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */
+#define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */
+#define OEX_PAGE0 0x10000 /* Page zero must be mapped. */
+#define OEX_SMM 0x20000 /* Force sequential memory mode. */
+#define OEX_FPDBUG 0x40000 /* Force floating-point debug mode. */
+#define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */
+
+/* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */
+#define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */
+#define OEX_FPU_DIV0 0x08 /* Division by zero exception. */
+#define OEX_FPU_OFLO 0x04 /* Overflow exception. */
+#define OEX_FPU_UFLO 0x02 /* Underflow exception. */
+#define OEX_FPU_INEX 0x01 /* Inexact exception. */
+
+/* Masks for the info word of an ODK_PAD descriptor. */
+#define OPAD_PREFIX 0x01
+#define OPAD_POSTFIX 0x02
+#define OPAD_SYMBOL 0x04
+
+/* Masks for the info word of an ODK_HWPATCH descriptor. */
+#define OHW_R4KEOP 0x01 /* R4000 end-of-page patch. */
+#define OHW_R8KPFETCH 0x02 /* May need R8000 prefetch patch. */
+#define OHW_R5KEOP 0x04 /* R5000 end-of-page patch. */
+#define OHW_R5KCVTL 0x08 /* R5000 cvt.[ds].l bug (clean == 1). */
+
+/* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */
+#define OGP_GROUP 0x0000ffff /* GP group number. */
+#define OGP_SELF 0xffff0000 /* Self-contained GP groups. */
+
+/* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */
+#define OHWA0_R4KEOP_CHECKED 0x00000001
+#define OHWA0_R4KEOP_CLEAN 0x00000002
+
+
+#endif /* _ELF_MIPS_H */
diff --git a/include/elf/mn10200.h b/include/elf/mn10200.h
new file mode 100644
index 0000000..5e29e0a
--- /dev/null
+++ b/include/elf/mn10200.h
@@ -0,0 +1,39 @@
+/* MN10200 ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the MN10200 ELF ABI. */
+
+#ifndef _ELF_MN10200_H
+#define _ELF_MN10200_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_mn10200_reloc_type)
+ RELOC_NUMBER (R_MN10200_NONE, 0)
+ RELOC_NUMBER (R_MN10200_32, 1)
+ RELOC_NUMBER (R_MN10200_16, 2)
+ RELOC_NUMBER (R_MN10200_8, 3)
+ RELOC_NUMBER (R_MN10200_24, 4)
+ RELOC_NUMBER (R_MN10200_PCREL8, 5)
+ RELOC_NUMBER (R_MN10200_PCREL16, 6)
+ RELOC_NUMBER (R_MN10200_PCREL24, 7)
+END_RELOC_NUMBERS
+
+#endif /* _ELF_MN10200_H */
diff --git a/include/elf/mn10300.h b/include/elf/mn10300.h
new file mode 100644
index 0000000..64a0750
--- /dev/null
+++ b/include/elf/mn10300.h
@@ -0,0 +1,53 @@
+/* MN10300 ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the MN10300 ELF ABI. */
+
+#ifndef _ELF_MN10300_H
+#define _ELF_MN10300_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_mn10300_reloc_type)
+ RELOC_NUMBER (R_MN10300_NONE, 0)
+ RELOC_NUMBER (R_MN10300_32, 1)
+ RELOC_NUMBER (R_MN10300_16, 2)
+ RELOC_NUMBER (R_MN10300_8, 3)
+ RELOC_NUMBER (R_MN10300_PCREL32, 4)
+ RELOC_NUMBER (R_MN10300_PCREL16, 5)
+ RELOC_NUMBER (R_MN10300_PCREL8, 6)
+ RELOC_NUMBER (R_MN10300_GNU_VTINHERIT, 7)
+ RELOC_NUMBER (R_MN10300_GNU_VTENTRY, 8)
+ RELOC_NUMBER (R_MN10300_24, 9)
+ EMPTY_RELOC (R_MN10300_MAX)
+END_RELOC_NUMBERS
+
+/* Machine variant if we know it. This field was invented at Cygnus,
+ but it is hoped that other vendors will adopt it. If some standard
+ is developed, this code should be changed to follow it. */
+
+#define EF_MN10300_MACH 0x00FF0000
+
+/* Cygnus is choosing values between 80 and 9F;
+ 00 - 7F should be left for a future standard;
+ the rest are open. */
+
+#define E_MN10300_MACH_MN10300 0x00810000
+#endif /* _ELF_MN10300_H */
diff --git a/include/elf/ppc.h b/include/elf/ppc.h
new file mode 100644
index 0000000..b3116d8
--- /dev/null
+++ b/include/elf/ppc.h
@@ -0,0 +1,127 @@
+/* PPC ELF support for BFD.
+ Copyright (C) 1995, 1998 Free Software Foundation, Inc.
+
+ By Michael Meissner, Cygnus Support, <meissner@cygnus.com>, from information
+ in the System V Application Binary Interface, PowerPC Processor Supplement
+ and the PowerPC Embedded Application Binary Interface (eabi).
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the PPC ELF ABI. Note
+ that most of this is not actually implemented by BFD. */
+
+#ifndef _ELF_PPC_H
+#define _ELF_PPC_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_ppc_reloc_type)
+ RELOC_NUMBER (R_PPC_NONE, 0)
+ RELOC_NUMBER (R_PPC_ADDR32, 1)
+ RELOC_NUMBER (R_PPC_ADDR24, 2)
+ RELOC_NUMBER (R_PPC_ADDR16, 3)
+ RELOC_NUMBER (R_PPC_ADDR16_LO, 4)
+ RELOC_NUMBER (R_PPC_ADDR16_HI, 5)
+ RELOC_NUMBER (R_PPC_ADDR16_HA, 6)
+ RELOC_NUMBER (R_PPC_ADDR14, 7)
+ RELOC_NUMBER (R_PPC_ADDR14_BRTAKEN, 8)
+ RELOC_NUMBER (R_PPC_ADDR14_BRNTAKEN, 9)
+ RELOC_NUMBER (R_PPC_REL24, 10)
+ RELOC_NUMBER (R_PPC_REL14, 11)
+ RELOC_NUMBER (R_PPC_REL14_BRTAKEN, 12)
+ RELOC_NUMBER (R_PPC_REL14_BRNTAKEN, 13)
+ RELOC_NUMBER (R_PPC_GOT16, 14)
+ RELOC_NUMBER (R_PPC_GOT16_LO, 15)
+ RELOC_NUMBER (R_PPC_GOT16_HI, 16)
+ RELOC_NUMBER (R_PPC_GOT16_HA, 17)
+ RELOC_NUMBER (R_PPC_PLTREL24, 18)
+ RELOC_NUMBER (R_PPC_COPY, 19)
+ RELOC_NUMBER (R_PPC_GLOB_DAT, 20)
+ RELOC_NUMBER (R_PPC_JMP_SLOT, 21)
+ RELOC_NUMBER (R_PPC_RELATIVE, 22)
+ RELOC_NUMBER (R_PPC_LOCAL24PC, 23)
+ RELOC_NUMBER (R_PPC_UADDR32, 24)
+ RELOC_NUMBER (R_PPC_UADDR16, 25)
+ RELOC_NUMBER (R_PPC_REL32, 26)
+ RELOC_NUMBER (R_PPC_PLT32, 27)
+ RELOC_NUMBER (R_PPC_PLTREL32, 28)
+ RELOC_NUMBER (R_PPC_PLT16_LO, 29)
+ RELOC_NUMBER (R_PPC_PLT16_HI, 30)
+ RELOC_NUMBER (R_PPC_PLT16_HA, 31)
+ RELOC_NUMBER (R_PPC_SDAREL16, 32)
+ RELOC_NUMBER (R_PPC_SECTOFF, 33)
+ RELOC_NUMBER (R_PPC_SECTOFF_LO, 34)
+ RELOC_NUMBER (R_PPC_SECTOFF_HI, 35)
+ RELOC_NUMBER (R_PPC_SECTOFF_HA, 36)
+
+/* The remaining relocs are from the Embedded ELF ABI, and are not
+ in the SVR4 ELF ABI. */
+ RELOC_NUMBER (R_PPC_EMB_NADDR32, 101)
+ RELOC_NUMBER (R_PPC_EMB_NADDR16, 102)
+ RELOC_NUMBER (R_PPC_EMB_NADDR16_LO, 103)
+ RELOC_NUMBER (R_PPC_EMB_NADDR16_HI, 104)
+ RELOC_NUMBER (R_PPC_EMB_NADDR16_HA, 105)
+ RELOC_NUMBER (R_PPC_EMB_SDAI16, 106)
+ RELOC_NUMBER (R_PPC_EMB_SDA2I16, 107)
+ RELOC_NUMBER (R_PPC_EMB_SDA2REL, 108)
+ RELOC_NUMBER (R_PPC_EMB_SDA21, 109)
+ RELOC_NUMBER (R_PPC_EMB_MRKREF, 110)
+ RELOC_NUMBER (R_PPC_EMB_RELSEC16, 111)
+ RELOC_NUMBER (R_PPC_EMB_RELST_LO, 112)
+ RELOC_NUMBER (R_PPC_EMB_RELST_HI, 113)
+ RELOC_NUMBER (R_PPC_EMB_RELST_HA, 114)
+ RELOC_NUMBER (R_PPC_EMB_BIT_FLD, 115)
+ RELOC_NUMBER (R_PPC_EMB_RELSDA, 116)
+
+ /* These are GNU extensions to enable C++ vtable garbage collection. */
+ RELOC_NUMBER (R_PPC_GNU_VTINHERIT, 253)
+ RELOC_NUMBER (R_PPC_GNU_VTENTRY, 254)
+
+/* This is a phony reloc to handle any old fashioned TOC16 references
+ that may still be in object files. */
+ RELOC_NUMBER (R_PPC_TOC16, 255)
+
+ EMPTY_RELOC (R_PPC_max)
+END_RELOC_NUMBERS
+
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+#define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag */
+
+ /* CYGNUS local bits below */
+#define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag */
+#define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib flag */
+
+/* Processor specific section headers, sh_type field */
+
+#define SHT_ORDERED SHT_HIPROC /* Link editor is to sort the \
+ entries in this section \
+ based on the address \
+ specified in the associated \
+ symbol table entry. */
+
+/* Processor specific section flags, sh_flags field */
+
+#define SHF_EXCLUDE 0x80000000 /* Link editor is to exclude \
+ this section from executable \
+ and shared objects that it \
+ builds when those objects \
+ are not to be furhter \
+ relocated. */
+#endif /* _ELF_PPC_H */
diff --git a/include/elf/reloc-macros.h b/include/elf/reloc-macros.h
new file mode 100644
index 0000000..9762291
--- /dev/null
+++ b/include/elf/reloc-macros.h
@@ -0,0 +1,116 @@
+/* Generic relocation support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* These macros are used by the various *.h target specific header
+ files to either generate an enum containing all the known relocations
+ for that target, or if RELOC_MACROS_GEN_FUNC is defined, a recognition
+ function is generated instead. (This is used by binutils/readelf.c)
+
+ Given a header file like this:
+
+ START_RELOC_NUMBERS (foo)
+ RELOC_NUMBER (R_foo_NONE, 0)
+ RELOC_NUMBER (R_foo_32, 1)
+ FAKE_RELOC (R_foo_illegal, 2)
+ EMPTY_RELOC (R_foo_max)
+ END_RELOC_NUMBERS
+
+ Then the following will be produced by default (ie if
+ RELOC_MACROS_GEN_FUNC is *not* defined).
+
+ enum foo
+ {
+ foo = -1,
+ R_foo_NONE = 0,
+ R_foo_32 = 1,
+ R_foo_illegal = 2,
+ R_foo_max
+ };
+
+ If RELOC_MACROS_GEN_FUNC *is* defined, then instead the
+ following function will be generated:
+
+ static char * foo PARAMS ((unsigned long rtype));
+ static char *
+ foo (rtype)
+ unsigned long rtype;
+ {
+ switch (rtype)
+ {
+ case 0: return "R_foo_NONE";
+ case 1: return "R_foo_32";
+ default: return NULL;
+ }
+ }
+ */
+
+#ifndef _RELOC_MACROS_H
+#define _RELOC_MACROS_H
+
+#ifdef RELOC_MACROS_GEN_FUNC
+
+/* This function takes the relocation number and returns the
+ string version name of the name of that relocation. If
+ the relocation is not recognised, NULL is returned. */
+
+#define START_RELOC_NUMBERS(name) \
+static const char * name PARAMS ((unsigned long rtype)); \
+static const char * \
+name (rtype) \
+ unsigned long rtype; \
+{ \
+ switch (rtype) \
+ {
+
+#ifdef __STDC__
+#define RELOC_NUMBER(name, number) case number : return #name ;
+#else
+#define RELOC_NUMBER(name, number) case number : return "name" ;
+#endif
+
+#define FAKE_RELOC(name, number)
+#define EMPTY_RELOC(name)
+
+#define END_RELOC_NUMBERS \
+ default: return NULL; \
+ } \
+}
+
+
+#else /* Default to generating enum. */
+
+/* Some compilers cannot cope with an enum that ends with a trailing
+ comma, so START_RELOC_NUMBERS creates a fake reloc entry, (initialised
+ to -1 so that the first real entry will still default to 0). Further
+ entries then prepend a comma to their definitions, creating a list
+ of enumerator entries that will satisfy these compilers. */
+#ifdef __STDC__
+#define START_RELOC_NUMBERS(name) enum name { _##name = -1
+#else
+#define START_RELOC_NUMBERS(name) enum name { name = -1
+#endif
+
+#define RELOC_NUMBER(name, number) , name = number
+#define FAKE_RELOC(name, number) , name = number
+#define EMPTY_RELOC(name) , name
+#define END_RELOC_NUMBERS };
+
+#endif
+
+#endif /* RELOC_MACROS_H */
diff --git a/include/elf/sh.h b/include/elf/sh.h
new file mode 100644
index 0000000..4a47667
--- /dev/null
+++ b/include/elf/sh.h
@@ -0,0 +1,55 @@
+/* SH ELF support for BFD.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_SH_H
+#define _ELF_SH_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+/* Relocations 25ff are GNU extensions.
+ 25..33 are used for relaxation and use the same constants as COFF uses. */
+START_RELOC_NUMBERS (elf_sh_reloc_type)
+ RELOC_NUMBER (R_SH_NONE, 0)
+ RELOC_NUMBER (R_SH_DIR32, 1)
+ RELOC_NUMBER (R_SH_REL32, 2)
+ RELOC_NUMBER (R_SH_DIR8WPN, 3)
+ RELOC_NUMBER (R_SH_IND12W, 4)
+ RELOC_NUMBER (R_SH_DIR8WPL, 5)
+ RELOC_NUMBER (R_SH_DIR8WPZ, 6)
+ RELOC_NUMBER (R_SH_DIR8BP, 7)
+ RELOC_NUMBER (R_SH_DIR8W, 8)
+ RELOC_NUMBER (R_SH_DIR8L, 9)
+ FAKE_RELOC (R_SH_FIRST_INVALID_RELOC, 10)
+ FAKE_RELOC (R_SH_LAST_INVALID_RELOC, 24)
+ RELOC_NUMBER (R_SH_SWITCH16, 25)
+ RELOC_NUMBER (R_SH_SWITCH32, 26)
+ RELOC_NUMBER (R_SH_USES, 27)
+ RELOC_NUMBER (R_SH_COUNT, 28)
+ RELOC_NUMBER (R_SH_ALIGN, 29)
+ RELOC_NUMBER (R_SH_CODE, 30)
+ RELOC_NUMBER (R_SH_DATA, 31)
+ RELOC_NUMBER (R_SH_LABEL, 32)
+ RELOC_NUMBER (R_SH_SWITCH8, 33)
+ RELOC_NUMBER (R_SH_GNU_VTINHERIT, 34)
+ RELOC_NUMBER (R_SH_GNU_VTENTRY, 35)
+ EMPTY_RELOC (R_SH_max)
+END_RELOC_NUMBERS
+
+#endif
diff --git a/include/elf/sparc.h b/include/elf/sparc.h
new file mode 100644
index 0000000..c9e4cdd
--- /dev/null
+++ b/include/elf/sparc.h
@@ -0,0 +1,156 @@
+/* SPARC ELF support for BFD.
+ Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+ By Doug Evans, Cygnus Support, <dje@cygnus.com>.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_SPARC_H
+#define _ELF_SPARC_H
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* These are defined by Sun. */
+
+#define EF_SPARC_32PLUS_MASK 0xffff00 /* bits indicating V8+ type */
+#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
+#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
+#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
+
+#define EF_SPARC_LEDATA 0x800000 /* little endian data */
+
+/* This name is used in the V9 ABI. */
+#define EF_SPARC_EXT_MASK 0xffff00 /* reserved for vendor extensions */
+
+/* V9 memory models */
+#define EF_SPARCV9_MM 0x3 /* memory model mask */
+#define EF_SPARCV9_TSO 0x0 /* total store ordering */
+#define EF_SPARCV9_PSO 0x1 /* partial store ordering */
+#define EF_SPARCV9_RMO 0x2 /* relaxed store ordering */
+
+/* Section indices. */
+
+#define SHN_BEFORE 0xff00 /* used with SHF_ORDERED */
+#define SHN_AFTER 0xff01 /* used with SHF_ORDERED */
+
+/* Section flags. */
+
+#define SHF_EXCLUDE 0x80000000 /* exclude from linking */
+#define SHF_ORDERED 0x40000000 /* treat sh_link,sh_info specially */
+
+/* Symbol types. */
+
+#define STT_REGISTER 13 /* global reg reserved to app. */
+
+#include "elf/reloc-macros.h"
+
+/* Relocation types. */
+START_RELOC_NUMBERS (elf_sparc_reloc_type)
+ RELOC_NUMBER (R_SPARC_NONE, 0)
+ RELOC_NUMBER (R_SPARC_8, 1)
+ RELOC_NUMBER (R_SPARC_16, 2)
+ RELOC_NUMBER (R_SPARC_32, 3)
+ RELOC_NUMBER (R_SPARC_DISP8, 4)
+ RELOC_NUMBER (R_SPARC_DISP16, 5)
+ RELOC_NUMBER (R_SPARC_DISP32, 6)
+ RELOC_NUMBER (R_SPARC_WDISP30, 7)
+ RELOC_NUMBER (R_SPARC_WDISP22, 8)
+ RELOC_NUMBER (R_SPARC_HI22, 9)
+ RELOC_NUMBER (R_SPARC_22, 10)
+ RELOC_NUMBER (R_SPARC_13, 11)
+ RELOC_NUMBER (R_SPARC_LO10, 12)
+ RELOC_NUMBER (R_SPARC_GOT10, 13)
+ RELOC_NUMBER (R_SPARC_GOT13, 14)
+ RELOC_NUMBER (R_SPARC_GOT22, 15)
+ RELOC_NUMBER (R_SPARC_PC10, 16)
+ RELOC_NUMBER (R_SPARC_PC22, 17)
+ RELOC_NUMBER (R_SPARC_WPLT30, 18)
+ RELOC_NUMBER (R_SPARC_COPY, 19)
+ RELOC_NUMBER (R_SPARC_GLOB_DAT, 20)
+ RELOC_NUMBER (R_SPARC_JMP_SLOT, 21)
+ RELOC_NUMBER (R_SPARC_RELATIVE, 22)
+ RELOC_NUMBER (R_SPARC_UA32, 23)
+
+ /* ??? These 6 relocs are new but not currently used. For binary
+ compatility in the sparc64-elf toolchain, we leave them out.
+ A non-binary upward compatible change is expected for sparc64-elf. */
+#ifndef SPARC64_OLD_RELOCS
+ /* ??? New relocs on the UltraSPARC. Not sure what they're for yet. */
+ RELOC_NUMBER (R_SPARC_PLT32, 24)
+ RELOC_NUMBER (R_SPARC_HIPLT22, 25)
+ RELOC_NUMBER (R_SPARC_LOPLT10, 26)
+ RELOC_NUMBER (R_SPARC_PCPLT32, 27)
+ RELOC_NUMBER (R_SPARC_PCPLT22, 28)
+ RELOC_NUMBER (R_SPARC_PCPLT10, 29)
+#endif
+
+ /* v9 relocs */
+ RELOC_NUMBER (R_SPARC_10, 30)
+ RELOC_NUMBER (R_SPARC_11, 31)
+ RELOC_NUMBER (R_SPARC_64, 32)
+ RELOC_NUMBER (R_SPARC_OLO10, 33)
+ RELOC_NUMBER (R_SPARC_HH22, 34)
+ RELOC_NUMBER (R_SPARC_HM10, 35)
+ RELOC_NUMBER (R_SPARC_LM22, 36)
+ RELOC_NUMBER (R_SPARC_PC_HH22, 37)
+ RELOC_NUMBER (R_SPARC_PC_HM10, 38)
+ RELOC_NUMBER (R_SPARC_PC_LM22, 39)
+ RELOC_NUMBER (R_SPARC_WDISP16, 40)
+ RELOC_NUMBER (R_SPARC_WDISP19, 41)
+ RELOC_NUMBER (R_SPARC_UNUSED_42, 42)
+ RELOC_NUMBER (R_SPARC_7, 43)
+ RELOC_NUMBER (R_SPARC_5, 44)
+ RELOC_NUMBER (R_SPARC_6, 45)
+ RELOC_NUMBER (R_SPARC_DISP64, 46)
+ RELOC_NUMBER (R_SPARC_PLT64, 47)
+ RELOC_NUMBER (R_SPARC_HIX22, 48)
+ RELOC_NUMBER (R_SPARC_LOX10, 49)
+ RELOC_NUMBER (R_SPARC_H44, 50)
+ RELOC_NUMBER (R_SPARC_M44, 51)
+ RELOC_NUMBER (R_SPARC_L44, 52)
+ RELOC_NUMBER (R_SPARC_REGISTER, 53)
+ RELOC_NUMBER (R_SPARC_UA64, 54)
+ RELOC_NUMBER (R_SPARC_UA16, 55)
+
+ /* little endian data relocs */
+ RELOC_NUMBER (R_SPARC_REV32, 56)
+
+ RELOC_NUMBER (R_SPARC_GNU_VTINHERIT, 250)
+ RELOC_NUMBER (R_SPARC_GNU_VTENTRY, 251)
+
+ EMPTY_RELOC (R_SPARC_max)
+END_RELOC_NUMBERS
+
+/* Relocation macros. */
+
+#define ELF64_R_TYPE_DATA(info) (((bfd_vma) (info) << 32) >> 40)
+#define ELF64_R_TYPE_ID(info) (((bfd_vma) (info) << 56) >> 56)
+#define ELF64_R_TYPE_INFO(data, type) (((bfd_vma) (data) << 8) \
+ + (bfd_vma) (type))
+
+#define DT_SPARC_REGISTER 0x70000001
+
+/*
+ * FIXME: NOT ABI -- GET RID OF THIS
+ * Defines the format used by the .plt. Currently defined values are
+ * 0 -- reserved to SI
+ * 1 -- absolute address in .got.plt
+ * 2 -- got-relative address in .got.plt
+ */
+
+#define DT_SPARC_PLTFMT 0x70000001
+
+#endif /* _ELF_SPARC_H */
diff --git a/include/elf/v850.h b/include/elf/v850.h
new file mode 100644
index 0000000..d443b7f
--- /dev/null
+++ b/include/elf/v850.h
@@ -0,0 +1,111 @@
+/* V850 ELF support for BFD.
+ Copyright (C) 1997 Free Software Foundation, Inc.
+ Created by Michael Meissner, Cygnus Support <meissner@cygnus.com>
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file holds definitions specific to the MIPS ELF ABI. Note
+ that most of this is not actually implemented by BFD. */
+
+#ifndef _ELF_V850_H
+#define _ELF_V850_H
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* Four bit V850 architecture field. */
+#define EF_V850_ARCH 0xf0000000
+
+/* v850 code. */
+#define E_V850_ARCH 0x00000000
+
+/* v850e code. */
+#define E_V850E_ARCH 0x10000000
+
+/* v850ea code. */
+#define E_V850EA_ARCH 0x20000000
+
+
+/* Flags for the st_other field */
+#define V850_OTHER_SDA 0x01 /* symbol had SDA relocations */
+#define V850_OTHER_ZDA 0x02 /* symbol had ZDA relocations */
+#define V850_OTHER_TDA 0x04 /* symbol had TDA relocations */
+#define V850_OTHER_TDA_BYTE 0x08 /* symbol had TDA byte relocations */
+#define V850_OTHER_ERROR 0x80 /* symbol had an error reported */
+
+/* V850 relocations */
+#include "elf/reloc-macros.h"
+
+START_RELOC_NUMBERS (v850_reloc_type)
+ RELOC_NUMBER (R_V850_NONE, 0)
+ RELOC_NUMBER (R_V850_9_PCREL, 1)
+ RELOC_NUMBER (R_V850_22_PCREL, 2)
+ RELOC_NUMBER (R_V850_HI16_S, 3)
+ RELOC_NUMBER (R_V850_HI16, 4)
+ RELOC_NUMBER (R_V850_LO16, 5)
+ RELOC_NUMBER (R_V850_32, 6)
+ RELOC_NUMBER (R_V850_16, 7)
+ RELOC_NUMBER (R_V850_8, 8)
+ RELOC_NUMBER( R_V850_SDA_16_16_OFFSET, 9) /* For ld.b, st.b, set1, clr1, not1, tst1, movea, movhi */
+ RELOC_NUMBER( R_V850_SDA_15_16_OFFSET, 10) /* For ld.w, ld.h, ld.hu, st.w, st.h */
+ RELOC_NUMBER( R_V850_ZDA_16_16_OFFSET, 11) /* For ld.b, st.b, set1, clr1, not1, tst1, movea, movhi */
+ RELOC_NUMBER( R_V850_ZDA_15_16_OFFSET, 12) /* For ld.w, ld.h, ld.hu, st.w, st.h */
+ RELOC_NUMBER( R_V850_TDA_6_8_OFFSET, 13) /* For sst.w, sld.w */
+ RELOC_NUMBER( R_V850_TDA_7_8_OFFSET, 14) /* For sst.h, sld.h */
+ RELOC_NUMBER( R_V850_TDA_7_7_OFFSET, 15) /* For sst.b, sld.b */
+ RELOC_NUMBER( R_V850_TDA_16_16_OFFSET, 16) /* For set1, clr1, not1, tst1, movea, movhi */
+/* CYGNUS LOCAL v850e */
+ RELOC_NUMBER( R_V850_TDA_4_5_OFFSET, 17) /* For sld.hu */
+ RELOC_NUMBER( R_V850_TDA_4_4_OFFSET, 18) /* For sld.bu */
+ RELOC_NUMBER( R_V850_SDA_16_16_SPLIT_OFFSET, 19) /* For ld.bu */
+ RELOC_NUMBER( R_V850_ZDA_16_16_SPLIT_OFFSET, 20) /* For ld.bu */
+ RELOC_NUMBER( R_V850_CALLT_6_7_OFFSET, 21) /* For callt */
+ RELOC_NUMBER( R_V850_CALLT_16_16_OFFSET, 22) /* For callt */
+/* END CYGNUS LOCAL */
+ RELOC_NUMBER (R_V850_GNU_VTINHERIT, 23)
+ RELOC_NUMBER (R_V850_GNU_VTENTRY, 24)
+
+ EMPTY_RELOC (R_V850_max)
+END_RELOC_NUMBERS
+
+
+/* Processor specific section indices. These sections do not actually
+ exist. Symbols with a st_shndx field corresponding to one of these
+ values have a special meaning. */
+
+/* Small data area common symbol. */
+#define SHN_V850_SCOMMON 0xff00
+
+/* Tiny data area common symbol. */
+#define SHN_V850_TCOMMON 0xff01
+
+/* Zero data area common symbol. */
+#define SHN_V850_ZCOMMON 0xff02
+
+
+/* Processor specific section types. */
+
+/* Section contains the .scommon data. */
+#define SHT_V850_SCOMMON 0x70000000
+
+/* Section contains the .scommon data. */
+#define SHT_V850_TCOMMON 0x70000001
+
+/* Section contains the .scommon data. */
+#define SHT_V850_ZCOMMON 0x70000002
+
+
+#endif /* _ELF_V850_H */
diff --git a/include/floatformat.h b/include/floatformat.h
new file mode 100644
index 0000000..90daca2
--- /dev/null
+++ b/include/floatformat.h
@@ -0,0 +1,111 @@
+/* IEEE floating point support declarations, for GDB, the GNU Debugger.
+ Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined (FLOATFORMAT_H)
+#define FLOATFORMAT_H 1
+
+#include "ansidecl.h"
+
+/* A floatformat consists of a sign bit, an exponent and a mantissa. Once the
+ bytes are concatenated according to the byteorder flag, then each of those
+ fields is contiguous. We number the bits with 0 being the most significant
+ (i.e. BITS_BIG_ENDIAN type numbering), and specify which bits each field
+ contains with the *_start and *_len fields. */
+
+/* What is the order of the bytes. */
+
+enum floatformat_byteorders {
+
+ /* Standard little endian byte order.
+ EX: 1.2345678e10 => 00 00 80 c5 e0 fe 06 42 */
+
+ floatformat_little,
+
+ /* Standard big endian byte order.
+ EX: 1.2345678e10 => 42 06 fe e0 c5 80 00 00 */
+
+ floatformat_big,
+
+ /* Little endian byte order but big endian word order.
+ EX: 1.2345678e10 => e0 fe 06 42 00 00 80 c5 */
+
+ floatformat_littlebyte_bigword
+
+};
+
+enum floatformat_intbit { floatformat_intbit_yes, floatformat_intbit_no };
+
+struct floatformat
+{
+ enum floatformat_byteorders byteorder;
+ unsigned int totalsize; /* Total size of number in bits */
+
+ /* Sign bit is always one bit long. 1 means negative, 0 means positive. */
+ unsigned int sign_start;
+
+ unsigned int exp_start;
+ unsigned int exp_len;
+ /* Amount added to "true" exponent. 0x3fff for many IEEE extendeds. */
+ unsigned int exp_bias;
+ /* Exponent value which indicates NaN. This is the actual value stored in
+ the float, not adjusted by the exp_bias. This usually consists of all
+ one bits. */
+ unsigned int exp_nan;
+
+ unsigned int man_start;
+ unsigned int man_len;
+
+ /* Is the integer bit explicit or implicit? */
+ enum floatformat_intbit intbit;
+};
+
+/* floatformats for IEEE single and double, big and little endian. */
+
+extern const struct floatformat floatformat_ieee_single_big;
+extern const struct floatformat floatformat_ieee_single_little;
+extern const struct floatformat floatformat_ieee_double_big;
+extern const struct floatformat floatformat_ieee_double_little;
+
+/* floatformat for ARM IEEE double, little endian bytes and big endian words */
+
+extern const struct floatformat floatformat_ieee_double_littlebyte_bigword;
+
+/* floatformats for various extendeds. */
+
+extern const struct floatformat floatformat_i387_ext;
+extern const struct floatformat floatformat_m68881_ext;
+extern const struct floatformat floatformat_i960_ext;
+extern const struct floatformat floatformat_m88110_ext;
+extern const struct floatformat floatformat_arm_ext;
+
+/* Convert from FMT to a double.
+ FROM is the address of the extended float.
+ Store the double in *TO. */
+
+extern void
+floatformat_to_double PARAMS ((const struct floatformat *, char *, double *));
+
+/* The converse: convert the double *FROM to FMT
+ and store where TO points. */
+
+extern void
+floatformat_from_double PARAMS ((const struct floatformat *,
+ double *, char *));
+
+#endif /* defined (FLOATFORMAT_H) */
diff --git a/include/fnmatch.h b/include/fnmatch.h
new file mode 100644
index 0000000..d5eb700
--- /dev/null
+++ b/include/fnmatch.h
@@ -0,0 +1,70 @@
+/* Copyright (C) 1991, 1992, 1993 Free Software Foundation, Inc.
+
+NOTE: The canonical source of this file is maintained with the GNU C Library.
+Bugs can be reported to bug-glibc@prep.ai.mit.edu.
+
+This program is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#ifndef _FNMATCH_H
+
+#define _FNMATCH_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined (__cplusplus) || (defined (__STDC__) && __STDC__)
+#undef __P
+#define __P(args) args
+#else /* Not C++ or ANSI C. */
+#undef __P
+#define __P(args) ()
+/* We can get away without defining `const' here only because in this file
+ it is used only inside the prototype for `fnmatch', which is elided in
+ non-ANSI C where `const' is problematical. */
+#endif /* C++ or ANSI C. */
+
+
+/* We #undef these before defining them because some losing systems
+ (HP-UX A.08.07 for example) define these in <unistd.h>. */
+#undef FNM_PATHNAME
+#undef FNM_NOESCAPE
+#undef FNM_PERIOD
+
+/* Bits set in the FLAGS argument to `fnmatch'. */
+#define FNM_PATHNAME (1 << 0) /* No wildcard can ever match `/'. */
+#define FNM_NOESCAPE (1 << 1) /* Backslashes don't quote special chars. */
+#define FNM_PERIOD (1 << 2) /* Leading `.' is matched only explicitly. */
+
+#if !defined (_POSIX_C_SOURCE) || _POSIX_C_SOURCE < 2 || defined (_GNU_SOURCE)
+#define FNM_FILE_NAME FNM_PATHNAME /* Preferred GNU name. */
+#define FNM_LEADING_DIR (1 << 3) /* Ignore `/...' after a match. */
+#define FNM_CASEFOLD (1 << 4) /* Compare without regard to case. */
+#endif
+
+/* Value returned by `fnmatch' if STRING does not match PATTERN. */
+#define FNM_NOMATCH 1
+
+/* Match STRING against the filename pattern PATTERN,
+ returning zero if it matches, FNM_NOMATCH if not. */
+extern int fnmatch __P ((const char *__pattern, const char *__string,
+ int __flags));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* fnmatch.h */
diff --git a/include/fopen-bin.h b/include/fopen-bin.h
new file mode 100644
index 0000000..b868f63
--- /dev/null
+++ b/include/fopen-bin.h
@@ -0,0 +1,27 @@
+/* Macros for the 'type' part of an fopen, freopen or fdopen.
+
+ <Read|Write>[Update]<Binary file|text file>
+
+ This version is for "binary" systems, where text and binary files are
+ different. An example is Mess-Dose. Many Unix systems could also
+ cope with a "b" in the string, indicating binary files, but some reject this
+ (and thereby don't conform to ANSI C, but what else is new?).
+
+ This file is designed for inclusion by host-dependent .h files. No
+ user application should include it directly, since that would make
+ the application unable to be configured for both "same" and "binary"
+ variant systems. */
+
+#define FOPEN_RB "rb"
+#define FOPEN_WB "wb"
+#define FOPEN_AB "ab"
+#define FOPEN_RUB "r+b"
+#define FOPEN_WUB "w+b"
+#define FOPEN_AUB "a+b"
+
+#define FOPEN_RT "r"
+#define FOPEN_WT "w"
+#define FOPEN_AT "a"
+#define FOPEN_RUT "r+"
+#define FOPEN_WUT "w+"
+#define FOPEN_AUT "a+"
diff --git a/include/fopen-same.h b/include/fopen-same.h
new file mode 100644
index 0000000..0f37529
--- /dev/null
+++ b/include/fopen-same.h
@@ -0,0 +1,27 @@
+/* Macros for the 'type' part of an fopen, freopen or fdopen.
+
+ <Read|Write>[Update]<Binary file|text file>
+
+ This version is for "same" systems, where text and binary files are
+ the same. An example is Unix. Many Unix systems could also add a
+ "b" to the string, indicating binary files, but some reject this
+ (and thereby don't conform to ANSI C, but what else is new?).
+
+ This file is designed for inclusion by host-dependent .h files. No
+ user application should include it directly, since that would make
+ the application unable to be configured for both "same" and "binary"
+ variant systems. */
+
+#define FOPEN_RB "r"
+#define FOPEN_WB "w"
+#define FOPEN_AB "a"
+#define FOPEN_RUB "r+"
+#define FOPEN_WUB "w+"
+#define FOPEN_AUB "a+"
+
+#define FOPEN_RT "r"
+#define FOPEN_WT "w"
+#define FOPEN_AT "a"
+#define FOPEN_RUT "r+"
+#define FOPEN_WUT "w+"
+#define FOPEN_AUT "a+"
diff --git a/include/fopen-vms.h b/include/fopen-vms.h
new file mode 100644
index 0000000..da76b7f
--- /dev/null
+++ b/include/fopen-vms.h
@@ -0,0 +1,24 @@
+/* Macros for the 'type' part of an fopen, freopen or fdopen.
+
+ <Read|Write>[Update]<Binary file|text file>
+
+ This version is for VMS systems, where text and binary files are
+ different.
+ This file is designed for inclusion by host-dependent .h files. No
+ user application should include it directly, since that would make
+ the application unable to be configured for both "same" and "binary"
+ variant systems. */
+
+#define FOPEN_RB "rb","rfm=var"
+#define FOPEN_WB "wb","rfm=var"
+#define FOPEN_AB "ab","rfm=var"
+#define FOPEN_RUB "r+b","rfm=var"
+#define FOPEN_WUB "w+b","rfm=var"
+#define FOPEN_AUB "a+b","rfm=var"
+
+#define FOPEN_RT "r"
+#define FOPEN_WT "w"
+#define FOPEN_AT "a"
+#define FOPEN_RUT "r+"
+#define FOPEN_WUT "w+"
+#define FOPEN_AUT "a+"
diff --git a/include/gdbm.h b/include/gdbm.h
new file mode 100644
index 0000000..3ebc26d
--- /dev/null
+++ b/include/gdbm.h
@@ -0,0 +1,91 @@
+/* GNU DBM - DataBase Manager include file
+ Copyright 1989, 1991 Free Software Foundation, Inc.
+ Written by Philip A. Nelson.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* You may contact the author by:
+ e-mail: phil@wwu.edu
+ us-mail: Philip A. Nelson
+ Computer Science Department
+ Western Washington University
+ Bellingham, WA 98226
+ phone: (206) 676-3035
+
+*************************************************************************/
+
+/* Parameters to gdbm_open for READERS, WRITERS, and WRITERS who
+ can create the database. */
+#define GDBM_READER 0
+#define GDBM_WRITER 1
+#define GDBM_WRCREAT 2
+#define GDBM_NEWDB 3
+
+/* Parameters to gdbm_store for simple insertion or replacement. */
+#define GDBM_INSERT 0
+#define GDBM_REPLACE 1
+
+
+/* The data and key structure. This structure is defined for compatibility. */
+typedef struct {
+ char *dptr;
+ int dsize;
+ } datum;
+
+
+/* The file information header. This is good enough for most applications. */
+typedef struct {int dummy[10];} *GDBM_FILE;
+
+
+/* These are the routines! */
+
+extern GDBM_FILE gdbm_open ();
+
+extern void gdbm_close ();
+
+extern datum gdbm_fetch ();
+
+extern int gdbm_store ();
+
+extern int gdbm_delete ();
+
+extern datum gdbm_firstkey ();
+
+extern datum gdbm_nextkey ();
+
+extern int gdbm_reorganize ();
+
+
+/* gdbm sends back the following error codes in the variable gdbm_errno. */
+typedef enum { NO_ERROR,
+ MALLOC_ERROR,
+ BLOCK_SIZE_ERROR,
+ FILE_OPEN_ERROR,
+ FILE_WRITE_ERROR,
+ FILE_SEEK_ERROR,
+ FILE_READ_ERROR,
+ BAD_MAGIC_NUMBER,
+ EMPTY_DATABASE,
+ CANT_BE_READER,
+ CANT_BE_WRITER,
+ READER_CANT_RECOVER,
+ READER_CANT_DELETE,
+ READER_CANT_STORE,
+ READER_CANT_REORGANIZE,
+ UNKNOWN_UPDATE,
+ ITEM_NOT_FOUND,
+ REORGANIZE_FAILED,
+ CANNOT_REPLACE}
+ gdbm_error;
diff --git a/include/getopt.h b/include/getopt.h
new file mode 100644
index 0000000..fb30719
--- /dev/null
+++ b/include/getopt.h
@@ -0,0 +1,133 @@
+/* Declarations for getopt.
+ Copyright (C) 1989,90,91,92,93,94,96,97 Free Software Foundation, Inc.
+
+ NOTE: The canonical source of this file is maintained with the GNU C Library.
+ Bugs can be reported to bug-glibc@gnu.org.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 2, or (at your option) any
+ later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
+ USA. */
+
+#ifndef _GETOPT_H
+#define _GETOPT_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* For communication from `getopt' to the caller.
+ When `getopt' finds an option that takes an argument,
+ the argument value is returned here.
+ Also, when `ordering' is RETURN_IN_ORDER,
+ each non-option ARGV-element is returned here. */
+
+extern char *optarg;
+
+/* Index in ARGV of the next element to be scanned.
+ This is used for communication to and from the caller
+ and for communication between successive calls to `getopt'.
+
+ On entry to `getopt', zero means this is the first call; initialize.
+
+ When `getopt' returns -1, this is the index of the first of the
+ non-option elements that the caller should itself scan.
+
+ Otherwise, `optind' communicates from one call to the next
+ how much of ARGV has been scanned so far. */
+
+extern int optind;
+
+/* Callers store zero here to inhibit the error message `getopt' prints
+ for unrecognized options. */
+
+extern int opterr;
+
+/* Set to an option character which was unrecognized. */
+
+extern int optopt;
+
+/* Describe the long-named options requested by the application.
+ The LONG_OPTIONS argument to getopt_long or getopt_long_only is a vector
+ of `struct option' terminated by an element containing a name which is
+ zero.
+
+ The field `has_arg' is:
+ no_argument (or 0) if the option does not take an argument,
+ required_argument (or 1) if the option requires an argument,
+ optional_argument (or 2) if the option takes an optional argument.
+
+ If the field `flag' is not NULL, it points to a variable that is set
+ to the value given in the field `val' when the option is found, but
+ left unchanged if the option is not found.
+
+ To have a long-named option do something other than set an `int' to
+ a compiled-in constant, such as set a value from `optarg', set the
+ option's `flag' field to zero and its `val' field to a nonzero
+ value (the equivalent single-letter option character, if there is
+ one). For long options that have a zero `flag' field, `getopt'
+ returns the contents of the `val' field. */
+
+struct option
+{
+#if defined (__STDC__) && __STDC__
+ const char *name;
+#else
+ char *name;
+#endif
+ /* has_arg can't be an enum because some compilers complain about
+ type mismatches in all the code that assumes it is an int. */
+ int has_arg;
+ int *flag;
+ int val;
+};
+
+/* Names for the values of the `has_arg' field of `struct option'. */
+
+#define no_argument 0
+#define required_argument 1
+#define optional_argument 2
+
+#if defined (__STDC__) && __STDC__
+#ifdef __GNU_LIBRARY__
+/* Many other libraries have conflicting prototypes for getopt, with
+ differences in the consts, in stdlib.h. To avoid compilation
+ errors, only prototype getopt for the GNU C library. */
+extern int getopt (int argc, char *const *argv, const char *shortopts);
+#else /* not __GNU_LIBRARY__ */
+extern int getopt ();
+#endif /* __GNU_LIBRARY__ */
+extern int getopt_long (int argc, char *const *argv, const char *shortopts,
+ const struct option *longopts, int *longind);
+extern int getopt_long_only (int argc, char *const *argv,
+ const char *shortopts,
+ const struct option *longopts, int *longind);
+
+/* Internal only. Users should not call this directly. */
+extern int _getopt_internal (int argc, char *const *argv,
+ const char *shortopts,
+ const struct option *longopts, int *longind,
+ int long_only);
+#else /* not __STDC__ */
+extern int getopt ();
+extern int getopt_long ();
+extern int getopt_long_only ();
+
+extern int _getopt_internal ();
+#endif /* __STDC__ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* getopt.h */
diff --git a/include/hp-symtab.h b/include/hp-symtab.h
new file mode 100644
index 0000000..fff5668
--- /dev/null
+++ b/include/hp-symtab.h
@@ -0,0 +1,1871 @@
+/* Definitions and structures for reading debug symbols from the
+ native HP C compiler.
+
+ Written by the Center for Software Science at the University of Utah
+ and by Cygnus Support.
+
+ Copyright 1994 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef HP_SYMTAB_INCLUDED
+#define HP_SYMTAB_INCLUDED
+
+/* General information:
+
+ This header file defines and describes only the data structures
+ necessary to read debug symbols produced by the HP C compiler,
+ HP ANSI C++ compiler, and HP FORTRAN 90 compiler using the
+ SOM object file format.
+ (For a full description of the debug format, ftp hpux-symtab.h from
+ jaguar.cs.utah.edu:/dist).
+
+ Additional notes (Rich Title)
+ This file is a reverse-engineered version of a file called
+ "symtab.h" which exists internal to HP's Computer Languages Organization
+ in /CLO/Components/DDE/obj/som/symtab.h. Because HP's version of
+ the file is copyrighted and not distributed, it is necessary for
+ GDB to use the reverse-engineered version that follows.
+ Work was done by Cygnus to reverse-engineer the C subset of symtab.h.
+ The WDB project has extended this to also contain the C++
+ symbol definitions, the F90 symbol definitions,
+ and the DOC (debugging-optimized-code) symbol definitions.
+ In some cases (the C++ symbol definitions)
+ I have added internal documentation here that
+ goes beyond what is supplied in HP's symtab.h. If we someday
+ unify these files again, the extra comments should be merged back
+ into HP's symtab.h.
+
+ -------------------------------------------------------------------
+
+ Debug symbols are contained entirely within an unloadable space called
+ $DEBUG$. $DEBUG$ contains several subspaces which group related
+ debug symbols.
+
+ $GNTT$ contains information for global variables, types and contants.
+
+ $LNTT$ contains information for procedures (including nesting), scoping
+ information, local variables, types, and constants.
+
+ $SLT$ contains source line information so that code addresses may be
+ mapped to source lines.
+
+ $VT$ contains various strings and constants for named objects (variables,
+ typedefs, functions, etc). Strings are stored as null-terminated character
+ lists. Constants always begin on word boundaries. The first byte of
+ the VT must be zero (a null string).
+
+ $XT$ is not currently used by GDB.
+
+ Many structures within the subspaces point to other structures within
+ the same subspace, or to structures within a different subspace. These
+ pointers are represented as a structure index from the beginning of
+ the appropriate subspace. */
+
+/* Used to describe where a constant is stored. */
+enum location_type
+{
+ LOCATION_IMMEDIATE,
+ LOCATION_PTR,
+ LOCATION_VT,
+};
+
+/* Languages supported by this debug format. Within the data structures
+ this type is limited to 4 bits for a maximum of 16 languages. */
+enum hp_language
+{
+ HP_LANGUAGE_UNKNOWN,
+ HP_LANGUAGE_C,
+ HP_LANGUAGE_F77,
+ HP_LANGUAGE_PASCAL,
+ HP_LANGUAGE_MODCAL,
+ HP_LANGUAGE_COBOL,
+ HP_LANGUAGE_BASIC,
+ HP_LANGUAGE_ADA,
+ HP_LANGUAGE_CPLUSPLUS,
+ HP_LANGUAGE_DMPASCAL
+};
+
+
+/* Basic data types available in this debug format. Within the data
+ structures this type is limited to 5 bits for a maximum of 32 basic
+ data types. */
+enum hp_type
+{
+ HP_TYPE_UNDEFINED, /* 0 */
+ HP_TYPE_BOOLEAN, /* 1 */
+ HP_TYPE_CHAR, /* 2 */
+ HP_TYPE_INT, /* 3 */
+ HP_TYPE_UNSIGNED_INT, /* 4 */
+ HP_TYPE_REAL, /* 5 */
+ HP_TYPE_COMPLEX, /* 6 */
+ HP_TYPE_STRING200, /* 7 */
+ HP_TYPE_LONGSTRING200, /* 8 */
+ HP_TYPE_TEXT, /* 9 */
+ HP_TYPE_FLABEL, /* 10 */
+ HP_TYPE_FTN_STRING_SPEC, /* 11 */
+ HP_TYPE_MOD_STRING_SPEC, /* 12 */
+ HP_TYPE_PACKED_DECIMAL, /* 13 */
+ HP_TYPE_REAL_3000, /* 14 */
+ HP_TYPE_MOD_STRING_3000, /* 15 */
+ HP_TYPE_ANYPOINTER, /* 16 */
+ HP_TYPE_GLOBAL_ANYPOINTER, /* 17 */
+ HP_TYPE_LOCAL_ANYPOINTER, /* 18 */
+ HP_TYPE_COMPLEXS3000, /* 19 */
+ HP_TYPE_FTN_STRING_S300_COMPAT, /* 20 */
+ HP_TYPE_FTN_STRING_VAX_COMPAT, /* 21 */
+ HP_TYPE_BOOLEAN_S300_COMPAT, /* 22 */
+ HP_TYPE_BOOLEAN_VAX_COMPAT, /* 23 */
+ HP_TYPE_WIDE_CHAR, /* 24 */
+ HP_TYPE_LONG, /* 25 */
+ HP_TYPE_UNSIGNED_LONG, /* 26 */
+ HP_TYPE_DOUBLE, /* 27 */
+ HP_TYPE_TEMPLATE_ARG, /* 28 */
+ HP_TYPE_VOID /* 29 */
+};
+
+/* An immediate name and type table entry.
+
+ extension and immediate will always be one.
+ global will always be zero.
+ hp_type is the basic type this entry describes.
+ bitlength is the length in bits for the basic type. */
+struct dnttp_immediate
+{
+ unsigned int extension: 1;
+ unsigned int immediate: 1;
+ unsigned int global: 1;
+ unsigned int type: 5;
+ unsigned int bitlength: 24;
+};
+
+/* A nonimmediate name and type table entry.
+
+ extension will always be one.
+ immediate will always be zero.
+ if global is zero, this entry points into the LNTT
+ if global is one, this entry points into the GNTT
+ index is the index within the GNTT or LNTT for this entry. */
+struct dnttp_nonimmediate
+{
+ unsigned int extension: 1;
+ unsigned int immediate: 1;
+ unsigned int global: 1;
+ unsigned int index: 29;
+};
+
+/* A pointer to an entry in the GNTT and LNTT tables. It has two
+ forms depending on the type being described.
+
+ The immediate form is used for simple entries and is one
+ word.
+
+ The nonimmediate form is used for complex entries and contains
+ an index into the LNTT or GNTT which describes the entire type.
+
+ If a dnttpointer is -1, then it is a NIL entry. */
+
+#define DNTTNIL (-1)
+typedef union dnttpointer
+{
+ struct dnttp_immediate dntti;
+ struct dnttp_nonimmediate dnttp;
+ int word;
+} dnttpointer;
+
+/* An index into the source line table. As with dnttpointers, a sltpointer
+ of -1 indicates a NIL entry. */
+#define SLTNIL (-1)
+typedef int sltpointer;
+
+/* Index into DOC (= "Debugging Optimized Code") line table */
+#define LTNIL (-1)
+typedef int ltpointer;
+
+/* Index into context table */
+#define CTXTNIL (-1)
+typedef int ctxtpointer;
+
+/* Unsigned byte offset into the VT. */
+typedef unsigned int vtpointer;
+
+/* A DNTT entry (used within the GNTT and LNTT).
+
+ DNTT entries are variable sized objects, but are always a multiple
+ of 3 words (we call each group of 3 words a "block").
+
+ The first bit in each block is an extension bit. This bit is zero
+ for the first block of a DNTT entry. If the entry requires more
+ than one block, then this bit is set to one in all blocks after
+ the first one. */
+
+/* Each DNTT entry describes a particular debug symbol (beginning of
+ a source file, a function, variables, structures, etc.
+
+ The type of the DNTT entry is stored in the "kind" field within the
+ DNTT entry itself. */
+
+enum dntt_entry_type
+{
+ DNTT_TYPE_NIL = -1,
+ DNTT_TYPE_SRCFILE,
+ DNTT_TYPE_MODULE,
+ DNTT_TYPE_FUNCTION,
+ DNTT_TYPE_ENTRY,
+ DNTT_TYPE_BEGIN,
+ DNTT_TYPE_END,
+ DNTT_TYPE_IMPORT,
+ DNTT_TYPE_LABEL,
+ DNTT_TYPE_FPARAM,
+ DNTT_TYPE_SVAR,
+ DNTT_TYPE_DVAR,
+ DNTT_TYPE_HOLE1,
+ DNTT_TYPE_CONST,
+ DNTT_TYPE_TYPEDEF,
+ DNTT_TYPE_TAGDEF,
+ DNTT_TYPE_POINTER,
+ DNTT_TYPE_ENUM,
+ DNTT_TYPE_MEMENUM,
+ DNTT_TYPE_SET,
+ DNTT_TYPE_SUBRANGE,
+ DNTT_TYPE_ARRAY,
+ DNTT_TYPE_STRUCT,
+ DNTT_TYPE_UNION,
+ DNTT_TYPE_FIELD,
+ DNTT_TYPE_VARIANT,
+ DNTT_TYPE_FILE,
+ DNTT_TYPE_FUNCTYPE,
+ DNTT_TYPE_WITH,
+ DNTT_TYPE_COMMON,
+ DNTT_TYPE_COBSTRUCT,
+ DNTT_TYPE_XREF,
+ DNTT_TYPE_SA,
+ DNTT_TYPE_MACRO,
+ DNTT_TYPE_BLOCKDATA,
+ DNTT_TYPE_CLASS_SCOPE,
+ DNTT_TYPE_REFERENCE,
+ DNTT_TYPE_PTRMEM,
+ DNTT_TYPE_PTRMEMFUNC,
+ DNTT_TYPE_CLASS,
+ DNTT_TYPE_GENFIELD,
+ DNTT_TYPE_VFUNC,
+ DNTT_TYPE_MEMACCESS,
+ DNTT_TYPE_INHERITANCE,
+ DNTT_TYPE_FRIEND_CLASS,
+ DNTT_TYPE_FRIEND_FUNC,
+ DNTT_TYPE_MODIFIER,
+ DNTT_TYPE_OBJECT_ID,
+ DNTT_TYPE_MEMFUNC,
+ DNTT_TYPE_TEMPLATE,
+ DNTT_TYPE_TEMPLATE_ARG,
+ DNTT_TYPE_FUNC_TEMPLATE,
+ DNTT_TYPE_LINK,
+ DNTT_TYPE_DYN_ARRAY_DESC,
+ DNTT_TYPE_DESC_SUBRANGE,
+ DNTT_TYPE_BEGIN_EXT,
+ DNTT_TYPE_INLN,
+ DNTT_TYPE_INLN_LIST,
+ DNTT_TYPE_ALIAS,
+ DNTT_TYPE_DOC_FUNCTION,
+ DNTT_TYPE_DOC_MEMFUNC,
+ DNTT_TYPE_MAX
+};
+
+/* DNTT_TYPE_SRCFILE:
+
+ One DNTT_TYPE_SRCFILE symbol is output for the start of each source
+ file and at the begin and end of an included file. A DNTT_TYPE_SRCFILE
+ entry is also output before each DNTT_TYPE_FUNC symbol so that debuggers
+ can determine what file a function was defined in.
+
+ LANGUAGE describes the source file's language.
+
+ NAME points to an VT entry providing the source file's name.
+
+ Note the name used for DNTT_TYPE_SRCFILE entries are exactly as seen
+ by the compiler (ie they may be relative or absolute). C include files
+ via <> inclusion must use absolute paths.
+
+ ADDRESS points to an SLT entry from which line number and code locations
+ may be determined. */
+
+struct dntt_type_srcfile
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10; /* DNTT_TYPE_SRCFILE */
+ unsigned int language: 4;
+ unsigned int unused: 17;
+ vtpointer name;
+ sltpointer address;
+};
+
+/* DNTT_TYPE_MODULE:
+
+ A DNTT_TYPE_MODULE symbol is emitted for the start of a pascal
+ module or C source file. A module indicates a compilation unit
+ for name-scoping purposes; in that regard there should be
+ a 1-1 correspondence between GDB "symtab"'s and MODULE symbol records.
+
+ Each DNTT_TYPE_MODULE must have an associated DNTT_TYPE_END symbol.
+
+ NAME points to a VT entry providing the module's name. Note C
+ source files are considered nameless modules.
+
+ ALIAS point to a VT entry providing a secondary name.
+
+ ADDRESS points to an SLT entry from which line number and code locations
+ may be determined. */
+
+struct dntt_type_module
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10; /* DNTT_TYPE_MODULE */
+ unsigned int unused: 21;
+ vtpointer name;
+ vtpointer alias;
+ dnttpointer unused2;
+ sltpointer address;
+};
+
+/* DNTT_TYPE_FUNCTION,
+ DNTT_TYPE_ENTRY,
+ DNTT_TYPE_BLOCKDATA,
+ DNTT_TYPE_MEMFUNC:
+
+ A DNTT_TYPE_FUNCTION symbol is emitted for each function definition;
+ a DNTT_TYPE_ENTRY symbols is used for secondary entry points. Both
+ symbols used the dntt_type_function structure.
+ A DNTT_TYPE_BLOCKDATA symbol is emitted ...?
+ A DNTT_TYPE_MEMFUNC symbol is emitted for inlined member functions (C++).
+
+ Each of DNTT_TYPE_FUNCTION must have a matching DNTT_TYPE_END.
+
+ GLOBAL is nonzero if the function has global scope.
+
+ LANGUAGE describes the function's source language.
+
+ OPT_LEVEL describes the optimization level the function was compiled
+ with.
+
+ VARARGS is nonzero if the function uses varargs.
+
+ NAME points to a VT entry providing the function's name.
+
+ ALIAS points to a VT entry providing a secondary name for the function.
+
+ FIRSTPARAM points to a LNTT entry which describes the parameter list.
+
+ ADDRESS points to an SLT entry from which line number and code locations
+ may be determined.
+
+ ENTRYADDR is the memory address corresponding the the function's entry point
+
+ RETVAL points to a LNTT entry describing the function's return value.
+
+ LOWADDR is the lowest memory address associated with this function.
+
+ HIADDR is the highest memory address associated with this function. */
+
+struct dntt_type_function
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10; /* DNTT_TYPE_FUNCTION,
+ DNTT_TYPE_ENTRY,
+ DNTT_TYPE_BLOCKDATA
+ or DNTT_TYPE_MEMFUNC */
+ unsigned int global: 1;
+ unsigned int language: 4;
+ unsigned int nest_level: 5;
+ unsigned int opt_level: 2;
+ unsigned int varargs: 1;
+ unsigned int lang_info: 4;
+ unsigned int inlined: 1;
+ unsigned int localalloc: 1;
+ unsigned int expansion: 1;
+ unsigned int unused: 1;
+ vtpointer name;
+ vtpointer alias;
+ dnttpointer firstparam;
+ sltpointer address;
+ CORE_ADDR entryaddr;
+ dnttpointer retval;
+ CORE_ADDR lowaddr;
+ CORE_ADDR hiaddr;
+};
+
+/* DNTT_TYPE_BEGIN:
+
+ A DNTT_TYPE_BEGIN symbol is emitted to begin a new nested scope.
+ Every DNTT_TYPE_BEGIN symbol must have a matching DNTT_TYPE_END symbol.
+
+ CLASSFLAG is nonzero if this is the beginning of a c++ class definition.
+
+ ADDRESS points to an SLT entry from which line number and code locations
+ may be determined. */
+
+struct dntt_type_begin
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int classflag: 1;
+ unsigned int unused: 20;
+ sltpointer address;
+};
+
+/* DNTT_TYPE_END:
+
+ A DNTT_TYPE_END symbol is emitted when closing a scope started by
+ a DNTT_TYPE_MODULE, DNTT_TYPE_FUNCTION, DNTT_TYPE_WITH,
+ DNTT_TYPE_COMMON, DNTT_TYPE_BEGIN, and DNTT_TYPE_CLASS_SCOPE symbols.
+
+ ENDKIND describes what type of scope the DNTT_TYPE_END is closing
+ (one of the above 6 kinds).
+
+ CLASSFLAG is nonzero if this is the end of a c++ class definition.
+
+ ADDRESS points to an SLT entry from which line number and code locations
+ may be determined.
+
+ BEGINSCOPE points to the LNTT entry which opened the scope. */
+
+struct dntt_type_end
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int endkind: 10;
+ unsigned int classflag: 1;
+ unsigned int unused: 10;
+ sltpointer address;
+ dnttpointer beginscope;
+};
+
+/* DNTT_TYPE_IMPORT is unused by GDB. */
+/* DNTT_TYPE_LABEL is unused by GDB. */
+
+/* DNTT_TYPE_FPARAM:
+
+ A DNTT_TYPE_FPARAM symbol is emitted for a function argument. When
+ chained together the symbols represent an argument list for a function.
+
+ REGPARAM is nonzero if this parameter was passed in a register.
+
+ INDIRECT is nonzero if this parameter is a pointer to the parameter
+ (pass by reference or pass by value for large items).
+
+ LONGADDR is nonzero if the parameter is a 64bit pointer.
+
+ NAME is a pointer into the VT for the parameter's name.
+
+ LOCATION describes where the parameter is stored. Depending on the
+ parameter type LOCATION could be a register number, or an offset
+ from the stack pointer.
+
+ TYPE points to a NTT entry describing the type of this parameter.
+
+ NEXTPARAM points to the LNTT entry describing the next parameter. */
+
+struct dntt_type_fparam
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int regparam: 1;
+ unsigned int indirect: 1;
+ unsigned int longaddr: 1;
+ unsigned int copyparam: 1;
+ unsigned int dflt: 1;
+ unsigned int unused: 16;
+ vtpointer name;
+ int location;
+ dnttpointer type;
+ dnttpointer nextparam;
+ int misc;
+};
+
+/* DNTT_TYPE_SVAR:
+
+ A DNTT_TYPE_SVAR is emitted to describe a variable in static storage.
+
+ GLOBAL is nonzero if the variable has global scope.
+
+ INDIRECT is nonzero if the variable is a pointer to an object.
+
+ LONGADDR is nonzero if the variable is in long pointer space.
+
+ STATICMEM is nonzero if the variable is a member of a class.
+
+ A_UNION is nonzero if the variable is an anonymous union member.
+
+ NAME is a pointer into the VT for the variable's name.
+
+ LOCATION provides the memory address for the variable.
+
+ TYPE is a pointer into either the GNTT or LNTT which describes
+ the type of this variable. */
+
+struct dntt_type_svar
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int global: 1;
+ unsigned int indirect: 1;
+ unsigned int longaddr: 1;
+ unsigned int staticmem: 1;
+ unsigned int a_union: 1;
+ unsigned int unused1: 1;
+ unsigned int thread_specific: 1;
+ unsigned int unused2: 14;
+ vtpointer name;
+ CORE_ADDR location;
+ dnttpointer type;
+ unsigned int offset;
+ unsigned int displacement;
+};
+
+/* DNTT_TYPE_DVAR:
+
+ A DNTT_TYPE_DVAR is emitted to describe automatic variables and variables
+ held in registers.
+
+ GLOBAL is nonzero if the variable has global scope.
+
+ INDIRECT is nonzero if the variable is a pointer to an object.
+
+ REGVAR is nonzero if the variable is in a register.
+
+ A_UNION is nonzero if the variable is an anonymous union member.
+
+ NAME is a pointer into the VT for the variable's name.
+
+ LOCATION provides the memory address or register number for the variable.
+
+ TYPE is a pointer into either the GNTT or LNTT which describes
+ the type of this variable. */
+
+struct dntt_type_dvar
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int global: 1;
+ unsigned int indirect: 1;
+ unsigned int regvar: 1;
+ unsigned int a_union: 1;
+ unsigned int unused: 17;
+ vtpointer name;
+ int location;
+ dnttpointer type;
+ unsigned int offset;
+};
+
+/* DNTT_TYPE_CONST:
+
+ A DNTT_TYPE_CONST symbol is emitted for program constants.
+
+ GLOBAL is nonzero if the constant has global scope.
+
+ INDIRECT is nonzero if the constant is a pointer to an object.
+
+ LOCATION_TYPE describes where to find the constant's value
+ (in the VT, memory, or embedded in an instruction).
+
+ CLASSMEM is nonzero if the constant is a member of a class.
+
+ NAME is a pointer into the VT for the constant's name.
+
+ LOCATION provides the memory address, register number or pointer
+ into the VT for the constant's value.
+
+ TYPE is a pointer into either the GNTT or LNTT which describes
+ the type of this variable. */
+
+struct dntt_type_const
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int global: 1;
+ unsigned int indirect: 1;
+ unsigned int: 3;
+ unsigned int classmem: 1;
+ unsigned int unused: 15;
+ vtpointer name;
+ CORE_ADDR location;
+ dnttpointer type;
+ unsigned int offset;
+ unsigned int displacement;
+};
+
+/* DNTT_TYPE_TYPEDEF and DNTT_TYPE_TAGDEF:
+
+ The same structure is used to describe typedefs and tagdefs.
+
+ DNTT_TYPE_TYPEDEFS are associated with C "typedefs".
+
+ DNTT_TYPE_TAGDEFs are associated with C "struct", "union", and "enum"
+ tags, which may have the same name as a typedef in the same scope.
+ Also they are associated with C++ "class" tags, which implicitly have
+ the same name as the class type.
+
+ GLOBAL is nonzero if the typedef/tagdef has global scope.
+
+ TYPEINFO is used to determine if full type information is available
+ for a tag. (usually 1, but can be zero for opaque types in C).
+
+ NAME is a pointer into the VT for the constant's name.
+
+ TYPE points to the underlying type for the typedef/tagdef in the
+ GNTT or LNTT. */
+
+struct dntt_type_type
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10; /* DNTT_TYPE_TYPEDEF or
+ DNTT_TYPE_TAGDEF
+ */
+ unsigned int global: 1;
+ unsigned int typeinfo: 1;
+ unsigned int unused: 19;
+ vtpointer name;
+ dnttpointer type; /* Underlying type, which for TAGDEF's may be
+ * DNTT_TYPE_STRUCT, DNTT_TYPE_UNION,
+ * DNTT_TYPE_ENUM, or DNTT_TYPE_CLASS.
+ * For TYPEDEF's other underlying types
+ * are also possible.
+ */
+};
+
+/* DNTT_TYPE_POINTER:
+
+ Used to describe a pointer to an underlying type.
+
+ POINTSTO is a pointer into the GNTT or LNTT for the type which this
+ pointer points to.
+
+ BITLENGTH is the length of the pointer (not the underlying type). */
+
+struct dntt_type_pointer
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int unused: 21;
+ dnttpointer pointsto;
+ unsigned int bitlength;
+};
+
+
+/* DNTT_TYPE_ENUM:
+
+ Used to describe enumerated types.
+
+ FIRSTMEM is a pointer to a DNTT_TYPE_MEMENUM in the GNTT/LNTT which
+ describes the first member (and contains a pointer to the chain of
+ members).
+
+ BITLENGTH is the number of bits used to hold the values of the enum's
+ members. */
+
+struct dntt_type_enum
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int unused: 21;
+ dnttpointer firstmem;
+ unsigned int bitlength;
+};
+
+/* DNTT_TYPE_MEMENUM
+
+ Used to describe members of an enumerated type.
+
+ CLASSMEM is nonzero if this member is part of a class.
+
+ NAME points into the VT for the name of this member.
+
+ VALUE is the value of this enumeration member.
+
+ NEXTMEM points to the next DNTT_TYPE_MEMENUM in the chain. */
+
+struct dntt_type_memenum
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int classmem: 1;
+ unsigned int unused: 20;
+ vtpointer name;
+ unsigned int value;
+ dnttpointer nextmem;
+};
+
+/* DNTT_TYPE_SET
+
+ Used to describe PASCAL "set" type.
+
+ DECLARATION describes the bitpacking of the set.
+
+ SUBTYPE points to a DNTT entry describing the type of the members.
+
+ BITLENGTH is the size of the set. */
+
+struct dntt_type_set
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int declaration: 2;
+ unsigned int unused: 19;
+ dnttpointer subtype;
+ unsigned int bitlength;
+};
+
+/* DNTT_TYPE_SUBRANGE
+
+ Used to describe subrange type.
+
+ DYN_LOW describes the lower bound of the subrange:
+
+ 00 for a constant lower bound (found in LOWBOUND).
+
+ 01 for a dynamic lower bound with the lower bound found in the the
+ memory address pointed to by LOWBOUND.
+
+ 10 for a dynamic lower bound described by an variable found in the
+ DNTT/LNTT (LOWBOUND would be a pointer into the DNTT/LNTT).
+
+ DYN_HIGH is similar to DYN_LOW, except it describes the upper bound.
+
+ SUBTYPE points to the type of the subrange.
+
+ BITLENGTH is the length in bits needed to describe the subrange's
+ values. */
+
+struct dntt_type_subrange
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int dyn_low: 2;
+ unsigned int dyn_high: 2;
+ unsigned int unused: 17;
+ int lowbound;
+ int highbound;
+ dnttpointer subtype;
+ unsigned int bitlength;
+};
+
+/* DNTT_TYPE_ARRAY
+
+ Used to describe an array type.
+
+ DECLARATION describes the bit packing used in the array.
+
+ ARRAYISBYTES is nonzero if the field in arraylength describes the
+ length in bytes rather than in bits. A value of zero is used to
+ describe an array with size 2**32.
+
+ ELEMISBYTES is nonzero if the length if each element in the array
+ is describes in bytes rather than bits. A value of zero is used
+ to an element with size 2**32.
+
+ ELEMORDER is nonzero if the elements are indexed in increasing order.
+
+ JUSTIFIED if the elements are left justified to index zero.
+
+ ARRAYLENGTH is the length of the array.
+
+ INDEXTYPE is a DNTT pointer to the type used to index the array.
+
+ ELEMTYPE is a DNTT pointer to the type for the array elements.
+
+ ELEMLENGTH is the length of each element in the array (including
+ any padding).
+
+ Multi-dimensional arrays are represented by ELEMTYPE pointing to
+ another DNTT_TYPE_ARRAY. */
+
+struct dntt_type_array
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int declaration: 2;
+ unsigned int dyn_low: 2;
+ unsigned int dyn_high: 2;
+ unsigned int arrayisbytes: 1;
+ unsigned int elemisbytes: 1;
+ unsigned int elemorder: 1;
+ unsigned int justified: 1;
+ unsigned int unused: 11;
+ unsigned int arraylength;
+ dnttpointer indextype;
+ dnttpointer elemtype;
+ unsigned int elemlength;
+};
+
+/* DNTT_TYPE_STRUCT
+
+ DNTT_TYPE_STRUCT is used to describe a C structure.
+
+ DECLARATION describes the bitpacking used.
+
+ FIRSTFIELD is a DNTT pointer to the first field of the structure
+ (each field contains a pointer to the next field, walk the list
+ to access all fields of the structure).
+
+ VARTAGFIELD and VARLIST are used for Pascal variant records.
+
+ BITLENGTH is the size of the structure in bits. */
+
+struct dntt_type_struct
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int declaration: 2;
+ unsigned int unused: 19;
+ dnttpointer firstfield;
+ dnttpointer vartagfield;
+ dnttpointer varlist;
+ unsigned int bitlength;
+};
+
+/* DNTT_TYPE_UNION
+
+ DNTT_TYPE_UNION is used to describe a C union.
+
+ FIRSTFIELD is a DNTT pointer to the beginning of the field chain.
+
+ BITLENGTH is the size of the union in bits. */
+
+struct dntt_type_union
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int unused: 21;
+ dnttpointer firstfield;
+ unsigned int bitlength;
+};
+
+/* DNTT_TYPE_FIELD
+
+ DNTT_TYPE_FIELD describes one field in a structure or union
+ or C++ class.
+
+ VISIBILITY is used to describe the visibility of the field
+ (for c++. public = 0, protected = 1, private = 2).
+
+ A_UNION is nonzero if this field is a member of an anonymous union.
+
+ STATICMEM is nonzero if this field is a static member of a template.
+
+ NAME is a pointer into the VT for the name of the field.
+
+ BITOFFSET gives the offset of this field in bits from the beginning
+ of the structure or union this field is a member of.
+
+ TYPE is a DNTT pointer to the type describing this field.
+
+ BITLENGTH is the size of the entry in bits.
+
+ NEXTFIELD is a DNTT pointer to the next field in the chain. */
+
+struct dntt_type_field
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int visibility: 2;
+ unsigned int a_union: 1;
+ unsigned int staticmem: 1;
+ unsigned int unused: 17;
+ vtpointer name;
+ unsigned int bitoffset;
+ dnttpointer type;
+ unsigned int bitlength;
+ dnttpointer nextfield;
+};
+
+/* DNTT_TYPE_VARIANT is unused by GDB. */
+/* DNTT_TYPE_FILE is unused by GDB. */
+
+/* DNTT_TYPE_FUNCTYPE
+
+ I think this is used to describe a function type (e.g., would
+ be emitted as part of a function-pointer description).
+
+ VARARGS is nonzero if this function uses varargs.
+
+ FIRSTPARAM is a DNTT pointer to the first entry in the parameter
+ chain.
+
+ RETVAL is a DNTT pointer to the type of the return value. */
+
+struct dntt_type_functype
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int varargs: 1;
+ unsigned int info: 4;
+ unsigned int unused: 16;
+ unsigned int bitlength;
+ dnttpointer firstparam;
+ dnttpointer retval;
+};
+
+/* DNTT_TYPE_WITH is emitted by C++ to indicate "with" scoping semantics.
+ (Probably also emitted by PASCAL to support "with"...).
+
+ C++ example: Say "memfunc" is a method of class "c", and say
+ "m" is a data member of class "c". Then from within "memfunc",
+ it is legal to reference "m" directly (e.g. you don't have to
+ say "this->m". The symbol table indicates
+ this by emitting a DNTT_TYPE_WITH symbol within the function "memfunc",
+ pointing to the type symbol for class "c".
+
+ In GDB, this symbol record is unnecessary,
+ because GDB's symbol lookup algorithm
+ infers the "with" semantics when it sees a "this" argument to the member
+ function. So GDB can safely ignore the DNTT_TYPE_WITH record.
+
+ A DNTT_TYPE_WITH has a matching DNTT_TYPE_END symbol
+ */
+
+struct dntt_type_with {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_WITH */
+ unsigned int addrtype: 2; /* 0 => STATTYPE */
+ /* 1 => DYNTYPE */
+ /* 2 => REGTYPE */
+ unsigned int indirect: 1; /* 1 => pointer to object */
+ unsigned int longaddr: 1; /* 1 => in long pointer space */
+ unsigned int nestlevel: 6; /* # of nesting levels back */
+ unsigned int doc_ranges: 1; /* 1 => location is range list */
+ unsigned int unused: 10;
+ long location; /* where stored (allocated) */
+ sltpointer address;
+ dnttpointer type; /* type of with expression */
+ vtpointer name; /* name of with expression */
+ unsigned long offset; /* byte offset from location */
+};
+
+/* DNTT_TYPE_COMMON is unsupported by GDB. */
+/* A DNTT_TYPE_COMMON symbol must have a matching DNTT_TYPE_END symbol */
+
+/* DNTT_TYPE_COBSTRUCT is unsupported by GDB. */
+/* DNTT_TYPE_XREF is unsupported by GDB. */
+/* DNTT_TYPE_SA is unsupported by GDB. */
+/* DNTT_TYPE_MACRO is unsupported by GDB */
+
+/* DNTT_TYPE_BLOCKDATA has the same structure as DNTT_TYPE_FUNCTION */
+
+/* The following are the C++ specific SOM records */
+
+/* The purpose of the DNTT_TYPE_CLASS_SCOPE is to bracket C++ methods
+ and indicate the method name belongs in the "class scope" rather
+ than in the module they are being defined in. For example:
+
+ class c {
+ ...
+ void memfunc(); // member function
+ };
+
+ void c::memfunc() // definition of class c's "memfunc"
+ {
+ ...
+ }
+
+ main()
+ {
+ ...
+ }
+
+ In the above, the name "memfunc" is not directly visible from "main".
+ I.e., you have to say "break c::memfunc".
+ If it were a normal function (not a method), it would be visible
+ via the simple "break memfunc". Since "memfunc" otherwise looks
+ like a normal FUNCTION in the symbol table, the bracketing
+ CLASS_SCOPE is what is used to indicate it is really a method.
+
+
+ A DNTT_TYPE_CLASS_SCOPE symbol must have a matching DNTT_TYPE_END symbol
+*/
+
+struct dntt_type_class_scope {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_CLASS_SCOPE */
+ unsigned int unused: 21;
+ sltpointer address ; /* pointer to SLT entry */
+ dnttpointer type ; /* pointer to class type DNTT */
+};
+
+/* C++ reference parameter.
+ The structure of this record is the same as DNTT_TYPE_POINTER -
+ refer to struct dntt_type_pointer.
+ */
+
+/* The next two describe C++ pointer-to-data-member type, and
+ pointer-to-member-function type, respectively.
+ DNTT_TYPE_PTRMEM and DNTT_TYPE_PTRMEMFUNC have the same structure
+ */
+
+struct dntt_type_ptrmem {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_PTRMEM */
+ unsigned int unused: 21;
+ dnttpointer pointsto ; /* pointer to class DNTT */
+ dnttpointer memtype ; /* type of member */
+};
+
+struct dntt_type_ptrmemfunc {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_PTRMEMFUNC */
+ unsigned int unused: 21;
+ dnttpointer pointsto ; /* pointer to class DNTT */
+ dnttpointer memtype ; /* type of member */
+};
+
+/* The DNTT_TYPE_CLASS symbol is emitted to describe a class type.
+ * "memberlist" points to a chained list of FIELD or GENFIELD records
+ * indicating the class members. "parentlist" points to a chained list
+ * of INHERITANCE records indicating classes from which we inherit
+ * fields.
+ */
+
+struct dntt_type_class
+{
+ unsigned int extension: 1; /* always 0 */
+ unsigned int kind: 10; /* always DNTT_TYPE_CLASS */
+ unsigned int abstract: 1; /* is this an abstract class? */
+ unsigned int class_decl: 2; /* 0=class,1=union,2=struct */
+ unsigned int expansion: 1; /* 1=template expansion */
+ unsigned int unused: 17;
+ dnttpointer memberlist ; /* ptr to chain of [GEN]FIELDs */
+ unsigned long vtbl_loc ; /* offset in obj of ptr to vtbl */
+ dnttpointer parentlist ; /* ptr to K_INHERITANCE list */
+ unsigned long bitlength ; /* total at this level */
+ dnttpointer identlist ; /* ptr to chain of class ident's */
+ dnttpointer friendlist ; /* ptr to K_FRIEND list */
+ dnttpointer templateptr ; /* ptr to template */
+ dnttpointer nextexp ; /* ptr to next expansion */
+};
+
+/* Class members are indicated via either the FIELD record (for
+ data members, same as for C struct fields), or by the GENFIELD record
+ (for member functions).
+ */
+
+struct dntt_type_genfield {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_GENFIELD */
+ unsigned int visibility: 2; /* pub = 0, prot = 1, priv = 2 */
+ unsigned int a_union: 1; /* 1 => anonymous union member */
+ unsigned int unused: 18;
+ dnttpointer field ; /* pointer to field or qualifier */
+ dnttpointer nextfield ; /* pointer to next field */
+};
+
+/* C++ virtual functions */
+
+struct dntt_type_vfunc {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_VFUNC */
+ unsigned int pure: 1; /* pure virtual function ? */
+ unsigned int unused: 20;
+ dnttpointer funcptr ; /* points to FUNCTION symbol */
+ unsigned long vtbl_offset ; /* offset into vtbl for virtual */
+};
+
+/* Not precisely sure what this is intended for - DDE ignores it */
+
+struct dntt_type_memaccess {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_MEMACCESS */
+ unsigned int unused: 21;
+ dnttpointer classptr ; /* pointer to base class */
+ dnttpointer field ; /* pointer field */
+};
+
+/* The DNTT_TYPE_INHERITANCE record describes derived classes.
+ * In particular, the "parentlist" field of the CLASS record points
+ * to a list of INHERITANCE records for classes from which we
+ * inherit members.
+ */
+
+struct dntt_type_inheritance {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_INHERITANCE */
+ unsigned int Virtual: 1; /* virtual base class ? */
+ unsigned int visibility: 2; /* pub = 0, prot = 1, priv = 2 */
+ unsigned int unused: 18;
+ dnttpointer classname ; /* first parent class, if any */
+ unsigned long offset ; /* offset to start of base class */
+ dnttpointer next ; /* pointer to next K_INHERITANCE */
+ unsigned long future[2] ; /* padding to 3-word block end */
+};
+
+/* C++ "friend" classes ... */
+
+struct dntt_type_friend_class {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_FRIEND_CLASS */
+ unsigned int unused: 21;
+ dnttpointer classptr ; /* pointer to class DNTT */
+ dnttpointer next ; /* next DNTT_FRIEND */
+};
+
+struct dntt_type_friend_func {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_FRIEND_FUNC */
+ unsigned int unused: 21;
+ dnttpointer funcptr ; /* pointer to function */
+ dnttpointer classptr ; /* pointer to class DNTT */
+ dnttpointer next ; /* next DNTT_FRIEND */
+ unsigned long future[2] ; /* padding to 3-word block end */
+};
+
+/* DDE appears to ignore the DNTT_TYPE_MODIFIER record.
+ * It could perhaps be used to give better "ptype" output in GDB;
+ * otherwise it is probably safe for GDB to ignore it also.
+ */
+
+struct dntt_type_modifier {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_MODIFIER */
+ unsigned int m_const: 1; /* const */
+ unsigned int m_static: 1; /* static */
+ unsigned int m_void: 1; /* void */
+ unsigned int m_volatile: 1; /* volatile */
+ unsigned int m_duplicate: 1; /* duplicate */
+ unsigned int unused: 16;
+ dnttpointer type ; /* subtype */
+ unsigned long future ; /* padding to 3-word block end */
+};
+
+/* I'm not sure what this was intended for - DDE ignores it */
+
+struct dntt_type_object_id {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_OBJECT_ID */
+ unsigned int indirect: 1; /* Is object_ident addr of addr? */
+ unsigned int unused: 20;
+ unsigned long object_ident ; /* object identifier */
+ unsigned long offset ; /* offset to start of base class */
+ dnttpointer next ; /* pointer to next K_OBJECT_ID */
+ unsigned long segoffset ; /* for linker fixup */
+ unsigned long future ; /* padding to 3-word block end */
+};
+
+/* No separate dntt_type_memfunc; same as dntt_type_func */
+
+/* Symbol records to support templates. These only get used
+ * in DDE's "describe" output (like GDB's "ptype").
+ */
+
+/* The TEMPLATE record is the header for a template-class.
+ * Like the CLASS record, a TEMPLATE record has a memberlist that
+ * points to a list of template members. It also has an arglist
+ * pointing to a list of TEMPLATE_ARG records.
+ */
+
+struct dntt_type_template {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_TEMPLATE */
+ unsigned int abstract: 1; /* is this an abstract class? */
+ unsigned int class_decl: 2; /* 0=class,1=union,2=struct */
+ unsigned int unused: 18;
+ dnttpointer memberlist ; /* ptr to chain of K_[GEN]FIELDs */
+ long unused2 ; /* offset in obj of ptr to vtbl */
+ dnttpointer parentlist ; /* ptr to K_INHERITANCE list */
+ unsigned long bitlength ; /* total at this level */
+ dnttpointer identlist ; /* ptr to chain of class ident's */
+ dnttpointer friendlist ; /* ptr to K_FRIEND list */
+ dnttpointer arglist ; /* ptr to argument list */
+ dnttpointer expansions ; /* ptr to expansion list */
+};
+
+/* Template-class arguments are a list of TEMPL_ARG records
+ * chained together. The "name" field is the name of the formal.
+ * E.g.:
+ * template <class T> class q { ... };
+ * Then "T" is the name of the formal argument.
+ */
+struct dntt_type_templ_arg {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_TEMPL_ARG */
+ unsigned int usagetype: 1; /* 0 type-name 1 expression */
+ unsigned int unused: 20;
+ vtpointer name ; /* name of argument */
+ dnttpointer type ; /* for non type arguments */
+ dnttpointer nextarg ; /* Next argument if any */
+ long future[2] ; /* padding to 3-word block end */
+};
+
+/* FUNC_TEMPLATE records are sort of like FUNCTION, but are emitted
+ * for template member functions. E.g.,
+ * template <class T> class q {
+ ...
+ void f();
+ ...
+ };
+ * Within the list of FIELDs/GENFIELDs defining the member list
+ * of the template "q", "f" would appear as a FUNC_TEMPLATE.
+ * We'll also see instances of FUNCTION "f" records for each
+ * instantiation of the template.
+ */
+
+struct dntt_type_func_template {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_FUNC_TEMPLATE */
+ unsigned int public: 1; /* 1 => globally visible */
+ unsigned int language: 4; /* type of language */
+ unsigned int level: 5; /* nesting level (top level = 0)*/
+ unsigned int optimize: 2; /* level of optimization */
+ unsigned int varargs: 1; /* ellipses. Pascal/800 later */
+ unsigned int info: 4; /* lang-specific stuff; F_xxxx */
+ unsigned int inlined: 1;
+ unsigned int localloc: 1; /* 0 at top, 1 at end of block */
+ unsigned int unused: 2;
+ vtpointer name ; /* name of function */
+ vtpointer alias ; /* alternate name, if any */
+ dnttpointer firstparam ; /* first FPARAM, if any */
+ dnttpointer retval ; /* return type, if any */
+ dnttpointer arglist ; /* ptr to argument list */
+};
+
+/* LINK is apparently intended to link together function template
+ * definitions with their instantiations. However, it is not clear
+ * why this would be needed, except to provide the information on
+ * a "ptype" command. And as far as I can tell, aCC does not
+ * generate this record.
+ */
+
+struct dntt_type_link {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* always DNTT_TYPE_LINK */
+ unsigned int linkKind: 4; /* always LINK_UNKNOWN */
+ unsigned int unused: 17;
+ long future1 ; /* expansion */
+ dnttpointer ptr1 ; /* link from template */
+ dnttpointer ptr2 ; /* to expansion */
+ long future[2] ; /* padding to 3-word block end */
+};
+
+/* end of C++ specific SOM's */
+
+/* DNTT_TYPE_DYN_ARRAY_DESC is unused by GDB */
+/* DNTT_TYPE_DESC_SUBRANGE is unused by GDB */
+/* DNTT_TYPE_BEGIN_EXT is unused by GDB */
+/* DNTT_TYPE_INLN is unused by GDB */
+/* DNTT_TYPE_INLN_LIST is unused by GDB */
+/* DNTT_TYPE_ALIAS is unused by GDB */
+
+struct dntt_type_doc_function {
+ unsigned int extension: 1; /* always zero */
+ unsigned int kind: 10; /* K_DOC_FUNCTION or */
+ /* K_DOC_MEMFUNC */
+ unsigned int global: 1; /* 1 => globally visible */
+ unsigned int language: 4; /* type of language */
+ unsigned int level: 5; /* nesting level (top level = 0)*/
+ unsigned int optimize: 2; /* level of optimization */
+ unsigned int varargs: 1; /* ellipses. Pascal/800 later */
+ unsigned int info: 4; /* lang-specific stuff; F_xxxx */
+ unsigned int inlined: 1;
+ unsigned int localloc: 1; /* 0 at top, 1 at end of block */
+ unsigned int expansion: 1; /* 1 = function expansion */
+ unsigned int doc_clone: 1;
+ vtpointer name; /* name of function */
+ vtpointer alias; /* alternate name, if any */
+ dnttpointer firstparam; /* first FPARAM, if any */
+ sltpointer address; /* code and text locations */
+ CORE_ADDR entryaddr; /* address of entry point */
+ dnttpointer retval; /* return type, if any */
+ CORE_ADDR lowaddr; /* lowest address of function */
+ CORE_ADDR hiaddr; /* highest address of function */
+ dnttpointer inline_list; /* pointer to first inline */
+ ltpointer lt_offset; /* start of frag/cp line table */
+ ctxtpointer ctxt_offset; /* start of context table for this routine */
+};
+
+/* DNTT_TYPE_DOC_MEMFUNC is unused by GDB */
+
+/* DNTT_TYPE_GENERIC and DNTT_TYPE_BLOCK are convience structures
+ so we can examine a DNTT entry in a generic fashion. */
+struct dntt_type_generic
+{
+ unsigned int word[9];
+};
+
+struct dntt_type_block
+{
+ unsigned int extension: 1;
+ unsigned int kind: 10;
+ unsigned int unused: 21;
+ unsigned int word[2];
+};
+
+/* One entry in a DNTT (either the LNTT or GNTT).
+ * This is a union of the above 60 or so structure definitions.
+ */
+union dnttentry
+{
+ struct dntt_type_srcfile dsfile;
+ struct dntt_type_module dmodule;
+ struct dntt_type_function dfunc;
+ struct dntt_type_function dentry;
+ struct dntt_type_begin dbegin;
+ struct dntt_type_end dend;
+ struct dntt_type_fparam dfparam;
+ struct dntt_type_svar dsvar;
+ struct dntt_type_dvar ddvar;
+ struct dntt_type_const dconst;
+ struct dntt_type_type dtype;
+ struct dntt_type_type dtag;
+ struct dntt_type_pointer dptr;
+ struct dntt_type_enum denum;
+ struct dntt_type_memenum dmember;
+ struct dntt_type_set dset;
+ struct dntt_type_subrange dsubr;
+ struct dntt_type_array darray;
+ struct dntt_type_struct dstruct;
+ struct dntt_type_union dunion;
+ struct dntt_type_field dfield;
+ struct dntt_type_functype dfunctype;
+ struct dntt_type_with dwith;
+ struct dntt_type_function dblockdata;
+ struct dntt_type_class_scope dclass_scope;
+ struct dntt_type_pointer dreference;
+ struct dntt_type_ptrmem dptrmem;
+ struct dntt_type_ptrmemfunc dptrmemfunc;
+ struct dntt_type_class dclass;
+ struct dntt_type_genfield dgenfield;
+ struct dntt_type_vfunc dvfunc;
+ struct dntt_type_memaccess dmemaccess;
+ struct dntt_type_inheritance dinheritance;
+ struct dntt_type_friend_class dfriend_class;
+ struct dntt_type_friend_func dfriend_func;
+ struct dntt_type_modifier dmodifier;
+ struct dntt_type_object_id dobject_id;
+ struct dntt_type_template dtemplate;
+ struct dntt_type_templ_arg dtempl_arg;
+ struct dntt_type_func_template dfunc_template;
+ struct dntt_type_link dlink;
+ struct dntt_type_doc_function ddocfunc;
+ struct dntt_type_generic dgeneric;
+ struct dntt_type_block dblock;
+};
+
+/* Source line entry types. */
+enum slttype
+{
+ SLT_NORMAL,
+ SLT_SRCFILE,
+ SLT_MODULE,
+ SLT_FUNCTION,
+ SLT_ENTRY,
+ SLT_BEGIN,
+ SLT_END,
+ SLT_WITH,
+ SLT_EXIT,
+ SLT_ASSIST,
+ SLT_MARKER,
+ SLT_CLASS_SCOPE,
+ SLT_INLN,
+ SLT_NORMAL_OFFSET,
+};
+
+/* A normal source line entry. Simply provides a mapping of a source
+ line number to a code address.
+
+ SLTDESC will always be SLT_NORMAL or SLT_EXIT. */
+
+struct slt_normal
+{
+ unsigned int sltdesc: 4;
+ unsigned int line: 28;
+ CORE_ADDR address;
+};
+
+struct slt_normal_off
+{
+ unsigned int sltdesc: 4;
+ unsigned int offset: 6;
+ unsigned int line: 22;
+ CORE_ADDR address;
+};
+
+/* A special source line entry. Provides a mapping of a declaration
+ to a line number. These entries point back into the DNTT which
+ references them. */
+
+struct slt_special
+{
+ unsigned int sltdesc: 4;
+ unsigned int line: 28;
+ dnttpointer backptr;
+};
+
+/* Used to describe nesting.
+
+ For nested languages, an slt_assist entry must follow each SLT_FUNC
+ entry in the SLT. The address field will point forward to the
+ first slt_normal entry within the function's scope. */
+
+struct slt_assist
+{
+ unsigned int sltdesc: 4;
+ unsigned int unused: 28;
+ sltpointer address;
+};
+
+struct slt_generic
+{
+ unsigned int word[2];
+};
+
+union sltentry
+{
+ struct slt_normal snorm;
+ struct slt_normal_off snormoff;
+ struct slt_special sspec;
+ struct slt_assist sasst;
+ struct slt_generic sgeneric;
+};
+
+/* $LINES$ declarations
+ * This is the line table used for optimized code, which is only present
+ * in the new $PROGRAM_INFO$ debug space.
+ */
+
+#define DST_LN_ESCAPE_FLAG1 15
+#define DST_LN_ESCAPE_FLAG2 14
+#define DST_LN_CTX_SPEC1 13
+#define DST_LN_CTX_SPEC2 12
+
+/*
+ Escape function codes:
+*/
+typedef enum
+ {
+ dst_ln_pad, /* pad byte */
+ dst_ln_escape_1, /* reserved */
+ dst_ln_dpc1_dln1, /* 1 byte line delta, 1 byte pc delta */
+ dst_ln_dpc2_dln2, /* 2 bytes line delta, 2 bytes pc delta */
+ dst_ln_pc4_ln4, /* 4 bytes ABSOLUTE line number, 4 bytes ABSOLUTE pc */
+ dst_ln_dpc0_dln1, /* 1 byte line delta, pc delta = 0 */
+ dst_ln_ln_off_1, /* statement escape, stmt # = 1 (2nd stmt on line) */
+ dst_ln_ln_off, /* statement escape, stmt # = next byte */
+ dst_ln_entry, /* entry escape, next byte is entry number */
+ dst_ln_exit, /* exit escape */
+ dst_ln_stmt_end, /* gap escape, 4 bytes pc delta */
+ dst_ln_stmt_cp, /* current stmt is a critical point */
+ dst_ln_escape_12, /* reserved */
+ dst_ln_escape_13, /* this is an exception site record */
+ dst_ln_nxt_byte, /* next byte contains the real escape code */
+ dst_ln_end, /* end escape, final entry follows */
+ dst_ln_escape1_END_OF_ENUM
+ }
+ dst_ln_escape1_t;
+
+typedef enum
+ {
+ dst_ln_ctx_1, /* next byte describes context switch with 5-bit */
+ /* index into the image table and 3-bit run length. */
+ /* If run length is 0, end with another cxt specifier or ctx_end */
+ dst_ln_ctx_2, /* next 2 bytes switch context: 13 bit index, 3 bit run length */
+ dst_ln_ctx_4, /* next 4 bytes switch context: 29 bit index, 3 bit run length */
+ dst_ln_ctx_end, /* end current context */
+ dst_ln_col_run_1, /* next byte is column position of start of next statement, */
+ /* following byte is length of statement */
+ dst_ln_col_run_2, /* next 2 bytes is column position of start of next statement, */
+ /* following 2 bytes is length of statement */
+ dst_ln_init_base1, /* next 4 bytes are absolute PC, followed by 1 byte of line number */
+ dst_ln_init_base2, /* next 4 bytes are absolute PC, followed by 2 bytes of line number */
+ dst_ln_init_base3, /* next 4 bytes are absolute PC, followed by 3 bytes of line number */
+ dst_ln_escape2_END_OF_ENUM
+ }
+ dst_ln_escape2_t;
+
+typedef union
+ {
+ struct
+ {
+ unsigned int pc_delta : 4; /* 4 bit pc delta */
+ int ln_delta : 4; /* 4 bit line number delta */
+ }
+ delta;
+
+ struct
+ {
+ unsigned int esc_flag : 4; /* alias for pc_delta */
+ unsigned int esc_code : 4; /* escape function code (dst_ln_escape1_t, or ...2_t */
+ }
+ esc;
+
+ struct
+ {
+ unsigned int esc_flag : 4; /* dst_ln_ctx_spec1, or dst_ln_ctx_spec2 */
+ unsigned int run_length : 2;
+ unsigned int ctx_index : 2; /* ...spec2 contains index; ...spec1, index - 4 */
+ }
+ ctx_spec;
+
+ char sdata; /* signed data byte */
+ unsigned char udata; /* unsigned data byte */
+ }
+ dst_ln_entry_t,
+ *dst_ln_entry_ptr_t;
+
+/* Warning: although the above union occupies only 1 byte the compiler treats
+ * it as having size 2 (the minimum size of a struct). Therefore a sequence of
+ * dst_ln_entry_t's cannot be described as an array, and walking through such a
+ * sequence requires convoluted code such as
+ * ln_ptr = (dst_ln_entry_ptr_t) (char*) ln_ptr + 1
+ * We regret the inconvenience. */
+
+/* Structure for interpreting the byte following a dst_ln_ctx1 entry */
+typedef struct {
+ unsigned int ctx1_index : 5; /* 5 bit index into context table */
+ unsigned int ctx1_run_length : 3; /* 3 bit run length */
+} dst_ln_ctx1_t,
+ *dst_ln_ctx1_ptr_t;
+
+/* Structure for interpreting the bytes following a dst_ln_ctx2 entry */
+typedef struct {
+ unsigned int ctx2_index : 13; /* 13 bit index into context table */
+ unsigned int ctx2_run_length : 3; /* 3 bit run length */
+} dst_ln_ctx2_t,
+ *dst_ln_ctx2_ptr_t;
+
+/* Structure for interpreting the bytes following a dst_ln_ctx4 entry */
+typedef struct {
+ unsigned int ctx4_index : 29; /* 29 bit index into context table */
+ unsigned int ctx4_run_length : 3; /* 3 bit run length */
+} dst_ln_ctx4_t,
+ *dst_ln_ctx4_ptr_t;
+
+
+/* PXDB definitions.
+ *
+ * PXDB is a post-processor which takes the executable file
+ * and massages the debug information so that the debugger may
+ * start up and run more efficiently. Some of the tasks
+ * performed by PXDB are:
+ *
+ * o Remove duplicate global type and variable information
+ * from the GNTT,
+ *
+ * o Append the GNTT onto the end of the LNTT and place both
+ * back in the LNTT section,
+ *
+ * o Build quick look-up tables (description follows) for
+ * files, procedures, modules, and paragraphs (for Cobol),
+ * placing these in the GNTT section,
+ *
+ * o Reconstruct the header appearing in the header section
+ * to access this information.
+ *
+ * The "quick look-up" tables are in the $GNTT$ sub-space, in
+ * the following order:
+ *
+ * Procedures -sorted by address
+ * Source files -sorted by address (of the
+ * generated code from routines)
+ * Modules -sorted by address
+ * Classes -<unsorted?>
+ * Address Alias -sorted by index <?>
+ * Object IDs -sorted by object identifier
+ *
+ * Most quick entries have (0-based) indices into the LNTT tables to
+ * the full entries for the item it describes.
+ *
+ * The post-PXDB header is in the $HEADER$ sub-space. Alas, it
+ * occurs in different forms, depending on the optimization level
+ * in the compilation step and whether PXDB was run or not. The
+ * worst part is the forms aren't self-describing, so we'll have
+ * to grovel in the bits to figure out what kind we're looking at
+ * (see hp_get_header in hp-psymtab-read.c).
+ */
+
+/* PXDB versions
+ */
+#define PXDB_VERSION_CPLUSPLUS 1
+#define PXDB_VERSION_7_4 2
+#define PXDB_VERSION_CPP_30 3
+#define PXDB_VERSION_DDE_3_2A 4
+#define PXDB_VERSION_DDE_3_2 5
+#define PXDB_VERSION_DDE_4_0 6
+
+#define PXDB_VERSION_2_1 1
+
+/* Header version for the case that there is no DOC info
+ * but the executable has been processed by pxdb (the easy
+ * case, from "cc -g").
+ */
+typedef struct PXDB_struct {
+ int pd_entries; /* # of entries in function look-up table */
+ int fd_entries; /* # of entries in file look-up table */
+ int md_entries; /* # of entries in module look-up table */
+ unsigned int pxdbed : 1; /* 1 => file has been preprocessed */
+ unsigned int bighdr : 1; /* 1 => this header contains 'time' word */
+ unsigned int sa_header : 1;/* 1 => created by SA version of pxdb */
+ /* used for version check in xdb */
+ unsigned int inlined: 1; /* one or more functions have been inlined */
+ unsigned int spare:12;
+ short version; /* pxdb header version */
+ int globals; /* index into the DNTT where GNTT begins */
+ unsigned int time; /* modify time of file before being pxdbed */
+ int pg_entries; /* # of entries in label look-up table */
+ int functions; /* actual number of functions */
+ int files; /* actual number of files */
+ int cd_entries; /* # of entries in class look-up table */
+ int aa_entries; /* # of entries in addr alias look-up table */
+ int oi_entries; /* # of entries in object id look-up table */
+} PXDB_header, *PXDB_header_ptr;
+
+/* Header version for the case that there is no DOC info and the
+ * executable has NOT been processed by pxdb.
+ */
+typedef struct XDB_header_struct {
+ long gntt_length;
+ long lntt_length;
+ long slt_length;
+ long vt_length;
+ long xt_length;
+} XDB_header;
+
+/* Header version for the case that there is DOC info and the
+ * executable has been processed by pxdb.
+ */
+typedef struct DOC_info_PXDB_header_struct {
+ unsigned int xdb_header: 1; /* bit set if this is post-3.1 xdb */
+ unsigned int doc_header: 1; /* bit set if this is doc-style header*/
+ unsigned int version: 8; /* version of pxdb see defines
+ * PXDB_VERSION_* in this file */
+ unsigned int reserved_for_flags: 16;/* for future use; -- must be
+ * set to zero
+ */
+ unsigned int has_aux_pd_table: 1; /* $GNTT$ has aux PD table */
+ unsigned int has_expr_table: 1; /* space has $EXPR$ */
+ unsigned int has_range_table: 1; /* space has $RANGE$ */
+ unsigned int has_context_table: 1; /* space has $SRC_CTXT$ */
+ unsigned int has_lines_table: 1; /* space contains a $LINES$
+ * subspace for line tables.
+ */
+ unsigned int has_lt_offset_map: 1; /* space contains an lt_offset
+ * subspace for line table mapping
+ */
+ /* the following fields are the same as those in the PXDB_header in $DEBUG$ */
+ int pd_entries; /* # of entries in function look-up table */
+ int fd_entries; /* # of entries in file look-up table */
+ int md_entries; /* # of entries in module look-up table */
+ unsigned int pxdbed : 1; /* 1 => file has been preprocessed */
+ unsigned int bighdr : 1; /* 1 => this header contains 'time' word */
+ unsigned int sa_header : 1;/* 1 => created by SA version of pxdb */
+ /* used for version check in xdb */
+ unsigned int inlined: 1; /* one or more functions have been inlined */
+ unsigned int spare : 28;
+ int globals; /* index into the DNTT where GNTT begins */
+ unsigned int time; /* modify time of file before being pxdbed */
+ int pg_entries; /* # of entries in label look-up table */
+ int functions; /* actual number of functions */
+ int files; /* actual number of files */
+ int cd_entries; /* # of entries in class look-up table */
+ int aa_entries; /* # of entries in addr alias look-up table */
+ int oi_entries; /* # of entries in object id look-up table */
+} DOC_info_PXDB_header;
+
+/* Header version for the case that there is DOC info and the
+ * executable has NOT been processed by pxdb.
+ */
+typedef struct DOC_info_header_struct {
+ unsigned int xdb_header: 1; /* bit set if this is post-3.1 xdb */
+ unsigned int doc_header: 1; /* bit set if this is doc-style header*/
+ unsigned int version: 8; /* version of debug/header
+ format. For 10.0 the value
+ will be 1. For "Davis" the
+ value is 2.
+ */
+ unsigned int reserved_for_flags: 18; /* for future use; -- must be
+ set to zero
+ */
+ unsigned int has_range_table: 1; /* space contains a $RANGE$
+ subspace for variable ranges.
+ */
+ unsigned int has_context_table: 1; /* space contains a $CTXT$
+ subspace for context/inline
+ table.
+ */
+ unsigned int has_lines_table: 1; /* space contains a $LINES$
+ subspace for line tables.
+ */
+ unsigned int has_lt_offset_map: 1; /* space contains an lt_offset
+ subspace for line table mapping
+ */
+
+ long gntt_length; /* same as old header */
+ long lntt_length; /* same as old header */
+ long slt_length; /* same as old header */
+ long vt_length; /* same as old header */
+ long xt_length; /* same as old header */
+ long ctxt_length; /* present only if version >= 2 */
+ long range_length; /* present only if version >= 2 */
+ long expr_length; /* present only if version >= 2 */
+
+} DOC_info_header;
+
+typedef union GenericDebugHeader_union
+{
+ PXDB_header no_doc;
+ DOC_info_PXDB_header doc;
+ XDB_header no_pxdb_no_doc;
+ DOC_info_header no_pxdb_doc;
+} GenericDebugHeader;
+
+
+/* Procedure Descriptor:
+ *
+ * An element of the procedure quick look-up table
+ */
+typedef struct quick_procedure {
+ long isym; /* 0-based index of first symbol*/
+ /* for procedure in $LNTT$, */
+ /* i.e. the procedure itself */
+ CORE_ADDR adrStart; /* memory adr of start of proc */
+ CORE_ADDR adrEnd; /* memory adr of end of proc */
+ char *sbAlias; /* alias name of procedure */
+ char *sbProc; /* real name of procedure */
+ CORE_ADDR adrBp; /* address of entry breakpoint */
+ CORE_ADDR adrExitBp; /* address of exit breakpoint */
+ int icd; /* member of this class (index) */
+ unsigned int ipd; /* index of template for this */
+ /* function (index) */
+ unsigned int unused: 5;
+ unsigned int no_lt_offset: 1;/* no entry in lt_offset table */
+ unsigned int fTemplate: 1; /* function template */
+ unsigned int fExpansion: 1; /* function expansion */
+ unsigned int linked : 1; /* linked with other expansions */
+ unsigned int duplicate: 1; /* clone of another procedure */
+ unsigned int overloaded:1; /* overloaded function */
+ unsigned int member: 1; /* class member function */
+ unsigned int constructor:1; /* constructor function */
+ unsigned int destructor:1; /* destructor function */
+ unsigned int Static: 1; /* static function */
+ unsigned int Virtual: 1; /* virtual function */
+ unsigned int constant: 1; /* constant function */
+ unsigned int pure: 1; /* pure (virtual) function */
+ unsigned int language: 4; /* procedure's language */
+ unsigned int inlined: 1; /* function has been inlined */
+ unsigned int Operator: 1; /* operator function */
+ unsigned int stub: 1; /* bodyless function */
+ unsigned int optimize: 2; /* optimization level */
+ unsigned int level: 5; /* nesting level (top=0) */
+} quick_procedure_entry, *quick_procedure_entry_ptr;
+
+/* Source File Descriptor:
+ *
+ * An element of the source file quick look-up table
+ */
+typedef struct quick_source {
+ long isym; /* 0-based index in $LNTT$ of */
+ /* first symbol for this file */
+ CORE_ADDR adrStart; /* mem adr of start of file's code */
+ CORE_ADDR adrEnd; /* mem adr of end of file's code */
+ char *sbFile; /* name of source file */
+ unsigned int fHasDecl: 1; /* do we have a .d file? */
+ unsigned int fWarned: 1; /* have warned about age problems? */
+ unsigned int fSrcfile: 1; /* 0 => include 1=> source */
+ unsigned short ilnMac; /* lines in file (0 if don't know) */
+ int ipd; /* 0-based index of first procedure*/
+ /* in this file, in the quick */
+ /* look-up table of procedures */
+ unsigned int *rgLn; /* line pointer array, if any */
+} quick_file_entry, *quick_file_entry_ptr;
+
+/* Module Descriptor:
+ *
+ * An element of the module quick reference table
+ */
+typedef struct quick_module {
+ long isym; /* 0-based index of first */
+ /* symbol for module */
+ CORE_ADDR adrStart; /* adr of start of mod. */
+ CORE_ADDR adrEnd; /* adr of end of mod. */
+ char *sbAlias; /* alias name of module */
+ char *sbMod; /* real name of module */
+ unsigned int imports: 1; /* module have any imports? */
+ unsigned int vars_in_front: 1; /* module globals in front? */
+ unsigned int vars_in_gaps: 1; /* module globals in gaps? */
+ unsigned int language: 4; /* type of language */
+ unsigned int unused : 25;
+ unsigned int unused2; /* space for future stuff */
+} quick_module_entry, *quick_module_entry_ptr;
+
+/* Auxiliary Procedure Descriptor:
+ *
+ * An element of the auxiliary procedure quick look-up table
+ */
+typedef struct quick_aux_procedure {
+ long isym_inln; /* start on inline list for proc */
+ long spare;
+} quick_aux_procedure_entry, *quick_aux_procedure_entry_ptr;
+
+/* Paragraph Descriptor:
+ *
+ * An element of the paragraph quick look-up table
+ */
+typedef struct quick_paragraph {
+ long isym; /* first symbol for label (index) */
+ CORE_ADDR adrStart; /* memory adr of start of label */
+ CORE_ADDR adrEnd; /* memory adr of end of label */
+ char *sbLab; /* name of label */
+ unsigned int inst; /* Used in xdb to store inst @ bp */
+ unsigned int sect: 1; /* true = section, false = parag. */
+ unsigned int unused: 31; /* future use */
+} quick_paragraph_entry, *quick_paragraph_entry_ptr;
+
+/*
+ * Class Descriptor:
+ *
+ * An element of the class quick look-up table
+ */
+typedef struct quick_class {
+ char *sbClass; /* name of class */
+ long isym; /* class symbol (tag) */
+ unsigned int type : 2; /* 0=class, 1=union, 2=struct */
+ unsigned int fTemplate : 1;/* class template */
+ unsigned int expansion : 1;/* template expansion */
+ unsigned int unused :28;
+ sltpointer lowscope; /* beginning of defined scope */
+ sltpointer hiscope; /* end of defined scope */
+} quick_class_entry, *quick_class_entry_ptr;
+
+/* Address Alias Entry
+ *
+ * An element of the address alias quick look-up table
+ */
+typedef struct quick_alias {
+ CORE_ADDR low;
+ CORE_ADDR high;
+ int index;
+ unsigned int unused : 31;
+ unsigned int alternate : 1; /* alternate unnamed aliases? */
+} quick_alias_entry, *quick_alias_entry_ptr;
+
+/* Object Identification Entry
+ *
+ * An element of the object identification quick look-up table
+ */
+
+typedef struct quick_obj_ID {
+ CORE_ADDR obj_ident; /* class identifier */
+ long isym; /* class symbol */
+ long offset; /* offset to object start */
+} quick_obj_ID_entry, *quick_obj_ID_entry_ptr;
+
+
+#endif /* HP_SYMTAB_INCLUDED */
+
diff --git a/include/ieee.h b/include/ieee.h
new file mode 100644
index 0000000..5ade39d
--- /dev/null
+++ b/include/ieee.h
@@ -0,0 +1,139 @@
+/* IEEE Standard 695-1980 "Universal Format for Object Modules" header file
+ Contributed by Cygnus Support. */
+
+#define N_W_VARIABLES 8
+#define Module_Beginning 0xe0
+
+typedef struct ieee_module {
+ char *processor;
+ char *module_name;
+} ieee_module_begin_type;
+
+#define Address_Descriptor 0xec
+typedef struct ieee_address {
+bfd_vma number_of_bits_mau;
+ bfd_vma number_of_maus_in_address;
+
+ unsigned char byte_order;
+#define IEEE_LITTLE 0xcc
+#define IEEE_BIG 0xcd
+} ieee_address_descriptor_type;
+
+typedef union ieee_w_variable {
+ file_ptr offset[N_W_VARIABLES];
+ struct {
+ file_ptr extension_record;
+ file_ptr environmental_record;
+ file_ptr section_part;
+ file_ptr external_part;
+ file_ptr debug_information_part;
+ file_ptr data_part;
+ file_ptr trailer_part;
+ file_ptr me_record;
+ } r;
+} ieee_w_variable_type;
+
+
+
+
+
+typedef enum ieee_record
+{
+ ieee_number_start_enum = 0x00,
+ ieee_number_end_enum=0x7f,
+ ieee_number_repeat_start_enum = 0x80,
+ ieee_number_repeat_end_enum = 0x88,
+ ieee_number_repeat_4_enum = 0x84,
+ ieee_number_repeat_3_enum = 0x83,
+ ieee_number_repeat_2_enum = 0x82,
+ ieee_number_repeat_1_enum = 0x81,
+ ieee_module_beginning_enum = 0xe0,
+ ieee_module_end_enum = 0xe1,
+ ieee_extension_length_1_enum = 0xde,
+ ieee_extension_length_2_enum = 0xdf,
+ ieee_section_type_enum = 0xe6,
+ ieee_section_alignment_enum = 0xe7,
+ ieee_external_symbol_enum = 0xe8,
+ ieee_comma = 0x90,
+ ieee_external_reference_enum = 0xe9,
+ ieee_set_current_section_enum = 0xe5,
+ ieee_address_descriptor_enum = 0xec,
+ ieee_load_constant_bytes_enum = 0xed,
+ ieee_load_with_relocation_enum = 0xe4,
+
+ ieee_variable_A_enum = 0xc1,
+ ieee_variable_B_enum = 0xc2,
+ ieee_variable_C_enum = 0xc3,
+ ieee_variable_D_enum = 0xc4,
+ ieee_variable_E_enum = 0xc5,
+ ieee_variable_F_enum = 0xc6,
+ ieee_variable_G_enum = 0xc7,
+ ieee_variable_H_enum = 0xc8,
+ ieee_variable_I_enum = 0xc9,
+ ieee_variable_J_enum = 0xca,
+ ieee_variable_K_enum = 0xcb,
+ ieee_variable_L_enum = 0xcc,
+ ieee_variable_M_enum = 0xcd,
+ ieee_variable_N_enum = 0xce,
+ ieee_variable_O_enum = 0xcf,
+ ieee_variable_P_enum = 0xd0,
+ ieee_variable_Q_enum = 0xd1,
+ ieee_variable_R_enum = 0xd2,
+ ieee_variable_S_enum = 0xd3,
+ ieee_variable_T_enum = 0xd4,
+ ieee_variable_U_enum = 0xd5,
+ ieee_variable_V_enum = 0xd6,
+ ieee_variable_W_enum = 0xd7,
+ ieee_variable_X_enum = 0xd8,
+ ieee_variable_Y_enum = 0xd9,
+ ieee_variable_Z_enum = 0xda,
+ ieee_function_plus_enum = 0xa5,
+ ieee_function_minus_enum = 0xa6,
+ ieee_function_signed_open_b_enum = 0xba,
+ ieee_function_signed_close_b_enum = 0xbb,
+
+ ieee_function_unsigned_open_b_enum = 0xbc,
+ ieee_function_unsigned_close_b_enum = 0xbd,
+
+ ieee_function_either_open_b_enum = 0xbe,
+ ieee_function_either_close_b_enum = 0xbf,
+ ieee_record_seperator_enum = 0xdb,
+
+ ieee_e2_first_byte_enum = 0xe2,
+ ieee_section_size_enum = 0xe2d3,
+ ieee_physical_region_size_enum = 0xe2c1,
+ ieee_region_base_address_enum = 0xe2c2,
+ ieee_mau_size_enum = 0xe2c6,
+ ieee_m_value_enum = 0xe2cd,
+ ieee_section_base_address_enum = 0xe2cc,
+ ieee_asn_record_enum = 0xe2ce,
+ ieee_section_offset_enum = 0xe2d2,
+ ieee_value_starting_address_enum = 0xe2c7,
+ ieee_assign_value_to_variable_enum = 0xe2d7,
+ ieee_set_current_pc_enum = 0xe2d0,
+ ieee_value_record_enum = 0xe2c9,
+ ieee_nn_record = 0xf0,
+ ieee_at_record_enum = 0xf1,
+ ieee_ty_record_enum = 0xf2,
+ ieee_attribute_record_enum = 0xf1c9,
+ ieee_atn_record_enum = 0xf1ce,
+ ieee_external_reference_info_record_enum = 0xf1d8,
+ ieee_weak_external_reference_enum= 0xf4,
+ ieee_repeat_data_enum = 0xf7,
+ ieee_bb_record_enum = 0xf8,
+ ieee_be_record_enum = 0xf9
+} ieee_record_enum_type;
+
+
+typedef struct ieee_section {
+ unsigned int section_index;
+ unsigned int section_type;
+ char *section_name;
+ unsigned int parent_section_index;
+ unsigned int sibling_section_index;
+ unsigned int context_index;
+} ieee_section_type;
+#define IEEE_REFERENCE_BASE 11
+#define IEEE_PUBLIC_BASE 32
+#define IEEE_SECTION_NUMBER_BASE 1
+
diff --git a/include/libiberty.h b/include/libiberty.h
new file mode 100644
index 0000000..cf31366
--- /dev/null
+++ b/include/libiberty.h
@@ -0,0 +1,180 @@
+/* Function declarations for libiberty.
+ Written by Cygnus Support, 1994.
+
+ The libiberty library provides a number of functions which are
+ missing on some operating systems. We do not declare those here,
+ to avoid conflicts with the system header files on operating
+ systems that do support those functions. In this file we only
+ declare those functions which are specific to libiberty. */
+
+#ifndef LIBIBERTY_H
+#define LIBIBERTY_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ansidecl.h"
+
+/* Build an argument vector from a string. Allocates memory using
+ malloc. Use freeargv to free the vector. */
+
+extern char **buildargv PARAMS ((char *));
+
+/* Free a vector returned by buildargv. */
+
+extern void freeargv PARAMS ((char **));
+
+/* Duplicate an argument vector. Allocates memory using malloc. Use
+ freeargv to free the vector. */
+
+extern char **dupargv PARAMS ((char **));
+
+
+/* Return the last component of a path name. Note that we can't use a
+ prototype here because the parameter is declared inconsistently
+ across different systems, sometimes as "char *" and sometimes as
+ "const char *" */
+
+#if defined (__GNU_LIBRARY__ ) || defined (__linux__) || defined (__FreeBSD__) || defined (__CYGWIN__) || defined (__CYGWIN32__)
+extern char *basename PARAMS ((const char *));
+#else
+extern char *basename ();
+#endif
+
+/* Concatenate an arbitrary number of strings, up to (char *) NULL.
+ Allocates memory using xmalloc. */
+
+extern char *concat PARAMS ((const char *, ...));
+
+/* Check whether two file descriptors refer to the same file. */
+
+extern int fdmatch PARAMS ((int fd1, int fd2));
+
+/* Get the amount of time the process has run, in microseconds. */
+
+extern long get_run_time PARAMS ((void));
+
+/* Choose a temporary directory to use for scratch files. */
+
+extern char *choose_temp_base PARAMS ((void));
+
+/* Allocate memory filled with spaces. Allocates using malloc. */
+
+extern const char *spaces PARAMS ((int count));
+
+/* Return the maximum error number for which strerror will return a
+ string. */
+
+extern int errno_max PARAMS ((void));
+
+/* Return the name of an errno value (e.g., strerrno (EINVAL) returns
+ "EINVAL"). */
+
+extern const char *strerrno PARAMS ((int));
+
+/* Given the name of an errno value, return the value. */
+
+extern int strtoerrno PARAMS ((const char *));
+
+/* ANSI's strerror(), but more robust. */
+
+extern char *xstrerror PARAMS ((int));
+
+/* Return the maximum signal number for which strsignal will return a
+ string. */
+
+extern int signo_max PARAMS ((void));
+
+/* Return a signal message string for a signal number
+ (e.g., strsignal (SIGHUP) returns something like "Hangup"). */
+/* This is commented out as it can conflict with one in system headers.
+ We still document its existence though. */
+
+/*extern const char *strsignal PARAMS ((int));*/
+
+/* Return the name of a signal number (e.g., strsigno (SIGHUP) returns
+ "SIGHUP"). */
+
+extern const char *strsigno PARAMS ((int));
+
+/* Given the name of a signal, return its number. */
+
+extern int strtosigno PARAMS ((const char *));
+
+/* Register a function to be run by xexit. Returns 0 on success. */
+
+extern int xatexit PARAMS ((void (*fn) (void)));
+
+/* Exit, calling all the functions registered with xatexit. */
+
+#ifndef __GNUC__
+extern void xexit PARAMS ((int status));
+#else
+void xexit PARAMS ((int status)) __attribute__ ((noreturn));
+#endif
+
+/* Set the program name used by xmalloc. */
+
+extern void xmalloc_set_program_name PARAMS ((const char *));
+
+/* Allocate memory without fail. If malloc fails, this will print a
+ message to stderr (using the name set by xmalloc_set_program_name,
+ if any) and then call xexit. */
+
+#ifdef ANSI_PROTOTYPES
+/* Get a definition for size_t. */
+#include <stddef.h>
+#endif
+extern PTR xmalloc PARAMS ((size_t));
+
+/* Reallocate memory without fail. This works like xmalloc.
+
+ FIXME: We do not declare the parameter types for the same reason as
+ xmalloc. */
+
+extern PTR xrealloc PARAMS ((PTR, size_t));
+
+/* Allocate memory without fail and set it to zero. This works like
+ xmalloc. */
+
+extern PTR xcalloc PARAMS ((size_t, size_t));
+
+/* Copy a string into a memory buffer without fail. */
+
+extern char *xstrdup PARAMS ((const char *));
+
+/* hex character manipulation routines */
+
+#define _hex_array_size 256
+#define _hex_bad 99
+extern char _hex_value[_hex_array_size];
+extern void hex_init PARAMS ((void));
+#define hex_p(c) (hex_value (c) != _hex_bad)
+/* If you change this, note well: Some code relies on side effects in
+ the argument being performed exactly once. */
+#define hex_value(c) (_hex_value[(unsigned char) (c)])
+
+/* Definitions used by the pexecute routine. */
+
+#define PEXECUTE_FIRST 1
+#define PEXECUTE_LAST 2
+#define PEXECUTE_ONE (PEXECUTE_FIRST + PEXECUTE_LAST)
+#define PEXECUTE_SEARCH 4
+#define PEXECUTE_VERBOSE 8
+
+/* Execute a program. */
+
+extern int pexecute PARAMS ((const char *, char * const *, const char *,
+ const char *, char **, char **, int));
+
+/* Wait for pexecute to finish. */
+
+extern int pwait PARAMS ((int, int *, int));
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* ! defined (LIBIBERTY_H) */
diff --git a/include/mpw/ChangeLog b/include/mpw/ChangeLog
new file mode 100644
index 0000000..8dbad87
--- /dev/null
+++ b/include/mpw/ChangeLog
@@ -0,0 +1,61 @@
+Tue Feb 27 12:23:04 1996 Raymond Jou <rjou@mexican.cygnus.com>
+
+ * mpw.h (HAVE_VPRINTF): Add and define to have the value 1.
+
+Fri Dec 29 14:40:46 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw.h (HAVE_STDLIB_H, etc): Define to have the value 1.
+ (HAVE_FCNTL_H): Define.
+
+Mon Dec 11 15:39:06 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw.h (open, access): Define as mpw_open and mpw_access.
+
+Thu Nov 9 15:38:37 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw.h: Include unix.h if USE_MW_HEADERS, otherwise include
+ various original MPW include files (ioctl.h, etc).
+ (EIO): Define if not defined.
+ * sys/ioctl.h: Remove, not needed.
+
+Wed Oct 25 12:30:44 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw.h: Don't include errno.h or ioctl.h.
+ (ENOENT, EACCES, ENOSYS): Define if not defined.
+ (fdopen): Declare if __STDC__.
+ (R_OK, W_OK, X_OK): Define if not defined.
+
+Tue Sep 26 14:57:21 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw.h: New file, universally useful MPW host definitions.
+ Many of these used to live in bfd/hosts/mpw.h.
+ * grp.h: Remove RCS comment.
+ * sys/ioctl.h: Add a comment line.
+
+Wed Dec 14 13:12:14 1994 Stan Shebs <shebs@andros.cygnus.com>
+
+ * spin.h: New file, cursor spinning for progress.
+
+Thu Jun 30 15:32:07 1994 Stan Shebs (shebs@andros.cygnus.com)
+
+ * fcntl.h (open): Allow optional third arg.
+
+Thu Apr 14 12:54:51 1994 Stan Shebs (shebs@andros.cygnus.com)
+
+ * dir.h, dirent.h, fcntl.h, grp.h, pwd.h, stat.h: New files.
+ * sys/ioctl.h: New file.
+
+Mon Feb 21 09:44:45 1994 Stan Shebs (shebs@andros.cygnus.com)
+
+ * sys/stat.h (struct stat): New field st_rsize.
+ (S_IFMT, etc): Use different bit positions.
+ (fstat): Add parameter names to prototype.
+
+Mon Jan 31 19:30:16 1994 Stan Shebs (shebs@andros.cygnus.com)
+
+ * README: New file.
+ * utime.h, varargs.h: New files, simulated Posix.
+ * sys/{file,param,resource,stat,time,types}.h: New files, more
+ simulated Posix.
+
+
diff --git a/include/mpw/README b/include/mpw/README
new file mode 100644
index 0000000..10e92de
--- /dev/null
+++ b/include/mpw/README
@@ -0,0 +1 @@
+This is a collection of include files that help imitate Posix in MPW.
diff --git a/include/mpw/dir.h b/include/mpw/dir.h
new file mode 100644
index 0000000..e6ccd2d
--- /dev/null
+++ b/include/mpw/dir.h
@@ -0,0 +1,23 @@
+/* The <dir.h> header gives the layout of a directory. */
+
+#pragma once
+
+#ifndef _DIR_H
+#define _DIR_H
+
+#ifndef _TYPES_H /* not quite right */
+#include <sys/types.h>
+#endif
+
+#define DIRBLKSIZ 512 /* size of directory block */
+
+#ifndef DIRSIZ
+#define DIRSIZ 14
+#endif
+
+struct direct {
+ ino_t d_ino;
+ char d_name[DIRSIZ];
+};
+
+#endif /* _DIR_H */
diff --git a/include/mpw/dirent.h b/include/mpw/dirent.h
new file mode 100644
index 0000000..38000b2
--- /dev/null
+++ b/include/mpw/dirent.h
@@ -0,0 +1,31 @@
+#ifndef __dirent_h
+#define __dirent_h
+
+#include "sys/dir.h"
+
+struct dirent {
+ long d_ino; /* inode number of entry */
+ off_t d_off; /* offset of disk directory entry */
+ unsigned short d_reclen; /* length of this record */
+ char d_name[1]; /* name of file */
+};
+
+/*
+#define DIRENTBASESIZE \
+ (((struct dirent *) 0)->d_name - (char *) 0)
+#define DIRENTSIZE(namelen) \
+ ((DIRENTBASESIZE + (namelen) + NBPW) & ~(NBPW - 1))
+*/
+
+/* from Mips posix/dirent.h */
+
+/*
+#undef rewinddir
+*/
+
+extern DIR *opendir();
+extern struct dirent *readdir();
+extern void rewinddir();
+extern int closedir();
+
+#endif /* ! __dirent_h */
diff --git a/include/mpw/fcntl.h b/include/mpw/fcntl.h
new file mode 100644
index 0000000..30999b4
--- /dev/null
+++ b/include/mpw/fcntl.h
@@ -0,0 +1,124 @@
+/*
+ * FCntl.h -- faccess(), fcntl(), and open() mode flags
+ *
+ * Portions copyright American Telephone & Telegraph
+ * Used with permission, Apple Computer Inc. (1985,1988,1990,1992)
+ * All rights reserved.
+ */
+
+#ifndef __FCNTL__
+#define __FCNTL__
+
+#ifndef __TYPES__
+#include <Types.h>
+#endif
+
+/*
+ * For use by lseek():
+ */
+
+#ifndef __STDIO__ /* these defns exactly paralled in StdIO.h for fseek() */
+#define SEEK_CUR 1
+#define SEEK_END 2
+#define SEEK_SET 0
+#endif
+
+/*
+ * faccess() commands; for general use
+ */
+ /* 'd' => "directory" ops */
+#define F_DELETE (('d'<<8)|0x01)
+#define F_RENAME (('d'<<8)|0x02)
+
+/*
+ * more faccess() commands; for use only by MPW tools
+ */
+
+#define F_OPEN (('d'<<8)|0x00) /* reserved for operating system use */
+ /* 'e' => "editor" ops */
+#define F_GTABINFO (('e'<<8)|0x00) /* get tab offset for file */
+#define F_STABINFO (('e'<<8)|0x01) /* set " " " " */
+#define F_GFONTINFO (('e'<<8)|0x02) /* get font number and size for file */
+#define F_SFONTINFO (('e'<<8)|0x03) /* set " " " " " " */
+#define F_GPRINTREC (('e'<<8)|0x04) /* get print record for file */
+#define F_SPRINTREC (('e'<<8)|0x05) /* set " " " " */
+#define F_GSELINFO (('e'<<8)|0x06) /* get selection information for file */
+#define F_SSELINFO (('e'<<8)|0x07) /* set " " " " */
+#define F_GWININFO (('e'<<8)|0x08) /* get current window position */
+#define F_SWININFO (('e'<<8)|0x09) /* set " " " */
+#define F_GSCROLLINFO (('e'<<8)|0x0A) /* get scroll information */
+#define F_SSCROLLINFO (('e'<<8)|0x0B) /* set " " */
+#define F_GMARKER (('e'<<8)|0x0D) /* Get Marker */
+#define F_SMARKER (('e'<<8)|0x0C) /* Set " */
+#define F_GSAVEONCLOSE (('e'<<8)|0x0F) /* Get Save on close */
+#define F_SSAVEONCLOSE (('e'<<8)|0x0E) /* Set " " " */
+
+/*
+ * argument structures used by various faccess() commands
+ */
+
+struct MarkElement {
+ int start; /* start position of mark */
+ int end; /* end position */
+ unsigned char charCount; /* number of chars in mark name */
+ char name[64]; /* mark name */
+} ; /* note: marker names may be up to 64 characters long */
+
+#ifndef __cplusplus
+typedef struct MarkElement MarkElement;
+#endif
+
+struct SelectionRecord {
+ long startingPos;
+ long endingPos;
+ long displayTop;
+};
+
+#ifndef __cplusplus
+typedef struct SelectionRecord SelectionRecord;
+#endif
+
+
+/*
+ * Mode values accessible to open()
+ */
+#define O_RDONLY 0 /* Bits 0 and 1 are used internally */
+#define O_WRONLY 1 /* Values 0..2 are historical */
+#define O_RDWR 2 /* NOTE: it goes 0, 1, 2, *!* 8, 16, 32, ... */
+#define O_APPEND (1<< 3) /* append (writes guaranteed at the end) */
+#define O_RSRC (1<< 4) /* Open the resource fork */
+#define O_ALIAS (1<< 5) /* Open alias file */
+#define O_CREAT (1<< 8) /* Open with file create */
+#define O_TRUNC (1<< 9) /* Open with truncation */
+#define O_EXCL (1<<10) /* w/ O_CREAT: Exclusive "create-only" */
+#define O_BINARY (1<<11) /* Open as a binary stream */
+#define O_NRESOLVE (1<<14) /* Don't resolve any aliases */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * function prototypes
+ */
+int close(int);
+int creat(const char*);
+int dup(int filedes); /* OBSOLETE: fcntl(filedes, F_DUPFD, 0) is preferred */
+int faccess(char*, unsigned int, long*);
+int fcntl(int, unsigned int, int);
+long lseek(int, long, int);
+int open(const char*, int, ...);
+int read(int, char*, unsigned);
+int unlink(char*);
+int write(int, const char*, unsigned);
+
+#ifdef __cplusplus
+}
+#endif
+
+/*
+ * fcntl() commands
+ */
+#define F_DUPFD 0 /* Duplicate files (file descriptor) */
+
+#endif __FCNTL__
diff --git a/include/mpw/grp.h b/include/mpw/grp.h
new file mode 100644
index 0000000..faf2c6a
--- /dev/null
+++ b/include/mpw/grp.h
@@ -0,0 +1,10 @@
+#pragma once
+
+#include "sys/types.h"
+
+struct group {
+ char *gr_name;
+ gid_t gr_gid;
+ char *gr_passwd;
+ char **gr_mem;
+};
diff --git a/include/mpw/mpw.h b/include/mpw/mpw.h
new file mode 100644
index 0000000..58702e7
--- /dev/null
+++ b/include/mpw/mpw.h
@@ -0,0 +1,130 @@
+/* Mac MPW host-specific definitions. */
+
+#ifndef __INCLUDE_MPW_H
+#define __INCLUDE_MPW_H
+
+#ifndef MPW
+#define MPW
+#endif
+
+/* MPW C is basically ANSI, but doesn't actually enable __STDC__,
+ nor does it allow __STDC__ to be #defined. */
+
+#ifndef ALMOST_STDC
+#define ALMOST_STDC
+#endif
+
+#include <stdio.h>
+#include <ctype.h>
+#include <errno.h>
+
+#define HAVE_TIME_T_IN_TIME_H 1
+
+#define HAVE_STDLIB_H 1
+
+#define HAVE_ERRNO_H 1
+
+#define HAVE_STDDEF_H 1
+
+#define HAVE_STRING_H 1
+
+#define HAVE_STDARG_H 1
+
+#define HAVE_VPRINTF 1
+
+#ifdef USE_MW_HEADERS
+
+#include <unix.h>
+
+#else
+
+#include <fcntl.h>
+#include <ioctl.h>
+#include <sys/stat.h>
+
+#define HAVE_FCNTL_H 1
+
+#ifndef O_ACCMODE
+#define O_ACCMODE (O_RDONLY | O_WRONLY | O_RDWR)
+#endif
+
+#ifndef fileno
+#define fileno(fp) ((fp)->_file)
+#endif
+
+/* stdio.h does not define this if __STDC__, so define here. */
+
+#ifdef __STDC__
+FILE *fdopen(int fildes, const char *mode);
+#endif
+
+#endif /* USE_MW_HEADERS */
+
+/* Add ersatz definitions, for systems that lack them. */
+
+#ifndef EIO
+#define EIO 96
+#endif
+#ifndef ENOENT
+#define ENOENT 97
+#endif
+#ifndef EACCES
+#define EACCES 98
+#endif
+#ifndef ENOSYS
+#define ENOSYS 99
+#endif
+
+#ifndef R_OK
+#define R_OK 4
+#define W_OK 2
+#define X_OK 1
+#endif
+
+/* Binary files have different characteristics; for instance, no cr/nl
+ translation. */
+
+#define USE_BINARY_FOPEN
+
+#include <spin.h>
+
+#ifdef MPW_C
+#undef __PTR_TO_INT
+#define __PTR_TO_INT(P) ((int)(P))
+#undef __INT_TO_PTR
+#define __INT_TO_PTR(P) ((char *)(P))
+#endif /* MPW_C */
+
+#define NO_FCNTL
+
+int fstat ();
+
+FILE *mpw_fopen ();
+int mpw_fseek ();
+int mpw_fread ();
+int mpw_fwrite ();
+int mpw_access ();
+int mpw_open ();
+int mpw_creat ();
+void mpw_abort (void);
+
+/* Map these standard functions to improved versions in libiberty. */
+
+#define fopen mpw_fopen
+#define fseek mpw_fseek
+#define fread mpw_fread
+#define fwrite mpw_fwrite
+#define open mpw_open
+#define access mpw_access
+#define creat mpw_creat
+#define abort mpw_abort
+
+#define POSIX_UTIME
+
+#define LOSING_TOTALLY
+
+/* Define this so that files will be closed before being unlinked. */
+
+#define CLOSE_BEFORE_UNLINK
+
+#endif /* __INCLUDE_MPW_H */
diff --git a/include/mpw/pwd.h b/include/mpw/pwd.h
new file mode 100644
index 0000000..2d4fb70
--- /dev/null
+++ b/include/mpw/pwd.h
@@ -0,0 +1,15 @@
+#ifndef __pwd_h
+#define __pwd_h
+
+#include <sys/types.h>
+
+struct passwd {
+ char *pw_name;
+ uid_t pw_uid;
+ gid_t pw_gid;
+ char *pw_dir;
+ char *pw_shell;
+ char *pw_passwd;
+};
+
+#endif /* ! __pwd_h */
diff --git a/include/mpw/spin.h b/include/mpw/spin.h
new file mode 100644
index 0000000..867d145
--- /dev/null
+++ b/include/mpw/spin.h
@@ -0,0 +1,64 @@
+/* Progress macros that use SpinCursor in MPW.
+ Copyright (C) 1994 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _SPIN_H
+#define _SPIN_H
+
+/* For MPW, progress macros just need to "spin the cursor" frequently,
+ preferably several times per second on a 68K Mac. */
+
+/* In order to determine if we're meeting the goal, define this macro
+ and information about frequency of spinning will be collected and
+ displayed. */
+
+#define SPIN_MEASUREMENT
+
+#include <CursorCtl.h>
+
+/* Programs use this macro to indicate the start of a lengthy
+ activity. STR identifies the particular activity, while N
+ indicates the expected duration, in unspecified units. If N is
+ zero, then the expected time to completion is unknown. */
+
+#undef START_PROGRESS
+#define START_PROGRESS(STR,N) mpw_start_progress (STR, N, __FILE__, __LINE__);
+
+/* Programs use this macro to indicate that progress has been made on a
+ lengthy activity. */
+
+#undef PROGRESS
+#ifdef SPIN_MEASUREMENT
+#define PROGRESS(X) mpw_progress_measured (X, __FILE__, __LINE__);
+#else
+#define PROGRESS(X) mpw_progress (X);
+#endif
+
+/* Programs use this macro to indicate the end of a lengthy activity.
+ STR must match a STR passed to START_PROGRESS previously. */
+
+#undef END_PROGRESS
+#define END_PROGRESS(STR) mpw_end_progress (STR, __FILE__, __LINE__);
+
+extern void mpw_start_progress (char *, int, char *, int);
+
+extern void mpw_progress (int);
+
+extern void mpw_progress_measured (int, char *, int);
+
+extern void mpw_end_progress (char *, char *, int);
+
+#endif /* _SPIN_H */
diff --git a/include/mpw/stat.h b/include/mpw/stat.h
new file mode 100644
index 0000000..057b8d5
--- /dev/null
+++ b/include/mpw/stat.h
@@ -0,0 +1,75 @@
+/* The <sys/stat.h> header defines a struct that is used in the stat() and
+ * fstat functions. The information in this struct comes from the i-node of
+ * some file. These calls are the only approved way to inspect i-nodes.
+ */
+
+#ifndef _STAT_H
+#define _STAT_H
+
+#ifndef _TYPES_H /* not quite right */
+#include <sys/types.h>
+#endif
+
+struct stat {
+ dev_t st_dev; /* major/minor device number */
+ ino_t st_ino; /* i-node number */
+ mode_t st_mode; /* file mode, protection bits, etc. */
+ short int st_nlink; /* # links; TEMPORARY HACK: should be nlink_t*/
+ uid_t st_uid; /* uid of the file's owner */
+ short int st_gid; /* gid; TEMPORARY HACK: should be gid_t */
+ dev_t st_rdev;
+ off_t st_size; /* file size */
+ time_t st_atime; /* time of last access */
+ time_t st_mtime; /* time of last data modification */
+ time_t st_ctime; /* time of last file status change */
+};
+
+/* Traditional mask definitions for st_mode. */
+#define S_IFMT 0170000 /* type of file */
+#define S_IFREG 0100000 /* regular */
+#define S_IFBLK 0060000 /* block special */
+#define S_IFDIR 0040000 /* directory */
+#define S_IFCHR 0020000 /* character special */
+#define S_IFIFO 0010000 /* this is a FIFO */
+#define S_ISUID 0004000 /* set user id on execution */
+#define S_ISGID 0002000 /* set group id on execution */
+ /* next is reserved for future use */
+#define S_ISVTX 01000 /* save swapped text even after use */
+
+/* POSIX masks for st_mode. */
+#define S_IRWXU 00700 /* owner: rwx------ */
+#define S_IRUSR 00400 /* owner: r-------- */
+#define S_IWUSR 00200 /* owner: -w------- */
+#define S_IXUSR 00100 /* owner: --x------ */
+
+#define S_IRWXG 00070 /* group: ---rwx--- */
+#define S_IRGRP 00040 /* group: ---r----- */
+#define S_IWGRP 00020 /* group: ----w---- */
+#define S_IXGRP 00010 /* group: -----x--- */
+
+#define S_IRWXO 00007 /* others: ------rwx */
+#define S_IROTH 00004 /* others: ------r-- */
+#define S_IWOTH 00002 /* others: -------w- */
+#define S_IXOTH 00001 /* others: --------x */
+
+/* The following macros test st_mode (from POSIX Sec. 5.6.1.1. */
+#define S_ISREG(m) ((m & S_IFMT) == S_IFREG) /* is a reg file */
+#define S_ISDIR(m) ((m & S_IFMT) == S_IFDIR) /* is a directory */
+#define S_ISCHR(m) ((m & S_IFMT) == S_IFCHR) /* is a char spec */
+#define S_ISBLK(m) ((m & S_IFMT) == S_IFBLK) /* is a block spec */
+#define S_ISFIFO(m) ((m & S_IFMT) == S_IFIFO) /* is a pipe/FIFO */
+
+
+/* Function Prototypes. */
+#ifndef _ANSI_H
+#include <ansi.h>
+#endif
+
+_PROTOTYPE( int chmod, (const char *_path, int _mode) );
+_PROTOTYPE( int fstat, (int _fildes, struct stat *_buf) );
+_PROTOTYPE( int mkdir, (const char *_path, int _mode) );
+_PROTOTYPE( int mkfifo, (const char *_path, int _mode) );
+_PROTOTYPE( int stat , (const char *_path, struct stat *_buf) );
+_PROTOTYPE( mode_t umask, (int _cmask) );
+
+#endif /* _STAT_H */
diff --git a/include/mpw/sys/file.h b/include/mpw/sys/file.h
new file mode 100644
index 0000000..40a8c17
--- /dev/null
+++ b/include/mpw/sys/file.h
@@ -0,0 +1 @@
+/* empty */
diff --git a/include/mpw/sys/param.h b/include/mpw/sys/param.h
new file mode 100644
index 0000000..40a8c17
--- /dev/null
+++ b/include/mpw/sys/param.h
@@ -0,0 +1 @@
+/* empty */
diff --git a/include/mpw/sys/resource.h b/include/mpw/sys/resource.h
new file mode 100644
index 0000000..d39439d
--- /dev/null
+++ b/include/mpw/sys/resource.h
@@ -0,0 +1,9 @@
+#ifndef __SYS_RESOURCE_H__
+#define __SYS_RESOURCE_H__
+
+struct rusage {
+ struct timeval ru_utime;
+ struct timeval ru_stime;
+};
+
+#endif /* __SYS_RESOURCE_H__ */
diff --git a/include/mpw/sys/stat.h b/include/mpw/sys/stat.h
new file mode 100644
index 0000000..b65c72e
--- /dev/null
+++ b/include/mpw/sys/stat.h
@@ -0,0 +1,44 @@
+/* Imitation sys/stat.h. */
+
+#ifndef __SYS_STAT_H__
+#define __SYS_STAT_H__
+
+#include <sys/types.h>
+#include <time.h>
+
+struct stat {
+ dev_t st_dev;
+ ino_t st_ino;
+ mode_t st_mode;
+ short st_nlink;
+ uid_t st_uid;
+ gid_t st_gid;
+ dev_t st_rdev;
+ off_t st_size;
+ off_t st_rsize;
+ time_t st_atime;
+ int st_spare1;
+ time_t st_mtime;
+ int st_spare2;
+ time_t st_ctime;
+ int st_spare3;
+ long st_blksize;
+ long st_blocks;
+ long st_spare4[2];
+};
+
+#define S_IFMT 0170000L
+#define S_IFDIR 0040000L
+#define S_IFREG 0100000L
+#define S_IREAD 0400
+#define S_IWRITE 0200
+#define S_IEXEC 0100
+
+#define S_IFIFO 010000 /* FIFO special */
+#define S_IFCHR 020000 /* character special */
+#define S_IFBLK 030000 /* block special */
+
+int stat (char *path, struct stat *buf);
+int fstat (int fd, struct stat *buf);
+
+#endif /* __SYS_STAT_H___ */
diff --git a/include/mpw/sys/time.h b/include/mpw/sys/time.h
new file mode 100644
index 0000000..f9e4852
--- /dev/null
+++ b/include/mpw/sys/time.h
@@ -0,0 +1,13 @@
+/* Imitation sys/time.h. */
+
+#ifndef __SYS_TIME_H__
+#define __SYS_TIME_H__
+
+#include <time.h>
+
+struct timeval {
+ long tv_sec;
+ long tv_usec;
+};
+
+#endif /* __SYS_TIME_H__ */
diff --git a/include/mpw/sys/types.h b/include/mpw/sys/types.h
new file mode 100644
index 0000000..d7d9c9f
--- /dev/null
+++ b/include/mpw/sys/types.h
@@ -0,0 +1,15 @@
+/* Imitation sys/types.h. */
+
+#ifndef __SYS_TYPES_H__
+#define __SYS_TYPES_H__
+
+#include <Types.h>
+
+typedef short dev_t;
+typedef short ino_t;
+typedef unsigned short mode_t;
+typedef unsigned short uid_t;
+typedef unsigned short gid_t;
+typedef long off_t;
+
+#endif /* __SYS_TYPES_H__ */
diff --git a/include/mpw/utime.h b/include/mpw/utime.h
new file mode 100644
index 0000000..e8bf66f2
--- /dev/null
+++ b/include/mpw/utime.h
@@ -0,0 +1,7 @@
+
+struct utimbuf {
+ time_t actime;
+ time_t modtime;
+};
+
+int utime (char *, struct utimbuf *);
diff --git a/include/mpw/varargs.h b/include/mpw/varargs.h
new file mode 100644
index 0000000..acb9e45
--- /dev/null
+++ b/include/mpw/varargs.h
@@ -0,0 +1,9 @@
+/* varargs.h. */
+#ifndef __va_list__
+#define __va_list__
+typedef char *va_list;
+#endif
+#define va_dcl int va_alist;
+#define va_start(list) list = (char *) &va_alist
+#define va_end(list)
+#define va_arg(list,mode) ((mode *)(list += sizeof(mode)))[-1]
diff --git a/include/nlm/ChangeLog b/include/nlm/ChangeLog
new file mode 100644
index 0000000..d9ea3d0
--- /dev/null
+++ b/include/nlm/ChangeLog
@@ -0,0 +1,83 @@
+Fri May 6 13:31:04 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * external.h (nlmNAME(External_Custom_Header)): Add length,
+ dataOffset, and dataStamp field.
+ (nlmNAME(External_Cygnus_Ext_Header)): Remove.
+ * internal.h (Nlm_Internal_Custom_Header): Add hdrLength,
+ dataOffset, dataStamp and hdr fields.
+
+Fri Apr 22 11:12:39 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * external.h (struct nlmNAME(external_cygnus_ext_header)): Rename
+ from nlmNAME(external_cygnus_section_header). Change stamp field
+ to 8 bytes. Add bytes field.
+ * internal.h (nlm_internal_cygnus_ext_header): Rename from
+ nlm_internal_cygnus_section_header. Change stamp field to 8
+ bytes.
+
+Thu Apr 21 11:57:09 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * internal.h (struct nlm_internal_cygnus_section_header): Define.
+ * external.h (struct nlmNAME(external_cygnus_section_header):
+ Define.
+
+Wed Apr 20 14:27:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * internal.h (struct nlm_internal_custom_header): Remove
+ debugRecOffset and debugRecLength fields. Add data field.
+ * external.h (struct nlmNAME(external_custom_header)): Remove
+ debugRecOffset and debugRecLength fields.
+
+Mon Feb 7 08:28:40 1994 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * internal.h: Change HOST_64_BIT to BFD_HOST_64_BIT.
+
+Thu Dec 2 14:14:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * alpha-ext.h: New file describing formats of information in Alpha
+ NetWare files.
+ * common.h: Define some non-external Alpha information.
+
+Wed Nov 17 17:38:58 1993 Sean Eric Fagan (sef@cygnus.com)
+
+ * external.h: Don't define external_fixed_header here.
+ * i386-ext.h, sparc32-ext.h: New header files to define
+ external_fixed_header for particular CPU's.
+
+Wed Oct 27 11:45:56 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * internal.h (Nlm_Internal_Extended_Header): Added fields
+ sharedDebugRecordOffset and sharedDebugRecordCount.
+ * external.h (NlmNAME(External_Extended_Header)): Likewise.
+
+ * common.h (NLM_SIGNATURE): Do not define (it's different for each
+ backend).
+
+Tue Aug 31 13:24:15 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * internal.h: Change length fields of type char to type unsigned
+ char.
+
+Sat Jul 31 02:12:14 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * common.h (NLM_HIBIT, NLM_HEADER_VERSION): Define.
+
+Thu Jul 22 16:09:47 1993 Fred Fish (fnf@deneb.cygnus.com)
+
+ * common.h (NLM_CAT*, NLM_ARCH_SIZE, NLM_TARGET_LONG_SIZE,
+ NLM_TARGET_ADDRESS_SIZE, NLM_NAME, NlmNAME, nlmNAME): New
+ macros.
+ * external.h (TARGET_LONG_SIZE, TARGET_ADDRESS_SIZE): Remove
+ macros, convert usages to NLM_ equivalents.
+ * external.h: Use nlmNAME and NlmNAME macros to derive both
+ 32 and 64 bit versions.
+
+Mon Jul 19 22:12:40 1993 Fred Fish (fnf@deneb.cygnus.com)
+
+ * (common.h, external.h, internal.h): New files for NLM/NetWare
+ support.
+
+
+Local Variables:
+version-control: never
+End:
diff --git a/include/nlm/alpha-ext.h b/include/nlm/alpha-ext.h
new file mode 100644
index 0000000..37199dd
--- /dev/null
+++ b/include/nlm/alpha-ext.h
@@ -0,0 +1,166 @@
+/* Alpha NLM (NetWare Loadable Module) support for BFD.
+ Copyright (C) 1993 Free Software Foundation, Inc.
+ By Ian Lance Taylor, Cygnus Support
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* An Alpha NLM starts with an instance of this structure. */
+
+struct nlm32_alpha_external_prefix_header
+{
+ /* Magic number. Must be NLM32_ALPHA_MAGIC. */
+ unsigned char magic[4];
+ /* Format descriptor. Current value is 2. */
+ unsigned char format[4];
+ /* Size of prefix header. */
+ unsigned char size[4];
+ /* Padding. */
+ unsigned char pad1[4];
+ /* More fields may be added later, supposedly. */
+};
+
+/* The external format of an Alpha NLM reloc. This is the same as an
+ Alpha ECOFF reloc. */
+
+struct nlm32_alpha_external_reloc
+{
+ unsigned char r_vaddr[8];
+ unsigned char r_symndx[4];
+ unsigned char r_bits[4];
+};
+
+/* Constants to unpack the r_bits field of a reloc. */
+
+#define RELOC_BITS0_TYPE_LITTLE 0xff
+#define RELOC_BITS0_TYPE_SH_LITTLE 0
+
+#define RELOC_BITS1_EXTERN_LITTLE 0x01
+
+#define RELOC_BITS1_OFFSET_LITTLE 0x7e
+#define RELOC_BITS1_OFFSET_SH_LITTLE 1
+
+#define RELOC_BITS1_RESERVED_LITTLE 0x80
+#define RELOC_BITS1_RESERVED_SH_LITTLE 7
+#define RELOC_BITS2_RESERVED_LITTLE 0xff
+#define RELOC_BITS2_RESERVED_SH_LEFT_LITTLE 1
+#define RELOC_BITS3_RESERVED_LITTLE 0x03
+#define RELOC_BITS3_RESERVED_SH_LEFT_LITTLE 9
+
+#define RELOC_BITS3_SIZE_LITTLE 0xfc
+#define RELOC_BITS3_SIZE_SH_LITTLE 2
+
+/* The external format of the fixed header. */
+
+typedef struct nlm32_alpha_external_fixed_header
+{
+
+ /* The signature field identifies the file as an NLM. It must contain
+ the signature string, which depends upon the NLM target. */
+
+ unsigned char signature[24];
+
+ /* The version of the header. At this time, the highest version number
+ is 4. */
+
+ unsigned char version[4];
+
+ /* The name of the module, which must be a DOS name (1-8 characters followed
+ by a period and a 1-3 character extension). The first byte is the byte
+ length of the name and the last byte is a null terminator byte. This
+ field is fixed length, and any unused bytes should be null bytes. The
+ value is set by the OUTPUT keyword to NLMLINK. */
+
+ unsigned char moduleName[14];
+
+ /* Padding to make it come out correct. */
+
+ unsigned char pad1[2];
+
+ /* The byte offset of the code image from the start of the file. */
+
+ unsigned char codeImageOffset[4];
+
+ /* The size of the code image, in bytes. */
+
+ unsigned char codeImageSize[4];
+
+ /* The byte offset of the data image from the start of the file. */
+
+ unsigned char dataImageOffset[4];
+
+ /* The size of the data image, in bytes. */
+
+ unsigned char dataImageSize[4];
+
+ /* The size of the uninitialized data region that the loader is to be
+ allocated at load time. Uninitialized data follows the initialized
+ data in the NLM address space. */
+
+ unsigned char uninitializedDataSize[4];
+
+ /* The byte offset of the custom data from the start of the file. The
+ custom data is set by the CUSTOM keyword to NLMLINK. It is possible
+ for this to be EOF if there is no custom data. */
+
+ unsigned char customDataOffset[4];
+
+ /* The size of the custom data, in bytes. */
+
+ unsigned char customDataSize[4];
+
+ /* The byte offset of the module dependencies from the start of the file.
+ The module dependencies are determined by the MODULE keyword in
+ NLMLINK. */
+
+ unsigned char moduleDependencyOffset[4];
+
+ /* The number of module dependencies at the moduleDependencyOffset. */
+
+ unsigned char numberOfModuleDependencies[4];
+
+ /* The byte offset of the relocation fixup data from the start of the file */
+
+ unsigned char relocationFixupOffset[4];
+
+ unsigned char numberOfRelocationFixups[4];
+
+ unsigned char externalReferencesOffset[4];
+
+ unsigned char numberOfExternalReferences[4];
+
+ unsigned char publicsOffset[4];
+
+ unsigned char numberOfPublics[4];
+
+ /* The byte offset of the internal debug info from the start of the file.
+ It is possible for this to be EOF if there is no debug info. */
+
+ unsigned char debugInfoOffset[4];
+
+ unsigned char numberOfDebugRecords[4];
+
+ unsigned char codeStartOffset[4];
+
+ unsigned char exitProcedureOffset[4];
+
+ unsigned char checkUnloadProcedureOffset[4];
+
+ unsigned char moduleType[4];
+
+ unsigned char flags[4];
+
+} Nlm32_alpha_External_Fixed_Header;
diff --git a/include/nlm/common.h b/include/nlm/common.h
new file mode 100644
index 0000000..e96550a
--- /dev/null
+++ b/include/nlm/common.h
@@ -0,0 +1,124 @@
+/* NLM (NetWare Loadable Module) support for BFD.
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+ Written by Fred Fish @ Cygnus Support
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+/* This file is part of NLM support for BFD, and contains the portions
+ that are common to both the internal and external representations. */
+
+/* Semi-portable string concatenation in cpp.
+ The NLM_CAT4 hack is to avoid a problem with some strict ANSI C
+ preprocessors. The problem is, "32_" or "64_" are not a valid
+ preprocessing tokens, and we don't want extra underscores (e.g.,
+ "nlm_32_"). The XNLM_CAT2 macro will cause the inner NLM_CAT macros
+ to be evaluated first, producing still-valid pp-tokens. Then the
+ final concatenation can be done. (Sigh.) */
+
+#ifdef SABER
+# define NLM_CAT(a,b) a##b
+# define NLM_CAT3(a,b,c) a##b##c
+# define NLM_CAT4(a,b,c,d) a##b##c##d
+#else
+# ifdef __STDC__
+# define NLM_CAT(a,b) a##b
+# define NLM_CAT3(a,b,c) a##b##c
+# define XNLM_CAT2(a,b) NLM_CAT(a,b)
+# define NLM_CAT4(a,b,c,d) XNLM_CAT2(NLM_CAT(a,b),NLM_CAT(c,d))
+# else
+# define NLM_CAT(a,b) a/**/b
+# define NLM_CAT3(a,b,c) a/**/b/**/c
+# define NLM_CAT4(a,b,c,d) a/**/b/**/c/**/d
+# endif
+#endif
+
+/* If NLM_ARCH_SIZE is not defined, default to 32. NLM_ARCH_SIZE is
+ optionally defined by the application. */
+
+#ifndef NLM_ARCH_SIZE
+# define NLM_ARCH_SIZE 32
+#endif
+
+#if NLM_ARCH_SIZE == 32
+# define NLM_TARGET_LONG_SIZE 4
+# define NLM_TARGET_ADDRESS_SIZE 4
+# define NLM_NAME(x,y) NLM_CAT4(x,32,_,y)
+# define NLM_HIBIT (((bfd_vma) 1) << 31)
+#endif
+#if NLM_ARCH_SIZE == 64
+# define NLM_TARGET_LONG_SIZE 8
+# define NLM_TARGET_ADDRESS_SIZE 8
+# define NLM_NAME(x,y) NLM_CAT4(x,64,_,y)
+# define NLM_HIBIT (((bfd_vma) 1) << 63)
+#endif
+
+#define NlmNAME(X) NLM_NAME(Nlm,X)
+#define nlmNAME(X) NLM_NAME(nlm,X)
+
+/* Give names to things that should not change. */
+
+#define NLM_MAX_DESCRIPTION_LENGTH 127
+#define NLM_MAX_SCREEN_NAME_LENGTH 71
+#define NLM_MAX_THREAD_NAME_LENGTH 71
+#define NLM_MAX_COPYRIGHT_MESSAGE_LENGTH 255
+#define NLM_OTHER_DATA_LENGTH 400 /* FIXME */
+#define NLM_OLD_THREAD_NAME_LENGTH 5
+#define NLM_SIGNATURE_SIZE 24
+#define NLM_HEADER_VERSION 4
+#define NLM_MODULE_NAME_SIZE 14
+#define NLM_DEFAULT_STACKSIZE (8 * 1024)
+
+/* Alpha information. This should probably be in a separate Alpha
+ header file, but it can't go in alpha-ext.h because some of it is
+ needed by nlmconv.c. */
+
+/* Magic number in Alpha prefix header. */
+#define NLM32_ALPHA_MAGIC (0x83561840)
+
+/* The r_type field in an Alpha reloc is one of the following values. */
+#define ALPHA_R_IGNORE 0
+#define ALPHA_R_REFLONG 1
+#define ALPHA_R_REFQUAD 2
+#define ALPHA_R_GPREL32 3
+#define ALPHA_R_LITERAL 4
+#define ALPHA_R_LITUSE 5
+#define ALPHA_R_GPDISP 6
+#define ALPHA_R_BRADDR 7
+#define ALPHA_R_HINT 8
+#define ALPHA_R_SREL16 9
+#define ALPHA_R_SREL32 10
+#define ALPHA_R_SREL64 11
+#define ALPHA_R_OP_PUSH 12
+#define ALPHA_R_OP_STORE 13
+#define ALPHA_R_OP_PSUB 14
+#define ALPHA_R_OP_PRSHIFT 15
+#define ALPHA_R_GPVALUE 16
+#define ALPHA_R_NW_RELOC 250
+
+/* A local reloc, other than ALPHA_R_GPDISP or ALPHA_R_IGNORE, must be
+ against one of these symbol indices. */
+#define ALPHA_RELOC_SECTION_TEXT 1
+#define ALPHA_RELOC_SECTION_DATA 3
+
+/* An ALPHA_R_NW_RELOC has one of these values in the size field. If
+ it is SETGP, the r_vaddr field holds the GP value to use. If it is
+ LITA, the r_vaddr field holds the address of the .lita section and
+ the r_symndx field holds the size of the .lita section. */
+#define ALPHA_R_NW_RELOC_SETGP 1
+#define ALPHA_R_NW_RELOC_LITA 2
diff --git a/include/nlm/external.h b/include/nlm/external.h
new file mode 100644
index 0000000..f77a5bb
--- /dev/null
+++ b/include/nlm/external.h
@@ -0,0 +1,174 @@
+/* NLM (NetWare Loadable Module) support for BFD.
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+ Written by Fred Fish @ Cygnus Support
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+/* This file is part of NLM support for BFD, and contains the portions
+ that describe how NLM is represented externally by the BFD library.
+ I.E. it describes the in-file representation of NLM. It requires
+ the nlm/common.h file which contains the portions that are common to
+ both the internal and external representations.
+
+ Note that an NLM header consists of three parts:
+
+ (1) A fixed length header that has specific fields of known length,
+ at specific offsets in the file.
+
+ (2) A variable length header that has specific fields in a specific
+ order, but some fields may be variable length.
+
+ (3) A auxiliary header that has various optional fields in no specific
+ order. There is no way to identify the end of the auxiliary headers
+ except by finding a header without a recognized 'stamp'.
+
+ The exact format of the fixed length header unfortunately varies
+ from one NLM target to another, due to padding. Each target
+ defines the correct external format in a separate header file.
+
+*/
+
+/* NLM Header */
+
+/* The version header is one of the optional auxiliary headers and
+ follows the fixed length and variable length NLM headers. */
+
+typedef struct nlmNAME(external_version_header)
+{
+
+ /* The header is recognized by "VeRsIoN#" in the stamp field. */
+ char stamp[8];
+
+ unsigned char majorVersion[NLM_TARGET_LONG_SIZE];
+
+ unsigned char minorVersion[NLM_TARGET_LONG_SIZE];
+
+ unsigned char revision[NLM_TARGET_LONG_SIZE];
+
+ unsigned char year[NLM_TARGET_LONG_SIZE];
+
+ unsigned char month[NLM_TARGET_LONG_SIZE];
+
+ unsigned char day[NLM_TARGET_LONG_SIZE];
+
+} NlmNAME(External_Version_Header);
+
+
+typedef struct nlmNAME(external_copyright_header)
+{
+
+ /* The header is recognized by "CoPyRiGhT=" in the stamp field. */
+
+ char stamp[10];
+
+ unsigned char copyrightMessageLength[1];
+
+ /* There is a variable length field here called 'copyrightMessage'
+ that is the length specified by copyrightMessageLength. */
+
+} NlmNAME(External_Copyright_Header);
+
+
+typedef struct nlmNAME(external_extended_header)
+{
+
+ /* The header is recognized by "MeSsAgEs" in the stamp field. */
+
+ char stamp[8];
+
+ unsigned char languageID[NLM_TARGET_LONG_SIZE];
+
+ unsigned char messageFileOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char messageFileLength[NLM_TARGET_LONG_SIZE];
+
+ unsigned char messageCount[NLM_TARGET_LONG_SIZE];
+
+ unsigned char helpFileOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char helpFileLength[NLM_TARGET_LONG_SIZE];
+
+ unsigned char RPCDataOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char RPCDataLength[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedCodeOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedCodeLength[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedDataOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedDataLength[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedRelocationFixupOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedRelocationFixupCount[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedExternalReferenceOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedExternalReferenceCount[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedPublicsOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedPublicsCount[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedDebugRecordOffset[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedDebugRecordCount[NLM_TARGET_LONG_SIZE];
+
+ unsigned char sharedInitializationOffset[NLM_TARGET_ADDRESS_SIZE];
+
+ unsigned char SharedExitProcedureOffset[NLM_TARGET_ADDRESS_SIZE];
+
+ unsigned char productID[NLM_TARGET_LONG_SIZE];
+
+ unsigned char reserved0[NLM_TARGET_LONG_SIZE];
+
+ unsigned char reserved1[NLM_TARGET_LONG_SIZE];
+
+ unsigned char reserved2[NLM_TARGET_LONG_SIZE];
+
+ unsigned char reserved3[NLM_TARGET_LONG_SIZE];
+
+ unsigned char reserved4[NLM_TARGET_LONG_SIZE];
+
+ unsigned char reserved5[NLM_TARGET_LONG_SIZE];
+
+} NlmNAME(External_Extended_Header);
+
+
+typedef struct nlmNAME(external_custom_header)
+{
+
+ /* The header is recognized by "CuStHeAd" in the stamp field. */
+ char stamp[8];
+
+ /* Length of this header. */
+ unsigned char length[NLM_TARGET_LONG_SIZE];
+
+ /* Offset to data. */
+ unsigned char dataOffset[NLM_TARGET_LONG_SIZE];
+
+ /* Length of data. */
+ unsigned char dataLength[NLM_TARGET_LONG_SIZE];
+
+ /* Stamp for this customer header--we recognize "CyGnUsEx". */
+ char dataStamp[8];
+
+} NlmNAME(External_Custom_Header);
diff --git a/include/nlm/i386-ext.h b/include/nlm/i386-ext.h
new file mode 100644
index 0000000..d33ad2d
--- /dev/null
+++ b/include/nlm/i386-ext.h
@@ -0,0 +1,116 @@
+/* i386 NLM (NetWare Loadable Module) support for BFD.
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The external format of the fixed header. */
+
+typedef struct nlm32_i386_external_fixed_header
+{
+
+ /* The signature field identifies the file as an NLM. It must contain
+ the signature string, which depends upon the NLM target. */
+
+ unsigned char signature[24];
+
+ /* The version of the header. At this time, the highest version number
+ is 4. */
+
+ unsigned char version[4];
+
+ /* The name of the module, which must be a DOS name (1-8 characters followed
+ by a period and a 1-3 character extension). The first byte is the byte
+ length of the name and the last byte is a null terminator byte. This
+ field is fixed length, and any unused bytes should be null bytes. The
+ value is set by the OUTPUT keyword to NLMLINK. */
+
+ unsigned char moduleName[14];
+
+ /* The byte offset of the code image from the start of the file. */
+
+ unsigned char codeImageOffset[4];
+
+ /* The size of the code image, in bytes. */
+
+ unsigned char codeImageSize[4];
+
+ /* The byte offset of the data image from the start of the file. */
+
+ unsigned char dataImageOffset[4];
+
+ /* The size of the data image, in bytes. */
+
+ unsigned char dataImageSize[4];
+
+ /* The size of the uninitialized data region that the loader is to be
+ allocated at load time. Uninitialized data follows the initialized
+ data in the NLM address space. */
+
+ unsigned char uninitializedDataSize[4];
+
+ /* The byte offset of the custom data from the start of the file. The
+ custom data is set by the CUSTOM keyword to NLMLINK. It is possible
+ for this to be EOF if there is no custom data. */
+
+ unsigned char customDataOffset[4];
+
+ /* The size of the custom data, in bytes. */
+
+ unsigned char customDataSize[4];
+
+ /* The byte offset of the module dependencies from the start of the file.
+ The module dependencies are determined by the MODULE keyword in
+ NLMLINK. */
+
+ unsigned char moduleDependencyOffset[4];
+
+ /* The number of module dependencies at the moduleDependencyOffset. */
+
+ unsigned char numberOfModuleDependencies[4];
+
+ /* The byte offset of the relocation fixup data from the start of the file */
+
+ unsigned char relocationFixupOffset[4];
+
+ unsigned char numberOfRelocationFixups[4];
+
+ unsigned char externalReferencesOffset[4];
+
+ unsigned char numberOfExternalReferences[4];
+
+ unsigned char publicsOffset[4];
+
+ unsigned char numberOfPublics[4];
+
+ /* The byte offset of the internal debug info from the start of the file.
+ It is possible for this to be EOF if there is no debug info. */
+
+ unsigned char debugInfoOffset[4];
+
+ unsigned char numberOfDebugRecords[4];
+
+ unsigned char codeStartOffset[4];
+
+ unsigned char exitProcedureOffset[4];
+
+ unsigned char checkUnloadProcedureOffset[4];
+
+ unsigned char moduleType[4];
+
+ unsigned char flags[4];
+
+} Nlm32_i386_External_Fixed_Header;
diff --git a/include/nlm/internal.h b/include/nlm/internal.h
new file mode 100644
index 0000000..dd27dc4
--- /dev/null
+++ b/include/nlm/internal.h
@@ -0,0 +1,309 @@
+/* NLM (NetWare Loadable Module) support for BFD.
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+ Written by Fred Fish @ Cygnus Support.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+/* This file is part of NLM support for BFD, and contains the portions
+ that describe how NLM is represented internally in the BFD library.
+ I.E. it describes the in-memory representation of NLM. It requires
+ the nlm/common.h file which contains the portions that are common to
+ both the internal and external representations. */
+
+#if 0
+
+/* Types used by various structures, functions, etc. */
+
+typedef unsigned long Nlm32_Addr; /* Unsigned program address */
+typedef unsigned long Nlm32_Off; /* Unsigned file offset */
+typedef long Nlm32_Sword; /* Signed large integer */
+typedef unsigned long Nlm32_Word; /* Unsigned large integer */
+typedef unsigned short Nlm32_Half; /* Unsigned medium integer */
+typedef unsigned char Nlm32_Char; /* Unsigned tiny integer */
+
+#ifdef BFD_HOST_64_BIT
+typedef unsigned BFD_HOST_64_BIT Nlm64_Addr;
+typedef unsigned BFD_HOST_64_BIT Nlm64_Off;
+typedef BFD_HOST_64_BIT Nlm64_Sxword;
+typedef unsigned BFD_HOST_64_BIT Nlm64_Xword;
+#endif
+typedef long Nlm64_Sword;
+typedef unsigned long Nlm64_Word;
+typedef unsigned short Nlm64_Half;
+
+#endif /* 0 */
+
+/* This structure contains the internal form of the portion of the NLM
+ header that is fixed length. */
+
+typedef struct nlm_internal_fixed_header
+{
+ /* The signature field identifies the file as an NLM. It must contain
+ the signature string, which depends upon the NLM target. */
+
+ char signature[NLM_SIGNATURE_SIZE];
+
+ /* The version of the header. At this time, the highest version number
+ is 4. */
+
+ long version;
+
+ /* The name of the module, which must be a DOS name (1-8 characters followed
+ by a period and a 1-3 character extension. The first byte is the byte
+ length of the name and the last byte is a null terminator byte. This
+ field is fixed length, and any unused bytes should be null bytes. The
+ value is set by the OUTPUT keyword to NLMLINK. */
+
+ char moduleName[NLM_MODULE_NAME_SIZE];
+
+ /* The byte offset of the code image from the start of the file. */
+
+ file_ptr codeImageOffset;
+
+ /* The size of the code image, in bytes. */
+
+ bfd_size_type codeImageSize;
+
+ /* The byte offset of the data image from the start of the file. */
+
+ file_ptr dataImageOffset;
+
+ /* The size of the data image, in bytes. */
+
+ bfd_size_type dataImageSize;
+
+ /* The size of the uninitialized data region that the loader is to be
+ allocated at load time. Uninitialized data follows the initialized
+ data in the NLM address space. */
+
+ bfd_size_type uninitializedDataSize;
+
+ /* The byte offset of the custom data from the start of the file. The
+ custom data is set by the CUSTOM keyword to NLMLINK. */
+
+ file_ptr customDataOffset;
+
+ /* The size of the custom data, in bytes. */
+
+ bfd_size_type customDataSize;
+
+ /* The byte offset of the module dependencies from the start of the file.
+ The module dependencies are determined by the MODULE keyword in
+ NLMLINK. */
+
+ file_ptr moduleDependencyOffset;
+
+ /* The number of module dependencies at the moduleDependencyOffset. */
+
+ long numberOfModuleDependencies;
+
+ /* The byte offset of the relocation fixup data from the start of the file */
+
+ file_ptr relocationFixupOffset;
+ long numberOfRelocationFixups;
+ file_ptr externalReferencesOffset;
+ long numberOfExternalReferences;
+ file_ptr publicsOffset;
+ long numberOfPublics;
+ file_ptr debugInfoOffset;
+ long numberOfDebugRecords;
+ file_ptr codeStartOffset;
+ file_ptr exitProcedureOffset;
+ file_ptr checkUnloadProcedureOffset;
+ long moduleType;
+ long flags;
+} Nlm_Internal_Fixed_Header;
+
+#define nlm32_internal_fixed_header nlm_internal_fixed_header
+#define Nlm32_Internal_Fixed_Header Nlm_Internal_Fixed_Header
+#define nlm64_internal_fixed_header nlm_internal_fixed_header
+#define Nlm64_Internal_Fixed_Header Nlm_Internal_Fixed_Header
+
+/* This structure contains the portions of the NLM header that are either
+ variable in size in the external representation, or else are not at a
+ fixed offset relative to the start of the NLM header due to preceding
+ variable sized fields.
+
+ Note that all the fields must exist in the external header, and in
+ the order used here (the same order is used in the internal form
+ for consistency, not out of necessity). */
+
+typedef struct nlm_internal_variable_header
+{
+
+ /* The descriptionLength field contains the length of the text in
+ descriptionText, excluding the null terminator. The descriptionText
+ field contains the NLM description obtained from the DESCRIPTION
+ keyword in NLMLINK plus the null byte terminator. The descriptionText
+ can be up to NLM_MAX_DESCRIPTION_LENGTH characters. */
+
+ unsigned char descriptionLength;
+ char descriptionText[NLM_MAX_DESCRIPTION_LENGTH + 1];
+
+ /* The stackSize field contains the size of the stack in bytes, as
+ specified by the STACK or STACKSIZE keyword in NLMLINK. If no size
+ is specified, the default is NLM_DEFAULT_STACKSIZE. */
+
+ long stackSize;
+
+ /* The reserved field is included only for completeness. It should contain
+ zero. */
+
+ long reserved;
+
+ /* This field is fixed length, should contain " LONG" (note leading
+ space), and is unused. */
+
+ char oldThreadName[NLM_OLD_THREAD_NAME_LENGTH];
+
+ /* The screenNameLength field contains the length of the actual text stored
+ in the screenName field, excluding the null byte terminator. The
+ screenName field contains the screen name as specified by the SCREENNAME
+ keyword in NLMLINK, and can be up to NLM_MAX_SCREEN_NAME_LENGTH
+ characters. */
+
+ unsigned char screenNameLength;
+ char screenName[NLM_MAX_SCREEN_NAME_LENGTH + 1];
+
+ /* The threadNameLength field contains the length of the actual text stored
+ in the threadName field, excluding the null byte terminator. The
+ threadName field contains the thread name as specified by the THREADNAME
+ keyword in NLMLINK, and can be up to NLM_MAX_THREAD_NAME_LENGTH
+ characters. */
+
+ unsigned char threadNameLength;
+ char threadName[NLM_MAX_THREAD_NAME_LENGTH + 1];
+
+} Nlm_Internal_Variable_Header;
+
+#define nlm32_internal_variable_header nlm_internal_variable_header
+#define Nlm32_Internal_Variable_Header Nlm_Internal_Variable_Header
+#define nlm64_internal_variable_header nlm_internal_variable_header
+#define Nlm64_Internal_Variable_Header Nlm_Internal_Variable_Header
+
+/* The version header is one of the optional auxiliary headers and
+ follows the fixed length and variable length NLM headers. */
+
+typedef struct nlm_internal_version_header
+{
+ /* The header is recognized by "VeRsIoN#" in the stamp field. */
+ char stamp[8];
+ long majorVersion;
+ long minorVersion;
+ long revision;
+ long year;
+ long month;
+ long day;
+} Nlm_Internal_Version_Header;
+
+#define nlm32_internal_version_header nlm_internal_version_header
+#define Nlm32_Internal_Version_Header Nlm_Internal_Version_Header
+#define nlm64_internal_version_header nlm_internal_version_header
+#define Nlm64_Internal_Version_Header Nlm_Internal_Version_Header
+
+typedef struct nlm_internal_copyright_header
+{
+ /* The header is recognized by "CoPyRiGhT=" in the stamp field. */
+ char stamp[10];
+ unsigned char copyrightMessageLength;
+ char copyrightMessage[NLM_MAX_COPYRIGHT_MESSAGE_LENGTH];
+} Nlm_Internal_Copyright_Header;
+
+#define nlm32_internal_copyright_header nlm_internal_copyright_header
+#define Nlm32_Internal_Copyright_Header Nlm_Internal_Copyright_Header
+#define nlm64_internal_copyright_header nlm_internal_copyright_header
+#define Nlm64_Internal_Copyright_Header Nlm_Internal_Copyright_Header
+
+typedef struct nlm_internal_extended_header
+{
+ /* The header is recognized by "MeSsAgEs" in the stamp field. */
+ char stamp[8];
+ long languageID;
+ file_ptr messageFileOffset;
+ bfd_size_type messageFileLength;
+ long messageCount;
+ file_ptr helpFileOffset;
+ bfd_size_type helpFileLength;
+ file_ptr RPCDataOffset;
+ bfd_size_type RPCDataLength;
+ file_ptr sharedCodeOffset;
+ bfd_size_type sharedCodeLength;
+ file_ptr sharedDataOffset;
+ bfd_size_type sharedDataLength;
+ file_ptr sharedRelocationFixupOffset;
+ long sharedRelocationFixupCount;
+ file_ptr sharedExternalReferenceOffset;
+ long sharedExternalReferenceCount;
+ file_ptr sharedPublicsOffset;
+ long sharedPublicsCount;
+ file_ptr sharedDebugRecordOffset;
+ long sharedDebugRecordCount;
+ bfd_vma SharedInitializationOffset;
+ bfd_vma SharedExitProcedureOffset;
+ long productID;
+ long reserved0;
+ long reserved1;
+ long reserved2;
+ long reserved3;
+ long reserved4;
+ long reserved5;
+} Nlm_Internal_Extended_Header;
+
+#define nlm32_internal_extended_header nlm_internal_extended_header
+#define Nlm32_Internal_Extended_Header Nlm_Internal_Extended_Header
+#define nlm64_internal_extended_header nlm_internal_extended_header
+#define Nlm64_Internal_Extended_Header Nlm_Internal_Extended_Header
+
+/* The format of a custom header as stored internally is different
+ from the external format. This is how we store a custom header
+ which we do not recognize. */
+
+typedef struct nlm_internal_custom_header
+{
+ /* The header is recognized by "CuStHeAd" in the stamp field. */
+ char stamp[8];
+ bfd_size_type hdrLength;
+ file_ptr dataOffset;
+ bfd_size_type dataLength;
+ char dataStamp[8];
+ PTR hdr;
+} Nlm_Internal_Custom_Header;
+
+#define nlm32_internal_custom_header nlm_internal_custom_header
+#define Nlm32_Internal_Custom_Header Nlm_Internal_Custom_Header
+#define nlm64_internal_custom_header nlm_internal_custom_header
+#define Nlm64_Internal_Custom_Header Nlm_Internal_Custom_Header
+
+/* The internal Cygnus header is written out externally as a custom
+ header. We don't try to replicate that structure here. */
+
+typedef struct nlm_internal_cygnus_ext_header
+{
+ /* The header is recognized by "CyGnUsEx" in the stamp field. */
+ char stamp[8];
+ /* File location of debugging information. */
+ file_ptr offset;
+ /* Length of debugging information. */
+ bfd_size_type length;
+} Nlm_Internal_Cygnus_Ext_Header;
+
+#define nlm32_internal_cygnus_ext_header nlm_internal_cygnus_ext_header
+#define Nlm32_Internal_Cygnus_Ext_Header Nlm_Internal_Cygnus_Ext_Header
+#define nlm64_internal_cygnus_ext_header nlm_internal_cygnus_ext_header
+#define Nlm64_Internal_Cygnus_Ext_Header Nlm_Internal_Cygnus_Ext_Header
diff --git a/include/nlm/ppc-ext.h b/include/nlm/ppc-ext.h
new file mode 100644
index 0000000..0aae107
--- /dev/null
+++ b/include/nlm/ppc-ext.h
@@ -0,0 +1,163 @@
+/* PowerPC NLM (NetWare Loadable Module) support for BFD.
+ Copyright (C) 1994 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifdef OLDFORMAT
+
+/* The format of a PowerPC NLM changed. These structures are only
+ used in the old format. */
+
+/* A PowerPC NLM starts with an instance of this structure. */
+
+struct nlm32_powerpc_external_prefix_header
+{
+ /* Signature. Must be "AppleNLM". */
+ char signature[8];
+ /* Version number. Current value is 1. */
+ unsigned char headerVersion[4];
+ /* ??. Should be set to 0. */
+ unsigned char origins[4];
+ /* File creation date in standard Unix time format (seconds since
+ 1/1/70). */
+ unsigned char date[4];
+};
+
+#define NLM32_POWERPC_SIGNATURE "AppleNLM"
+#define NLM32_POWERPC_HEADER_VERSION 1
+
+/* The external format of a PowerPC NLM reloc. This is the same as an
+ XCOFF dynamic reloc. */
+
+struct nlm32_powerpc_external_reloc
+{
+ /* Address. */
+ unsigned char l_vaddr[4];
+ /* Symbol table index. This is 0 for .text and 1 for .data. 2
+ means .bss, but I don't know if it is used. In XCOFF, larger
+ numbers are indices into the dynamic symbol table, but they are
+ presumably not used in an NLM. */
+ unsigned char l_symndx[4];
+ /* Relocation type. */
+ unsigned char l_rtype[2];
+ /* Section number being relocated. */
+ unsigned char l_rsecnm[2];
+};
+
+#endif /* OLDFORMAT */
+
+/* The external format of the fixed header. */
+
+typedef struct nlm32_powerpc_external_fixed_header
+{
+
+ /* The signature field identifies the file as an NLM. It must contain
+ the signature string, which depends upon the NLM target. */
+
+ unsigned char signature[24];
+
+ /* The version of the header. At this time, the highest version number
+ is 4. */
+
+ unsigned char version[4];
+
+ /* The name of the module, which must be a DOS name (1-8 characters followed
+ by a period and a 1-3 character extension). The first byte is the byte
+ length of the name and the last byte is a null terminator byte. This
+ field is fixed length, and any unused bytes should be null bytes. The
+ value is set by the OUTPUT keyword to NLMLINK. */
+
+ unsigned char moduleName[14];
+
+ /* Padding to make it come out correct. */
+
+ unsigned char pad1[2];
+
+ /* The byte offset of the code image from the start of the file. */
+
+ unsigned char codeImageOffset[4];
+
+ /* The size of the code image, in bytes. */
+
+ unsigned char codeImageSize[4];
+
+ /* The byte offset of the data image from the start of the file. */
+
+ unsigned char dataImageOffset[4];
+
+ /* The size of the data image, in bytes. */
+
+ unsigned char dataImageSize[4];
+
+ /* The size of the uninitialized data region that the loader is to be
+ allocated at load time. Uninitialized data follows the initialized
+ data in the NLM address space. */
+
+ unsigned char uninitializedDataSize[4];
+
+ /* The byte offset of the custom data from the start of the file. The
+ custom data is set by the CUSTOM keyword to NLMLINK. It is possible
+ for this to be EOF if there is no custom data. */
+
+ unsigned char customDataOffset[4];
+
+ /* The size of the custom data, in bytes. */
+
+ unsigned char customDataSize[4];
+
+ /* The byte offset of the module dependencies from the start of the file.
+ The module dependencies are determined by the MODULE keyword in
+ NLMLINK. */
+
+ unsigned char moduleDependencyOffset[4];
+
+ /* The number of module dependencies at the moduleDependencyOffset. */
+
+ unsigned char numberOfModuleDependencies[4];
+
+ /* The byte offset of the relocation fixup data from the start of the file */
+
+ unsigned char relocationFixupOffset[4];
+
+ unsigned char numberOfRelocationFixups[4];
+
+ unsigned char externalReferencesOffset[4];
+
+ unsigned char numberOfExternalReferences[4];
+
+ unsigned char publicsOffset[4];
+
+ unsigned char numberOfPublics[4];
+
+ /* The byte offset of the internal debug info from the start of the file.
+ It is possible for this to be EOF if there is no debug info. */
+
+ unsigned char debugInfoOffset[4];
+
+ unsigned char numberOfDebugRecords[4];
+
+ unsigned char codeStartOffset[4];
+
+ unsigned char exitProcedureOffset[4];
+
+ unsigned char checkUnloadProcedureOffset[4];
+
+ unsigned char moduleType[4];
+
+ unsigned char flags[4];
+
+} Nlm32_powerpc_External_Fixed_Header;
diff --git a/include/nlm/sparc32-ext.h b/include/nlm/sparc32-ext.h
new file mode 100644
index 0000000..0deb2de
--- /dev/null
+++ b/include/nlm/sparc32-ext.h
@@ -0,0 +1,120 @@
+/* SPARC NLM (NetWare Loadable Module) support for BFD.
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The external format of the fixed header. */
+
+typedef struct nlm32_sparc_external_fixed_header
+{
+
+ /* The signature field identifies the file as an NLM. It must contain
+ the signature string, which depends upon the NLM target. */
+
+ unsigned char signature[24];
+
+ /* The version of the header. At this time, the highest version number
+ is 4. */
+
+ unsigned char version[4];
+
+ /* The name of the module, which must be a DOS name (1-8 characters followed
+ by a period and a 1-3 character extension). The first byte is the byte
+ length of the name and the last byte is a null terminator byte. This
+ field is fixed length, and any unused bytes should be null bytes. The
+ value is set by the OUTPUT keyword to NLMLINK. */
+
+ unsigned char moduleName[14];
+
+ /* Padding to make it come out correct. */
+
+ unsigned char pad1[2];
+
+ /* The byte offset of the code image from the start of the file. */
+
+ unsigned char codeImageOffset[4];
+
+ /* The size of the code image, in bytes. */
+
+ unsigned char codeImageSize[4];
+
+ /* The byte offset of the data image from the start of the file. */
+
+ unsigned char dataImageOffset[4];
+
+ /* The size of the data image, in bytes. */
+
+ unsigned char dataImageSize[4];
+
+ /* The size of the uninitialized data region that the loader is to be
+ allocated at load time. Uninitialized data follows the initialized
+ data in the NLM address space. */
+
+ unsigned char uninitializedDataSize[4];
+
+ /* The byte offset of the custom data from the start of the file. The
+ custom data is set by the CUSTOM keyword to NLMLINK. It is possible
+ for this to be EOF if there is no custom data. */
+
+ unsigned char customDataOffset[4];
+
+ /* The size of the custom data, in bytes. */
+
+ unsigned char customDataSize[4];
+
+ /* The byte offset of the module dependencies from the start of the file.
+ The module dependencies are determined by the MODULE keyword in
+ NLMLINK. */
+
+ unsigned char moduleDependencyOffset[4];
+
+ /* The number of module dependencies at the moduleDependencyOffset. */
+
+ unsigned char numberOfModuleDependencies[4];
+
+ /* The byte offset of the relocation fixup data from the start of the file */
+
+ unsigned char relocationFixupOffset[4];
+
+ unsigned char numberOfRelocationFixups[4];
+
+ unsigned char externalReferencesOffset[4];
+
+ unsigned char numberOfExternalReferences[4];
+
+ unsigned char publicsOffset[4];
+
+ unsigned char numberOfPublics[4];
+
+ /* The byte offset of the internal debug info from the start of the file.
+ It is possible for this to be EOF if there is no debug info. */
+
+ unsigned char debugInfoOffset[4];
+
+ unsigned char numberOfDebugRecords[4];
+
+ unsigned char codeStartOffset[4];
+
+ unsigned char exitProcedureOffset[4];
+
+ unsigned char checkUnloadProcedureOffset[4];
+
+ unsigned char moduleType[4];
+
+ unsigned char flags[4];
+
+} Nlm32_sparc_External_Fixed_Header;
diff --git a/include/oasys.h b/include/oasys.h
new file mode 100644
index 0000000..867d250
--- /dev/null
+++ b/include/oasys.h
@@ -0,0 +1,152 @@
+/* Oasys object format header file for BFD.
+ Contributed by Cygnus Support. */
+
+#define OASYS_MAX_SEC_COUNT 16
+/* **** */
+
+typedef struct oasys_archive_header {
+ unsigned int version;
+ char create_date[12];
+ char revision_date[12];
+ unsigned int mod_count;
+ file_ptr mod_tbl_offset;
+ unsigned int sym_tbl_size;
+ unsigned int sym_count;
+ file_ptr sym_tbl_offset;
+ unsigned int xref_count;
+ file_ptr xref_lst_offset;
+} oasys_archive_header_type;
+
+typedef struct oasys_extarchive_header {
+ bfd_byte version[4];
+ bfd_byte create_date[12];
+ bfd_byte revision_date[12];
+ bfd_byte mod_count[4];
+ bfd_byte mod_tbl_offset[4];
+ bfd_byte sym_tbl_size[4];
+ bfd_byte sym_count[4];
+ bfd_byte sym_tbl_offset[4];
+ bfd_byte xref_count[4];
+ bfd_byte xref_lst_offset[4];
+} oasys_extarchive_header_type;
+
+typedef struct oasys_module_table {
+ int mod_number;
+ char mod_date[12];
+ unsigned int mod_size;
+ unsigned int dep_count;
+ unsigned int depee_count;
+ file_ptr file_offset;
+ unsigned int sect_count;
+ char *module_name;
+ unsigned int module_name_size;
+} oasys_module_table_type;
+
+
+typedef struct oasys_extmodule_table_a {
+ bfd_byte mod_number[4];
+ bfd_byte mod_date[12];
+ bfd_byte mod_size[4];
+ bfd_byte dep_count[4];
+ bfd_byte depee_count[4];
+ bfd_byte sect_count[4];
+ bfd_byte file_offset[4];
+ bfd_byte mod_name[32];
+} oasys_extmodule_table_type_a_type;
+
+typedef struct oasys_extmodule_table_b {
+ bfd_byte mod_number[4];
+ bfd_byte mod_date[12];
+ bfd_byte mod_size[4];
+ bfd_byte dep_count[4];
+ bfd_byte depee_count[4];
+ bfd_byte sect_count[4];
+ bfd_byte file_offset[4];
+ bfd_byte mod_name_length[4];
+} oasys_extmodule_table_type_b_type;
+
+
+typedef enum oasys_record {
+ oasys_record_is_end_enum = 0,
+ oasys_record_is_data_enum = 1,
+ oasys_record_is_symbol_enum = 2,
+ oasys_record_is_header_enum = 3,
+ oasys_record_is_named_section_enum = 4,
+ oasys_record_is_com_enum = 5,
+ oasys_record_is_debug_enum = 6,
+ oasys_record_is_section_enum = 7,
+ oasys_record_is_debug_file_enum = 8,
+ oasys_record_is_module_enum = 9,
+ oasys_record_is_local_enum = 10
+} oasys_record_enum_type;
+
+
+
+typedef struct oasys_record_header {
+ unsigned char length;
+ unsigned char check_sum;
+ unsigned char type;
+ unsigned char fill;
+} oasys_record_header_type;
+
+typedef struct oasys_data_record {
+ oasys_record_header_type header;
+ unsigned char relb;
+ bfd_byte addr[4];
+ /* maximum total size of data record is 255 bytes */
+ bfd_byte data[246];
+} oasys_data_record_type;
+
+typedef struct oasys_header_record {
+ oasys_record_header_type header;
+ unsigned char version_number;
+ unsigned char rev_number;
+ char module_name[26-6];
+ char description[64-26];
+} oasys_header_record_type;
+
+#define OASYS_VERSION_NUMBER 0
+#define OASYS_REV_NUMBER 0
+
+typedef struct oasys_symbol_record {
+ oasys_record_header_type header;
+ unsigned char relb;
+ bfd_byte value[4];
+ bfd_byte refno[2];
+ char name[64];
+} oasys_symbol_record_type;
+
+#define RELOCATION_PCREL_BIT 0x80
+#define RELOCATION_32BIT_BIT 0x40
+#define RELOCATION_TYPE_BITS 0x30
+#define RELOCATION_TYPE_ABS 0x00
+#define RELOCATION_TYPE_REL 0x10
+#define RELOCATION_TYPE_UND 0x20
+#define RELOCATION_TYPE_COM 0x30
+#define RELOCATION_SECT_BITS 0x0f
+
+typedef struct oasys_section_record {
+ oasys_record_header_type header;
+ unsigned char relb;
+ bfd_byte value[4];
+ bfd_byte vma[4];
+ bfd_byte fill[3];
+} oasys_section_record_type;
+
+typedef struct oasys_end_record {
+ oasys_record_header_type header;
+ unsigned char relb;
+ bfd_byte entry[4];
+ bfd_byte fill[2];
+ bfd_byte zero;
+} oasys_end_record_type;
+
+typedef union oasys_record_union {
+ oasys_record_header_type header;
+ oasys_data_record_type data;
+ oasys_section_record_type section;
+ oasys_symbol_record_type symbol;
+ oasys_header_record_type first;
+ oasys_end_record_type end;
+ bfd_byte pad[256];
+} oasys_record_union_type;
diff --git a/include/objalloc.h b/include/objalloc.h
new file mode 100644
index 0000000..0b451cd
--- /dev/null
+++ b/include/objalloc.h
@@ -0,0 +1,116 @@
+/* objalloc.h -- routines to allocate memory for objects
+ Copyright 1997 Free Software Foundation, Inc.
+ Written by Ian Lance Taylor, Cygnus Solutions.
+
+This program is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#ifndef OBJALLOC_H
+#define OBJALLOC_H
+
+#include "ansidecl.h"
+
+/* These routines allocate space for an object. The assumption is
+ that the object will want to allocate space as it goes along, but
+ will never want to free any particular block. There is a function
+ to free a block, which also frees all more recently allocated
+ blocks. There is also a function to free all the allocated space.
+
+ This is essentially a specialization of obstacks. The main
+ difference is that a block may not be allocated a bit at a time.
+ Another difference is that these routines are always built on top
+ of malloc, and always pass an malloc failure back to the caller,
+ unlike more recent versions of obstacks. */
+
+/* This is what an objalloc structure looks like. Callers should not
+ refer to these fields, nor should they allocate these structure
+ themselves. Instead, they should only create them via
+ objalloc_init, and only access them via the functions and macros
+ listed below. The structure is only defined here so that we can
+ access it via macros. */
+
+struct objalloc
+{
+ char *current_ptr;
+ unsigned int current_space;
+ PTR chunks;
+};
+
+/* Work out the required alignment. */
+
+struct objalloc_align { char x; double d; };
+
+#if defined (__STDC__) && __STDC__
+#ifndef offsetof
+#include <stddef.h>
+#endif
+#define OBJALLOC_ALIGN \
+ ((ptrdiff_t) ((char *) &((struct objalloc_align *) 0)->d - (char *) 0))
+#else
+#define OBJALLOC_ALIGN \
+ ((long) ((char *) &((struct objalloc_align *) 0)->d - (char *) 0))
+#endif
+
+/* Create an objalloc structure. Returns NULL if malloc fails. */
+
+extern struct objalloc *objalloc_create PARAMS ((void));
+
+/* Allocate space from an objalloc structure. Returns NULL if malloc
+ fails. */
+
+extern PTR _objalloc_alloc PARAMS ((struct objalloc *, unsigned long));
+
+/* The macro version of objalloc_alloc. We only define this if using
+ gcc, because otherwise we would have to evaluate the arguments
+ multiple times, or use a temporary field as obstack.h does. */
+
+#if defined (__GNUC__) && defined (__STDC__) && __STDC__
+
+/* NextStep 2.0 cc is really gcc 1.93 but it defines __GNUC__ = 2 and
+ does not implement __extension__. But that compiler doesn't define
+ __GNUC_MINOR__. */
+#if __GNUC__ < 2 || (__NeXT__ && !__GNUC_MINOR__)
+#define __extension__
+#endif
+
+#define objalloc_alloc(o, l) \
+ __extension__ \
+ ({ struct objalloc *__o = (o); \
+ unsigned long __len = (l); \
+ if (__len == 0) \
+ __len = 1; \
+ __len = (__len + OBJALLOC_ALIGN - 1) &~ (OBJALLOC_ALIGN - 1); \
+ (__len <= __o->current_space \
+ ? (__o->current_ptr += __len, \
+ __o->current_space -= __len, \
+ (PTR) (__o->current_ptr - __len)) \
+ : _objalloc_alloc (__o, __len)); })
+
+#else /* ! __GNUC__ */
+
+#define objalloc_alloc(o, l) _objalloc_alloc ((o), (l))
+
+#endif /* ! __GNUC__ */
+
+/* Free an entire objalloc structure. */
+
+extern void objalloc_free PARAMS ((struct objalloc *));
+
+/* Free a block allocated by objalloc_alloc. This also frees all more
+ recently allocated blocks. */
+
+extern void objalloc_free_block PARAMS ((struct objalloc *, PTR));
+
+#endif /* OBJALLOC_H */
diff --git a/include/obstack.h b/include/obstack.h
new file mode 100644
index 0000000..38e9677
--- /dev/null
+++ b/include/obstack.h
@@ -0,0 +1,593 @@
+/* obstack.h - object stack macros
+ Copyright (C) 1988,89,90,91,92,93,94,96,97,98 Free Software Foundation, Inc.
+
+
+ NOTE: The canonical source of this file is maintained with the GNU C Library.
+ Bugs can be reported to bug-glibc@gnu.org.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 2, or (at your option) any
+ later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
+ USA. */
+
+/* Summary:
+
+All the apparent functions defined here are macros. The idea
+is that you would use these pre-tested macros to solve a
+very specific set of problems, and they would run fast.
+Caution: no side-effects in arguments please!! They may be
+evaluated MANY times!!
+
+These macros operate a stack of objects. Each object starts life
+small, and may grow to maturity. (Consider building a word syllable
+by syllable.) An object can move while it is growing. Once it has
+been "finished" it never changes address again. So the "top of the
+stack" is typically an immature growing object, while the rest of the
+stack is of mature, fixed size and fixed address objects.
+
+These routines grab large chunks of memory, using a function you
+supply, called `obstack_chunk_alloc'. On occasion, they free chunks,
+by calling `obstack_chunk_free'. You must define them and declare
+them before using any obstack macros.
+
+Each independent stack is represented by a `struct obstack'.
+Each of the obstack macros expects a pointer to such a structure
+as the first argument.
+
+One motivation for this package is the problem of growing char strings
+in symbol tables. Unless you are "fascist pig with a read-only mind"
+--Gosper's immortal quote from HAKMEM item 154, out of context--you
+would not like to put any arbitrary upper limit on the length of your
+symbols.
+
+In practice this often means you will build many short symbols and a
+few long symbols. At the time you are reading a symbol you don't know
+how long it is. One traditional method is to read a symbol into a
+buffer, realloc()ating the buffer every time you try to read a symbol
+that is longer than the buffer. This is beaut, but you still will
+want to copy the symbol from the buffer to a more permanent
+symbol-table entry say about half the time.
+
+With obstacks, you can work differently. Use one obstack for all symbol
+names. As you read a symbol, grow the name in the obstack gradually.
+When the name is complete, finalize it. Then, if the symbol exists already,
+free the newly read name.
+
+The way we do this is to take a large chunk, allocating memory from
+low addresses. When you want to build a symbol in the chunk you just
+add chars above the current "high water mark" in the chunk. When you
+have finished adding chars, because you got to the end of the symbol,
+you know how long the chars are, and you can create a new object.
+Mostly the chars will not burst over the highest address of the chunk,
+because you would typically expect a chunk to be (say) 100 times as
+long as an average object.
+
+In case that isn't clear, when we have enough chars to make up
+the object, THEY ARE ALREADY CONTIGUOUS IN THE CHUNK (guaranteed)
+so we just point to it where it lies. No moving of chars is
+needed and this is the second win: potentially long strings need
+never be explicitly shuffled. Once an object is formed, it does not
+change its address during its lifetime.
+
+When the chars burst over a chunk boundary, we allocate a larger
+chunk, and then copy the partly formed object from the end of the old
+chunk to the beginning of the new larger chunk. We then carry on
+accreting characters to the end of the object as we normally would.
+
+A special macro is provided to add a single char at a time to a
+growing object. This allows the use of register variables, which
+break the ordinary 'growth' macro.
+
+Summary:
+ We allocate large chunks.
+ We carve out one object at a time from the current chunk.
+ Once carved, an object never moves.
+ We are free to append data of any size to the currently
+ growing object.
+ Exactly one object is growing in an obstack at any one time.
+ You can run one obstack per control block.
+ You may have as many control blocks as you dare.
+ Because of the way we do it, you can `unwind' an obstack
+ back to a previous state. (You may remove objects much
+ as you would with a stack.)
+*/
+
+
+/* Don't do the contents of this file more than once. */
+
+#ifndef _OBSTACK_H
+#define _OBSTACK_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* We use subtraction of (char *) 0 instead of casting to int
+ because on word-addressable machines a simple cast to int
+ may ignore the byte-within-word field of the pointer. */
+
+#ifndef __PTR_TO_INT
+# define __PTR_TO_INT(P) ((P) - (char *) 0)
+#endif
+
+#ifndef __INT_TO_PTR
+# define __INT_TO_PTR(P) ((P) + (char *) 0)
+#endif
+
+/* We need the type of the resulting object. If __PTRDIFF_TYPE__ is
+ defined, as with GNU C, use that; that way we don't pollute the
+ namespace with <stddef.h>'s symbols. Otherwise, if <stddef.h> is
+ available, include it and use ptrdiff_t. In traditional C, long is
+ the best that we can do. */
+
+#ifdef __PTRDIFF_TYPE__
+# define PTR_INT_TYPE __PTRDIFF_TYPE__
+#else
+# ifdef HAVE_STDDEF_H
+# include <stddef.h>
+# define PTR_INT_TYPE ptrdiff_t
+# else
+# define PTR_INT_TYPE long
+# endif
+#endif
+
+#if defined _LIBC || defined HAVE_STRING_H
+# include <string.h>
+# define _obstack_memcpy(To, From, N) memcpy ((To), (From), (N))
+#else
+# ifdef memcpy
+# define _obstack_memcpy(To, From, N) memcpy ((To), (From), (N))
+# else
+# define _obstack_memcpy(To, From, N) bcopy ((From), (To), (N))
+# endif
+#endif
+
+struct _obstack_chunk /* Lives at front of each chunk. */
+{
+ char *limit; /* 1 past end of this chunk */
+ struct _obstack_chunk *prev; /* address of prior chunk or NULL */
+ char contents[4]; /* objects begin here */
+};
+
+struct obstack /* control current object in current chunk */
+{
+ long chunk_size; /* preferred size to allocate chunks in */
+ struct _obstack_chunk *chunk; /* address of current struct obstack_chunk */
+ char *object_base; /* address of object we are building */
+ char *next_free; /* where to add next char to current object */
+ char *chunk_limit; /* address of char after current chunk */
+ PTR_INT_TYPE temp; /* Temporary for some macros. */
+ int alignment_mask; /* Mask of alignment for each object. */
+#if defined __STDC__ && __STDC__
+ /* These prototypes vary based on `use_extra_arg', and we use
+ casts to the prototypeless function type in all assignments,
+ but having prototypes here quiets -Wstrict-prototypes. */
+ struct _obstack_chunk *(*chunkfun) (void *, long);
+ void (*freefun) (void *, struct _obstack_chunk *);
+ void *extra_arg; /* first arg for chunk alloc/dealloc funcs */
+#else
+ struct _obstack_chunk *(*chunkfun) (); /* User's fcn to allocate a chunk. */
+ void (*freefun) (); /* User's function to free a chunk. */
+ char *extra_arg; /* first arg for chunk alloc/dealloc funcs */
+#endif
+ unsigned use_extra_arg:1; /* chunk alloc/dealloc funcs take extra arg */
+ unsigned maybe_empty_object:1;/* There is a possibility that the current
+ chunk contains a zero-length object. This
+ prevents freeing the chunk if we allocate
+ a bigger chunk to replace it. */
+ unsigned alloc_failed:1; /* No longer used, as we now call the failed
+ handler on error, but retained for binary
+ compatibility. */
+};
+
+/* Declare the external functions we use; they are in obstack.c. */
+
+#if defined __STDC__ && __STDC__
+extern void _obstack_newchunk (struct obstack *, int);
+extern void _obstack_free (struct obstack *, void *);
+extern int _obstack_begin (struct obstack *, int, int,
+ void *(*) (long), void (*) (void *));
+extern int _obstack_begin_1 (struct obstack *, int, int,
+ void *(*) (void *, long),
+ void (*) (void *, void *), void *);
+extern int _obstack_memory_used (struct obstack *);
+#else
+extern void _obstack_newchunk ();
+extern void _obstack_free ();
+extern int _obstack_begin ();
+extern int _obstack_begin_1 ();
+extern int _obstack_memory_used ();
+#endif
+
+#if defined __STDC__ && __STDC__
+
+/* Do the function-declarations after the structs
+ but before defining the macros. */
+
+void obstack_init (struct obstack *obstack);
+
+void * obstack_alloc (struct obstack *obstack, int size);
+
+void * obstack_copy (struct obstack *obstack, void *address, int size);
+void * obstack_copy0 (struct obstack *obstack, void *address, int size);
+
+void obstack_free (struct obstack *obstack, void *block);
+
+void obstack_blank (struct obstack *obstack, int size);
+
+void obstack_grow (struct obstack *obstack, void *data, int size);
+void obstack_grow0 (struct obstack *obstack, void *data, int size);
+
+void obstack_1grow (struct obstack *obstack, int data_char);
+void obstack_ptr_grow (struct obstack *obstack, void *data);
+void obstack_int_grow (struct obstack *obstack, int data);
+
+void * obstack_finish (struct obstack *obstack);
+
+int obstack_object_size (struct obstack *obstack);
+
+int obstack_room (struct obstack *obstack);
+void obstack_make_room (struct obstack *obstack, int size);
+void obstack_1grow_fast (struct obstack *obstack, int data_char);
+void obstack_ptr_grow_fast (struct obstack *obstack, void *data);
+void obstack_int_grow_fast (struct obstack *obstack, int data);
+void obstack_blank_fast (struct obstack *obstack, int size);
+
+void * obstack_base (struct obstack *obstack);
+void * obstack_next_free (struct obstack *obstack);
+int obstack_alignment_mask (struct obstack *obstack);
+int obstack_chunk_size (struct obstack *obstack);
+int obstack_memory_used (struct obstack *obstack);
+
+#endif /* __STDC__ */
+
+/* Non-ANSI C cannot really support alternative functions for these macros,
+ so we do not declare them. */
+
+/* Error handler called when `obstack_chunk_alloc' failed to allocate
+ more memory. This can be set to a user defined function. The
+ default action is to print a message and abort. */
+#if defined __STDC__ && __STDC__
+extern void (*obstack_alloc_failed_handler) (void);
+#else
+extern void (*obstack_alloc_failed_handler) ();
+#endif
+
+/* Exit value used when `print_and_abort' is used. */
+extern int obstack_exit_failure;
+
+/* Pointer to beginning of object being allocated or to be allocated next.
+ Note that this might not be the final address of the object
+ because a new chunk might be needed to hold the final size. */
+
+#define obstack_base(h) ((h)->object_base)
+
+/* Size for allocating ordinary chunks. */
+
+#define obstack_chunk_size(h) ((h)->chunk_size)
+
+/* Pointer to next byte not yet allocated in current chunk. */
+
+#define obstack_next_free(h) ((h)->next_free)
+
+/* Mask specifying low bits that should be clear in address of an object. */
+
+#define obstack_alignment_mask(h) ((h)->alignment_mask)
+
+/* To prevent prototype warnings provide complete argument list in
+ standard C version. */
+#if defined __STDC__ && __STDC__
+
+# define obstack_init(h) \
+ _obstack_begin ((h), 0, 0, \
+ (void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free)
+
+# define obstack_begin(h, size) \
+ _obstack_begin ((h), (size), 0, \
+ (void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free)
+
+# define obstack_specify_allocation(h, size, alignment, chunkfun, freefun) \
+ _obstack_begin ((h), (size), (alignment), \
+ (void *(*) (long)) (chunkfun), (void (*) (void *)) (freefun))
+
+# define obstack_specify_allocation_with_arg(h, size, alignment, chunkfun, freefun, arg) \
+ _obstack_begin_1 ((h), (size), (alignment), \
+ (void *(*) (void *, long)) (chunkfun), \
+ (void (*) (void *, void *)) (freefun), (arg))
+
+# define obstack_chunkfun(h, newchunkfun) \
+ ((h) -> chunkfun = (struct _obstack_chunk *(*)(void *, long)) (newchunkfun))
+
+# define obstack_freefun(h, newfreefun) \
+ ((h) -> freefun = (void (*)(void *, struct _obstack_chunk *)) (newfreefun))
+
+#else
+
+# define obstack_init(h) \
+ _obstack_begin ((h), 0, 0, \
+ (void *(*) ()) obstack_chunk_alloc, (void (*) ()) obstack_chunk_free)
+
+# define obstack_begin(h, size) \
+ _obstack_begin ((h), (size), 0, \
+ (void *(*) ()) obstack_chunk_alloc, (void (*) ()) obstack_chunk_free)
+
+# define obstack_specify_allocation(h, size, alignment, chunkfun, freefun) \
+ _obstack_begin ((h), (size), (alignment), \
+ (void *(*) ()) (chunkfun), (void (*) ()) (freefun))
+
+# define obstack_specify_allocation_with_arg(h, size, alignment, chunkfun, freefun, arg) \
+ _obstack_begin_1 ((h), (size), (alignment), \
+ (void *(*) ()) (chunkfun), (void (*) ()) (freefun), (arg))
+
+# define obstack_chunkfun(h, newchunkfun) \
+ ((h) -> chunkfun = (struct _obstack_chunk *(*)()) (newchunkfun))
+
+# define obstack_freefun(h, newfreefun) \
+ ((h) -> freefun = (void (*)()) (newfreefun))
+
+#endif
+
+#define obstack_1grow_fast(h,achar) (*((h)->next_free)++ = achar)
+
+#define obstack_blank_fast(h,n) ((h)->next_free += (n))
+
+#define obstack_memory_used(h) _obstack_memory_used (h)
+
+#if defined __GNUC__ && defined __STDC__ && __STDC__
+/* NextStep 2.0 cc is really gcc 1.93 but it defines __GNUC__ = 2 and
+ does not implement __extension__. But that compiler doesn't define
+ __GNUC_MINOR__. */
+# if __GNUC__ < 2 || (__NeXT__ && !__GNUC_MINOR__)
+# define __extension__
+# endif
+
+/* For GNU C, if not -traditional,
+ we can define these macros to compute all args only once
+ without using a global variable.
+ Also, we can avoid using the `temp' slot, to make faster code. */
+
+# define obstack_object_size(OBSTACK) \
+ __extension__ \
+ ({ struct obstack *__o = (OBSTACK); \
+ (unsigned) (__o->next_free - __o->object_base); })
+
+# define obstack_room(OBSTACK) \
+ __extension__ \
+ ({ struct obstack *__o = (OBSTACK); \
+ (unsigned) (__o->chunk_limit - __o->next_free); })
+
+# define obstack_make_room(OBSTACK,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->chunk_limit - __o->next_free < __len) \
+ _obstack_newchunk (__o, __len); \
+ (void) 0; })
+
+# define obstack_empty_p(OBSTACK) \
+ __extension__ \
+ ({ struct obstack *__o = (OBSTACK); \
+ (__o->chunk->prev == 0 && __o->next_free - __o->chunk->contents == 0); })
+
+# define obstack_grow(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->next_free + __len > __o->chunk_limit) \
+ _obstack_newchunk (__o, __len); \
+ _obstack_memcpy (__o->next_free, (char *) (where), __len); \
+ __o->next_free += __len; \
+ (void) 0; })
+
+# define obstack_grow0(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->next_free + __len + 1 > __o->chunk_limit) \
+ _obstack_newchunk (__o, __len + 1); \
+ _obstack_memcpy (__o->next_free, (char *) (where), __len); \
+ __o->next_free += __len; \
+ *(__o->next_free)++ = 0; \
+ (void) 0; })
+
+# define obstack_1grow(OBSTACK,datum) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ if (__o->next_free + 1 > __o->chunk_limit) \
+ _obstack_newchunk (__o, 1); \
+ *(__o->next_free)++ = (datum); \
+ (void) 0; })
+
+/* These assume that the obstack alignment is good enough for pointers or ints,
+ and that the data added so far to the current object
+ shares that much alignment. */
+
+# define obstack_ptr_grow(OBSTACK,datum) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ if (__o->next_free + sizeof (void *) > __o->chunk_limit) \
+ _obstack_newchunk (__o, sizeof (void *)); \
+ *((void **)__o->next_free)++ = ((void *)datum); \
+ (void) 0; })
+
+# define obstack_int_grow(OBSTACK,datum) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ if (__o->next_free + sizeof (int) > __o->chunk_limit) \
+ _obstack_newchunk (__o, sizeof (int)); \
+ *((int *)__o->next_free)++ = ((int)datum); \
+ (void) 0; })
+
+# define obstack_ptr_grow_fast(h,aptr) (*((void **) (h)->next_free)++ = (void *)aptr)
+# define obstack_int_grow_fast(h,aint) (*((int *) (h)->next_free)++ = (int) aint)
+
+# define obstack_blank(OBSTACK,length) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ int __len = (length); \
+ if (__o->chunk_limit - __o->next_free < __len) \
+ _obstack_newchunk (__o, __len); \
+ __o->next_free += __len; \
+ (void) 0; })
+
+# define obstack_alloc(OBSTACK,length) \
+__extension__ \
+({ struct obstack *__h = (OBSTACK); \
+ obstack_blank (__h, (length)); \
+ obstack_finish (__h); })
+
+# define obstack_copy(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__h = (OBSTACK); \
+ obstack_grow (__h, (where), (length)); \
+ obstack_finish (__h); })
+
+# define obstack_copy0(OBSTACK,where,length) \
+__extension__ \
+({ struct obstack *__h = (OBSTACK); \
+ obstack_grow0 (__h, (where), (length)); \
+ obstack_finish (__h); })
+
+/* The local variable is named __o1 to avoid a name conflict
+ when obstack_blank is called. */
+# define obstack_finish(OBSTACK) \
+__extension__ \
+({ struct obstack *__o1 = (OBSTACK); \
+ void *value; \
+ value = (void *) __o1->object_base; \
+ if (__o1->next_free == value) \
+ __o1->maybe_empty_object = 1; \
+ __o1->next_free \
+ = __INT_TO_PTR ((__PTR_TO_INT (__o1->next_free)+__o1->alignment_mask)\
+ & ~ (__o1->alignment_mask)); \
+ if (__o1->next_free - (char *)__o1->chunk \
+ > __o1->chunk_limit - (char *)__o1->chunk) \
+ __o1->next_free = __o1->chunk_limit; \
+ __o1->object_base = __o1->next_free; \
+ value; })
+
+# define obstack_free(OBSTACK, OBJ) \
+__extension__ \
+({ struct obstack *__o = (OBSTACK); \
+ void *__obj = (OBJ); \
+ if (__obj > (void *)__o->chunk && __obj < (void *)__o->chunk_limit) \
+ __o->next_free = __o->object_base = __obj; \
+ else (obstack_free) (__o, __obj); })
+
+#else /* not __GNUC__ or not __STDC__ */
+
+# define obstack_object_size(h) \
+ (unsigned) ((h)->next_free - (h)->object_base)
+
+# define obstack_room(h) \
+ (unsigned) ((h)->chunk_limit - (h)->next_free)
+
+# define obstack_empty_p(h) \
+ ((h)->chunk->prev == 0 && (h)->next_free - (h)->chunk->contents == 0)
+
+/* Note that the call to _obstack_newchunk is enclosed in (..., 0)
+ so that we can avoid having void expressions
+ in the arms of the conditional expression.
+ Casting the third operand to void was tried before,
+ but some compilers won't accept it. */
+
+# define obstack_make_room(h,length) \
+( (h)->temp = (length), \
+ (((h)->next_free + (h)->temp > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), (h)->temp), 0) : 0))
+
+# define obstack_grow(h,where,length) \
+( (h)->temp = (length), \
+ (((h)->next_free + (h)->temp > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \
+ _obstack_memcpy ((h)->next_free, (char *) (where), (h)->temp), \
+ (h)->next_free += (h)->temp)
+
+# define obstack_grow0(h,where,length) \
+( (h)->temp = (length), \
+ (((h)->next_free + (h)->temp + 1 > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), (h)->temp + 1), 0) : 0), \
+ _obstack_memcpy ((h)->next_free, (char *) (where), (h)->temp), \
+ (h)->next_free += (h)->temp, \
+ *((h)->next_free)++ = 0)
+
+# define obstack_1grow(h,datum) \
+( (((h)->next_free + 1 > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), 1), 0) : 0), \
+ (*((h)->next_free)++ = (datum)))
+
+# define obstack_ptr_grow(h,datum) \
+( (((h)->next_free + sizeof (char *) > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), sizeof (char *)), 0) : 0), \
+ (*((char **) (((h)->next_free+=sizeof(char *))-sizeof(char *))) = ((char *) datum)))
+
+# define obstack_int_grow(h,datum) \
+( (((h)->next_free + sizeof (int) > (h)->chunk_limit) \
+ ? (_obstack_newchunk ((h), sizeof (int)), 0) : 0), \
+ (*((int *) (((h)->next_free+=sizeof(int))-sizeof(int))) = ((int) datum)))
+
+# define obstack_ptr_grow_fast(h,aptr) (*((char **) (h)->next_free)++ = (char *) aptr)
+# define obstack_int_grow_fast(h,aint) (*((int *) (h)->next_free)++ = (int) aint)
+
+# define obstack_blank(h,length) \
+( (h)->temp = (length), \
+ (((h)->chunk_limit - (h)->next_free < (h)->temp) \
+ ? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \
+ ((h)->next_free += (h)->temp))
+
+# define obstack_alloc(h,length) \
+ (obstack_blank ((h), (length)), obstack_finish ((h)))
+
+# define obstack_copy(h,where,length) \
+ (obstack_grow ((h), (where), (length)), obstack_finish ((h)))
+
+# define obstack_copy0(h,where,length) \
+ (obstack_grow0 ((h), (where), (length)), obstack_finish ((h)))
+
+# define obstack_finish(h) \
+( ((h)->next_free == (h)->object_base \
+ ? (((h)->maybe_empty_object = 1), 0) \
+ : 0), \
+ (h)->temp = __PTR_TO_INT ((h)->object_base), \
+ (h)->next_free \
+ = __INT_TO_PTR ((__PTR_TO_INT ((h)->next_free)+(h)->alignment_mask) \
+ & ~ ((h)->alignment_mask)), \
+ (((h)->next_free - (char *) (h)->chunk \
+ > (h)->chunk_limit - (char *) (h)->chunk) \
+ ? ((h)->next_free = (h)->chunk_limit) : 0), \
+ (h)->object_base = (h)->next_free, \
+ __INT_TO_PTR ((h)->temp))
+
+# if defined __STDC__ && __STDC__
+# define obstack_free(h,obj) \
+( (h)->temp = (char *) (obj) - (char *) (h)->chunk, \
+ (((h)->temp > 0 && (h)->temp < (h)->chunk_limit - (char *) (h)->chunk)\
+ ? (int) ((h)->next_free = (h)->object_base \
+ = (h)->temp + (char *) (h)->chunk) \
+ : (((obstack_free) ((h), (h)->temp + (char *) (h)->chunk), 0), 0)))
+# else
+# define obstack_free(h,obj) \
+( (h)->temp = (char *) (obj) - (char *) (h)->chunk, \
+ (((h)->temp > 0 && (h)->temp < (h)->chunk_limit - (char *) (h)->chunk)\
+ ? (int) ((h)->next_free = (h)->object_base \
+ = (h)->temp + (char *) (h)->chunk) \
+ : (_obstack_free ((h), (h)->temp + (char *) (h)->chunk), 0)))
+# endif
+
+#endif /* not __GNUC__ or not __STDC__ */
+
+#ifdef __cplusplus
+} /* C++ */
+#endif
+
+#endif /* obstack.h */
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
new file mode 100644
index 0000000..79bc3cc
--- /dev/null
+++ b/include/opcode/ChangeLog
@@ -0,0 +1,1873 @@
+1999-04-14 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (CGEN_ATTR): Delete member num_nonbools.
+ (CGEN_ATTR_TYPE): Update.
+ (CGEN_ATTR_MASK): Number booleans starting at 0.
+ (CGEN_ATTR_VALUE): Update.
+ (CGEN_INSN_ATTR): Update.
+
+Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
+ instructions.
+
+Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h (bb, bvb): Tweak opcode/mask.
+
+
+1999-03-22 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
+ (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
+ New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
+ min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
+ Delete member max_insn_size.
+ (enum cgen_cpu_open_arg): New enum.
+ (cpu_open): Update prototype.
+ (cpu_open_1): Declare.
+ (cgen_set_cpu): Delete.
+
+1999-03-11 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
+ (CGEN_OPERAND_NIL): New macro.
+ (CGEN_OPERAND): New member `type'.
+ (@arch@_cgen_operand_table): Delete decl.
+ (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
+ (CGEN_OPERAND_TABLE): New struct.
+ (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
+ (CGEN_OPINST): Pointer to operand table entry replaced with enum.
+ (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
+ now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
+ {get,set}_{int,vma}_operand.
+ (@arch@_cgen_cpu_open): New arg `isa'.
+ (cgen_set_cpu): Ditto.
+
+Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
+
+ * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
+
+1999-02-25 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
+ (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
+ enum cgen_hw_type.
+ (CGEN_HW_TABLE): New struct.
+ (hw_table): Delete declaration.
+ (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
+ to table entry to enum.
+ (CGEN_OPINST): Ditto.
+ (CGEN_CPU_TABLE): Change member hw_list to hw_table.
+
+Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
+
+ * alpha.h (AXP_OPCODE_EV6): New.
+ (AXP_OPCODE_NOPAL): Include it.
+
+1999-02-09 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
+ All uses updated. New members int_insn_p, max_insn_size,
+ parse_operand,insert_operand,extract_operand,print_operand,
+ sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
+ get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
+ extract_handlers,print_handlers.
+ (CGEN_ATTR): Change type of num_nonbools to unsigned int.
+ (CGEN_ATTR_BOOL_OFFSET): New macro.
+ (CGEN_ATTR_MASK): Subtract it to compute bit number.
+ (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
+ (cgen_opcode_handler): Renamed from cgen_base.
+ (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
+ (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
+ all uses updated.
+ (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
+ (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
+ (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
+ (CGEN_OPCODE,CGEN_IBASE): New types.
+ (CGEN_INSN): Rewrite.
+ (CGEN_{ASM,DIS}_HASH*): Delete.
+ (init_opcode_table,init_ibld_table): Declare.
+ (CGEN_INSN_ATTR): New type.
+
+Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
+
+ * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
+ (x_FP, d_FP, dls_FP, sldx_FP): Define.
+ Change *Suf definitions to include x and d suffixes.
+ (movsx): Use w_Suf and b_Suf.
+ (movzx): Likewise.
+ (movs): Use bwld_Suf.
+ (fld): Change ordering. Use sld_FP.
+ (fild): Add Intel Syntax equivalent of fildq.
+ (fst): Use sld_FP.
+ (fist): Use sld_FP.
+ (fstp): Use sld_FP. Add x_FP version.
+ (fistp): LLongMem version for Intel Syntax.
+ (fcom, fcomp): Use sld_FP.
+ (fadd, fiadd, fsub): Use sld_FP.
+ (fsubr): Use sld_FP.
+ (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
+
+1999-01-27 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
+ CGEN_MODE_UINT.
+
+Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h (bv): Fix mask.
+
+1999-01-05 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
+ (CGEN_ATTR): Use it.
+ (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
+ (CGEN_ATTR_TABLE): New member dfault.
+
+1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips.h (MIPS16_INSN_BRANCH): New.
+
+Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
+
+ The following is part of a change made by Edith Epstein
+ <eepstein@sophia.cygnus.com> as part of a project to merge in
+ changes by HP; HP did not create ChangeLog entries.
+
+ * hppa.h (completer_chars): list of chars to not put a space
+ after.
+
+Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h (i386_optab): Permit w suffix on processor control and
+ status word instructions.
+
+1998-11-30 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
+ (struct cgen_keyword_entry): Ditto.
+ (struct cgen_operand): Ditto.
+ (CGEN_IFLD): New typedef, with associated access macros.
+ (CGEN_IFMT): New typedef, with associated access macros.
+ (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
+ (CGEN_IVALUE): New typedef.
+ (struct cgen_insn): Delete const on syntax,attrs members.
+ `format' now points to format data. Type of `value' is now
+ CGEN_IVALUE.
+ (struct cgen_opcode_table): New member ifld_table.
+
+1998-11-18 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
+ (CGEN_OPERAND_INSTANCE): New member `attrs'.
+ (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
+ (cgen_dis_lookup_insn): Update type of `base_insn' arg.
+ (cgen_opcode_table): Update type of dis_hash fn.
+ (extract_operand): Update type of `insn_value' arg.
+
+Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
+
+Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips.h (INSN_MULT): Added.
+
+Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
+
+Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_INSN_INT): New typedef.
+ (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
+ (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
+ (CGEN_INSN_BYTES_PTR): New typedef.
+ (CGEN_EXTRACT_INFO): New typedef.
+ (cgen_insert_fn,cgen_extract_fn): Update.
+ (cgen_opcode_table): New member `insn_endian'.
+ (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
+ (insert_operand,extract_operand): Update.
+ (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
+
+Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_ATTR_BOOLS): New macro.
+ (struct CGEN_HW_ENTRY): New member `attrs'.
+ (CGEN_HW_ATTR): New macro.
+ (struct CGEN_OPERAND_INSTANCE): New member `name'.
+ (CGEN_INSN_INVALID_P): New macro.
+
+Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h: Add "fid".
+
+Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ From Robert Andrew Dale <rob@nb.net>
+ * i386.h (i386_optab): Add AMD 3DNow! instructions.
+ (AMD_3DNOW_OPCODE): Define.
+
+Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v.h (EITHER_BUT_PREFER_MU): Define.
+
+Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * cgen.h (cgen_insn): #if 0 out element `cdx'.
+
+Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
+
+ Move all global state data into opcode table struct, and treat
+ opcode table as something that is "opened/closed".
+ * cgen.h (CGEN_OPCODE_DESC): New type.
+ (all fns): New first arg of opcode table descriptor.
+ (cgen_set_parse_operand_fn): Add prototype.
+ (cgen_current_machine,cgen_current_endian): Delete.
+ (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
+ parse_operand_fn,asm_hash_table,asm_hash_table_entries,
+ dis_hash_table,dis_hash_table_entries.
+ (opcode_open,opcode_close): Add prototypes.
+
+ * cgen.h (cgen_insn): New element `cdx'.
+
+Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
+
+Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h: Add "no_match_operands" field for instructions.
+ (MN10300_MAX_OPERANDS): Define.
+
+Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * cgen.h (cgen_macro_insn_count): Declare.
+
+Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
+ (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
+ (get_operand,put_operand): Replaced with get_{int,vma}_operand,
+ set_{int,vma}_operand.
+
+Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h: Add "machine" field for instructions.
+ (MN103, AM30): Define machine types.
+
+Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
+
+1998-06-18 Ulrich Drepper <drepper@cygnus.com>
+
+ * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
+
+Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
+ and ud2b.
+ (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
+ those that happen to be implemented on pentiums.
+
+Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
+ IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
+ with Size16|IgnoreSize or Size32|IgnoreSize.
+
+Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
+ (REPE): Rename to REPE_PREFIX_OPCODE.
+ (i386_regtab_end): Remove.
+ (i386_prefixtab, i386_prefixtab_end): Remove.
+ (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
+ of md_begin.
+ (MAX_OPCODE_SIZE): Define.
+ (i386_optab_end): Remove.
+ (sl_Suf): Define.
+ (sl_FP): Use sl_Suf.
+
+ * i386.h (i386_optab): Allow 16 bit displacement for `mov
+ mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
+ bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
+ data32, dword, and adword prefixes.
+ (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
+ regs.
+
+Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
+
+ * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
+ register operands, because this is a common idiom. Flag them with
+ a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
+ fdivrp because gcc erroneously generates them. Also flag with a
+ warning.
+
+ * i386.h: Add suffix modifiers to most insns, and tighter operand
+ checks in some cases. Fix a number of UnixWare compatibility
+ issues with float insns. Merge some floating point opcodes, using
+ new FloatMF modifier.
+ (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
+ consistency.
+
+ * i386.h: Change occurence of ShortformW to W|ShortForm. Add
+ IgnoreDataSize where appropriate.
+
+Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h: (one_byte_segment_defaults): Remove.
+ (two_byte_segment_defaults): Remove.
+ (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
+
+Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
+ (cgen_hw_lookup_by_num): Declare.
+
+Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
+ ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
+
+Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
+
+ * cgen.h (cgen_asm_init_parse): Delete.
+ (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
+ (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
+
+Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
+ (cgen_asm_finish_insn): Update prototype.
+ (cgen_insn): New members num, data.
+ (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
+ dis_hash, dis_hash_table_size moved to ...
+ (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
+ All uses updated. New members asm_hash_p, dis_hash_p.
+ (CGEN_MINSN_EXPANSION): New struct.
+ (cgen_expand_macro_insn): Declare.
+ (cgen_macro_insn_count): Declare.
+ (get_insn_operands): Update prototype.
+ (lookup_get_insn_operands): Declare.
+
+Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (i386_optab): Change iclrKludge and imulKludge to
+ regKludge. Add operands types for string instructions.
+
+Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
+
+ * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
+ table.
+
+Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
+
+ * i386.h (Z_): Renamed from `_' to avoid clash with common alias
+ for `gettext'.
+
+Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h: Remove NoModrm flag from all insns: it's never checked.
+ Add IsString flag to string instructions.
+ (IS_STRING): Don't define.
+ (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
+ (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
+ (SS_PREFIX_OPCODE): Define.
+
+Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Revert March 24 patch; no more LinearAddress.
+
+Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (i386_optab): Remove fwait (9b) from all floating point
+ instructions, and instead add FWait opcode modifier. Add short
+ form of fldenv and fstenv.
+ (FWAIT_OPCODE): Define.
+
+ * i386.h (i386_optab): Change second operand constraint of `mov
+ sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
+ allow legal instructions such as `movl %gs,%esi'
+
+Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * h8300.h: Various changes to fully bracket initializers.
+
+Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
+
+ * i386.h: Set LinearAddress for lidt and lgdt.
+
+Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_BOOL_ATTR): New macro.
+
+Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
+
+ * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
+
+Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
+ (cgen_insn): Record syntax and format entries here, rather than
+ separately.
+
+Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
+
+ * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
+
+Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (cgen_insert_fn): Change type of result to const char *.
+ (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
+ (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
+
+Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * cgen.h (lookup_insn): New argument alias_p.
+
+Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+Fix rac to accept only a0:
+ * d10v.h (OPERAND_ACC): Split into:
+ (OPERAND_ACC0, OPERAND_ACC1) .
+ (OPERAND_GPR): Define.
+
+Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_FIELDS): Define here.
+ (CGEN_HW_ENTRY): New member `type'.
+ (hw_list): Delete decl.
+ (enum cgen_mode): Declare.
+ (CGEN_OPERAND): New member `hw'.
+ (enum cgen_operand_instance_type): Declare.
+ (CGEN_OPERAND_INSTANCE): New type.
+ (CGEN_INSN): New member `operands'.
+ (CGEN_OPCODE_DATA): Make hw_list const.
+ (get_insn_operands,lookup_insn): Add prototypes for.
+
+Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
+ (CGEN_HW_ENTRY): Move `next' entry to end of struct.
+ (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
+ (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
+
+Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * cgen.h: Correct typo in comment end marker.
+
+Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
+
+ * tic30.h: New file.
+
+Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
+
+ * cgen.h: Add prototypes for cgen_save_fixups(),
+ cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
+ of cgen_asm_finish_insn() to return a char *.
+
+Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
+
+ * cgen.h: Formatting changes to improve readability.
+
+Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.h (*): Clean up pass over `struct foo' usage.
+ (CGEN_ATTR): Make unsigned char.
+ (CGEN_ATTR_TYPE): Update.
+ (CGEN_ATTR_{ENTRY,TABLE}): New types.
+ (cgen_base): Move member `attrs' to cgen_insn.
+ (CGEN_KEYWORD): New member `null_entry'.
+ (CGEN_{SYNTAX,FORMAT}): New types.
+ (cgen_insn): Format and syntax separated from each other.
+
+Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
+
+ * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
+ 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
+ flags_{used,set} long.
+ (d30v_operand): Make flags field long.
+
+Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * m68k.h: Fix comment describing operand types.
+
+Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
+
+ * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
+ everything else after down.
+
+Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * d10v.h (OPERAND_FLAG): Split into:
+ (OPERAND_FFLAG, OPERAND_CFLAG) .
+
+Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips.h (struct mips_opcode): Changed comments to reflect new
+ field usage.
+
+Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
+
+ * mips.h: Added to comments a quick-ref list of all assigned
+ operand type characters.
+ (OP_{MASK,SH}_PERFREG): New macros.
+
+Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
+
+ * sparc.h: Add '_' and '/' for v9a asr's.
+ Patch from David Miller <davem@vger.rutgers.edu>
+
+Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h: Bit ops with absolute addresses not in the 8 bit
+ area are not available in the base model (H8/300).
+
+Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k.h: Remove documentation of ` operand specifier.
+
+Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k.h: Document q and v operand specifiers.
+
+Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (struct v850_opcode): Add processors field.
+ (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
+ (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
+ (PROCESSOR_V850EA): New bit constants.
+
+Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
+
+ Merge changes from Martin Hunt:
+
+ * d30v.h: Allow up to 64 control registers. Add
+ SHORT_A5S format.
+
+ * d30v.h (LONG_Db): New form for delayed branches.
+
+ * d30v.h: (LONG_Db): New form for repeati.
+
+ * d30v.h (SHORT_D2B): New form.
+
+ * d30v.h (SHORT_A2): New form.
+
+ * d30v.h (OPERAND_2REG): Add new operand to indicate 2
+ registers are used. Needed for VLIW optimization.
+
+Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * cgen.h: Move assembler interface section
+ up so cgen_parse_operand_result is defined for cgen_parse_address.
+ (cgen_parse_address): Update prototype.
+
+Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
+
+Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h (two_byte_segment_defaults): Correct base register 5 in
+ modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
+ <paubert@iram.es>.
+
+ * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
+ <paubert@iram.es>.
+
+ * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
+ <paubert@iram.es>.
+
+ * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
+ (JUMP_ON_ECX_ZERO): Remove commented out macro.
+
+Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (V850_NOT_R0): New flag.
+
+Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (struct v850_opcode): Remove flags field.
+
+Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.h (struct v850_opcode): Add flags field.
+ (struct v850_operand): Extend meaning of 'bits' and 'shift'
+ fields.
+ (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
+ (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
+
+Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h: New file.
+
+Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (sparc_opcodes): Declare as const.
+
+Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
+
+ * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
+ uses single or double precision floating point resources.
+ (INSN_NO_ISA, INSN_ISA1): Define.
+ (cpu specific INSN macros): Tweak into bitmasks outside the range
+ of INSN_ISA field.
+
+Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
+
+ * i386.h: Fix pand opcode.
+
+Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips.h: Widen INSN_ISA and move it to a more convenient
+ bit position. Add INSN_3900.
+
+Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips.h (struct mips_opcode): added new field membership.
+
+Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
+
+ * i386.h (movd): only Reg32 is allowed.
+
+ * i386.h: add fcomp and ud2. From Wayne Scott
+ <wscott@ichips.intel.com>.
+
+Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Add MMX instructions.
+
+Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
+
+ * i386.h: Remove W modifier from conditional move instructions.
+
+Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
+ with no arguments to match that generated by the UnixWare
+ assembler.
+
+Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
+ (cgen_parse_operand_fn): Declare.
+ (cgen_init_parse_operand): Declare.
+ (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
+ new argument `want'.
+ (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
+ (enum cgen_parse_operand_type): New enum.
+
+Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
+
+Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * cgen.h: New file.
+
+Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
+ fdivrp.
+
+Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
+
+ * v850.h (extract): Make unsigned.
+
+Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Add iclr.
+
+Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Change DW to W for cmpxchg and xadd, since they don't
+ take a direction bit.
+
+Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
+
+ * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
+
+Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * sparc.h: Include <ansidecl.h>. Update function declarations to
+ use prototypes, and to use const when appropriate.
+
+Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_RELAX): Define.
+
+Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h: Change pre_defined_registers to
+ d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
+
+Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
+
+ * mips.h: Add macros for cop0, cop1 cop2 and cop3.
+ Change mips_opcodes from const array to a pointer,
+ and change bfd_mips_num_opcodes from const int to int,
+ so that we can increase the size of the mips opcodes table
+ dynamically.
+
+Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d30v.h (FLAG_X): Remove unused flag.
+
+Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d30v.h: New file.
+
+Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
+ (PDS_VALUE): Macro to access value field of predefined symbols.
+ (tic80_next_predefined_symbol): Add prototype.
+
+Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (tic80_symbol_to_value): Change prototype to match
+ change in function, added class parameter.
+
+Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
+ endmask fields, which are somewhat weird in that 0 and 32 are
+ treated exactly the same.
+
+Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h: Change all the OPERAND defines to use the form (1 << X)
+ rather than a constant that is 2**X. Reorder them to put bits for
+ operands that have symbolic names in the upper bits, so they can
+ be packed into an int where the lower bits contain the value that
+ corresponds to that symbolic name.
+ (predefined_symbo): Add struct.
+ (tic80_predefined_symbols): Declare array of translations.
+ (tic80_num_predefined_symbols): Declare size of that array.
+ (tic80_value_to_symbol): Declare function.
+ (tic80_symbol_to_value): Declare function.
+
+Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
+
+ * mn10200.h (MN10200_OPERAND_RELAX): Define.
+
+Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
+ be the destination register.
+
+Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (struct tic80_opcode): Change "format" field to "flags".
+ (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
+ (TIC80_VECTOR): Define a flag bit for the flags. This one means
+ that the opcode can have two vector instructions in a single
+ 32 bit word and we have to encode/decode both.
+
+Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_OPERAND_PCREL): Renamed from
+ TIC80_OPERAND_RELATIVE for PC relative.
+ (TIC80_OPERAND_BASEREL): New flag bit for register
+ base relative.
+
+Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
+
+Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
+ ":s" modifier for scaling.
+
+Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
+ (TIC80_OPERAND_M_LI): Ditto
+
+Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
+ (TIC80_OPERAND_CC): New define for condition code operand.
+ (TIC80_OPERAND_CR): New define for control register operand.
+
+Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (struct tic80_opcode): Name changed.
+ (struct tic80_opcode): Remove format field.
+ (struct tic80_operand): Add insertion and extraction functions.
+ (TIC80_OPERAND_*): Remove old bogus values, start adding new
+ correct ones.
+ (FMT_*): Ditto.
+
+Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
+ type IV instruction offsets.
+
+Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h: New file.
+
+Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
+
+Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
+
+ * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
+ * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
+ * v850.h: Fix comment, v850_operand not powerpc_operand.
+
+Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10200.h: Flesh out structures and definitions needed by
+ the mn10200 assembler & disassembler.
+
+Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h: Add mips16 definitions.
+
+Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
+
+ * m68k.h: Document new <, >, m, n, o and p operand specifiers.
+
+Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_PCREL): Define.
+ (MN10300_OPERAND_MEMADDR): Define.
+
+Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
+
+Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_SPLIT): Define.
+
+Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
+
+Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_REPEATED): Define.
+
+Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha.h: Don't include "bfd.h"; private relocation types are now
+ negative to minimize problems with shared libraries. Organize
+ instruction subsets by AMASK extensions and PALcode
+ implementation.
+ (struct alpha_operand): Move flags slot for better packing.
+
+Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850.h (V850_OPERAND_RELAX): New operand flag.
+
+Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (FMT_*): Move operand format definitions
+ here.
+
+Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_PAREN): Define.
+
+Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (mn10300_opcode): Add "format" field.
+ (MN10300_OPERAND_*): Define.
+
+Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10x00.h: Delete.
+ * mn10200.h, mn10300.h: New files.
+
+Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10x00.h: New file.
+
+Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * v850.h: Add new flag to indicate this instruction uses a PC
+ displacement.
+
+Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (stmac): Add missing instruction.
+
+Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850.h (v850_opcode): Remove "size" field. Add "memop"
+ field.
+
+Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850.h (V850_OPERAND_EP): Define.
+
+ * v850.h (v850_opcode): Add size field.
+
+Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * v850.h (v850_operands): Add insert and extract fields, pointers
+ to functions used to handle unusual operand encoding.
+ (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
+ V850_OPERAND_SIGNED): Defined.
+
+Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * v850.h (v850_operands): Add flags field.
+ (OPERAND_REG, OPERAND_NUM): Defined.
+
+Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * v850.h: New file.
+
+Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
+ OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
+ OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
+ OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
+ OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
+ Defined.
+
+Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
+ a 3 bit space id instead of a 2 bit space id.
+
+Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h: Add some additional defines to support the
+ assembler in determining which operations can be done in parallel.
+
+Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (SN): Define.
+ (eepmov.b): Renamed from "eepmov"
+ (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
+ with them.
+
+Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h (OPERAND_SHIFT): New operand flag.
+
+Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h: Changes for divs, parallel-only instructions, and
+ signed numbers.
+
+Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h (pd_reg): Define. Putting the definition here allows
+ the assembler and disassembler to share the same struct.
+
+Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
+ Williams <steve@icarus.com>.
+
+Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h: New file.
+
+Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
+
+Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * m68k.h (mcf5200): New macro.
+ Document names of coldfire control registers.
+
+Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (SRC_IN_DST): Define.
+
+ * h8300.h (UNOP3): Mark the register operand in this insn
+ as a source operand, not a destination operand.
+ (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
+ (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
+ register operand with SRC_IN_DST.
+
+Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha.h: New file.
+
+Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * rs6k.h: Remove obsolete file.
+
+Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
+ fdivp, and fdivrp. Add ffreep.
+
+Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * h8300.h: Reorder various #defines for readability.
+ (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
+ (BITOP): Accept additional (unused) argument. All callers changed.
+ (EBITOP): Likewise.
+ (O_LAST): Bump.
+ (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
+
+ * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
+ (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
+ (BITOP, EBITOP): Handle new H8/S addressing modes for
+ bit insns.
+ (UNOP3): Handle new shift/rotate insns on the H8/S.
+ (insns using exr): New instructions.
+ (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
+
+Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (add.l): Undo Apr 5th change. The manual I had
+ was incorrect.
+
+Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (START): Remove.
+ (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
+ and mov.l insns that can be relaxed.
+
+Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Remove Abs32 from lcall.
+
+Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
+
+ * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
+ (SLCPOP): New macro.
+ Mark X,Y opcode letters as in use.
+
+Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * sparc.h (F_FLOAT, F_FBR): Define.
+
+Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
+ from all insns.
+ (ABS8SRC,ABS8DST): Add ABS8MEM.
+ (add.l): Fix reg+reg variant.
+ (eepmov.w): Renamed from eepmovw.
+ (ldc,stc): Fix many cases.
+
+Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
+
+Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (O): Mark operand letter as in use.
+
+Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
+ Mark operand letters uU as in use.
+
+Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
+ (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
+ (SPARC_OPCODE_SUPPORTED): New macro.
+ (SPARC_OPCODE_CONFLICT_P): Rewrite.
+ (F_NOTV9): Delete.
+
+Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
+
+ * sparc.h (sparc_opcode_lookup_arch) Make return type in
+ declaration consistent with return type in definition.
+
+Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (i386_optab): Remove Data32 from pushf and popf.
+
+Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
+
+ * i386.h (i386_regtab): Add 80486 test registers.
+
+Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i960.h (I_HX): Define.
+ (i960_opcodes): Add HX instruction.
+
+Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
+
+ * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
+ and fclex.
+
+Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
+ (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
+ (bfd_* defines): Delete.
+ (sparc_opcode_archs): Replaces architecture_pname.
+ (sparc_opcode_lookup_arch): Declare.
+ (NUMOPCODES): Delete.
+
+Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (enum sparc_architecture): Add v9a.
+ (ARCHITECTURES_CONFLICT_P): Update.
+
+Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
+
+ * i386.h: Added Pentium Pro instructions.
+
+Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k.h: Document new 'W' operand place.
+
+Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h: Add lci and syncdma instructions.
+
+Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
+
+ * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
+ instructions.
+
+Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
+ assembler's -mcom and -many switches.
+
+Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
+
+ * i386.h: Fix cmpxchg8b extension opcode description.
+
+Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
+
+ * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
+ and register cr4.
+
+Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k.h: Change comment: split type P into types 0, 1 and 2.
+
+Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (sparc_{encode,decode}_prefetch): Declare.
+
+Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
+
+Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68kmri.h: Remove.
+
+ * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
+ declarations. Remove F_ALIAS and flag field of struct
+ m68k_opcode. Change arch field of struct m68k_opcode to unsigned
+ int. Make name and args fields of struct m68k_opcode const.
+
+Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (F_NOTV9): Define.
+
+Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
+
+ * mips.h (INSN_4010): Define.
+
+Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k.h (TBL1): Reverse sense of "round" argument in result.
+
+ Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
+ * m68k.h: Fix argument descriptions of coprocessor
+ instructions to allow only alterable operands where appropriate.
+ [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
+ (m68k_opcode_aliases): Add more aliases.
+
+Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k.h: Added explcitly short-sized conditional branches, and a
+ bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
+ svr4-based configurations.
+
+Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
+ * i386.h: added missing Data16/Data32 flags to a few instructions.
+
+Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (OP_MASK_FR, OP_SH_FR): Define.
+ (OP_MASK_BCC, OP_SH_BCC): Define.
+ (OP_MASK_PREFX, OP_SH_PREFX): Define.
+ (OP_MASK_CCC, OP_SH_CCC): Define.
+ (INSN_READ_FPR_R): Define.
+ (INSN_RFE): Delete.
+
+Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k.h (enum m68k_architecture): Deleted.
+ (struct m68k_opcode_alias): New type.
+ (m68k_opcodes): Now const. Deleted opcode aliases with exactly
+ matching constraints, values and flags. As a side effect of this,
+ the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
+ as I know were never used, now may need re-examining.
+ (numopcodes): Now const.
+ (m68k_opcode_aliases, numaliases): New variables.
+ (endop): Deleted.
+ [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
+ m68k_opcode_aliases; update declaration of m68k_opcodes.
+
+Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hppa.h (delay_type): Delete unused enumeration.
+ (pa_opcode): Replace unused delayed field with an architecture
+ field.
+ (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
+
+Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (INSN_ISA4): Define.
+
+Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (M_DLA_AB, M_DLI): Define.
+
+Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hppa.h (fstwx): Fix single-bit error.
+
+Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
+
+Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * i386.h: added cpuid instruction , and dr[0-7] aliases for the
+ debug registers. From Charles Hannum (mycroft@netbsd.org).
+
+Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
+ i386 support:
+ * i386.h (MOV_AX_DISP32): New macro.
+ (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
+ of several call/return instructions.
+ (ADDR_PREFIX_OPCODE): New macro.
+
+Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
+
+ * ../include/opcode/vax.h (struct vot_wot, field `args'): make
+ it pointer to const char;
+ (struct vot, field `name'): ditto.
+
+Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * vax.h: Supply and properly group all values in end sentinel.
+
+Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * mips.h (INSN_ISA, INSN_4650): Define.
+
+Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
+ systems with a separate instruction and data cache, such as the
+ 29040, these instructions take an optional argument.
+
+Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
+
+ * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
+ INSN_TRAP.
+
+Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
+
+ * mips.h (INSN_STORE_MEMORY): Define.
+
+Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * sparc.h: Document new operand type 'x'.
+
+Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i960.h (I_CX2): New instruction category. It includes
+ instructions available on Cx and Jx processors.
+ (I_JX): New instruction category, for JX-only instructions.
+ (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
+ Jx-only instructions, in I_JX category.
+
+Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * ns32k.h (endop): Made pointer const too.
+
+Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
+
+ * ns32k.h: Drop Q operand type as there is no correct use
+ for it. Add I and Z operand types which allow better checking.
+
+Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
+
+ * h8300.h (xor.l) :fix bit pattern.
+ (L_2): New size of operand.
+ (trapa): Use it.
+
+Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * m68k.h: Move "trap" before "tpcc" to change disassembly.
+
+Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * sparc.h: Include v9 definitions.
+
+Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * m68k.h (m68060): Defined.
+ (m68040up, mfloat, mmmu): Include it.
+ (struct m68k_opcode): Widen `arch' field.
+ (m68k_opcodes): Updated for M68060. Removed comments that were
+ instructions commented out by "JF" years ago.
+
+Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
+ add a one-bit `flags' field.
+ (F_ALIAS): New macro.
+
+Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
+
+ * h8300.h (dec, inc): Get encoding right.
+
+Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h (struct powerpc_operand): Removed signedp field; just use
+ a flag instead.
+ (PPC_OPERAND_SIGNED): Define.
+ (PPC_OPERAND_SIGNOPT): Define.
+
+Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
+ prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
+
+Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i386.h: Reverse last change. It'll be handled in gas instead.
+
+Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i386.h (sar): Disabled the two-operand Imm1 form, since it was
+ slower on the 486 and used the implicit shift count despite the
+ explicit operand. The one-operand form is still available to get
+ the shorter form with the implicit shift count.
+
+Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
+
+ * hppa.h: Fix typo in fstws arg string.
+
+Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h (struct powerpc_opcode): Make operands field unsigned.
+
+Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h (PPC_OPCODE_601): Define.
+
+Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
+
+ * hppa.h (addb): Use '@' for addb and addib pseudo ops.
+ (so we can determine valid completers for both addb and addb[tf].)
+
+ * hppa.h (xmpyu): No floating point format specifier for the
+ xmpyu instruction.
+
+Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h (PPC_OPERAND_NEXT): Define.
+ (PPC_OPERAND_NEGATIVE): Change value to make room for above.
+ (struct powerpc_macro): Define.
+ (powerpc_macros, powerpc_num_macros): Declare.
+
+Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h: New file. Header file for PowerPC opcode table.
+
+Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
+
+ * hppa.h: More minor template fixes for sfu and copr (to allow
+ for easier disassembly).
+
+ * hppa.h: Fix templates for all the sfu and copr instructions.
+
+Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i386.h (push): Permit Imm16 operand too.
+
+Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * h8300.h (andc): Exists in base arch.
+
+Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
+
+ * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
+ * hppa.h: #undef NONE to avoid conflict with hiux include files.
+
+Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
+
+ * hppa.h: Add FP quadword store instructions.
+
+Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h: (M_J_A): Added.
+ (M_LA): Removed.
+
+Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
+ <mellon@pepper.ncd.com>.
+
+Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
+
+ * hppa.h: Immediate field in probei instructions is unsigned,
+ not low-sign extended.
+
+Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
+
+Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
+
+ * i386.h: Add "fxch" without operand.
+
+Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
+
+Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
+
+ * hppa.h: Add gfw and gfr to the opcode table.
+
+Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
+
+ * m88k.h: extended to handle m88110.
+
+Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
+
+ * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
+ addresses.
+
+Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * i960.h (i960_opcodes): Properly bracket initializers.
+
+Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
+
+ * m88k.h (BOFLAG): rewrite to avoid nested comment.
+
+Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * m68k.h (two): Protect second argument with parentheses.
+
+Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
+ Deleted old in/out instructions in "#if 0" section.
+
+Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * i386.h (i386_optab): Properly bracket initializers.
+
+Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
+ Jeff Law, law@cs.utah.edu).
+
+Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * i386.h (lcall): Accept Imm32 operand also.
+
+Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
+ (M_DABS): Added.
+
+Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h (INSN_*): Changed values. Removed unused definitions.
+ Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
+ INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
+ INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
+ INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
+ (M_*): Added new values for r6000 and r4000 macros.
+ (ANY_DELAY): Removed.
+
+Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h: Added M_LI_S and M_LI_SS.
+
+Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
+
+ * h8300.h: Get some rare mov.bs correct.
+
+Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
+
+ * sparc.h: Don't define const ourself; rely on ansidecl.h having
+ been included.
+
+Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
+
+ * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
+ jump instructions, for use in disassemblers.
+
+Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * m88k.h: Make bitfields just unsigned, not unsigned long or
+ unsigned short.
+
+Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
+
+ * hppa.h: New argument type 'y'. Use in various float instructions.
+
+Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
+
+ * hppa.h (break): First immediate field is unsigned.
+
+ * hppa.h: Add rfir instruction.
+
+Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
+
+ * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
+
+Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h: Reworked the hazard information somewhat, and fixed some
+ bugs in the instruction hazard descriptions.
+
+Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * m88k.h: Corrected a couple of opcodes.
+
+Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips.h: Replaced with version from Ralph Campbell and OSF. The
+ new version includes instruction hazard information, but is
+ otherwise reasonably similar.
+
+Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
+
+ * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
+
+Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
+
+ Patches from Jeff Law, law@cs.utah.edu:
+ * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
+ Make the tables be the same for the following instructions:
+ "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
+ "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
+ "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
+ "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
+ "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
+ "fcmp", and "ftest".
+
+ * hppa.h: Make new and old tables the same for "break", "mtctl",
+ "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
+ Fix typo in last patch. Collapse several #ifdefs into a
+ single #ifdef.
+
+ * hppa.h: Delete remaining OLD_TABLE code. Bring some
+ of the comments up-to-date.
+
+ * hppa.h: Update "free list" of letters and update
+ comments describing each letter's function.
+
+Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
+
+ * h8300.h: checkpoint, includes H8/300-H opcodes.
+
+Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
+
+ * Patches from Jeffrey Law <law@cs.utah.edu>.
+ * hppa.h: Rework single precision FP
+ instructions so that they correctly disassemble code
+ PA1.1 code.
+
+Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
+
+ * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
+ mov to allow instructions like mov ss,xyz(ecx) to assemble.
+
+Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
+
+ * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
+ gdb will define it for now.
+
+Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * sparc.h: Don't end enumerator list with comma.
+
+Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
+ * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
+ ("bc2t"): Correct typo.
+ ("[ls]wc[023]"): Use T rather than t.
+ ("c[0123]"): Define general coprocessor instructions.
+
+Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
+
+ * m68k.h: Move split point for gcc compilation more towards
+ middle.
+
+Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
+
+ * rs6k.h: Clean up instructions for primary opcode 19 (many were
+ simply wrong, ics, rfi, & rfsvc were missing).
+ Add "a" to opr_ext for "bb". Doc fix.
+
+Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
+
+ * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
+ * mips.h: Add casts, to suppress warnings about shifting too much.
+ * m68k.h: Document the placement code '9'.
+
+Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
+
+ * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
+ allows callers to break up the large initialized struct full of
+ opcodes into two half-sized ones. This permits GCC to compile
+ this module, since it takes exponential space for initializers.
+ (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
+
+Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
+
+ * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
+ * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
+ initialized structs in it.
+
+Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
+
+ Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
+ * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
+ (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
+
+Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
+
+ * mips.h: document "i" and "j" operands correctly.
+
+Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * mips.h: Removed endianness dependency.
+
+Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * h8300.h: include info on number of cycles per instruction.
+
+Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
+
+ * hppa.h: Move handy aliases to the front. Fix masks for extract
+ and deposit instructions.
+
+Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
+
+ * i386.h: accept shld and shrd both with and without the shift
+ count argument, which is always %cl.
+
+Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
+
+ * i386.h (i386_optab_end, i386_regtab_end): Now const.
+ (one_byte_segment_defaults, two_byte_segment_defaults,
+ i386_prefixtab_end): Ditto.
+
+Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
+
+ * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
+ for operand 2; from John Carr, jfc@dsg.dec.com.
+
+Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
+
+ * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
+ always use 16-bit offsets. Makes calculated-size jump tables
+ feasible.
+
+Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
+
+ * i386.h: Fix one-operand forms of in* and out* patterns.
+
+Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * m68k.h: Added CPU32 support.
+
+Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
+
+ * mips.h (break): Disassemble the argument. Patch from
+ jonathan@cs.stanford.edu (Jonathan Stone).
+
+Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
+
+ * m68k.h: merged Motorola and MIT syntax.
+
+Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * m68k.h (pmove): make the tests less strict, the 68k book is
+ wrong.
+
+Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
+
+ * m68k.h (m68ec030): Defined as alias for 68030.
+ (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
+ for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
+ them. Tightened description of "fmovex" to distinguish it from
+ some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
+ up descriptions that claimed versions were available for chips not
+ supporting them. Added "pmovefd".
+
+Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * m68k.h: fix where the . goes in divull
+
+Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
+
+ * m68k.h: the cas2 instruction is supposed to be written with
+ indirection on the last two operands, which can be either data or
+ address registers. Added a new operand type 'r' which accepts
+ either register type. Added new cases for cas2l and cas2w which
+ use them. Corrected masks for cas2 which failed to recognize use
+ of address register.
+
+Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
+
+ * m68k.h: Merged in patches (mostly m68040-specific) from
+ Colin Smith <colin@wrs.com>.
+
+ * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
+ base). Also cleaned up duplicates, re-ordered instructions for
+ the sake of dis-assembling (so aliases come after standard names).
+ * m68kmri.h: Now just defines some macros, and #includes m68k.h.
+
+Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
+
+ * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
+ all missing .s
+
+Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
+
+ * sparc.h: Moved tables to BFD library.
+
+ * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
+
+Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
+
+ * h8300.h: Finish filling in all the holes in the opcode table,
+ so that the Lucid C compiler can digest this as well...
+
+Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
+
+ * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
+ Fix opcodes on various sizes of fild/fist instructions
+ (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
+ Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
+
+Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
+
+ * h8300.h: Fill in all the holes in the opcode table so that the
+ losing HPUX C compiler can digest this...
+
+Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
+
+ * mips.h: Fix decoding of coprocessor instructions, somewhat.
+ (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
+
+Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
+
+ * sparc.h: Add new architecture variant sparclite; add its scan
+ and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
+
+Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
+
+ * mips.h: Add some more opcode synonyms (from Frank Yellin,
+ fy@lucid.com).
+
+Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
+
+ * rs6k.h: New version from IBM (Metin).
+
+Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
+
+ * rs6k.h: Fix incorrect extended opcode for instructions `fm'
+ and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
+
+Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
+
+ * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
+
+Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
+
+ * m68k.h (one, two): Cast macro args to unsigned to suppress
+ complaints from compiler and lint about integer overflow during
+ shift.
+
+Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
+
+ * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
+
+Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
+
+ * mips.h: Make bitfield layout depend on the HOST compiler,
+ not on the TARGET system.
+
+Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
+
+ * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
+ scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
+ <TRANLE@INTELLICORP.COM>.
+
+Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * h8300.h: turned op_type enum into #define list
+
+Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
+
+ * sparc.h: Remove "cypress" architecture. Remove "fitox" and
+ similar instructions -- they've been renamed to "fitoq", etc.
+ REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
+ number of arguments.
+ * h8300.h: Remove extra ; which produces compiler warning.
+
+Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
+
+ * sparc.h: fix opcode for tsubcctv.
+
+Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
+
+ * sparc.h: fba and cba are now aliases for fb and cb respectively.
+
+Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
+
+ * sparc.h (nop): Made the 'lose' field be even tighter,
+ so only a standard 'nop' is disassembled as a nop.
+
+Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
+
+ * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
+ disassembled as a nop.
+
+Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
+
+ * sparc.h: fix a typo.
+
+Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
+
+ * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
+ m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
+ vax.h, ChangeLog: renamed from ../<foo>-opcode.h
+
+
+Local Variables:
+version-control: never
+End:
diff --git a/include/opcode/a29k.h b/include/opcode/a29k.h
new file mode 100644
index 0000000..002e127
--- /dev/null
+++ b/include/opcode/a29k.h
@@ -0,0 +1,285 @@
+/* Table of opcodes for the AMD 29000 family.
+ Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB and GAS.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+struct a29k_opcode {
+ /* Name of the instruction. */
+ char *name;
+
+ /* Opcode word */
+ unsigned long opcode;
+
+ /* A string of characters which describe the operands.
+ Valid characters are:
+ , Itself. The character appears in the assembly code.
+ a RA. The register number is in bits 8-15 of the instruction.
+ b RB. The register number is in bits 0-7 of the instruction.
+ c RC. The register number is in bits 16-23 of the instruction.
+ i An immediate operand is in bits 0-7 of the instruction.
+ x Bits 0-7 and 16-23 of the instruction are bits 0-7 and 8-15
+ (respectively) of the immediate operand.
+ h Same as x but the instruction contains bits 16-31 of the
+ immediate operand.
+ X Same as x but bits 16-31 of the signed immediate operand
+ are set to 1 (thus the operand is always negative).
+ P,A Bits 0-7 and 16-23 of the instruction are bits 2-9 and 10-17
+ (respectively) of the immediate operand.
+ P=PC-relative, sign-extended to 32 bits.
+ A=Absolute, zero-extended to 32 bits.
+ e CE bit (bit 23) for a load/store instruction.
+ n Control field (bits 16-22) for a load/store instruction.
+ v Immediate operand in bits 16-23 of the instruction.
+ (used for trap numbers).
+ s SA. Special-purpose register number in bits 8-15
+ of the instruction.
+ u UI--bit 7 of the instruction.
+ r RND--bits 4-6 of the instruction.
+ d FD--bits 2-3 of the instruction.
+ f FS--bits 0-1 of the instruction.
+ I ID--bits 16-17 of the instruction.
+
+ Extensions for 29050:
+
+ d FMT--bits 2-3 of the instruction (not really new).
+ f ACN--bits 0-1 of the instruction (not really new).
+ F FUNC--Special function in bits 18-21 of the instruction.
+ C ACN--bits 16-17 specifying the accumlator register. */
+ char *args;
+};
+
+#ifndef CONST
+#define CONST
+#endif /* CONST */
+
+static CONST struct a29k_opcode a29k_opcodes[] =
+{
+
+{ "add", 0x14000000, "c,a,b" },
+{ "add", 0x15000000, "c,a,i" },
+{ "addc", 0x1c000000, "c,a,b" },
+{ "addc", 0x1d000000, "c,a,i" },
+{ "addcs", 0x18000000, "c,a,b" },
+{ "addcs", 0x19000000, "c,a,i" },
+{ "addcu", 0x1a000000, "c,a,b" },
+{ "addcu", 0x1b000000, "c,a,i" },
+{ "adds", 0x10000000, "c,a,b" },
+{ "adds", 0x11000000, "c,a,i" },
+{ "addu", 0x12000000, "c,a,b" },
+{ "addu", 0x13000000, "c,a,i" },
+{ "and", 0x90000000, "c,a,b" },
+{ "and", 0x91000000, "c,a,i" },
+{ "andn", 0x9c000000, "c,a,b" },
+{ "andn", 0x9d000000, "c,a,i" },
+{ "aseq", 0x70000000, "v,a,b" },
+{ "aseq", 0x71000000, "v,a,i" },
+{ "asge", 0x5c000000, "v,a,b" },
+{ "asge", 0x5d000000, "v,a,i" },
+{ "asgeu", 0x5e000000, "v,a,b" },
+{ "asgeu", 0x5f000000, "v,a,i" },
+{ "asgt", 0x58000000, "v,a,b" },
+{ "asgt", 0x59000000, "v,a,i" },
+{ "asgtu", 0x5a000000, "v,a,b" },
+{ "asgtu", 0x5b000000, "v,a,i" },
+{ "asle", 0x54000000, "v,a,b" },
+{ "asle", 0x55000000, "v,a,i" },
+{ "asleu", 0x56000000, "v,a,b" },
+{ "asleu", 0x57000000, "v,a,i" },
+{ "aslt", 0x50000000, "v,a,b" },
+{ "aslt", 0x51000000, "v,a,i" },
+{ "asltu", 0x52000000, "v,a,b" },
+{ "asltu", 0x53000000, "v,a,i" },
+{ "asneq", 0x72000000, "v,a,b" },
+{ "asneq", 0x73000000, "v,a,i" },
+{ "call", 0xa8000000, "a,P" },
+{ "call", 0xa9000000, "a,A" },
+{ "calli", 0xc8000000, "a,b" },
+{ "class", 0xe6000000, "c,a,f" },
+{ "clz", 0x08000000, "c,b" },
+{ "clz", 0x09000000, "c,i" },
+{ "const", 0x03000000, "a,x" },
+{ "consth", 0x02000000, "a,h" },
+{ "consthz", 0x05000000, "a,h" },
+{ "constn", 0x01000000, "a,X" },
+{ "convert", 0xe4000000, "c,a,u,r,d,f" },
+{ "cpbyte", 0x2e000000, "c,a,b" },
+{ "cpbyte", 0x2f000000, "c,a,i" },
+{ "cpeq", 0x60000000, "c,a,b" },
+{ "cpeq", 0x61000000, "c,a,i" },
+{ "cpge", 0x4c000000, "c,a,b" },
+{ "cpge", 0x4d000000, "c,a,i" },
+{ "cpgeu", 0x4e000000, "c,a,b" },
+{ "cpgeu", 0x4f000000, "c,a,i" },
+{ "cpgt", 0x48000000, "c,a,b" },
+{ "cpgt", 0x49000000, "c,a,i" },
+{ "cpgtu", 0x4a000000, "c,a,b" },
+{ "cpgtu", 0x4b000000, "c,a,i" },
+{ "cple", 0x44000000, "c,a,b" },
+{ "cple", 0x45000000, "c,a,i" },
+{ "cpleu", 0x46000000, "c,a,b" },
+{ "cpleu", 0x47000000, "c,a,i" },
+{ "cplt", 0x40000000, "c,a,b" },
+{ "cplt", 0x41000000, "c,a,i" },
+{ "cpltu", 0x42000000, "c,a,b" },
+{ "cpltu", 0x43000000, "c,a,i" },
+{ "cpneq", 0x62000000, "c,a,b" },
+{ "cpneq", 0x63000000, "c,a,i" },
+{ "dadd", 0xf1000000, "c,a,b" },
+{ "ddiv", 0xf7000000, "c,a,b" },
+{ "deq", 0xeb000000, "c,a,b" },
+{ "dge", 0xef000000, "c,a,b" },
+{ "dgt", 0xed000000, "c,a,b" },
+{ "div", 0x6a000000, "c,a,b" },
+{ "div", 0x6b000000, "c,a,i" },
+{ "div0", 0x68000000, "c,b" },
+{ "div0", 0x69000000, "c,i" },
+{ "divide", 0xe1000000, "c,a,b" },
+{ "dividu", 0xe3000000, "c,a,b" },
+{ "divl", 0x6c000000, "c,a,b" },
+{ "divl", 0x6d000000, "c,a,i" },
+{ "divrem", 0x6e000000, "c,a,b" },
+{ "divrem", 0x6f000000, "c,a,i" },
+{ "dmac", 0xd9000000, "F,C,a,b" },
+{ "dmsm", 0xdb000000, "c,a,b" },
+{ "dmul", 0xf5000000, "c,a,b" },
+{ "dsub", 0xf3000000, "c,a,b" },
+{ "emulate", 0xd7000000, "v,a,b" },
+{ "exbyte", 0x0a000000, "c,a,b" },
+{ "exbyte", 0x0b000000, "c,a,i" },
+{ "exhw", 0x7c000000, "c,a,b" },
+{ "exhw", 0x7d000000, "c,a,i" },
+{ "exhws", 0x7e000000, "c,a" },
+{ "extract", 0x7a000000, "c,a,b" },
+{ "extract", 0x7b000000, "c,a,i" },
+{ "fadd", 0xf0000000, "c,a,b" },
+{ "fdiv", 0xf6000000, "c,a,b" },
+{ "fdmul", 0xf9000000, "c,a,b" },
+{ "feq", 0xea000000, "c,a,b" },
+{ "fge", 0xee000000, "c,a,b" },
+{ "fgt", 0xec000000, "c,a,b" },
+{ "fmac", 0xd8000000, "F,C,a,b" },
+{ "fmsm", 0xda000000, "c,a,b" },
+{ "fmul", 0xf4000000, "c,a,b" },
+{ "fsub", 0xf2000000, "c,a,b" },
+{ "halt", 0x89000000, "" },
+{ "inbyte", 0x0c000000, "c,a,b" },
+{ "inbyte", 0x0d000000, "c,a,i" },
+{ "inhw", 0x78000000, "c,a,b" },
+{ "inhw", 0x79000000, "c,a,i" },
+{ "inv", 0x9f000000, "I" },
+{ "iret", 0x88000000, "" },
+{ "iretinv", 0x8c000000, "I" },
+{ "jmp", 0xa0000000, "P" },
+{ "jmp", 0xa1000000, "A" },
+{ "jmpf", 0xa4000000, "a,P" },
+{ "jmpf", 0xa5000000, "a,A" },
+{ "jmpfdec", 0xb4000000, "a,P" },
+{ "jmpfdec", 0xb5000000, "a,A" },
+{ "jmpfi", 0xc4000000, "a,b" },
+{ "jmpi", 0xc0000000, "b" },
+{ "jmpt", 0xac000000, "a,P" },
+{ "jmpt", 0xad000000, "a,A" },
+{ "jmpti", 0xcc000000, "a,b" },
+{ "load", 0x16000000, "e,n,a,b" },
+{ "load", 0x17000000, "e,n,a,i" },
+{ "loadl", 0x06000000, "e,n,a,b" },
+{ "loadl", 0x07000000, "e,n,a,i" },
+{ "loadm", 0x36000000, "e,n,a,b" },
+{ "loadm", 0x37000000, "e,n,a,i" },
+{ "loadset", 0x26000000, "e,n,a,b" },
+{ "loadset", 0x27000000, "e,n,a,i" },
+{ "mfacc", 0xe9000100, "c,d,f" },
+{ "mfsr", 0xc6000000, "c,s" },
+{ "mftlb", 0xb6000000, "c,a" },
+{ "mtacc", 0xe8010000, "a,d,f" },
+{ "mtsr", 0xce000000, "s,b" },
+{ "mtsrim", 0x04000000, "s,x" },
+{ "mttlb", 0xbe000000, "a,b" },
+{ "mul", 0x64000000, "c,a,b" },
+{ "mul", 0x65000000, "c,a,i" },
+{ "mull", 0x66000000, "c,a,b" },
+{ "mull", 0x67000000, "c,a,i" },
+{ "multiplu", 0xe2000000, "c,a,b" },
+{ "multiply", 0xe0000000, "c,a,b" },
+{ "multm", 0xde000000, "c,a,b" },
+{ "multmu", 0xdf000000, "c,a,b" },
+{ "mulu", 0x74000000, "c,a,b" },
+{ "mulu", 0x75000000, "c,a,i" },
+{ "nand", 0x9a000000, "c,a,b" },
+{ "nand", 0x9b000000, "c,a,i" },
+{ "nop", 0x70400101, "" },
+{ "nor", 0x98000000, "c,a,b" },
+{ "nor", 0x99000000, "c,a,i" },
+{ "or", 0x92000000, "c,a,b" },
+{ "or", 0x93000000, "c,a,i" },
+{ "orn", 0xaa000000, "c,a,b" },
+{ "orn", 0xab000000, "c,a,i" },
+
+/* The description of "setip" in Chapter 8 ("instruction set") of the user's
+ manual claims that these are absolute register numbers. But section
+ 7.2.1 explains that they are not. The latter is correct, so print
+ these normally ("lr0", "lr5", etc.). */
+{ "setip", 0x9e000000, "c,a,b" },
+
+{ "sll", 0x80000000, "c,a,b" },
+{ "sll", 0x81000000, "c,a,i" },
+{ "sqrt", 0xe5000000, "c,a,f" },
+{ "sra", 0x86000000, "c,a,b" },
+{ "sra", 0x87000000, "c,a,i" },
+{ "srl", 0x82000000, "c,a,b" },
+{ "srl", 0x83000000, "c,a,i" },
+{ "store", 0x1e000000, "e,n,a,b" },
+{ "store", 0x1f000000, "e,n,a,i" },
+{ "storel", 0x0e000000, "e,n,a,b" },
+{ "storel", 0x0f000000, "e,n,a,i" },
+{ "storem", 0x3e000000, "e,n,a,b" },
+{ "storem", 0x3f000000, "e,n,a,i" },
+{ "sub", 0x24000000, "c,a,b" },
+{ "sub", 0x25000000, "c,a,i" },
+{ "subc", 0x2c000000, "c,a,b" },
+{ "subc", 0x2d000000, "c,a,i" },
+{ "subcs", 0x28000000, "c,a,b" },
+{ "subcs", 0x29000000, "c,a,i" },
+{ "subcu", 0x2a000000, "c,a,b" },
+{ "subcu", 0x2b000000, "c,a,i" },
+{ "subr", 0x34000000, "c,a,b" },
+{ "subr", 0x35000000, "c,a,i" },
+{ "subrc", 0x3c000000, "c,a,b" },
+{ "subrc", 0x3d000000, "c,a,i" },
+{ "subrcs", 0x38000000, "c,a,b" },
+{ "subrcs", 0x39000000, "c,a,i" },
+{ "subrcu", 0x3a000000, "c,a,b" },
+{ "subrcu", 0x3b000000, "c,a,i" },
+{ "subrs", 0x30000000, "c,a,b" },
+{ "subrs", 0x31000000, "c,a,i" },
+{ "subru", 0x32000000, "c,a,b" },
+{ "subru", 0x33000000, "c,a,i" },
+{ "subs", 0x20000000, "c,a,b" },
+{ "subs", 0x21000000, "c,a,i" },
+{ "subu", 0x22000000, "c,a,b" },
+{ "subu", 0x23000000, "c,a,i" },
+{ "xnor", 0x96000000, "c,a,b" },
+{ "xnor", 0x97000000, "c,a,i" },
+{ "xor", 0x94000000, "c,a,b" },
+{ "xor", 0x95000000, "c,a,i" },
+
+{ "", 0x0, "" } /* Dummy entry, not included in NUM_OPCODES. This
+ lets code examine entry i+1 without checking
+ if we've run off the end of the table. */
+};
+
+CONST unsigned int num_opcodes = (((sizeof a29k_opcodes) / (sizeof a29k_opcodes[0])) - 1);
diff --git a/include/opcode/alpha.h b/include/opcode/alpha.h
new file mode 100644
index 0000000..d18eb04
--- /dev/null
+++ b/include/opcode/alpha.h
@@ -0,0 +1,238 @@
+/* alpha.h -- Header file for Alpha opcode table
+ Copyright 1996, 1999 Free Software Foundation, Inc.
+ Contributed by Richard Henderson <rth@tamu.edu>,
+ patterned after the PPC opcode table written by Ian Lance Taylor.
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef OPCODE_ALPHA_H
+#define OPCODE_ALPHA_H
+
+/* The opcode table is an array of struct alpha_opcode. */
+
+struct alpha_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* The opcode itself. Those bits which will be filled in with
+ operands are zeroes. */
+ unsigned opcode;
+
+ /* The opcode mask. This is used by the disassembler. This is a
+ mask containing ones indicating those bits which must match the
+ opcode field, and zeroes indicating those bits which need not
+ match (and are presumably filled in by operands). */
+ unsigned mask;
+
+ /* One bit flags for the opcode. These are primarily used to
+ indicate specific processors and environments support the
+ instructions. The defined values are listed below. */
+ unsigned flags;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[4];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct alpha_opcode alpha_opcodes[];
+extern const int alpha_num_opcodes;
+
+/* Values defined for the flags field of a struct alpha_opcode. */
+
+/* CPU Availability */
+#define AXP_OPCODE_BASE 0x0001 /* Base architecture -- all cpus. */
+#define AXP_OPCODE_EV4 0x0002 /* EV4 specific PALcode insns. */
+#define AXP_OPCODE_EV5 0x0004 /* EV5 specific PALcode insns. */
+#define AXP_OPCODE_EV6 0x0008 /* EV6 specific PALcode insns. */
+#define AXP_OPCODE_BWX 0x0100 /* Byte/word extension (amask bit 0). */
+#define AXP_OPCODE_CIX 0x0200 /* "Count" extension (amask bit 1). */
+#define AXP_OPCODE_MAX 0x0400 /* Multimedia extension (amask bit 8). */
+
+#define AXP_OPCODE_NOPAL (~(AXP_OPCODE_EV4|AXP_OPCODE_EV5|AXP_OPCODE_EV6))
+
+/* A macro to extract the major opcode from an instruction. */
+#define AXP_OP(i) (((i) >> 26) & 0x3F)
+
+/* The total number of major opcodes. */
+#define AXP_NOPS 0x40
+
+
+/* The operands table is an array of struct alpha_operand. */
+
+struct alpha_operand
+{
+ /* The number of bits in the operand. */
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+ int shift;
+
+ /* The default relocation type for this operand. */
+ int default_reloc;
+
+ /* One bit syntax flags. */
+ unsigned flags;
+
+ /* Insertion function. This is used by the assembler. To insert an
+ operand value into an instruction, check this field.
+
+ If it is NULL, execute
+ i |= (op & ((1 << o->bits) - 1)) << o->shift;
+ (i is the instruction which we are filling in, o is a pointer to
+ this structure, and op is the opcode value; this assumes twos
+ complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction and the operand value. It will return the new value
+ of the instruction. If the ERRMSG argument is not NULL, then if
+ the operand value is illegal, *ERRMSG will be set to a warning
+ string (the operand will be inserted in any case). If the
+ operand value is legal, *ERRMSG will be unchanged (most operands
+ can accept any value). */
+ unsigned (*insert) PARAMS ((unsigned instruction, int op,
+ const char **errmsg));
+
+ /* Extraction function. This is used by the disassembler. To
+ extract this operand type from an instruction, check this field.
+
+ If it is NULL, compute
+ op = ((i) >> o->shift) & ((1 << o->bits) - 1);
+ if ((o->flags & AXP_OPERAND_SIGNED) != 0
+ && (op & (1 << (o->bits - 1))) != 0)
+ op -= 1 << o->bits;
+ (i is the instruction, o is a pointer to this structure, and op
+ is the result; this assumes twos complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction value. It will return the value of the operand. If
+ the INVALID argument is not NULL, *INVALID will be set to
+ non-zero if this operand type can not actually be extracted from
+ this operand (i.e., the instruction does not match). If the
+ operand is valid, *INVALID will not be changed. */
+ int (*extract) PARAMS ((unsigned instruction, int *invalid));
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the alpha_opcodes table. */
+
+extern const struct alpha_operand alpha_operands[];
+extern const int alpha_num_operands;
+
+/* Values defined for the flags field of a struct alpha_operand. */
+
+/* Mask for selecting the type for typecheck purposes */
+#define AXP_OPERAND_TYPECHECK_MASK \
+ (AXP_OPERAND_PARENS | AXP_OPERAND_COMMA | AXP_OPERAND_IR | \
+ AXP_OPERAND_FPR | AXP_OPERAND_RELATIVE | AXP_OPERAND_SIGNED | \
+ AXP_OPERAND_UNSIGNED)
+
+/* This operand does not actually exist in the assembler input. This
+ is used to support extended mnemonics, for which two operands fields
+ are identical. The assembler should call the insert function with
+ any op value. The disassembler should call the extract function,
+ ignore the return value, and check the value placed in the invalid
+ argument. */
+#define AXP_OPERAND_FAKE 01
+
+/* The operand should be wrapped in parentheses rather than separated
+ from the previous by a comma. This is used for the load and store
+ instructions which want their operands to look like "Ra,disp(Rb)". */
+#define AXP_OPERAND_PARENS 02
+
+/* Used in combination with PARENS, this supresses the supression of
+ the comma. This is used for "jmp Ra,(Rb),hint". */
+#define AXP_OPERAND_COMMA 04
+
+/* This operand names an integer register. */
+#define AXP_OPERAND_IR 010
+
+/* This operand names a floating point register. */
+#define AXP_OPERAND_FPR 020
+
+/* This operand is a relative branch displacement. The disassembler
+ prints these symbolically if possible. */
+#define AXP_OPERAND_RELATIVE 040
+
+/* This operand takes signed values. */
+#define AXP_OPERAND_SIGNED 0100
+
+/* This operand takes unsigned values. This exists primarily so that
+ a flags value of 0 can be treated as end-of-arguments. */
+#define AXP_OPERAND_UNSIGNED 0200
+
+/* Supress overflow detection on this field. This is used for hints. */
+#define AXP_OPERAND_NOOVERFLOW 0400
+
+/* Mask for optional argument default value. */
+#define AXP_OPERAND_OPTIONAL_MASK 07000
+
+/* This operand defaults to zero. This is used for jump hints. */
+#define AXP_OPERAND_DEFAULT_ZERO 01000
+
+/* This operand should default to the first (real) operand and is used
+ in conjunction with AXP_OPERAND_OPTIONAL. This allows
+ "and $0,3,$0" to be written as "and $0,3", etc. I don't like
+ it, but it's what DEC does. */
+#define AXP_OPERAND_DEFAULT_FIRST 02000
+
+/* Similarly, this operand should default to the second (real) operand.
+ This allows "negl $0" instead of "negl $0,$0". */
+#define AXP_OPERAND_DEFAULT_SECOND 04000
+
+
+/* Register common names */
+
+#define AXP_REG_V0 0
+#define AXP_REG_T0 1
+#define AXP_REG_T1 2
+#define AXP_REG_T2 3
+#define AXP_REG_T3 4
+#define AXP_REG_T4 5
+#define AXP_REG_T5 6
+#define AXP_REG_T6 7
+#define AXP_REG_T7 8
+#define AXP_REG_S0 9
+#define AXP_REG_S1 10
+#define AXP_REG_S2 11
+#define AXP_REG_S3 12
+#define AXP_REG_S4 13
+#define AXP_REG_S5 14
+#define AXP_REG_FP 15
+#define AXP_REG_A0 16
+#define AXP_REG_A1 17
+#define AXP_REG_A2 18
+#define AXP_REG_A3 19
+#define AXP_REG_A4 20
+#define AXP_REG_A5 21
+#define AXP_REG_T8 22
+#define AXP_REG_T9 23
+#define AXP_REG_T10 24
+#define AXP_REG_T11 25
+#define AXP_REG_RA 26
+#define AXP_REG_PV 27
+#define AXP_REG_T12 27
+#define AXP_REG_AT 28
+#define AXP_REG_GP 29
+#define AXP_REG_SP 30
+#define AXP_REG_ZERO 31
+
+#endif /* OPCODE_ALPHA_H */
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
new file mode 100644
index 0000000..a1e0ca1
--- /dev/null
+++ b/include/opcode/arc.h
@@ -0,0 +1,274 @@
+/* Opcode table for the ARC.
+ Copyright 1994, 1995, 1997 Free Software Foundation, Inc.
+ Contributed by Doug Evans (dje@cygnus.com).
+
+This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and
+the GNU Binutils.
+
+GAS/GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GAS/GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS or GDB; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* List of the various cpu types.
+ The tables currently use bit masks to say whether the instruction or
+ whatever is supported by a particular cpu. This lets us have one entry
+ apply to several cpus.
+
+ This duplicates bfd_mach_arc_xxx. For now I wish to isolate this from bfd
+ and bfd from this. Also note that these numbers are bit values as we want
+ to allow for things available on more than one ARC (but not necessarily all
+ ARCs). */
+
+/* The `base' cpu must be 0 (table entries are omitted for the base cpu).
+ The cpu type is treated independently of endianness.
+ The complete `mach' number includes endianness.
+ These values are internal to opcodes/bfd/binutils/gas. */
+#define ARC_MACH_BASE 0
+#define ARC_MACH_UNUSED1 1
+#define ARC_MACH_UNUSED2 2
+#define ARC_MACH_UNUSED4 4
+/* Additional cpu values can be inserted here and ARC_MACH_BIG moved down. */
+#define ARC_MACH_BIG 8
+
+/* Mask of number of bits necessary to record cpu type. */
+#define ARC_MACH_CPU_MASK 7
+/* Mask of number of bits necessary to record cpu type + endianness. */
+#define ARC_MACH_MASK 15
+
+/* Type to denote an ARC instruction (at least a 32 bit unsigned int). */
+typedef unsigned int arc_insn;
+
+struct arc_opcode {
+ char *syntax; /* syntax of insn */
+ unsigned long mask, value; /* recognize insn if (op&mask)==value */
+ int flags; /* various flag bits */
+
+/* Values for `flags'. */
+
+/* Return CPU number, given flag bits. */
+#define ARC_OPCODE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK)
+/* Return MACH number, given flag bits. */
+#define ARC_OPCODE_MACH(bits) ((bits) & ARC_MACH_MASK)
+/* First opcode flag bit available after machine mask. */
+#define ARC_OPCODE_FLAG_START ((ARC_MACH_MASK + 1) << 0)
+/* This insn is a conditional branch. */
+#define ARC_OPCODE_COND_BRANCH (ARC_OPCODE_FLAG_START)
+
+ /* These values are used to optimize assembly and disassembly. Each insn is
+ on a list of related insns (same first letter for assembly, same insn code
+ for disassembly). */
+ struct arc_opcode *next_asm; /* Next instruction to try during assembly. */
+ struct arc_opcode *next_dis; /* Next instruction to try during disassembly. */
+
+ /* Macros to create the hash values for the lists. */
+#define ARC_HASH_OPCODE(string) \
+ ((string)[0] >= 'a' && (string)[0] <= 'z' ? (string)[0] - 'a' : 26)
+#define ARC_HASH_ICODE(insn) \
+ ((unsigned int) (insn) >> 27)
+
+ /* Macros to access `next_asm', `next_dis' so users needn't care about the
+ underlying mechanism. */
+#define ARC_OPCODE_NEXT_ASM(op) ((op)->next_asm)
+#define ARC_OPCODE_NEXT_DIS(op) ((op)->next_dis)
+};
+
+struct arc_operand_value {
+ char *name; /* eg: "eq" */
+ short value; /* eg: 1 */
+ unsigned char type; /* index into `arc_operands' */
+ unsigned char flags; /* various flag bits */
+
+/* Values for `flags'. */
+
+/* Return CPU number, given flag bits. */
+#define ARC_OPVAL_CPU(bits) ((bits) & ARC_MACH_CPU_MASK)
+/* Return MACH number, given flag bits. */
+#define ARC_OPVAL_MACH(bits) ((bits) & ARC_MACH_MASK)
+};
+
+struct arc_operand {
+ /* One of the insn format chars. */
+ unsigned char fmt;
+
+ /* The number of bits in the operand (may be unused for a modifier). */
+ unsigned char bits;
+
+ /* How far the operand is left shifted in the instruction, or
+ the modifier's flag bit (may be unused for a modifier. */
+ unsigned char shift;
+
+ /* Various flag bits. */
+ int flags;
+
+/* Values for `flags'. */
+
+/* This operand is a suffix to the opcode. */
+#define ARC_OPERAND_SUFFIX 1
+
+/* This operand is a relative branch displacement. The disassembler
+ prints these symbolically if possible. */
+#define ARC_OPERAND_RELATIVE_BRANCH 2
+
+/* This operand is an absolute branch address. The disassembler
+ prints these symbolically if possible. */
+#define ARC_OPERAND_ABSOLUTE_BRANCH 4
+
+/* This operand is an address. The disassembler
+ prints these symbolically if possible. */
+#define ARC_OPERAND_ADDRESS 8
+
+/* This operand is a long immediate value. */
+#define ARC_OPERAND_LIMM 0x10
+
+/* This operand takes signed values. */
+#define ARC_OPERAND_SIGNED 0x20
+
+/* This operand takes signed values, but also accepts a full positive
+ range of values. That is, if bits is 16, it takes any value from
+ -0x8000 to 0xffff. */
+#define ARC_OPERAND_SIGNOPT 0x40
+
+/* This operand should be regarded as a negative number for the
+ purposes of overflow checking (i.e., the normal most negative
+ number is disallowed and one more than the normal most positive
+ number is allowed). This flag will only be set for a signed
+ operand. */
+#define ARC_OPERAND_NEGATIVE 0x80
+
+/* This operand doesn't really exist. The program uses these operands
+ in special ways. */
+#define ARC_OPERAND_FAKE 0x100
+
+/* Modifier values. */
+/* A dot is required before a suffix. Eg: .le */
+#define ARC_MOD_DOT 0x1000
+
+/* A normal register is allowed (not used, but here for completeness). */
+#define ARC_MOD_REG 0x2000
+
+/* An auxiliary register name is expected. */
+#define ARC_MOD_AUXREG 0x4000
+
+/* Sum of all ARC_MOD_XXX bits. */
+#define ARC_MOD_BITS 0x7000
+
+/* Non-zero if the operand type is really a modifier. */
+#define ARC_MOD_P(X) ((X) & ARC_MOD_BITS)
+
+ /* Insertion function. This is used by the assembler. To insert an
+ operand value into an instruction, check this field.
+
+ If it is NULL, execute
+ i |= (p & ((1 << o->bits) - 1)) << o->shift;
+ (I is the instruction which we are filling in, O is a pointer to
+ this structure, and OP is the opcode value; this assumes twos
+ complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction and the operand value. It will return the new value
+ of the instruction. If the ERRMSG argument is not NULL, then if
+ the operand value is illegal, *ERRMSG will be set to a warning
+ string (the operand will be inserted in any case). If the
+ operand value is legal, *ERRMSG will be unchanged.
+
+ REG is non-NULL when inserting a register value. */
+
+ arc_insn (*insert) PARAMS ((arc_insn insn,
+ const struct arc_operand *operand, int mods,
+ const struct arc_operand_value *reg, long value,
+ const char **errmsg));
+
+ /* Extraction function. This is used by the disassembler. To
+ extract this operand type from an instruction, check this field.
+
+ If it is NULL, compute
+ op = ((i) >> o->shift) & ((1 << o->bits) - 1);
+ if ((o->flags & ARC_OPERAND_SIGNED) != 0
+ && (op & (1 << (o->bits - 1))) != 0)
+ op -= 1 << o->bits;
+ (I is the instruction, O is a pointer to this structure, and OP
+ is the result; this assumes twos complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction value. It will return the value of the operand. If
+ the INVALID argument is not NULL, *INVALID will be set to
+ non-zero if this operand type can not actually be extracted from
+ this operand (i.e., the instruction does not match). If the
+ operand is valid, *INVALID will not be changed.
+
+ INSN is a pointer to an array of two `arc_insn's. The first element is
+ the insn, the second is the limm if present.
+
+ Operands that have a printable form like registers and suffixes have
+ their struct arc_operand_value pointer stored in OPVAL. */
+
+ long (*extract) PARAMS ((arc_insn *insn,
+ const struct arc_operand *operand,
+ int mods, const struct arc_operand_value **opval,
+ int *invalid));
+};
+
+/* Bits that say what version of cpu we have.
+ These should be passed to arc_init_opcode_tables.
+ At present, all there is is the cpu type. */
+
+/* CPU number, given value passed to `arc_init_opcode_tables'. */
+#define ARC_HAVE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK)
+/* MACH number, given value passed to `arc_init_opcode_tables'. */
+#define ARC_HAVE_MACH(bits) ((bits) & ARC_MACH_MASK)
+
+/* Special register values: */
+#define ARC_REG_SHIMM_UPDATE 61
+#define ARC_REG_SHIMM 63
+#define ARC_REG_LIMM 62
+
+/* Non-zero if REG is a constant marker. */
+#define ARC_REG_CONSTANT_P(REG) ((REG) >= 61)
+
+/* Positions and masks of various fields: */
+#define ARC_SHIFT_REGA 21
+#define ARC_SHIFT_REGB 15
+#define ARC_SHIFT_REGC 9
+#define ARC_MASK_REG 63
+
+/* Delay slot types. */
+#define ARC_DELAY_NONE 0 /* no delay slot */
+#define ARC_DELAY_NORMAL 1 /* delay slot in both cases */
+#define ARC_DELAY_JUMP 2 /* delay slot only if branch taken */
+
+/* Non-zero if X will fit in a signed 9 bit field. */
+#define ARC_SHIMM_CONST_P(x) ((long) (x) >= -256 && (long) (x) <= 255)
+
+extern const struct arc_operand arc_operands[];
+extern const int arc_operand_count;
+extern /*const*/ struct arc_opcode arc_opcodes[];
+extern const int arc_opcodes_count;
+extern const struct arc_operand_value arc_suffixes[];
+extern const int arc_suffixes_count;
+extern const struct arc_operand_value arc_reg_names[];
+extern const int arc_reg_names_count;
+extern unsigned char arc_operand_map[];
+
+/* Utility fns in arc-opc.c. */
+int arc_get_opcode_mach PARAMS ((int, int));
+/* `arc_opcode_init_tables' must be called before `arc_xxx_supported'. */
+void arc_opcode_init_tables PARAMS ((int));
+void arc_opcode_init_insert PARAMS ((void));
+void arc_opcode_init_extract PARAMS ((void));
+const struct arc_opcode *arc_opcode_lookup_asm PARAMS ((const char *));
+const struct arc_opcode *arc_opcode_lookup_dis PARAMS ((unsigned int));
+int arc_opcode_limm_p PARAMS ((long *));
+const struct arc_operand_value *arc_opcode_lookup_suffix PARAMS ((const struct arc_operand *type, int value));
+int arc_opcode_supported PARAMS ((const struct arc_opcode *));
+int arc_opval_supported PARAMS ((const struct arc_operand_value *));
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
new file mode 100644
index 0000000..c7087eb
--- /dev/null
+++ b/include/opcode/arm.h
@@ -0,0 +1,294 @@
+/* ARM opcode list.
+ Copyright (C) 1989, Free Software Foundation, Inc.
+
+This file is part of GDB and GAS.
+
+GDB and GAS are free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GDB and GAS are distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GDB or GAS; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* types of instruction (encoded in bits 26 and 27 of the instruction) */
+
+#define TYPE_ARITHMETIC 0
+#define TYPE_LDR_STR 1
+#define TYPE_BLOCK_BRANCH 2
+#define TYPE_SWI 3
+
+/* bit 25 decides whether an instruction is a block move or a branch */
+#define SUBTYPE_BLOCK 0
+#define SUBTYPE_BRANCH 1
+
+/* codes to distinguish the arithmetic instructions */
+
+#define OPCODE_AND 0
+#define OPCODE_EOR 1
+#define OPCODE_SUB 2
+#define OPCODE_RSB 3
+#define OPCODE_ADD 4
+#define OPCODE_ADC 5
+#define OPCODE_SBC 6
+#define OPCODE_RSC 7
+#define OPCODE_TST 8
+#define OPCODE_TEQ 9
+#define OPCODE_CMP 10
+#define OPCODE_CMN 11
+#define OPCODE_ORR 12
+#define OPCODE_MOV 13
+#define OPCODE_BIC 14
+#define OPCODE_MVN 15
+
+/* condition codes */
+
+#define COND_EQ 0
+#define COND_NE 1
+#define COND_CS 2
+#define COND_CC 3
+#define COND_MI 4
+#define COND_PL 5
+#define COND_VS 6
+#define COND_VC 7
+#define COND_HI 8
+#define COND_LS 9
+#define COND_GE 10
+#define COND_LT 11
+#define COND_GT 12
+#define COND_LE 13
+#define COND_AL 14
+#define COND_NV 15
+
+/* Describes the format of an ARM machine instruction */
+
+struct generic_fmt {
+ unsigned rest :25; /* the rest of the instruction */
+ unsigned subtype :1; /* used to decide between block and branch */
+ unsigned type :2; /* one of TYPE_* */
+ unsigned cond :4; /* one of COND_* defined above */
+};
+
+struct arith_fmt {
+ unsigned operand2 :12; /* #nn or rn or rn shift #m or rn shift rm */
+ unsigned dest :4; /* place where the answer goes */
+ unsigned operand1 :4; /* first operand to instruction */
+ unsigned set :1; /* == 1 means set processor flags */
+ unsigned opcode :4; /* one of OPCODE_* defined above */
+ unsigned immed :1; /* operand2 is an immediate value */
+ unsigned type :2; /* == TYPE_ARITHMETIC */
+ unsigned cond :4; /* one of COND_* defined above */
+};
+
+struct ldr_str_fmt {
+ unsigned offset :12; /* #nn or rn or rn shift #m */
+ unsigned reg :4; /* destination for LDR, source for STR */
+ unsigned base :4; /* base register */
+ unsigned is_load :1; /* == 1 for LDR */
+ unsigned writeback :1; /* == 1 means write back (base+offset) into base */
+ unsigned byte :1; /* == 1 means byte access else word */
+ unsigned up :1; /* == 1 means add offset else subtract it */
+ unsigned pre_index :1; /* == 1 means [a,b] form else [a],b form */
+ unsigned immed :1; /* == 0 means immediate offset */
+ unsigned type :2; /* == TYPE_LDR_STR */
+ unsigned cond :4; /* one of COND_* defined above */
+};
+
+struct block_fmt {
+ unsigned mask :16; /* register mask */
+ unsigned base :4; /* register used as base of move */
+ unsigned is_load :1; /* == 1 for LDM */
+ unsigned writeback :1; /* == 1 means update base after move */
+ unsigned set :1; /* == 1 means set flags in pc if included in mask */
+ unsigned increment :1; /* == 1 means increment base register */
+ unsigned before :1; /* == 1 means inc/dec before each move */
+ unsigned is_block :1; /* == SUBTYPE_BLOCK */
+ unsigned type :2; /* == TYPE_BLOCK_BRANCH */
+ unsigned cond :4; /* one of COND_* defined above */
+};
+
+struct branch_fmt {
+ unsigned dest :24; /* destination of the branch */
+ unsigned link :1; /* branch with link (function call) */
+ unsigned is_branch :1; /* == SUBTYPE_BRANCH */
+ unsigned type :2; /* == TYPE_BLOCK_BRANCH */
+ unsigned cond :4; /* one of COND_* defined above */
+};
+
+#define ROUND_N 0
+#define ROUND_P 1
+#define ROUND_M 2
+#define ROUND_Z 3
+
+#define FLOAT2_MVF 0
+#define FLOAT2_MNF 1
+#define FLOAT2_ABS 2
+#define FLOAT2_RND 3
+#define FLOAT2_SQT 4
+#define FLOAT2_LOG 5
+#define FLOAT2_LGN 6
+#define FLOAT2_EXP 7
+#define FLOAT2_SIN 8
+#define FLOAT2_COS 9
+#define FLOAT2_TAN 10
+#define FLOAT2_ASN 11
+#define FLOAT2_ACS 12
+#define FLOAT2_ATN 13
+
+#define FLOAT3_ADF 0
+#define FLOAT3_MUF 1
+#define FLOAT3_SUF 2
+#define FLOAT3_RSF 3
+#define FLOAT3_DVF 4
+#define FLOAT3_RDF 5
+#define FLOAT3_POW 6
+#define FLOAT3_RPW 7
+#define FLOAT3_RMF 8
+#define FLOAT3_FML 9
+#define FLOAT3_FDV 10
+#define FLOAT3_FRD 11
+#define FLOAT3_POL 12
+
+struct float2_fmt {
+ unsigned operand2 :3; /* second operand */
+ unsigned immed :1; /* == 1 if second operand is a constant */
+ unsigned pad1 :1; /* == 0 */
+ unsigned rounding :2; /* ROUND_* */
+ unsigned is_double :1; /* == 1 if precision is double (only if not extended) */
+ unsigned pad2 :4; /* == 1 */
+ unsigned dest :3; /* destination */
+ unsigned is_2_op :1; /* == 1 if 2 operand ins */
+ unsigned operand1 :3; /* first operand (only of is_2_op == 0) */
+ unsigned is_extended :1; /* == 1 if precision is extended */
+ unsigned opcode :4; /* FLOAT2_* or FLOAT3_* depending on is_2_op */
+ unsigned must_be_2 :2; /* == 2 */
+ unsigned type :2; /* == TYPE_SWI */
+ unsigned cond :4; /* COND_* */
+};
+
+struct swi_fmt {
+ unsigned argument :24; /* argument to SWI (syscall number) */
+ unsigned must_be_3 :2; /* == 3 */
+ unsigned type :2; /* == TYPE_SWI */
+ unsigned cond :4; /* one of COND_* defined above */
+};
+
+union insn_fmt {
+ struct generic_fmt generic;
+ struct arith_fmt arith;
+ struct ldr_str_fmt ldr_str;
+ struct block_fmt block;
+ struct branch_fmt branch;
+ struct swi_fmt swi;
+ unsigned long ins;
+};
+
+struct opcode {
+ unsigned long value, mask; /* recognise instruction if (op&mask)==value */
+ char *assembler; /* how to disassemble this instruction */
+};
+
+/* format of the assembler string :
+
+ %% %
+ %<bitfield>d print the bitfield in decimal
+ %<bitfield>x print the bitfield in hex
+ %<bitfield>r print as an ARM register
+ %<bitfield>f print a floating point constant if >7 else an fp register
+ %c print condition code (always bits 28-31)
+ %P print floating point precision in arithmetic insn
+ %Q print floating point precision in ldf/stf insn
+ %R print floating point rounding mode
+ %<bitnum>'c print specified char iff bit is one
+ %<bitnum>`c print specified char iff bit is zero
+ %<bitnum>?ab print a if bit is one else print b
+ %p print 'p' iff bits 12-15 are 15
+ %o print operand2 (immediate or register + shift)
+ %a print address for ldr/str instruction
+ %b print branch destination
+ %A print address for ldc/stc/ldf/stf instruction
+ %m print register mask for ldm/stm instruction
+*/
+
+static struct opcode opcodes[] = {
+ /* ARM instructions */
+ 0x00000090, 0x0fe000f0, "mul%20's %12-15r, %16-19r, %0-3r",
+ 0x00200090, 0x0fe000f0, "mla%20's %12-15r, %16-19r, %0-3r, %8-11r",
+ 0x00000000, 0x0de00000, "and%c%20's %12-15r, %16-19r, %o",
+ 0x00200000, 0x0de00000, "eor%c%20's %12-15r, %16-19r, %o",
+ 0x00400000, 0x0de00000, "sub%c%20's %12-15r, %16-19r, %o",
+ 0x00600000, 0x0de00000, "rsb%c%20's %12-15r, %16-19r, %o",
+ 0x00800000, 0x0de00000, "add%c%20's %12-15r, %16-19r, %o",
+ 0x00a00000, 0x0de00000, "adc%c%20's %12-15r, %16-19r, %o",
+ 0x00c00000, 0x0de00000, "sbc%c%20's %12-15r, %16-19r, %o",
+ 0x00e00000, 0x0de00000, "rsc%c%20's %12-15r, %16-19r, %o",
+ 0x01000000, 0x0de00000, "tst%c%p %16-19r, %o",
+ 0x01200000, 0x0de00000, "teq%c%p %16-19r, %o",
+ 0x01400000, 0x0de00000, "cmp%c%p %16-19r, %o",
+ 0x01600000, 0x0de00000, "cmn%c%p %16-19r, %o",
+ 0x01800000, 0x0de00000, "orr%c%20's %12-15r, %16-19r, %o",
+ 0x01a00000, 0x0de00000, "mov%c%20's %12-15r, %o",
+ 0x01c00000, 0x0de00000, "bic%c%20's %12-15r, %16-19r, %o",
+ 0x01e00000, 0x0de00000, "mvn%c%20's %12-15r, %o",
+ 0x04000000, 0x0c100000, "str%c%22'b %12-15r, %a",
+ 0x04100000, 0x0c100000, "ldr%c%22'b %12-15r, %a",
+ 0x08000000, 0x0e100000, "stm%c%23?id%24?ba %16-19r%22`!, %m",
+ 0x08100000, 0x0e100000, "ldm%c%23?id%24?ba %16-19r%22`!, %m%22'^",
+ 0x0a000000, 0x0e000000, "b%c%24'l %b",
+ 0x0f000000, 0x0f000000, "swi%c %0-23x",
+ /* Floating point coprocessor instructions */
+ 0x0e000100, 0x0ff08f10, "adf%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e100100, 0x0ff08f10, "muf%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e200100, 0x0ff08f10, "suf%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e300100, 0x0ff08f10, "rsf%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e400100, 0x0ff08f10, "dvf%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e500100, 0x0ff08f10, "rdf%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e600100, 0x0ff08f10, "pow%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e700100, 0x0ff08f10, "rpw%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e800100, 0x0ff08f10, "rmf%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e900100, 0x0ff08f10, "fml%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0ea00100, 0x0ff08f10, "fdv%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0eb00100, 0x0ff08f10, "frd%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0ec00100, 0x0ff08f10, "pol%c%P%R %12-14f, %16-18f, %0-3f",
+ 0x0e008100, 0x0ff08f10, "mvf%c%P%R %12-14f, %0-3f",
+ 0x0e108100, 0x0ff08f10, "mnf%c%P%R %12-14f, %0-3f",
+ 0x0e208100, 0x0ff08f10, "abs%c%P%R %12-14f, %0-3f",
+ 0x0e308100, 0x0ff08f10, "rnd%c%P%R %12-14f, %0-3f",
+ 0x0e408100, 0x0ff08f10, "sqt%c%P%R %12-14f, %0-3f",
+ 0x0e508100, 0x0ff08f10, "log%c%P%R %12-14f, %0-3f",
+ 0x0e608100, 0x0ff08f10, "lgn%c%P%R %12-14f, %0-3f",
+ 0x0e708100, 0x0ff08f10, "exp%c%P%R %12-14f, %0-3f",
+ 0x0e808100, 0x0ff08f10, "sin%c%P%R %12-14f, %0-3f",
+ 0x0e908100, 0x0ff08f10, "cos%c%P%R %12-14f, %0-3f",
+ 0x0ea08100, 0x0ff08f10, "tan%c%P%R %12-14f, %0-3f",
+ 0x0eb08100, 0x0ff08f10, "asn%c%P%R %12-14f, %0-3f",
+ 0x0ec08100, 0x0ff08f10, "acs%c%P%R %12-14f, %0-3f",
+ 0x0ed08100, 0x0ff08f10, "atn%c%P%R %12-14f, %0-3f",
+ 0x0e000110, 0x0ff00f1f, "flt%c%P%R %16-18f, %12-15r",
+ 0x0e100110, 0x0fff0f98, "fix%c%R %12-15r, %0-2f",
+ 0x0e200110, 0x0fff0fff, "wfs%c %12-15r",
+ 0x0e300110, 0x0fff0fff, "rfs%c %12-15r",
+ 0x0e400110, 0x0fff0fff, "wfc%c %12-15r",
+ 0x0e500110, 0x0fff0fff, "rfc%c %12-15r",
+ 0x0e90f110, 0x0ff8fff0, "cmf%c %16-18f, %0-3f",
+ 0x0eb0f110, 0x0ff8fff0, "cnf%c %16-18f, %0-3f",
+ 0x0ed0f110, 0x0ff8fff0, "cmfe%c %16-18f, %0-3f",
+ 0x0ef0f110, 0x0ff8fff0, "cnfe%c %16-18f, %0-3f",
+ 0x0c000100, 0x0e100f00, "stf%c%Q %12-14f, %A",
+ 0x0c100100, 0x0e100f00, "ldf%c%Q %12-14f, %A",
+ /* Generic coprocessor instructions */
+ 0x0e000000, 0x0f000010, "cdp%c %8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}",
+ 0x0e000010, 0x0f100010, "mrc%c %8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}",
+ 0x0e100010, 0x0f100010, "mcr%c %8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}",
+ 0x0c000000, 0x0e100000, "stc%c%22`l %8-11d, cr%12-15d, %A",
+ 0x0c100000, 0x0e100000, "ldc%c%22`l %8-11d, cr%12-15d, %A",
+ /* the rest */
+ 0x00000000, 0x00000000, "undefined instruction %0-31x",
+};
+#define N_OPCODES (sizeof opcodes / sizeof opcodes[0])
diff --git a/include/opcode/cgen.h b/include/opcode/cgen.h
new file mode 100644
index 0000000..84542a3
--- /dev/null
+++ b/include/opcode/cgen.h
@@ -0,0 +1,1380 @@
+/* Header file for targets using CGEN: Cpu tools GENerator.
+
+Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+
+This file is part of GDB, the GNU debugger, and the GNU Binutils.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef CGEN_H
+#define CGEN_H
+
+/* ??? This file requires bfd.h but only to get bfd_vma.
+ Seems like an awful lot to require just to get such a fundamental type.
+ Perhaps the definition of bfd_vma can be moved outside of bfd.h.
+ Or perhaps one could duplicate its definition in another file.
+ Until such time, this file conditionally compiles definitions that require
+ bfd_vma using BFD_VERSION. */
+
+/* Enums must be defined before they can be used.
+ Allow them to be used in struct definitions, even though the enum must
+ be defined elsewhere.
+ If CGEN_ARCH isn't defined, this file is being included by something other
+ than <arch>-desc.h. */
+
+/* Prepend the arch name, defined in <arch>-desc.h, and _cgen_ to symbol S.
+ The lack of spaces in the arg list is important for non-stdc systems.
+ This file is included by <arch>-desc.h.
+ It can be included independently of <arch>-desc.h, in which case the arch
+ dependent portions will be declared as "unknown_cgen_foo". */
+
+#ifndef CGEN_SYM
+#define CGEN_SYM(s) CONCAT3 (unknown,_cgen_,s)
+#endif
+
+/* This file contains the static (unchanging) pieces and as much other stuff
+ as we can reasonably put here. It's generally cleaner to put stuff here
+ rather than having it machine generated if possible. */
+
+/* The assembler syntax is made up of expressions (duh...).
+ At the lowest level the values are mnemonics, register names, numbers, etc.
+ Above that are subexpressions, if any (an example might be the
+ "effective address" in m68k cpus). Subexpressions are wip.
+ At the second highest level are the insns themselves. Above that are
+ pseudo-insns, synthetic insns, and macros, if any. */
+
+/* Lots of cpu's have a fixed insn size, or one which rarely changes,
+ and it's generally easier to handle these by treating the insn as an
+ integer type, rather than an array of characters. So we allow targets
+ to control this. When an integer type the value is in host byte order,
+ when an array of characters the value is in target byte order. */
+
+typedef unsigned int CGEN_INSN_INT;
+#if CGEN_INT_INSN_P
+typedef CGEN_INSN_INT CGEN_INSN_BYTES;
+typedef CGEN_INSN_INT *CGEN_INSN_BYTES_PTR;
+#else
+typedef unsigned char *CGEN_INSN_BYTES;
+typedef unsigned char *CGEN_INSN_BYTES_PTR;
+#endif
+
+#ifdef __GNUC__
+#define CGEN_INLINE __inline__
+#else
+#define CGEN_INLINE
+#endif
+
+enum cgen_endian
+{
+ CGEN_ENDIAN_UNKNOWN,
+ CGEN_ENDIAN_LITTLE,
+ CGEN_ENDIAN_BIG
+};
+
+/* Forward decl. */
+
+typedef struct cgen_insn CGEN_INSN;
+
+/* Opaque pointer version for use by external world. */
+
+typedef struct cgen_cpu_desc *CGEN_CPU_DESC;
+
+/* Attributes.
+ Attributes are used to describe various random things associated with
+ an object (ifield, hardware, operand, insn, whatever) and are specified
+ as name/value pairs.
+ Integer attributes computed at compile time are currently all that's
+ supported, though adding string attributes and run-time computation is
+ straightforward. Integer attribute values are always host int's
+ (signed or unsigned). For portability, this means 32 bits.
+ Integer attributes are further categorized as boolean, bitset, integer,
+ and enum types. Boolean attributes appear frequently enough that they're
+ recorded in one host int. This limits the maximum number of boolean
+ attributes to 32, though that's a *lot* of attributes. */
+
+/* Type of attribute values. */
+
+typedef int CGEN_ATTR_VALUE_TYPE;
+
+/* Struct to record attribute information. */
+
+typedef struct
+{
+ /* Boolean attributes. */
+ unsigned int bool;
+ /* Non-boolean integer attributes. */
+ CGEN_ATTR_VALUE_TYPE nonbool[1];
+} CGEN_ATTR;
+
+/* Define a structure member for attributes with N non-boolean entries.
+ There is no maximum number of non-boolean attributes.
+ There is a maximum of 32 boolean attributes (since they are all recorded
+ in one host int). */
+
+#define CGEN_ATTR_TYPE(n) \
+struct { unsigned int bool; \
+ CGEN_ATTR_VALUE_TYPE nonbool[(n) ? (n) : 1]; }
+
+/* Return the boolean attributes. */
+
+#define CGEN_ATTR_BOOLS(a) ((a)->bool)
+
+/* Non-boolean attribute numbers are offset by this much. */
+
+#define CGEN_ATTR_NBOOL_OFFSET 32
+
+/* Given a boolean attribute number, return its mask. */
+
+#define CGEN_ATTR_MASK(attr) (1 << (attr))
+
+/* Return the value of boolean attribute ATTR in ATTRS. */
+
+#define CGEN_BOOL_ATTR(attrs, attr) ((CGEN_ATTR_MASK (attr) & (attrs)) != 0)
+
+/* Return value of attribute ATTR in ATTR_TABLE for OBJ.
+ OBJ is a pointer to the entity that has the attributes
+ (??? not used at present but is reserved for future purposes - eventually
+ the goal is to allow recording attributes in source form and computing
+ them lazily at runtime, not sure of the details yet). */
+
+#define CGEN_ATTR_VALUE(obj, attr_table, attr) \
+((unsigned int) (attr) < CGEN_ATTR_NBOOL_OFFSET \
+ ? ((CGEN_ATTR_BOOLS (attr_table) & CGEN_ATTR_MASK (attr)) != 0) \
+ : ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET]))
+
+/* Attribute name/value tables.
+ These are used to assist parsing of descriptions at run-time. */
+
+typedef struct
+{
+ const char * name;
+ CGEN_ATTR_VALUE_TYPE value;
+} CGEN_ATTR_ENTRY;
+
+/* For each domain (ifld,hw,operand,insn), list of attributes. */
+
+typedef struct
+{
+ const char * name;
+ const CGEN_ATTR_ENTRY * dfault;
+ const CGEN_ATTR_ENTRY * vals;
+} CGEN_ATTR_TABLE;
+
+/* Instruction set variants. */
+
+typedef struct {
+ const char *name;
+
+ /* Default instruction size (in bits).
+ This is used by the assembler when it encounters an unknown insn. */
+ unsigned int default_insn_bitsize;
+
+ /* Base instruction size (in bits).
+ For non-LIW cpus this is generally the length of the smallest insn.
+ For LIW cpus its wip (work-in-progress). For the m32r its 32. */
+ unsigned int base_insn_bitsize;
+
+ /* Minimum/maximum instruction size (in bits). */
+ unsigned int min_insn_bitsize;
+ unsigned int max_insn_bitsize;
+} CGEN_ISA;
+
+/* Machine variants. */
+
+typedef struct {
+ const char *name;
+ /* The argument to bfd_arch_info->scan. */
+ const char *bfd_name;
+ /* one of enum mach_attr */
+ int num;
+} CGEN_MACH;
+
+/* Parse result (also extraction result).
+
+ The result of parsing an insn is stored here.
+ To generate the actual insn, this is passed to the insert handler.
+ When printing an insn, the result of extraction is stored here.
+ To print the insn, this is passed to the print handler.
+
+ It is machine generated so we don't define it here,
+ but we do need a forward decl for the handler fns.
+
+ There is one member for each possible field in the insn.
+ The type depends on the field.
+ Also recorded here is the computed length of the insn for architectures
+ where it varies.
+*/
+
+typedef struct cgen_fields CGEN_FIELDS;
+
+/* Total length of the insn, as recorded in the `fields' struct. */
+/* ??? The field insert handler has lots of opportunities for optimization
+ if it ever gets inlined. On architectures where insns all have the same
+ size, may wish to detect that and make this macro a constant - to allow
+ further optimizations. */
+
+#define CGEN_FIELDS_BITSIZE(fields) ((fields)->length)
+
+/* Extraction support for variable length insn sets. */
+
+/* When disassembling we don't know the number of bytes to read at the start.
+ So the first CGEN_BASE_INSN_SIZE bytes are read at the start and the rest
+ are read when needed. This struct controls this. It is basically the
+ disassemble_info stuff, except that we provide a cache for values already
+ read (since bytes can typically be read several times to fetch multiple
+ operands that may be in them), and that extraction of fields is needed
+ in contexts other than disassembly. */
+
+typedef struct {
+ /* A pointer to the disassemble_info struct.
+ We don't require dis-asm.h so we use PTR for the type here.
+ If NULL, BYTES is full of valid data (VALID == -1). */
+ PTR dis_info;
+ /* Points to a working buffer of sufficient size. */
+ unsigned char *insn_bytes;
+ /* Mask of bytes that are valid in INSN_BYTES. */
+ unsigned int valid;
+} CGEN_EXTRACT_INFO;
+
+/* Associated with each insn or expression is a set of "handlers" for
+ performing operations like parsing, printing, etc. These require a bfd_vma
+ value to be passed around but we don't want all applications to need bfd.h.
+ So this stuff is only provided if bfd.h has been included. */
+
+/* Parse handler.
+ CD is a cpu table descriptor.
+ INSN is a pointer to a struct describing the insn being parsed.
+ STRP is a pointer to a pointer to the text being parsed.
+ FIELDS is a pointer to a cgen_fields struct in which the results are placed.
+ If the expression is successfully parsed, *STRP is updated.
+ If not it is left alone.
+ The result is NULL if success or an error message. */
+typedef const char * (cgen_parse_fn)
+ PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_,
+ const char **strp_, CGEN_FIELDS *fields_));
+
+/* Insert handler.
+ CD is a cpu table descriptor.
+ INSN is a pointer to a struct describing the insn being parsed.
+ FIELDS is a pointer to a cgen_fields struct from which the values
+ are fetched.
+ INSNP is a pointer to a buffer in which to place the insn.
+ PC is the pc value of the insn.
+ The result is an error message or NULL if success. */
+
+#ifdef BFD_VERSION
+typedef const char * (cgen_insert_fn)
+ PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_,
+ CGEN_FIELDS *fields_, CGEN_INSN_BYTES_PTR insnp_,
+ bfd_vma pc_));
+#else
+typedef const char * (cgen_insert_fn) ();
+#endif
+
+/* Extract handler.
+ CD is a cpu table descriptor.
+ INSN is a pointer to a struct describing the insn being parsed.
+ The second argument is a pointer to a struct controlling extraction
+ (only used for variable length insns).
+ EX_INFO is a pointer to a struct for controlling reading of further
+ bytes for the insn.
+ BASE_INSN is the first CGEN_BASE_INSN_SIZE bytes (host order).
+ FIELDS is a pointer to a cgen_fields struct in which the results are placed.
+ PC is the pc value of the insn.
+ The result is the length of the insn in bits or zero if not recognized. */
+
+#ifdef BFD_VERSION
+typedef int (cgen_extract_fn)
+ PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_,
+ CGEN_EXTRACT_INFO *ex_info_, CGEN_INSN_INT base_insn_,
+ CGEN_FIELDS *fields_, bfd_vma pc_));
+#else
+typedef int (cgen_extract_fn) ();
+#endif
+
+/* Print handler.
+ CD is a cpu table descriptor.
+ INFO is a pointer to the disassembly info.
+ Eg: disassemble_info. It's defined as `PTR' so this file can be included
+ without dis-asm.h.
+ INSN is a pointer to a struct describing the insn being printed.
+ FIELDS is a pointer to a cgen_fields struct.
+ PC is the pc value of the insn.
+ LEN is the length of the insn, in bits. */
+
+#ifdef BFD_VERSION
+typedef void (cgen_print_fn)
+ PARAMS ((CGEN_CPU_DESC, PTR info_, const CGEN_INSN *insn_,
+ CGEN_FIELDS *fields_, bfd_vma pc_, int len_));
+#else
+typedef void (cgen_print_fn) ();
+#endif
+
+/* Parse/insert/extract/print handlers.
+
+ Indices into the handler tables.
+ We could use pointers here instead, but 90% of them are generally identical
+ and that's a lot of redundant data. Making these unsigned char indices
+ into tables of pointers saves a bit of space.
+ Using indices also keeps assembler code out of the disassembler and
+ vice versa. */
+
+struct cgen_opcode_handler
+{
+ unsigned char parse, insert, extract, print;
+};
+
+/* Assembler interface.
+
+ The interface to the assembler is intended to be clean in the sense that
+ libopcodes.a is a standalone entity and could be used with any assembler.
+ Not that one would necessarily want to do that but rather that it helps
+ keep a clean interface. The interface will obviously be slanted towards
+ GAS, but at least it's a start.
+ ??? Note that one possible user of the assembler besides GAS is GDB.
+
+ Parsing is controlled by the assembler which calls
+ CGEN_SYM (assemble_insn). If it can parse and build the entire insn
+ it doesn't call back to the assembler. If it needs/wants to call back
+ to the assembler, cgen_parse_operand_fn is called which can either
+
+ - return a number to be inserted in the insn
+ - return a "register" value to be inserted
+ (the register might not be a register per pe)
+ - queue the argument and return a marker saying the expression has been
+ queued (eg: a fix-up)
+ - return an error message indicating the expression wasn't recognizable
+
+ The result is an error message or NULL for success.
+ The parsed value is stored in the bfd_vma *. */
+
+/* Values for indicating what the caller wants. */
+
+enum cgen_parse_operand_type
+{
+ CGEN_PARSE_OPERAND_INIT,
+ CGEN_PARSE_OPERAND_INTEGER,
+ CGEN_PARSE_OPERAND_ADDRESS
+};
+
+/* Values for indicating what was parsed. */
+
+enum cgen_parse_operand_result
+{
+ CGEN_PARSE_OPERAND_RESULT_NUMBER,
+ CGEN_PARSE_OPERAND_RESULT_REGISTER,
+ CGEN_PARSE_OPERAND_RESULT_QUEUED,
+ CGEN_PARSE_OPERAND_RESULT_ERROR
+};
+
+#ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
+typedef const char * (cgen_parse_operand_fn)
+ PARAMS ((CGEN_CPU_DESC,
+ enum cgen_parse_operand_type, const char **, int, int,
+ enum cgen_parse_operand_result *, bfd_vma *));
+#else
+typedef const char * (cgen_parse_operand_fn) ();
+#endif
+
+/* Set the cgen_parse_operand_fn callback. */
+
+extern void cgen_set_parse_operand_fn
+ PARAMS ((CGEN_CPU_DESC, cgen_parse_operand_fn));
+
+/* Called before trying to match a table entry with the insn. */
+
+extern void cgen_init_parse_operand PARAMS ((CGEN_CPU_DESC));
+
+/* Operand values (keywords, integers, symbols, etc.) */
+
+/* Types of assembler elements. */
+
+enum cgen_asm_type
+{
+ CGEN_ASM_NONE, CGEN_ASM_KEYWORD, CGEN_ASM_MAX
+};
+
+#ifndef CGEN_ARCH
+enum cgen_hw_type { CGEN_HW_MAX };
+#endif
+
+/* List of hardware elements. */
+
+typedef struct
+{
+ char *name;
+ enum cgen_hw_type type;
+ /* There is currently no example where both index specs and value specs
+ are required, so for now both are clumped under "asm_data". */
+ enum cgen_asm_type asm_type;
+ PTR asm_data;
+#ifndef CGEN_HW_NBOOL_ATTRS
+#define CGEN_HW_NBOOL_ATTRS 1
+#endif
+ CGEN_ATTR_TYPE (CGEN_HW_NBOOL_ATTRS) attrs;
+#define CGEN_HW_ATTRS(hw) (&(hw)->attrs)
+} CGEN_HW_ENTRY;
+
+/* Return value of attribute ATTR in HW. */
+
+#define CGEN_HW_ATTR_VALUE(hw, attr) \
+CGEN_ATTR_VALUE ((hw), CGEN_HW_ATTRS (hw), (attr))
+
+/* Table of hardware elements for selected mach, computed at runtime.
+ enum cgen_hw_type is an index into this table (specifically `entries'). */
+
+typedef struct {
+ /* Pointer to null terminated table of all compiled in entries. */
+ const CGEN_HW_ENTRY *init_entries;
+ unsigned int entry_size; /* since the attribute member is variable sized */
+ /* Array of all entries, initial and run-time added. */
+ const CGEN_HW_ENTRY **entries;
+ /* Number of elements in `entries'. */
+ unsigned int num_entries;
+ /* For now, xrealloc is called each time a new entry is added at runtime.
+ ??? May wish to keep track of some slop to reduce the number of calls to
+ xrealloc, except that there's unlikely to be many and not expected to be
+ in speed critical code. */
+} CGEN_HW_TABLE;
+
+extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_name
+ PARAMS ((CGEN_CPU_DESC, const char *));
+extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_num
+ PARAMS ((CGEN_CPU_DESC, int));
+
+/* This struct is used to describe things like register names, etc. */
+
+typedef struct cgen_keyword_entry
+{
+ /* Name (as in register name). */
+ char * name;
+
+ /* Value (as in register number).
+ The value cannot be -1 as that is used to indicate "not found".
+ IDEA: Have "FUNCTION" attribute? [function is called to fetch value]. */
+ int value;
+
+ /* Attributes.
+ This should, but technically needn't, appear last. It is a variable sized
+ array in that one architecture may have 1 nonbool attribute and another
+ may have more. Having this last means the non-architecture specific code
+ needn't care. The goal is to eventually record
+ attributes in their raw form, evaluate them at run-time, and cache the
+ values, so this worry will go away anyway. */
+ /* ??? Moving this last should be done by treating keywords like insn lists
+ and moving the `next' fields into a CGEN_KEYWORD_LIST struct. */
+ /* FIXME: Not used yet. */
+#ifndef CGEN_KEYWORD_NBOOL_ATTRS
+#define CGEN_KEYWORD_NBOOL_ATTRS 1
+#endif
+ CGEN_ATTR_TYPE (CGEN_KEYWORD_NBOOL_ATTRS) attrs;
+
+ /* ??? Putting these here means compiled in entries can't be const.
+ Not a really big deal, but something to consider. */
+ /* Next name hash table entry. */
+ struct cgen_keyword_entry *next_name;
+ /* Next value hash table entry. */
+ struct cgen_keyword_entry *next_value;
+} CGEN_KEYWORD_ENTRY;
+
+/* Top level struct for describing a set of related keywords
+ (e.g. register names).
+
+ This struct supports run-time entry of new values, and hashed lookups. */
+
+typedef struct cgen_keyword
+{
+ /* Pointer to initial [compiled in] values. */
+ CGEN_KEYWORD_ENTRY *init_entries;
+
+ /* Number of entries in `init_entries'. */
+ unsigned int num_init_entries;
+
+ /* Hash table used for name lookup. */
+ CGEN_KEYWORD_ENTRY **name_hash_table;
+
+ /* Hash table used for value lookup. */
+ CGEN_KEYWORD_ENTRY **value_hash_table;
+
+ /* Number of entries in the hash_tables. */
+ unsigned int hash_table_size;
+
+ /* Pointer to null keyword "" entry if present. */
+ const CGEN_KEYWORD_ENTRY *null_entry;
+} CGEN_KEYWORD;
+
+/* Structure used for searching. */
+
+typedef struct
+{
+ /* Table being searched. */
+ const CGEN_KEYWORD *table;
+
+ /* Specification of what is being searched for. */
+ const char *spec;
+
+ /* Current index in hash table. */
+ unsigned int current_hash;
+
+ /* Current element in current hash chain. */
+ CGEN_KEYWORD_ENTRY *current_entry;
+} CGEN_KEYWORD_SEARCH;
+
+/* Lookup a keyword from its name. */
+
+const CGEN_KEYWORD_ENTRY *cgen_keyword_lookup_name
+ PARAMS ((CGEN_KEYWORD *, const char *));
+
+/* Lookup a keyword from its value. */
+
+const CGEN_KEYWORD_ENTRY *cgen_keyword_lookup_value
+ PARAMS ((CGEN_KEYWORD *, int));
+
+/* Add a keyword. */
+
+void cgen_keyword_add PARAMS ((CGEN_KEYWORD *, CGEN_KEYWORD_ENTRY *));
+
+/* Keyword searching.
+ This can be used to retrieve every keyword, or a subset. */
+
+CGEN_KEYWORD_SEARCH cgen_keyword_search_init
+ PARAMS ((CGEN_KEYWORD *, const char *));
+const CGEN_KEYWORD_ENTRY *cgen_keyword_search_next
+ PARAMS ((CGEN_KEYWORD_SEARCH *));
+
+/* Operand value support routines. */
+
+extern const char *cgen_parse_keyword
+ PARAMS ((CGEN_CPU_DESC, const char **, CGEN_KEYWORD *, long *));
+#ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
+extern const char *cgen_parse_signed_integer
+ PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
+extern const char *cgen_parse_unsigned_integer
+ PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
+extern const char *cgen_parse_address
+ PARAMS ((CGEN_CPU_DESC, const char **, int, int,
+ enum cgen_parse_operand_result *, bfd_vma *));
+extern const char *cgen_validate_signed_integer
+ PARAMS ((long, long, long));
+extern const char *cgen_validate_unsigned_integer
+ PARAMS ((unsigned long, unsigned long, unsigned long));
+#endif
+
+/* Operand modes. */
+
+/* ??? This duplicates the values in arch.h. Revisit.
+ These however need the CGEN_ prefix [as does everything in this file]. */
+/* ??? Targets may need to add their own modes so we may wish to move this
+ to <arch>-opc.h, or add a hook. */
+
+enum cgen_mode {
+ CGEN_MODE_VOID, /* ??? rename simulator's VM to VOID? */
+ CGEN_MODE_BI, CGEN_MODE_QI, CGEN_MODE_HI, CGEN_MODE_SI, CGEN_MODE_DI,
+ CGEN_MODE_UBI, CGEN_MODE_UQI, CGEN_MODE_UHI, CGEN_MODE_USI, CGEN_MODE_UDI,
+ CGEN_MODE_SF, CGEN_MODE_DF, CGEN_MODE_XF, CGEN_MODE_TF,
+ CGEN_MODE_TARGET_MAX,
+ CGEN_MODE_INT, CGEN_MODE_UINT,
+ CGEN_MODE_MAX
+};
+
+/* FIXME: Until simulator is updated. */
+
+#define CGEN_MODE_VM CGEN_MODE_VOID
+
+/* Operands. */
+
+#ifndef CGEN_ARCH
+enum cgen_operand_type { CGEN_OPERAND_MAX };
+#endif
+
+/* "nil" indicator for the operand instance table */
+#define CGEN_OPERAND_NIL CGEN_OPERAND_MAX
+
+/* This struct defines each entry in the operand table. */
+
+typedef struct
+{
+ /* Name as it appears in the syntax string. */
+ char *name;
+
+ /* Operand type. */
+ enum cgen_operand_type type;
+
+ /* The hardware element associated with this operand. */
+ enum cgen_hw_type hw_type;
+
+ /* FIXME: We don't yet record ifield definitions, which we should.
+ When we do it might make sense to delete start/length (since they will
+ be duplicated in the ifield's definition) and replace them with a
+ pointer to the ifield entry. */
+
+ /* Bit position.
+ This is just a hint, and may be unused in more complex operands.
+ May be unused for a modifier. */
+ unsigned char start;
+
+ /* The number of bits in the operand.
+ This is just a hint, and may be unused in more complex operands.
+ May be unused for a modifier. */
+ unsigned char length;
+
+#if 0 /* ??? Interesting idea but relocs tend to get too complicated,
+ and ABI dependent, for simple table lookups to work. */
+ /* Ideally this would be the internal (external?) reloc type. */
+ int reloc_type;
+#endif
+
+ /* Attributes.
+ This should, but technically needn't, appear last. It is a variable sized
+ array in that one architecture may have 1 nonbool attribute and another
+ may have more. Having this last means the non-architecture specific code
+ needn't care, now or tomorrow. The goal is to eventually record
+ attributes in their raw form, evaluate them at run-time, and cache the
+ values, so this worry will go away anyway. */
+#ifndef CGEN_OPERAND_NBOOL_ATTRS
+#define CGEN_OPERAND_NBOOL_ATTRS 1
+#endif
+ CGEN_ATTR_TYPE (CGEN_OPERAND_NBOOL_ATTRS) attrs;
+#define CGEN_OPERAND_ATTRS(operand) (&(operand)->attrs)
+} CGEN_OPERAND;
+
+/* Return value of attribute ATTR in OPERAND. */
+
+#define CGEN_OPERAND_ATTR_VALUE(operand, attr) \
+CGEN_ATTR_VALUE ((operand), CGEN_OPERAND_ATTRS (operand), (attr))
+
+/* Table of operands for selected mach/isa, computed at runtime.
+ enum cgen_operand_type is an index into this table (specifically
+ `entries'). */
+
+typedef struct {
+ /* Pointer to null terminated table of all compiled in entries. */
+ const CGEN_OPERAND *init_entries;
+ unsigned int entry_size; /* since the attribute member is variable sized */
+ /* Array of all entries, initial and run-time added. */
+ const CGEN_OPERAND **entries;
+ /* Number of elements in `entries'. */
+ unsigned int num_entries;
+ /* For now, xrealloc is called each time a new entry is added at runtime.
+ ??? May wish to keep track of some slop to reduce the number of calls to
+ xrealloc, except that there's unlikely to be many and not expected to be
+ in speed critical code. */
+} CGEN_OPERAND_TABLE;
+
+extern const CGEN_OPERAND * cgen_operand_lookup_by_name
+ PARAMS ((CGEN_CPU_DESC, const char *));
+extern const CGEN_OPERAND * cgen_operand_lookup_by_num
+ PARAMS ((CGEN_CPU_DESC, int));
+
+/* Instruction operand instances.
+
+ For each instruction, a list of the hardware elements that are read and
+ written are recorded. */
+
+/* The type of the instance. */
+
+enum cgen_opinst_type {
+ /* End of table marker. */
+ CGEN_OPINST_END = 0,
+ CGEN_OPINST_INPUT, CGEN_OPINST_OUTPUT
+};
+
+typedef struct
+{
+ /* Input or output indicator. */
+ enum cgen_opinst_type type;
+
+ /* Name of operand. */
+ const char *name;
+
+ /* The hardware element referenced. */
+ enum cgen_hw_type hw_type;
+
+ /* The mode in which the operand is being used. */
+ enum cgen_mode mode;
+
+ /* The operand table entry CGEN_OPERAND_NIL if there is none
+ (i.e. an explicit hardware reference). */
+ enum cgen_operand_type op_type;
+
+ /* If `operand' is "nil", the index (e.g. into array of registers). */
+ int index;
+
+ /* Attributes.
+ ??? This perhaps should be a real attribute struct but there's
+ no current need, so we save a bit of space and just have a set of
+ flags. The interface is such that this can easily be made attributes
+ should it prove useful. */
+ unsigned int attrs;
+#define CGEN_OPINST_ATTRS(opinst) ((opinst)->attrs)
+/* Return value of attribute ATTR in OPINST. */
+#define CGEN_OPINST_ATTR(opinst, attr) \
+((CGEN_OPINST_ATTRS (opinst) & (attr)) != 0)
+/* Operand is conditionally referenced (read/written). */
+#define CGEN_OPINST_COND_REF 1
+} CGEN_OPINST;
+
+/* Syntax string.
+
+ Each insn format and subexpression has one of these.
+
+ The syntax "string" consists of characters (n > 0 && n < 128), and operand
+ values (n >= 128), and is terminated by 0. Operand values are 128 + index
+ into the operand table. The operand table doesn't exist in C, per se, as
+ the data is recorded in the parse/insert/extract/print switch statements. */
+
+#ifndef CGEN_MAX_SYNTAX_BYTES
+#define CGEN_MAX_SYNTAX_BYTES 16
+#endif
+
+typedef struct
+{
+ unsigned char syntax[CGEN_MAX_SYNTAX_BYTES];
+} CGEN_SYNTAX;
+
+#define CGEN_SYNTAX_STRING(syn) (syn->syntax)
+#define CGEN_SYNTAX_CHAR_P(c) ((c) < 128)
+#define CGEN_SYNTAX_CHAR(c) (c)
+#define CGEN_SYNTAX_FIELD(c) ((c) - 128)
+#define CGEN_SYNTAX_MAKE_FIELD(c) ((c) + 128)
+
+/* ??? I can't currently think of any case where the mnemonic doesn't come
+ first [and if one ever doesn't building the hash tables will be tricky].
+ However, we treat mnemonics as just another operand of the instruction.
+ A value of 1 means "this is where the mnemonic appears". 1 isn't
+ special other than it's a non-printable ASCII char. */
+
+#define CGEN_SYNTAX_MNEMONIC 1
+#define CGEN_SYNTAX_MNEMONIC_P(ch) ((ch) == CGEN_SYNTAX_MNEMONIC)
+
+/* Instruction fields.
+
+ ??? We currently don't allow adding fields at run-time.
+ Easy to fix when needed. */
+
+typedef struct cgen_ifld {
+ /* Enum of ifield. */
+ int num;
+#define CGEN_IFLD_NUM(f) ((f)->num)
+
+ /* Name of the field, distinguishes it from all other fields. */
+ const char *name;
+#define CGEN_IFLD_NAME(f) ((f)->name)
+
+ /* Default offset, in bits, from the start of the insn to the word
+ containing the field. */
+ int word_offset;
+#define CGEN_IFLD_WORD_OFFSET(f) ((f)->word_offset)
+
+ /* Default length of the word containing the field. */
+ int word_size;
+#define CGEN_IFLD_WORD_SIZE(f) ((f)->word_size)
+
+ /* Default starting bit number.
+ Whether lsb=0 or msb=0 is determined by CGEN_INSN_LSB0_P. */
+ int start;
+#define CGEN_IFLD_START(f) ((f)->start)
+
+ /* Length of the field, in bits. */
+ int length;
+#define CGEN_IFLD_LENGTH(f) ((f)->length)
+
+#ifndef CGEN_IFLD_NBOOL_ATTRS
+#define CGEN_IFLD_NBOOL_ATTRS 1
+#endif
+ CGEN_ATTR_TYPE (CGEN_IFLD_NBOOL_ATTRS) attrs;
+#define CGEN_IFLD_ATTRS(f) (&(f)->attrs)
+} CGEN_IFLD;
+
+/* Return value of attribute ATTR in IFLD. */
+#define CGEN_IFLD_ATTR_VALUE(ifld, attr) \
+CGEN_ATTR_VALUE ((ifld), CGEN_IFLD_ATTRS (ifld), (attr))
+
+/* Instruction data. */
+
+/* Instruction formats.
+
+ Instructions are grouped by format. Associated with an instruction is its
+ format. Each insn's opcode table entry contains a format table entry.
+ ??? There is usually very few formats compared with the number of insns,
+ so one can reduce the size of the opcode table by recording the format table
+ as a separate entity. Given that we currently don't, format table entries
+ are also distinguished by their operands. This increases the size of the
+ table, but reduces the number of tables. It's all minutiae anyway so it
+ doesn't really matter [at this point in time].
+
+ ??? Support for variable length ISA's is wip. */
+
+/* Accompanying each iformat description is a list of its fields. */
+
+typedef struct {
+ const CGEN_IFLD *ifld;
+#define CGEN_IFMT_IFLD_IFLD(ii) ((ii)->ifld)
+} CGEN_IFMT_IFLD;
+
+#ifndef CGEN_MAX_IFMT_OPERANDS
+#define CGEN_MAX_IFMT_OPERANDS 1
+#endif
+
+typedef struct
+{
+ /* Length that MASK and VALUE have been calculated to
+ [VALUE is recorded elsewhere].
+ Normally it is base_insn_bitsize. On [V]LIW architectures where the base
+ insn size may be larger than the size of an insn, this field is less than
+ base_insn_bitsize. */
+ unsigned char mask_length;
+#define CGEN_IFMT_MASK_LENGTH(ifmt) ((ifmt)->mask_length)
+
+ /* Total length of instruction, in bits. */
+ unsigned char length;
+#define CGEN_IFMT_LENGTH(ifmt) ((ifmt)->length)
+
+ /* Mask to apply to the first MASK_LENGTH bits.
+ Each insn's value is stored with the insn.
+ The first step in recognizing an insn for disassembly is
+ (opcode & mask) == value. */
+ CGEN_INSN_INT mask;
+#define CGEN_IFMT_MASK(ifmt) ((ifmt)->mask)
+
+ /* Instruction fields.
+ +1 for trailing NULL. */
+ CGEN_IFMT_IFLD iflds[CGEN_MAX_IFMT_OPERANDS + 1];
+#define CGEN_IFMT_IFLDS(ifmt) ((ifmt)->iflds)
+} CGEN_IFMT;
+
+/* Instruction values. */
+
+typedef struct
+{
+ /* The opcode portion of the base insn. */
+ CGEN_INSN_INT base_value;
+
+#ifdef CGEN_MAX_EXTRA_OPCODE_OPERANDS
+ /* Extra opcode values beyond base_value. */
+ unsigned long ifield_values[CGEN_MAX_EXTRA_OPCODE_OPERANDS];
+#endif
+} CGEN_IVALUE;
+
+/* Instruction opcode table.
+ This contains the syntax and format data of an instruction. */
+
+/* ??? Some ports already have an opcode table yet still need to use the rest
+ of what cgen_insn has. Plus keeping the opcode data with the operand
+ instance data can create a pretty big file. So we keep them separately.
+ Not sure this is a good idea in the long run. */
+
+typedef struct
+{
+ /* Indices into parse/insert/extract/print handler tables. */
+ struct cgen_opcode_handler handlers;
+#define CGEN_OPCODE_HANDLERS(opc) (& (opc)->handlers)
+
+ /* Syntax string. */
+ CGEN_SYNTAX syntax;
+#define CGEN_OPCODE_SYNTAX(opc) (& (opc)->syntax)
+
+ /* Format entry. */
+ const CGEN_IFMT *format;
+#define CGEN_OPCODE_FORMAT(opc) ((opc)->format)
+#define CGEN_OPCODE_MASK_BITSIZE(opc) CGEN_IFMT_MASK_LENGTH (CGEN_OPCODE_FORMAT (opc))
+#define CGEN_OPCODE_BITSIZE(opc) CGEN_IFMT_LENGTH (CGEN_OPCODE_FORMAT (opc))
+#define CGEN_OPCODE_IFLDS(opc) CGEN_IFMT_IFLDS (CGEN_OPCODE_FORMAT (opc))
+
+ /* Instruction opcode value. */
+ CGEN_IVALUE value;
+#define CGEN_OPCODE_VALUE(opc) (& (opc)->value)
+#define CGEN_OPCODE_BASE_VALUE(opc) (CGEN_OPCODE_VALUE (opc)->base_value)
+#define CGEN_OPCODE_BASE_MASK(opc) CGEN_IFMT_MASK (CGEN_OPCODE_FORMAT (opc))
+} CGEN_OPCODE;
+
+/* Instruction attributes.
+ This is made a published type as applications can cache a pointer to
+ the attributes for speed. */
+
+#ifndef CGEN_INSN_NBOOL_ATTRS
+#define CGEN_INSN_NBOOL_ATTRS 1
+#endif
+typedef CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_ATTRS) CGEN_INSN_ATTR_TYPE;
+
+/* Enum of architecture independent attributes. */
+
+#ifndef CGEN_ARCH
+/* ??? Numbers here are recorded in two places. */
+typedef enum cgen_insn_attr {
+ CGEN_INSN_ALIAS = 0
+} CGEN_INSN_ATTR;
+#endif
+
+/* This struct defines each entry in the instruction table. */
+
+typedef struct
+{
+ /* Each real instruction is enumerated. */
+ /* ??? This may go away in time. */
+ int num;
+#define CGEN_INSN_NUM(insn) ((insn)->base->num)
+
+ /* Name of entry (that distinguishes it from all other entries). */
+ /* ??? If mnemonics have operands, try to print full mnemonic. */
+ const char *name;
+#define CGEN_INSN_NAME(insn) ((insn)->base->name)
+
+ /* Mnemonic. This is used when parsing and printing the insn.
+ In the case of insns that have operands on the mnemonics, this is
+ only the constant part. E.g. for conditional execution of an `add' insn,
+ where the full mnemonic is addeq, addne, etc., and the condition is
+ treated as an operand, this is only "add". */
+ const char *mnemonic;
+#define CGEN_INSN_MNEMONIC(insn) ((insn)->base->mnemonic)
+
+ /* Total length of instruction, in bits. */
+ int bitsize;
+#define CGEN_INSN_BITSIZE(insn) ((insn)->base->bitsize)
+
+#if 0 /* ??? Disabled for now as there is a problem with embedded newlines
+ and the table is already pretty big. Should perhaps be moved
+ to a file of its own. */
+ /* Semantics, as RTL. */
+ /* ??? Plain text or bytecodes? */
+ /* ??? Note that the operand instance table could be computed at run-time
+ if we parse this and cache the results. Something to eventually do. */
+ const char *rtx;
+#define CGEN_INSN_RTX(insn) ((insn)->base->rtx)
+#endif
+
+ /* Attributes.
+ This must appear last. It is a variable sized array in that one
+ architecture may have 1 nonbool attribute and another may have more.
+ Having this last means the non-architecture specific code needn't
+ care. The goal is to eventually record attributes in their raw form,
+ evaluate them at run-time, and cache the values, so this worry will go
+ away anyway. */
+ CGEN_INSN_ATTR_TYPE attrs;
+#define CGEN_INSN_ATTRS(insn) (&(insn)->base->attrs)
+/* Return value of attribute ATTR in INSN. */
+#define CGEN_INSN_ATTR_VALUE(insn, attr) \
+CGEN_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr))
+} CGEN_IBASE;
+
+/* Return non-zero if INSN is the "invalid" insn marker. */
+
+#define CGEN_INSN_INVALID_P(insn) (CGEN_INSN_MNEMONIC (insn) == 0)
+
+/* Main struct contain instruction information.
+ BASE is always present, the rest is present only if asked for. */
+
+struct cgen_insn
+{
+ /* ??? May be of use to put a type indicator here.
+ Then this struct could different info for different classes of insns. */
+ /* ??? A speedup can be had by moving `base' into this struct.
+ Maybe later. */
+ const CGEN_IBASE *base;
+ const CGEN_OPCODE *opcode;
+ const CGEN_OPINST *opinst;
+};
+
+/* Instruction lists.
+ This is used for adding new entries and for creating the hash lists. */
+
+typedef struct cgen_insn_list
+{
+ struct cgen_insn_list *next;
+ const CGEN_INSN *insn;
+} CGEN_INSN_LIST;
+
+/* Table of instructions. */
+
+typedef struct
+{
+ const CGEN_INSN *init_entries;
+ unsigned int entry_size; /* since the attribute member is variable sized */
+ unsigned int num_init_entries;
+ CGEN_INSN_LIST *new_entries;
+} CGEN_INSN_TABLE;
+
+/* Return number of instructions. This includes any added at run-time. */
+
+extern int cgen_insn_count PARAMS ((CGEN_CPU_DESC));
+extern int cgen_macro_insn_count PARAMS ((CGEN_CPU_DESC));
+
+/* Macros to access the other insn elements not recorded in CGEN_IBASE. */
+
+/* Fetch INSN's operand instance table. */
+/* ??? Doesn't handle insns added at runtime. */
+#define CGEN_INSN_OPERANDS(insn) ((insn)->opinst)
+
+/* Return INSN's opcode table entry. */
+#define CGEN_INSN_OPCODE(insn) ((insn)->opcode)
+
+/* Return INSN's handler data. */
+#define CGEN_INSN_HANDLERS(insn) CGEN_OPCODE_HANDLERS (CGEN_INSN_OPCODE (insn))
+
+/* Return INSN's syntax. */
+#define CGEN_INSN_SYNTAX(insn) CGEN_OPCODE_SYNTAX (CGEN_INSN_OPCODE (insn))
+
+/* Return size of base mask in bits. */
+#define CGEN_INSN_MASK_BITSIZE(insn) \
+ CGEN_OPCODE_MASK_BITSIZE (CGEN_INSN_OPCODE (insn))
+
+/* Return mask of base part of INSN. */
+#define CGEN_INSN_BASE_MASK(insn) \
+ CGEN_OPCODE_BASE_MASK (CGEN_INSN_OPCODE (insn))
+
+/* Return value of base part of INSN. */
+#define CGEN_INSN_BASE_VALUE(insn) \
+ CGEN_OPCODE_BASE_VALUE (CGEN_INSN_OPCODE (insn))
+
+/* Macro instructions.
+ Macro insns aren't real insns, they map to one or more real insns.
+ E.g. An architecture's "nop" insn may actually be an "mv r0,r0" or
+ some such.
+
+ Macro insns can expand to nothing (e.g. a nop that is optimized away).
+ This is useful in multi-insn macros that build a constant in a register.
+ Of course this isn't the default behaviour and must be explicitly enabled.
+
+ Assembly of macro-insns is relatively straightforward. Disassembly isn't.
+ However, disassembly of at least some kinds of macro insns is important
+ in order that the disassembled code preserve the readability of the original
+ insn. What is attempted here is to disassemble all "simple" macro-insns,
+ where "simple" is currently defined to mean "expands to one real insn".
+
+ Simple macro-insns are handled specially. They are emitted as ALIAS's
+ of real insns. This simplifies their handling since there's usually more
+ of them than any other kind of macro-insn, and proper disassembly of them
+ falls out for free. */
+
+/* For each macro-insn there may be multiple expansion possibilities,
+ depending on the arguments. This structure is accessed via the `data'
+ member of CGEN_INSN. */
+
+typedef struct cgen_minsn_expansion {
+ /* Function to do the expansion.
+ If the expansion fails (e.g. "no match") NULL is returned.
+ Space for the expansion is obtained with malloc.
+ It is up to the caller to free it. */
+ const char * (* fn) PARAMS ((const struct cgen_minsn_expansion *,
+ const char *, const char **, int *,
+ CGEN_OPERAND **));
+#define CGEN_MIEXPN_FN(ex) ((ex)->fn)
+
+ /* Instruction(s) the macro expands to.
+ The format of STR is defined by FN.
+ It is typically the assembly code of the real insn, but it could also be
+ the original Scheme expression or a tokenized form of it (with FN being
+ an appropriate interpreter). */
+ const char * str;
+#define CGEN_MIEXPN_STR(ex) ((ex)->str)
+} CGEN_MINSN_EXPANSION;
+
+/* Normal expander.
+ When supported, this function will convert the input string to another
+ string and the parser will be invoked recursively. The output string
+ may contain further macro invocations. */
+
+extern const char * cgen_expand_macro_insn
+ PARAMS ((CGEN_CPU_DESC, const struct cgen_minsn_expansion *,
+ const char *, const char **, int *, CGEN_OPERAND **));
+
+/* The assembler insn table is hashed based on some function of the mnemonic
+ (the actually hashing done is up to the target, but we provide a few
+ examples like the first letter or a function of the entire mnemonic). */
+
+extern CGEN_INSN_LIST * cgen_asm_lookup_insn
+ PARAMS ((CGEN_CPU_DESC, const char *));
+#define CGEN_ASM_LOOKUP_INSN(cd, string) cgen_asm_lookup_insn ((cd), (string))
+#define CGEN_ASM_NEXT_INSN(insn) ((insn)->next)
+
+/* The disassembler insn table is hashed based on some function of machine
+ instruction (the actually hashing done is up to the target). */
+
+extern CGEN_INSN_LIST * cgen_dis_lookup_insn
+ PARAMS ((CGEN_CPU_DESC, const char *, CGEN_INSN_INT));
+/* FIXME: delete these two */
+#define CGEN_DIS_LOOKUP_INSN(cd, buf, value) cgen_dis_lookup_insn ((cd), (buf), (value))
+#define CGEN_DIS_NEXT_INSN(insn) ((insn)->next)
+
+/* The CPU description.
+ A copy of this is created when the cpu table is "opened".
+ All global state information is recorded here.
+ Access macros are provided for "public" members. */
+
+typedef struct cgen_cpu_desc
+{
+ /* Bitmap of selected machine(s) (a la BFD machine number). */
+ int machs;
+
+ /* Bitmap of selected isa(s).
+ ??? Simultaneous multiple isas might not make sense, but it's not (yet)
+ precluded. */
+ int isas;
+
+ /* Current endian. */
+ enum cgen_endian endian;
+#define CGEN_CPU_ENDIAN(cd) ((cd)->endian)
+
+ /* Current insn endian. */
+ enum cgen_endian insn_endian;
+#define CGEN_CPU_INSN_ENDIAN(cd) ((cd)->insn_endian)
+
+ /* Word size (in bits). */
+ /* ??? Or maybe maximum word size - might we ever need to allow a cpu table
+ to be opened for both sparc32/sparc64?
+ ??? Another alternative is to create a table of selected machs and
+ lazily fetch the data from there. */
+ unsigned int word_bitsize;
+
+ /* Indicator if sizes are unknown.
+ This is used by default_insn_bitsize,base_insn_bitsize if there is a
+ difference between the selected isa's. */
+#define CGEN_SIZE_UNKNOWN 65535
+
+ /* Default instruction size (in bits).
+ This is used by the assembler when it encounters an unknown insn. */
+ unsigned int default_insn_bitsize;
+
+ /* Base instruction size (in bits).
+ For non-LIW cpus this is generally the length of the smallest insn.
+ For LIW cpus its wip (work-in-progress). For the m32r its 32. */
+ unsigned int base_insn_bitsize;
+
+ /* Minimum/maximum instruction size (in bits). */
+ unsigned int min_insn_bitsize;
+ unsigned int max_insn_bitsize;
+
+ /* Instruction set variants. */
+ const CGEN_ISA *isa_table;
+
+ /* Machine variants. */
+ const CGEN_MACH *mach_table;
+
+ /* Hardware elements. */
+ CGEN_HW_TABLE hw_table;
+
+ /* Instruction fields. */
+ const CGEN_IFLD *ifld_table;
+
+ /* Operands. */
+ CGEN_OPERAND_TABLE operand_table;
+
+ /* Main instruction table. */
+ CGEN_INSN_TABLE insn_table;
+#define CGEN_CPU_INSN_TABLE(cd) (& (cd)->insn_table)
+
+ /* Macro instructions are defined separately and are combined with real
+ insns during hash table computation. */
+ CGEN_INSN_TABLE macro_insn_table;
+
+ /* Copy of CGEN_INT_INSN_P. */
+ int int_insn_p;
+
+ /* Called to rebuild the tables after something has changed. */
+ void (*rebuild_tables) PARAMS ((CGEN_CPU_DESC));
+
+ /* Operand parser callback. */
+ cgen_parse_operand_fn * parse_operand_fn;
+
+ /* Parse/insert/extract/print cover fns for operands. */
+ const char * (*parse_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, const char **,
+ CGEN_FIELDS *fields_));
+#ifdef BFD_VERSION
+ const char * (*insert_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_,
+ CGEN_INSN_BYTES_PTR, bfd_vma pc_));
+ int (*extract_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
+ CGEN_FIELDS *fields_, bfd_vma pc_));
+ void (*print_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, PTR info_, CGEN_FIELDS * fields_,
+ void const *attrs_, bfd_vma pc_, int length_));
+#else
+ const char * (*insert_operand) ();
+ int (*extract_operand) ();
+ void (*print_operand) ();
+#endif
+#define CGEN_CPU_PARSE_OPERAND(cd) ((cd)->parse_operand)
+#define CGEN_CPU_INSERT_OPERAND(cd) ((cd)->insert_operand)
+#define CGEN_CPU_EXTRACT_OPERAND(cd) ((cd)->extract_operand)
+#define CGEN_CPU_PRINT_OPERAND(cd) ((cd)->print_operand)
+
+ /* Size of CGEN_FIELDS struct. */
+ unsigned int sizeof_fields;
+#define CGEN_CPU_SIZEOF_FIELDS(cd) ((cd)->sizeof_fields)
+
+ /* Set the bitsize field. */
+ void (*set_fields_bitsize) PARAMS ((CGEN_FIELDS *fields_, int size_));
+#define CGEN_CPU_SET_FIELDS_BITSIZE(cd) ((cd)->set_fields_bitsize)
+
+ /* CGEN_FIELDS accessors. */
+ int (*get_int_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, const CGEN_FIELDS *fields_));
+ void (*set_int_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_, int value_));
+#ifdef BFD_VERSION
+ bfd_vma (*get_vma_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, const CGEN_FIELDS *fields_));
+ void (*set_vma_operand)
+ PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_, bfd_vma value_));
+#else
+ long (*get_vma_operand) ();
+ void (*set_vma_operand) ();
+#endif
+#define CGEN_CPU_GET_INT_OPERAND(cd) ((cd)->get_int_operand)
+#define CGEN_CPU_SET_INT_OPERAND(cd) ((cd)->set_int_operand)
+#define CGEN_CPU_GET_VMA_OPERAND(cd) ((cd)->get_vma_operand)
+#define CGEN_CPU_SET_VMA_OPERAND(cd) ((cd)->set_vma_operand)
+
+ /* Instruction parse/insert/extract/print handlers. */
+ /* FIXME: make these types uppercase. */
+ cgen_parse_fn * const *parse_handlers;
+ cgen_insert_fn * const *insert_handlers;
+ cgen_extract_fn * const *extract_handlers;
+ cgen_print_fn * const *print_handlers;
+#define CGEN_PARSE_FN(cd, insn) (cd->parse_handlers[(insn)->opcode->handlers.parse])
+#define CGEN_INSERT_FN(cd, insn) (cd->insert_handlers[(insn)->opcode->handlers.insert])
+#define CGEN_EXTRACT_FN(cd, insn) (cd->extract_handlers[(insn)->opcode->handlers.extract])
+#define CGEN_PRINT_FN(cd, insn) (cd->print_handlers[(insn)->opcode->handlers.print])
+
+ /* Return non-zero if insn should be added to hash table. */
+ int (* asm_hash_p) PARAMS ((const CGEN_INSN *));
+
+ /* Assembler hash function. */
+ unsigned int (* asm_hash) PARAMS ((const char *));
+
+ /* Number of entries in assembler hash table. */
+ unsigned int asm_hash_size;
+
+ /* Return non-zero if insn should be added to hash table. */
+ int (* dis_hash_p) PARAMS ((const CGEN_INSN *));
+
+ /* Disassembler hash function. */
+ unsigned int (* dis_hash) PARAMS ((const char *, CGEN_INSN_INT));
+
+ /* Number of entries in disassembler hash table. */
+ unsigned int dis_hash_size;
+
+ /* Assembler instruction hash table. */
+ CGEN_INSN_LIST **asm_hash_table;
+ CGEN_INSN_LIST *asm_hash_table_entries;
+
+ /* Disassembler instruction hash table. */
+ CGEN_INSN_LIST **dis_hash_table;
+ CGEN_INSN_LIST *dis_hash_table_entries;
+} CGEN_CPU_TABLE;
+
+/* wip */
+#ifndef CGEN_WORD_ENDIAN
+#define CGEN_WORD_ENDIAN(cd) CGEN_CPU_ENDIAN (cd)
+#endif
+#ifndef CGEN_INSN_WORD_ENDIAN
+#define CGEN_INSN_WORD_ENDIAN(cd) CGEN_CPU_INSN_ENDIAN (cd)
+#endif
+
+/* Prototypes of major functions. */
+/* FIXME: Move more CGEN_SYM-defined functions into CGEN_CPU_DESC.
+ Not the init fns though, as that would drag in things that mightn't be
+ used and might not even exist. */
+
+/* Argument types to cpu_open. */
+
+enum cgen_cpu_open_arg {
+ CGEN_CPU_OPEN_END,
+ /* Select instruction set(s), arg is bitmap or 0 meaning "unspecified". */
+ CGEN_CPU_OPEN_ISAS,
+ /* Select machine(s), arg is bitmap or 0 meaning "unspecified". */
+ CGEN_CPU_OPEN_MACHS,
+ /* Select machine, arg is mach's bfd name.
+ Multiple machines can be specified by repeated use. */
+ CGEN_CPU_OPEN_BFDMACH,
+ /* Select endian, arg is CGEN_ENDIAN_*. */
+ CGEN_CPU_OPEN_ENDIAN
+};
+
+/* Open a cpu descriptor table for use.
+ ??? We only support ISO C stdargs here, not K&R.
+ Laziness, plus experiment to see if anything requires K&R - eventually
+ K&R will no longer be supported - e.g. GDB is currently trying this. */
+
+extern CGEN_CPU_DESC CGEN_SYM (cpu_open) (enum cgen_cpu_open_arg, ...);
+
+/* Cover fn to handle simple case. */
+
+extern CGEN_CPU_DESC CGEN_SYM (cpu_open_1) PARAMS ((const char *mach_name_,
+ enum cgen_endian endian_));
+
+/* Close it. */
+
+extern void CGEN_SYM (cpu_close) PARAMS ((CGEN_CPU_DESC));
+
+/* Initialize the opcode table for use.
+ Called by init_asm/init_dis. */
+
+extern void CGEN_SYM (init_opcode_table) PARAMS ((CGEN_CPU_DESC cd_));
+
+/* Initialize the ibld table for use.
+ Called by init_asm/init_dis. */
+
+extern void CGEN_SYM (init_ibld_table) PARAMS ((CGEN_CPU_DESC cd_));
+
+/* Initialize an cpu table for assembler or disassembler use.
+ These must be called immediately after cpu_open. */
+
+extern void CGEN_SYM (init_asm) PARAMS ((CGEN_CPU_DESC));
+extern void CGEN_SYM (init_dis) PARAMS ((CGEN_CPU_DESC));
+
+/* Initialize the operand instance table for use. */
+
+extern void CGEN_SYM (init_opinst_table) PARAMS ((CGEN_CPU_DESC cd_));
+
+/* Assemble an instruction. */
+
+extern const CGEN_INSN * CGEN_SYM (assemble_insn)
+ PARAMS ((CGEN_CPU_DESC, const char *, CGEN_FIELDS *,
+ CGEN_INSN_BYTES_PTR, char **));
+
+extern const CGEN_KEYWORD CGEN_SYM (operand_mach);
+extern int CGEN_SYM (get_mach) PARAMS ((const char *));
+
+/* Operand index computation. */
+extern const CGEN_INSN * cgen_lookup_insn
+ PARAMS ((CGEN_CPU_DESC, const CGEN_INSN * insn_,
+ CGEN_INSN_INT int_value_, unsigned char *bytes_value_,
+ int length_, CGEN_FIELDS *fields_, int alias_p_));
+extern void cgen_get_insn_operands
+ PARAMS ((CGEN_CPU_DESC, const CGEN_INSN * insn_,
+ const CGEN_FIELDS *fields_, int *indices_));
+extern const CGEN_INSN * cgen_lookup_get_insn_operands
+ PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_,
+ CGEN_INSN_INT int_value_, unsigned char *bytes_value_,
+ int length_, int *indices_, CGEN_FIELDS *fields_));
+
+/* Cover fns to bfd_get/set. */
+
+extern CGEN_INSN_INT cgen_get_insn_value
+ PARAMS ((CGEN_CPU_DESC, unsigned char *, int));
+extern void cgen_put_insn_value
+ PARAMS ((CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT));
+
+/* Read in a cpu description file.
+ ??? For future concerns, including adding instructions to the assembler/
+ disassembler at run-time. */
+
+extern const char * cgen_read_cpu_file
+ PARAMS ((CGEN_CPU_DESC, const char * filename_));
+
+#endif /* CGEN_H */
diff --git a/include/opcode/convex.h b/include/opcode/convex.h
new file mode 100644
index 0000000..efaeebb
--- /dev/null
+++ b/include/opcode/convex.h
@@ -0,0 +1,1711 @@
+/* Information for instruction disassembly on the Convex.
+ Copyright 1989, 1993 Free Software Foundation.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef CONST
+#define CONST
+#endif /* CONST */
+
+#define xxx 0
+#define rrr 1
+#define rr 2
+#define rxr 3
+#define r 4
+#define nops 5
+#define nr 6
+#define pcrel 7
+#define lr 8
+#define rxl 9
+#define rlr 10
+#define rrl 11
+#define iml 12
+#define imr 13
+#define a1r 14
+#define a1l 15
+#define a2r 16
+#define a2l 17
+#define a3 18
+#define a4 19
+#define a5 20
+#define V 1
+#define S 2
+#define VM 3
+#define A 4
+#define VL 5
+#define VS 6
+#define VLS 7
+#define PSW 8
+/* Prevent an error during "make depend". */
+#if !defined (PC)
+#define PC 9
+#endif
+#define ITR 10
+#define VV 11
+#define ITSR 12
+#define TOC 13
+#define CIR 14
+#define TTR 15
+#define VMU 16
+#define VML 17
+#define ICR 18
+#define TCPU 19
+#define CPUID 20
+#define TID 21
+
+CONST char *op[] = {
+ "",
+ "v0\0v1\0v2\0v3\0v4\0v5\0v6\0v7",
+ "s0\0s1\0s2\0s3\0s4\0s5\0s6\0s7",
+ "vm",
+ "sp\0a1\0a2\0a3\0a4\0a5\0ap\0fp",
+ "vl",
+ "vs",
+ "vls",
+ "psw",
+ "pc",
+ "itr",
+ "vv",
+ "itsr",
+ "toc",
+ "cir",
+ "ttr",
+ "vmu",
+ "vml",
+ "icr",
+ "tcpu",
+ "cpuid",
+ "tid",
+};
+
+CONST struct formstr format0[] = {
+ {0,0,rrr,V,S,S}, /* mov */
+ {0,0,rrr,S,S,V}, /* mov */
+ {1,1,rrr,V,V,V}, /* merg.t */
+ {2,1,rrr,V,V,V}, /* mask.t */
+ {1,2,rrr,V,S,V}, /* merg.f */
+ {2,2,rrr,V,S,V}, /* mask.f */
+ {1,1,rrr,V,S,V}, /* merg.t */
+ {2,1,rrr,V,S,V}, /* mask.t */
+ {3,3,rrr,V,V,V}, /* mul.s */
+ {3,4,rrr,V,V,V}, /* mul.d */
+ {4,3,rrr,V,V,V}, /* div.s */
+ {4,4,rrr,V,V,V}, /* div.d */
+ {3,3,rrr,V,S,V}, /* mul.s */
+ {3,4,rrr,V,S,V}, /* mul.d */
+ {4,3,rrr,V,S,V}, /* div.s */
+ {4,4,rrr,V,S,V}, /* div.d */
+ {5,0,rrr,V,V,V}, /* and */
+ {6,0,rrr,V,V,V}, /* or */
+ {7,0,rrr,V,V,V}, /* xor */
+ {8,0,rrr,V,V,V}, /* shf */
+ {5,0,rrr,V,S,V}, /* and */
+ {6,0,rrr,V,S,V}, /* or */
+ {7,0,rrr,V,S,V}, /* xor */
+ {8,0,rrr,V,S,V}, /* shf */
+ {9,3,rrr,V,V,V}, /* add.s */
+ {9,4,rrr,V,V,V}, /* add.d */
+ {10,3,rrr,V,V,V}, /* sub.s */
+ {10,4,rrr,V,V,V}, /* sub.d */
+ {9,3,rrr,V,S,V}, /* add.s */
+ {9,4,rrr,V,S,V}, /* add.d */
+ {10,3,rrr,V,S,V}, /* sub.s */
+ {10,4,rrr,V,S,V}, /* sub.d */
+ {9,5,rrr,V,V,V}, /* add.b */
+ {9,6,rrr,V,V,V}, /* add.h */
+ {9,7,rrr,V,V,V}, /* add.w */
+ {9,8,rrr,V,V,V}, /* add.l */
+ {9,5,rrr,V,S,V}, /* add.b */
+ {9,6,rrr,V,S,V}, /* add.h */
+ {9,7,rrr,V,S,V}, /* add.w */
+ {9,8,rrr,V,S,V}, /* add.l */
+ {10,5,rrr,V,V,V}, /* sub.b */
+ {10,6,rrr,V,V,V}, /* sub.h */
+ {10,7,rrr,V,V,V}, /* sub.w */
+ {10,8,rrr,V,V,V}, /* sub.l */
+ {10,5,rrr,V,S,V}, /* sub.b */
+ {10,6,rrr,V,S,V}, /* sub.h */
+ {10,7,rrr,V,S,V}, /* sub.w */
+ {10,8,rrr,V,S,V}, /* sub.l */
+ {3,5,rrr,V,V,V}, /* mul.b */
+ {3,6,rrr,V,V,V}, /* mul.h */
+ {3,7,rrr,V,V,V}, /* mul.w */
+ {3,8,rrr,V,V,V}, /* mul.l */
+ {3,5,rrr,V,S,V}, /* mul.b */
+ {3,6,rrr,V,S,V}, /* mul.h */
+ {3,7,rrr,V,S,V}, /* mul.w */
+ {3,8,rrr,V,S,V}, /* mul.l */
+ {4,5,rrr,V,V,V}, /* div.b */
+ {4,6,rrr,V,V,V}, /* div.h */
+ {4,7,rrr,V,V,V}, /* div.w */
+ {4,8,rrr,V,V,V}, /* div.l */
+ {4,5,rrr,V,S,V}, /* div.b */
+ {4,6,rrr,V,S,V}, /* div.h */
+ {4,7,rrr,V,S,V}, /* div.w */
+ {4,8,rrr,V,S,V}, /* div.l */
+};
+
+CONST struct formstr format1[] = {
+ {11,0,xxx,0,0,0}, /* exit */
+ {12,0,a3,0,0,0}, /* jmp */
+ {13,2,a3,0,0,0}, /* jmpi.f */
+ {13,1,a3,0,0,0}, /* jmpi.t */
+ {14,2,a3,0,0,0}, /* jmpa.f */
+ {14,1,a3,0,0,0}, /* jmpa.t */
+ {15,2,a3,0,0,0}, /* jmps.f */
+ {15,1,a3,0,0,0}, /* jmps.t */
+ {16,0,a3,0,0,0}, /* tac */
+ {17,0,a1r,A,0,0}, /* ldea */
+ {18,8,a1l,VLS,0,0}, /* ld.l */
+ {18,9,a1l,VM,0,0}, /* ld.x */
+ {19,0,a3,0,0,0}, /* tas */
+ {20,0,a3,0,0,0}, /* pshea */
+ {21,8,a2l,VLS,0,0}, /* st.l */
+ {21,9,a2l,VM,0,0}, /* st.x */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {22,0,a3,0,0,0}, /* call */
+ {23,0,a3,0,0,0}, /* calls */
+ {24,0,a3,0,0,0}, /* callq */
+ {25,0,a1r,A,0,0}, /* pfork */
+ {26,5,a2r,S,0,0}, /* ste.b */
+ {26,6,a2r,S,0,0}, /* ste.h */
+ {26,7,a2r,S,0,0}, /* ste.w */
+ {26,8,a2r,S,0,0}, /* ste.l */
+ {18,5,a1r,A,0,0}, /* ld.b */
+ {18,6,a1r,A,0,0}, /* ld.h */
+ {18,7,a1r,A,0,0}, /* ld.w */
+ {27,7,a1r,A,0,0}, /* incr.w */
+ {21,5,a2r,A,0,0}, /* st.b */
+ {21,6,a2r,A,0,0}, /* st.h */
+ {21,7,a2r,A,0,0}, /* st.w */
+ {27,8,a1r,S,0,0}, /* incr.l */
+ {18,5,a1r,S,0,0}, /* ld.b */
+ {18,6,a1r,S,0,0}, /* ld.h */
+ {18,7,a1r,S,0,0}, /* ld.w */
+ {18,8,a1r,S,0,0}, /* ld.l */
+ {21,5,a2r,S,0,0}, /* st.b */
+ {21,6,a2r,S,0,0}, /* st.h */
+ {21,7,a2r,S,0,0}, /* st.w */
+ {21,8,a2r,S,0,0}, /* st.l */
+ {18,5,a1r,V,0,0}, /* ld.b */
+ {18,6,a1r,V,0,0}, /* ld.h */
+ {18,7,a1r,V,0,0}, /* ld.w */
+ {18,8,a1r,V,0,0}, /* ld.l */
+ {21,5,a2r,V,0,0}, /* st.b */
+ {21,6,a2r,V,0,0}, /* st.h */
+ {21,7,a2r,V,0,0}, /* st.w */
+ {21,8,a2r,V,0,0}, /* st.l */
+};
+
+CONST struct formstr format2[] = {
+ {28,5,rr,A,A,0}, /* cvtw.b */
+ {28,6,rr,A,A,0}, /* cvtw.h */
+ {29,7,rr,A,A,0}, /* cvtb.w */
+ {30,7,rr,A,A,0}, /* cvth.w */
+ {28,5,rr,S,S,0}, /* cvtw.b */
+ {28,6,rr,S,S,0}, /* cvtw.h */
+ {29,7,rr,S,S,0}, /* cvtb.w */
+ {30,7,rr,S,S,0}, /* cvth.w */
+ {28,3,rr,S,S,0}, /* cvtw.s */
+ {31,7,rr,S,S,0}, /* cvts.w */
+ {32,3,rr,S,S,0}, /* cvtd.s */
+ {31,4,rr,S,S,0}, /* cvts.d */
+ {31,8,rr,S,S,0}, /* cvts.l */
+ {32,8,rr,S,S,0}, /* cvtd.l */
+ {33,3,rr,S,S,0}, /* cvtl.s */
+ {33,4,rr,S,S,0}, /* cvtl.d */
+ {34,0,rr,A,A,0}, /* ldpa */
+ {8,0,nr,A,0,0}, /* shf */
+ {18,6,nr,A,0,0}, /* ld.h */
+ {18,7,nr,A,0,0}, /* ld.w */
+ {33,7,rr,S,S,0}, /* cvtl.w */
+ {28,8,rr,S,S,0}, /* cvtw.l */
+ {35,1,rr,S,S,0}, /* plc.t */
+ {36,0,rr,S,S,0}, /* tzc */
+ {37,6,rr,A,A,0}, /* eq.h */
+ {37,7,rr,A,A,0}, /* eq.w */
+ {37,6,nr,A,0,0}, /* eq.h */
+ {37,7,nr,A,0,0}, /* eq.w */
+ {37,5,rr,S,S,0}, /* eq.b */
+ {37,6,rr,S,S,0}, /* eq.h */
+ {37,7,rr,S,S,0}, /* eq.w */
+ {37,8,rr,S,S,0}, /* eq.l */
+ {38,6,rr,A,A,0}, /* leu.h */
+ {38,7,rr,A,A,0}, /* leu.w */
+ {38,6,nr,A,0,0}, /* leu.h */
+ {38,7,nr,A,0,0}, /* leu.w */
+ {38,5,rr,S,S,0}, /* leu.b */
+ {38,6,rr,S,S,0}, /* leu.h */
+ {38,7,rr,S,S,0}, /* leu.w */
+ {38,8,rr,S,S,0}, /* leu.l */
+ {39,6,rr,A,A,0}, /* ltu.h */
+ {39,7,rr,A,A,0}, /* ltu.w */
+ {39,6,nr,A,0,0}, /* ltu.h */
+ {39,7,nr,A,0,0}, /* ltu.w */
+ {39,5,rr,S,S,0}, /* ltu.b */
+ {39,6,rr,S,S,0}, /* ltu.h */
+ {39,7,rr,S,S,0}, /* ltu.w */
+ {39,8,rr,S,S,0}, /* ltu.l */
+ {40,6,rr,A,A,0}, /* le.h */
+ {40,7,rr,A,A,0}, /* le.w */
+ {40,6,nr,A,0,0}, /* le.h */
+ {40,7,nr,A,0,0}, /* le.w */
+ {40,5,rr,S,S,0}, /* le.b */
+ {40,6,rr,S,S,0}, /* le.h */
+ {40,7,rr,S,S,0}, /* le.w */
+ {40,8,rr,S,S,0}, /* le.l */
+ {41,6,rr,A,A,0}, /* lt.h */
+ {41,7,rr,A,A,0}, /* lt.w */
+ {41,6,nr,A,0,0}, /* lt.h */
+ {41,7,nr,A,0,0}, /* lt.w */
+ {41,5,rr,S,S,0}, /* lt.b */
+ {41,6,rr,S,S,0}, /* lt.h */
+ {41,7,rr,S,S,0}, /* lt.w */
+ {41,8,rr,S,S,0}, /* lt.l */
+ {9,7,rr,S,A,0}, /* add.w */
+ {8,0,rr,A,A,0}, /* shf */
+ {0,0,rr,A,A,0}, /* mov */
+ {0,0,rr,S,A,0}, /* mov */
+ {0,7,rr,S,S,0}, /* mov.w */
+ {8,0,rr,S,S,0}, /* shf */
+ {0,0,rr,S,S,0}, /* mov */
+ {0,0,rr,A,S,0}, /* mov */
+ {5,0,rr,A,A,0}, /* and */
+ {6,0,rr,A,A,0}, /* or */
+ {7,0,rr,A,A,0}, /* xor */
+ {42,0,rr,A,A,0}, /* not */
+ {5,0,rr,S,S,0}, /* and */
+ {6,0,rr,S,S,0}, /* or */
+ {7,0,rr,S,S,0}, /* xor */
+ {42,0,rr,S,S,0}, /* not */
+ {40,3,rr,S,S,0}, /* le.s */
+ {40,4,rr,S,S,0}, /* le.d */
+ {41,3,rr,S,S,0}, /* lt.s */
+ {41,4,rr,S,S,0}, /* lt.d */
+ {9,3,rr,S,S,0}, /* add.s */
+ {9,4,rr,S,S,0}, /* add.d */
+ {10,3,rr,S,S,0}, /* sub.s */
+ {10,4,rr,S,S,0}, /* sub.d */
+ {37,3,rr,S,S,0}, /* eq.s */
+ {37,4,rr,S,S,0}, /* eq.d */
+ {43,6,rr,A,A,0}, /* neg.h */
+ {43,7,rr,A,A,0}, /* neg.w */
+ {3,3,rr,S,S,0}, /* mul.s */
+ {3,4,rr,S,S,0}, /* mul.d */
+ {4,3,rr,S,S,0}, /* div.s */
+ {4,4,rr,S,S,0}, /* div.d */
+ {9,6,rr,A,A,0}, /* add.h */
+ {9,7,rr,A,A,0}, /* add.w */
+ {9,6,nr,A,0,0}, /* add.h */
+ {9,7,nr,A,0,0}, /* add.w */
+ {9,5,rr,S,S,0}, /* add.b */
+ {9,6,rr,S,S,0}, /* add.h */
+ {9,7,rr,S,S,0}, /* add.w */
+ {9,8,rr,S,S,0}, /* add.l */
+ {10,6,rr,A,A,0}, /* sub.h */
+ {10,7,rr,A,A,0}, /* sub.w */
+ {10,6,nr,A,0,0}, /* sub.h */
+ {10,7,nr,A,0,0}, /* sub.w */
+ {10,5,rr,S,S,0}, /* sub.b */
+ {10,6,rr,S,S,0}, /* sub.h */
+ {10,7,rr,S,S,0}, /* sub.w */
+ {10,8,rr,S,S,0}, /* sub.l */
+ {3,6,rr,A,A,0}, /* mul.h */
+ {3,7,rr,A,A,0}, /* mul.w */
+ {3,6,nr,A,0,0}, /* mul.h */
+ {3,7,nr,A,0,0}, /* mul.w */
+ {3,5,rr,S,S,0}, /* mul.b */
+ {3,6,rr,S,S,0}, /* mul.h */
+ {3,7,rr,S,S,0}, /* mul.w */
+ {3,8,rr,S,S,0}, /* mul.l */
+ {4,6,rr,A,A,0}, /* div.h */
+ {4,7,rr,A,A,0}, /* div.w */
+ {4,6,nr,A,0,0}, /* div.h */
+ {4,7,nr,A,0,0}, /* div.w */
+ {4,5,rr,S,S,0}, /* div.b */
+ {4,6,rr,S,S,0}, /* div.h */
+ {4,7,rr,S,S,0}, /* div.w */
+ {4,8,rr,S,S,0}, /* div.l */
+};
+
+CONST struct formstr format3[] = {
+ {32,3,rr,V,V,0}, /* cvtd.s */
+ {31,4,rr,V,V,0}, /* cvts.d */
+ {33,4,rr,V,V,0}, /* cvtl.d */
+ {32,8,rr,V,V,0}, /* cvtd.l */
+ {0,0,rrl,S,S,VM}, /* mov */
+ {0,0,rlr,S,VM,S}, /* mov */
+ {0,0,0,0,0,0},
+ {44,0,rr,S,S,0}, /* lop */
+ {36,0,rr,V,V,0}, /* tzc */
+ {44,0,rr,V,V,0}, /* lop */
+ {0,0,0,0,0,0},
+ {42,0,rr,V,V,0}, /* not */
+ {8,0,rr,S,V,0}, /* shf */
+ {35,1,rr,V,V,0}, /* plc.t */
+ {45,2,rr,V,V,0}, /* cprs.f */
+ {45,1,rr,V,V,0}, /* cprs.t */
+ {37,3,rr,V,V,0}, /* eq.s */
+ {37,4,rr,V,V,0}, /* eq.d */
+ {43,3,rr,V,V,0}, /* neg.s */
+ {43,4,rr,V,V,0}, /* neg.d */
+ {37,3,rr,S,V,0}, /* eq.s */
+ {37,4,rr,S,V,0}, /* eq.d */
+ {43,3,rr,S,S,0}, /* neg.s */
+ {43,4,rr,S,S,0}, /* neg.d */
+ {40,3,rr,V,V,0}, /* le.s */
+ {40,4,rr,V,V,0}, /* le.d */
+ {41,3,rr,V,V,0}, /* lt.s */
+ {41,4,rr,V,V,0}, /* lt.d */
+ {40,3,rr,S,V,0}, /* le.s */
+ {40,4,rr,S,V,0}, /* le.d */
+ {41,3,rr,S,V,0}, /* lt.s */
+ {41,4,rr,S,V,0}, /* lt.d */
+ {37,5,rr,V,V,0}, /* eq.b */
+ {37,6,rr,V,V,0}, /* eq.h */
+ {37,7,rr,V,V,0}, /* eq.w */
+ {37,8,rr,V,V,0}, /* eq.l */
+ {37,5,rr,S,V,0}, /* eq.b */
+ {37,6,rr,S,V,0}, /* eq.h */
+ {37,7,rr,S,V,0}, /* eq.w */
+ {37,8,rr,S,V,0}, /* eq.l */
+ {40,5,rr,V,V,0}, /* le.b */
+ {40,6,rr,V,V,0}, /* le.h */
+ {40,7,rr,V,V,0}, /* le.w */
+ {40,8,rr,V,V,0}, /* le.l */
+ {40,5,rr,S,V,0}, /* le.b */
+ {40,6,rr,S,V,0}, /* le.h */
+ {40,7,rr,S,V,0}, /* le.w */
+ {40,8,rr,S,V,0}, /* le.l */
+ {41,5,rr,V,V,0}, /* lt.b */
+ {41,6,rr,V,V,0}, /* lt.h */
+ {41,7,rr,V,V,0}, /* lt.w */
+ {41,8,rr,V,V,0}, /* lt.l */
+ {41,5,rr,S,V,0}, /* lt.b */
+ {41,6,rr,S,V,0}, /* lt.h */
+ {41,7,rr,S,V,0}, /* lt.w */
+ {41,8,rr,S,V,0}, /* lt.l */
+ {43,5,rr,V,V,0}, /* neg.b */
+ {43,6,rr,V,V,0}, /* neg.h */
+ {43,7,rr,V,V,0}, /* neg.w */
+ {43,8,rr,V,V,0}, /* neg.l */
+ {43,5,rr,S,S,0}, /* neg.b */
+ {43,6,rr,S,S,0}, /* neg.h */
+ {43,7,rr,S,S,0}, /* neg.w */
+ {43,8,rr,S,S,0}, /* neg.l */
+};
+
+CONST struct formstr format4[] = {
+ {46,0,nops,0,0,0}, /* nop */
+ {47,0,pcrel,0,0,0}, /* br */
+ {48,2,pcrel,0,0,0}, /* bri.f */
+ {48,1,pcrel,0,0,0}, /* bri.t */
+ {49,2,pcrel,0,0,0}, /* bra.f */
+ {49,1,pcrel,0,0,0}, /* bra.t */
+ {50,2,pcrel,0,0,0}, /* brs.f */
+ {50,1,pcrel,0,0,0}, /* brs.t */
+};
+
+CONST struct formstr format5[] = {
+ {51,5,rr,V,V,0}, /* ldvi.b */
+ {51,6,rr,V,V,0}, /* ldvi.h */
+ {51,7,rr,V,V,0}, /* ldvi.w */
+ {51,8,rr,V,V,0}, /* ldvi.l */
+ {28,3,rr,V,V,0}, /* cvtw.s */
+ {31,7,rr,V,V,0}, /* cvts.w */
+ {28,8,rr,V,V,0}, /* cvtw.l */
+ {33,7,rr,V,V,0}, /* cvtl.w */
+ {52,5,rxr,V,V,0}, /* stvi.b */
+ {52,6,rxr,V,V,0}, /* stvi.h */
+ {52,7,rxr,V,V,0}, /* stvi.w */
+ {52,8,rxr,V,V,0}, /* stvi.l */
+ {52,5,rxr,S,V,0}, /* stvi.b */
+ {52,6,rxr,S,V,0}, /* stvi.h */
+ {52,7,rxr,S,V,0}, /* stvi.w */
+ {52,8,rxr,S,V,0}, /* stvi.l */
+};
+
+CONST struct formstr format6[] = {
+ {53,0,r,A,0,0}, /* ldsdr */
+ {54,0,r,A,0,0}, /* ldkdr */
+ {55,3,r,S,0,0}, /* ln.s */
+ {55,4,r,S,0,0}, /* ln.d */
+ {56,0,nops,0,0,0}, /* patu */
+ {57,0,r,A,0,0}, /* pate */
+ {58,0,nops,0,0,0}, /* pich */
+ {59,0,nops,0,0,0}, /* plch */
+ {0,0,lr,PSW,A,0}, /* mov */
+ {0,0,rxl,A,PSW,0}, /* mov */
+ {0,0,lr,PC,A,0}, /* mov */
+ {60,0,r,S,0,0}, /* idle */
+ {0,0,lr,ITR,S,0}, /* mov */
+ {0,0,rxl,S,ITR,0}, /* mov */
+ {0,0,0,0,0,0},
+ {0,0,rxl,S,ITSR,0}, /* mov */
+ {61,0,nops,0,0,0}, /* rtnq */
+ {62,0,nops,0,0,0}, /* cfork */
+ {63,0,nops,0,0,0}, /* rtn */
+ {64,0,nops,0,0,0}, /* wfork */
+ {65,0,nops,0,0,0}, /* join */
+ {66,0,nops,0,0,0}, /* rtnc */
+ {67,3,r,S,0,0}, /* exp.s */
+ {67,4,r,S,0,0}, /* exp.d */
+ {68,3,r,S,0,0}, /* sin.s */
+ {68,4,r,S,0,0}, /* sin.d */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {69,3,r,S,0,0}, /* cos.s */
+ {69,4,r,S,0,0}, /* cos.d */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {70,7,r,A,0,0}, /* psh.w */
+ {0,0,0,0,0,0},
+ {71,7,r,A,0,0}, /* pop.w */
+ {0,0,0,0,0,0},
+ {70,7,r,S,0,0}, /* psh.w */
+ {70,8,r,S,0,0}, /* psh.l */
+ {71,7,r,S,0,0}, /* pop.w */
+ {71,8,r,S,0,0}, /* pop.l */
+ {72,0,nops,0,0,0}, /* eni */
+ {73,0,nops,0,0,0}, /* dsi */
+ {74,0,nops,0,0,0}, /* bkpt */
+ {75,0,nops,0,0,0}, /* msync */
+ {76,0,r,S,0,0}, /* mski */
+ {77,0,r,S,0,0}, /* xmti */
+ {0,0,rxl,S,VV,0}, /* mov */
+ {78,0,nops,0,0,0}, /* tstvv */
+ {0,0,lr,VS,A,0}, /* mov */
+ {0,0,rxl,A,VS,0}, /* mov */
+ {0,0,lr,VL,A,0}, /* mov */
+ {0,0,rxl,A,VL,0}, /* mov */
+ {0,7,lr,VS,S,0}, /* mov.w */
+ {0,7,rxl,S,VS,0}, /* mov.w */
+ {0,7,lr,VL,S,0}, /* mov.w */
+ {0,7,rxl,S,VL,0}, /* mov.w */
+ {79,0,r,A,0,0}, /* diag */
+ {80,0,nops,0,0,0}, /* pbkpt */
+ {81,3,r,S,0,0}, /* sqrt.s */
+ {81,4,r,S,0,0}, /* sqrt.d */
+ {82,0,nops,0,0,0}, /* casr */
+ {0,0,0,0,0,0},
+ {83,3,r,S,0,0}, /* atan.s */
+ {83,4,r,S,0,0}, /* atan.d */
+};
+
+CONST struct formstr format7[] = {
+ {84,5,r,V,0,0}, /* sum.b */
+ {84,6,r,V,0,0}, /* sum.h */
+ {84,7,r,V,0,0}, /* sum.w */
+ {84,8,r,V,0,0}, /* sum.l */
+ {85,0,r,V,0,0}, /* all */
+ {86,0,r,V,0,0}, /* any */
+ {87,0,r,V,0,0}, /* parity */
+ {0,0,0,0,0,0},
+ {88,5,r,V,0,0}, /* max.b */
+ {88,6,r,V,0,0}, /* max.h */
+ {88,7,r,V,0,0}, /* max.w */
+ {88,8,r,V,0,0}, /* max.l */
+ {89,5,r,V,0,0}, /* min.b */
+ {89,6,r,V,0,0}, /* min.h */
+ {89,7,r,V,0,0}, /* min.w */
+ {89,8,r,V,0,0}, /* min.l */
+ {84,3,r,V,0,0}, /* sum.s */
+ {84,4,r,V,0,0}, /* sum.d */
+ {90,3,r,V,0,0}, /* prod.s */
+ {90,4,r,V,0,0}, /* prod.d */
+ {88,3,r,V,0,0}, /* max.s */
+ {88,4,r,V,0,0}, /* max.d */
+ {89,3,r,V,0,0}, /* min.s */
+ {89,4,r,V,0,0}, /* min.d */
+ {90,5,r,V,0,0}, /* prod.b */
+ {90,6,r,V,0,0}, /* prod.h */
+ {90,7,r,V,0,0}, /* prod.w */
+ {90,8,r,V,0,0}, /* prod.l */
+ {35,2,lr,VM,S,0}, /* plc.f */
+ {35,1,lr,VM,S,0}, /* plc.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr formatx[] = {
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr format1a[] = {
+ {91,0,imr,A,0,0}, /* halt */
+ {92,0,a4,0,0,0}, /* sysc */
+ {18,6,imr,A,0,0}, /* ld.h */
+ {18,7,imr,A,0,0}, /* ld.w */
+ {5,0,imr,A,0,0}, /* and */
+ {6,0,imr,A,0,0}, /* or */
+ {7,0,imr,A,0,0}, /* xor */
+ {8,0,imr,A,0,0}, /* shf */
+ {9,6,imr,A,0,0}, /* add.h */
+ {9,7,imr,A,0,0}, /* add.w */
+ {10,6,imr,A,0,0}, /* sub.h */
+ {10,7,imr,A,0,0}, /* sub.w */
+ {3,6,imr,A,0,0}, /* mul.h */
+ {3,7,imr,A,0,0}, /* mul.w */
+ {4,6,imr,A,0,0}, /* div.h */
+ {4,7,imr,A,0,0}, /* div.w */
+ {18,7,iml,VL,0,0}, /* ld.w */
+ {18,7,iml,VS,0,0}, /* ld.w */
+ {0,0,0,0,0,0},
+ {8,7,imr,S,0,0}, /* shf.w */
+ {93,0,a5,0,0,0}, /* trap */
+ {0,0,0,0,0,0},
+ {37,6,imr,A,0,0}, /* eq.h */
+ {37,7,imr,A,0,0}, /* eq.w */
+ {38,6,imr,A,0,0}, /* leu.h */
+ {38,7,imr,A,0,0}, /* leu.w */
+ {39,6,imr,A,0,0}, /* ltu.h */
+ {39,7,imr,A,0,0}, /* ltu.w */
+ {40,6,imr,A,0,0}, /* le.h */
+ {40,7,imr,A,0,0}, /* le.w */
+ {41,6,imr,A,0,0}, /* lt.h */
+ {41,7,imr,A,0,0}, /* lt.w */
+};
+
+CONST struct formstr format1b[] = {
+ {18,4,imr,S,0,0}, /* ld.d */
+ {18,10,imr,S,0,0}, /* ld.u */
+ {18,8,imr,S,0,0}, /* ld.l */
+ {18,7,imr,S,0,0}, /* ld.w */
+ {5,0,imr,S,0,0}, /* and */
+ {6,0,imr,S,0,0}, /* or */
+ {7,0,imr,S,0,0}, /* xor */
+ {8,0,imr,S,0,0}, /* shf */
+ {9,6,imr,S,0,0}, /* add.h */
+ {9,7,imr,S,0,0}, /* add.w */
+ {10,6,imr,S,0,0}, /* sub.h */
+ {10,7,imr,S,0,0}, /* sub.w */
+ {3,6,imr,S,0,0}, /* mul.h */
+ {3,7,imr,S,0,0}, /* mul.w */
+ {4,6,imr,S,0,0}, /* div.h */
+ {4,7,imr,S,0,0}, /* div.w */
+ {9,3,imr,S,0,0}, /* add.s */
+ {10,3,imr,S,0,0}, /* sub.s */
+ {3,3,imr,S,0,0}, /* mul.s */
+ {4,3,imr,S,0,0}, /* div.s */
+ {40,3,imr,S,0,0}, /* le.s */
+ {41,3,imr,S,0,0}, /* lt.s */
+ {37,6,imr,S,0,0}, /* eq.h */
+ {37,7,imr,S,0,0}, /* eq.w */
+ {38,6,imr,S,0,0}, /* leu.h */
+ {38,7,imr,S,0,0}, /* leu.w */
+ {39,6,imr,S,0,0}, /* ltu.h */
+ {39,7,imr,S,0,0}, /* ltu.w */
+ {40,6,imr,S,0,0}, /* le.h */
+ {40,7,imr,S,0,0}, /* le.w */
+ {41,6,imr,S,0,0}, /* lt.h */
+ {41,7,imr,S,0,0}, /* lt.w */
+};
+
+CONST struct formstr e0_format0[] = {
+ {10,3,rrr,S,V,V}, /* sub.s */
+ {10,4,rrr,S,V,V}, /* sub.d */
+ {4,3,rrr,S,V,V}, /* div.s */
+ {4,4,rrr,S,V,V}, /* div.d */
+ {10,11,rrr,S,V,V}, /* sub.s.f */
+ {10,12,rrr,S,V,V}, /* sub.d.f */
+ {4,11,rrr,S,V,V}, /* div.s.f */
+ {4,12,rrr,S,V,V}, /* div.d.f */
+ {3,11,rrr,V,V,V}, /* mul.s.f */
+ {3,12,rrr,V,V,V}, /* mul.d.f */
+ {4,11,rrr,V,V,V}, /* div.s.f */
+ {4,12,rrr,V,V,V}, /* div.d.f */
+ {3,11,rrr,V,S,V}, /* mul.s.f */
+ {3,12,rrr,V,S,V}, /* mul.d.f */
+ {4,11,rrr,V,S,V}, /* div.s.f */
+ {4,12,rrr,V,S,V}, /* div.d.f */
+ {5,2,rrr,V,V,V}, /* and.f */
+ {6,2,rrr,V,V,V}, /* or.f */
+ {7,2,rrr,V,V,V}, /* xor.f */
+ {8,2,rrr,V,V,V}, /* shf.f */
+ {5,2,rrr,V,S,V}, /* and.f */
+ {6,2,rrr,V,S,V}, /* or.f */
+ {7,2,rrr,V,S,V}, /* xor.f */
+ {8,2,rrr,V,S,V}, /* shf.f */
+ {9,11,rrr,V,V,V}, /* add.s.f */
+ {9,12,rrr,V,V,V}, /* add.d.f */
+ {10,11,rrr,V,V,V}, /* sub.s.f */
+ {10,12,rrr,V,V,V}, /* sub.d.f */
+ {9,11,rrr,V,S,V}, /* add.s.f */
+ {9,12,rrr,V,S,V}, /* add.d.f */
+ {10,11,rrr,V,S,V}, /* sub.s.f */
+ {10,12,rrr,V,S,V}, /* sub.d.f */
+ {9,13,rrr,V,V,V}, /* add.b.f */
+ {9,14,rrr,V,V,V}, /* add.h.f */
+ {9,15,rrr,V,V,V}, /* add.w.f */
+ {9,16,rrr,V,V,V}, /* add.l.f */
+ {9,13,rrr,V,S,V}, /* add.b.f */
+ {9,14,rrr,V,S,V}, /* add.h.f */
+ {9,15,rrr,V,S,V}, /* add.w.f */
+ {9,16,rrr,V,S,V}, /* add.l.f */
+ {10,13,rrr,V,V,V}, /* sub.b.f */
+ {10,14,rrr,V,V,V}, /* sub.h.f */
+ {10,15,rrr,V,V,V}, /* sub.w.f */
+ {10,16,rrr,V,V,V}, /* sub.l.f */
+ {10,13,rrr,V,S,V}, /* sub.b.f */
+ {10,14,rrr,V,S,V}, /* sub.h.f */
+ {10,15,rrr,V,S,V}, /* sub.w.f */
+ {10,16,rrr,V,S,V}, /* sub.l.f */
+ {3,13,rrr,V,V,V}, /* mul.b.f */
+ {3,14,rrr,V,V,V}, /* mul.h.f */
+ {3,15,rrr,V,V,V}, /* mul.w.f */
+ {3,16,rrr,V,V,V}, /* mul.l.f */
+ {3,13,rrr,V,S,V}, /* mul.b.f */
+ {3,14,rrr,V,S,V}, /* mul.h.f */
+ {3,15,rrr,V,S,V}, /* mul.w.f */
+ {3,16,rrr,V,S,V}, /* mul.l.f */
+ {4,13,rrr,V,V,V}, /* div.b.f */
+ {4,14,rrr,V,V,V}, /* div.h.f */
+ {4,15,rrr,V,V,V}, /* div.w.f */
+ {4,16,rrr,V,V,V}, /* div.l.f */
+ {4,13,rrr,V,S,V}, /* div.b.f */
+ {4,14,rrr,V,S,V}, /* div.h.f */
+ {4,15,rrr,V,S,V}, /* div.w.f */
+ {4,16,rrr,V,S,V}, /* div.l.f */
+};
+
+CONST struct formstr e0_format1[] = {
+ {0,0,0,0,0,0},
+ {94,0,a3,0,0,0}, /* tst */
+ {95,0,a3,0,0,0}, /* lck */
+ {96,0,a3,0,0,0}, /* ulk */
+ {17,0,a1r,S,0,0}, /* ldea */
+ {97,0,a1r,A,0,0}, /* spawn */
+ {98,0,a1r,A,0,0}, /* ldcmr */
+ {99,0,a2r,A,0,0}, /* stcmr */
+ {100,0,a1r,A,0,0}, /* popr */
+ {101,0,a2r,A,0,0}, /* pshr */
+ {102,7,a1r,A,0,0}, /* rcvr.w */
+ {103,7,a2r,A,0,0}, /* matm.w */
+ {104,7,a2r,A,0,0}, /* sndr.w */
+ {104,8,a2r,S,0,0}, /* sndr.l */
+ {102,8,a1r,S,0,0}, /* rcvr.l */
+ {103,8,a2r,S,0,0}, /* matm.l */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {105,7,a2r,A,0,0}, /* putr.w */
+ {105,8,a2r,S,0,0}, /* putr.l */
+ {106,7,a1r,A,0,0}, /* getr.w */
+ {106,8,a1r,S,0,0}, /* getr.l */
+ {26,13,a2r,S,0,0}, /* ste.b.f */
+ {26,14,a2r,S,0,0}, /* ste.h.f */
+ {26,15,a2r,S,0,0}, /* ste.w.f */
+ {26,16,a2r,S,0,0}, /* ste.l.f */
+ {107,7,a2r,A,0,0}, /* matr.w */
+ {108,7,a2r,A,0,0}, /* mat.w */
+ {109,7,a1r,A,0,0}, /* get.w */
+ {110,7,a1r,A,0,0}, /* rcv.w */
+ {0,0,0,0,0,0},
+ {111,7,a1r,A,0,0}, /* inc.w */
+ {112,7,a2r,A,0,0}, /* put.w */
+ {113,7,a2r,A,0,0}, /* snd.w */
+ {107,8,a2r,S,0,0}, /* matr.l */
+ {108,8,a2r,S,0,0}, /* mat.l */
+ {109,8,a1r,S,0,0}, /* get.l */
+ {110,8,a1r,S,0,0}, /* rcv.l */
+ {0,0,0,0,0,0},
+ {111,8,a1r,S,0,0}, /* inc.l */
+ {112,8,a2r,S,0,0}, /* put.l */
+ {113,8,a2r,S,0,0}, /* snd.l */
+ {18,13,a1r,V,0,0}, /* ld.b.f */
+ {18,14,a1r,V,0,0}, /* ld.h.f */
+ {18,15,a1r,V,0,0}, /* ld.w.f */
+ {18,16,a1r,V,0,0}, /* ld.l.f */
+ {21,13,a2r,V,0,0}, /* st.b.f */
+ {21,14,a2r,V,0,0}, /* st.h.f */
+ {21,15,a2r,V,0,0}, /* st.w.f */
+ {21,16,a2r,V,0,0}, /* st.l.f */
+};
+
+CONST struct formstr e0_format2[] = {
+ {28,5,rr,V,V,0}, /* cvtw.b */
+ {28,6,rr,V,V,0}, /* cvtw.h */
+ {29,7,rr,V,V,0}, /* cvtb.w */
+ {30,7,rr,V,V,0}, /* cvth.w */
+ {28,13,rr,V,V,0}, /* cvtw.b.f */
+ {28,14,rr,V,V,0}, /* cvtw.h.f */
+ {29,15,rr,V,V,0}, /* cvtb.w.f */
+ {30,15,rr,V,V,0}, /* cvth.w.f */
+ {31,8,rr,V,V,0}, /* cvts.l */
+ {32,7,rr,V,V,0}, /* cvtd.w */
+ {33,3,rr,V,V,0}, /* cvtl.s */
+ {28,4,rr,V,V,0}, /* cvtw.d */
+ {31,16,rr,V,V,0}, /* cvts.l.f */
+ {32,15,rr,V,V,0}, /* cvtd.w.f */
+ {33,11,rr,V,V,0}, /* cvtl.s.f */
+ {28,12,rr,V,V,0}, /* cvtw.d.f */
+ {114,0,rr,S,S,0}, /* enal */
+ {8,7,rr,S,S,0}, /* shf.w */
+ {115,0,rr,S,S,0}, /* enag */
+ {0,0,0,0,0,0},
+ {28,4,rr,S,S,0}, /* cvtw.d */
+ {32,7,rr,S,S,0}, /* cvtd.w */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {116,3,rr,S,S,0}, /* frint.s */
+ {116,4,rr,S,S,0}, /* frint.d */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {116,3,rr,V,V,0}, /* frint.s */
+ {116,4,rr,V,V,0}, /* frint.d */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {116,11,rr,V,V,0}, /* frint.s.f */
+ {116,12,rr,V,V,0}, /* frint.d.f */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {81,3,rr,V,V,0}, /* sqrt.s */
+ {81,4,rr,V,V,0}, /* sqrt.d */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {81,11,rr,V,V,0}, /* sqrt.s.f */
+ {81,12,rr,V,V,0}, /* sqrt.d.f */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e0_format3[] = {
+ {32,11,rr,V,V,0}, /* cvtd.s.f */
+ {31,12,rr,V,V,0}, /* cvts.d.f */
+ {33,12,rr,V,V,0}, /* cvtl.d.f */
+ {32,16,rr,V,V,0}, /* cvtd.l.f */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {36,2,rr,V,V,0}, /* tzc.f */
+ {44,2,rr,V,V,0}, /* lop.f */
+ {117,2,rr,V,V,0}, /* xpnd.f */
+ {42,2,rr,V,V,0}, /* not.f */
+ {8,2,rr,S,V,0}, /* shf.f */
+ {35,17,rr,V,V,0}, /* plc.t.f */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {37,11,rr,V,V,0}, /* eq.s.f */
+ {37,12,rr,V,V,0}, /* eq.d.f */
+ {43,11,rr,V,V,0}, /* neg.s.f */
+ {43,12,rr,V,V,0}, /* neg.d.f */
+ {37,11,rr,S,V,0}, /* eq.s.f */
+ {37,12,rr,S,V,0}, /* eq.d.f */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {40,11,rr,V,V,0}, /* le.s.f */
+ {40,12,rr,V,V,0}, /* le.d.f */
+ {41,11,rr,V,V,0}, /* lt.s.f */
+ {41,12,rr,V,V,0}, /* lt.d.f */
+ {40,11,rr,S,V,0}, /* le.s.f */
+ {40,12,rr,S,V,0}, /* le.d.f */
+ {41,11,rr,S,V,0}, /* lt.s.f */
+ {41,12,rr,S,V,0}, /* lt.d.f */
+ {37,13,rr,V,V,0}, /* eq.b.f */
+ {37,14,rr,V,V,0}, /* eq.h.f */
+ {37,15,rr,V,V,0}, /* eq.w.f */
+ {37,16,rr,V,V,0}, /* eq.l.f */
+ {37,13,rr,S,V,0}, /* eq.b.f */
+ {37,14,rr,S,V,0}, /* eq.h.f */
+ {37,15,rr,S,V,0}, /* eq.w.f */
+ {37,16,rr,S,V,0}, /* eq.l.f */
+ {40,13,rr,V,V,0}, /* le.b.f */
+ {40,14,rr,V,V,0}, /* le.h.f */
+ {40,15,rr,V,V,0}, /* le.w.f */
+ {40,16,rr,V,V,0}, /* le.l.f */
+ {40,13,rr,S,V,0}, /* le.b.f */
+ {40,14,rr,S,V,0}, /* le.h.f */
+ {40,15,rr,S,V,0}, /* le.w.f */
+ {40,16,rr,S,V,0}, /* le.l.f */
+ {41,13,rr,V,V,0}, /* lt.b.f */
+ {41,14,rr,V,V,0}, /* lt.h.f */
+ {41,15,rr,V,V,0}, /* lt.w.f */
+ {41,16,rr,V,V,0}, /* lt.l.f */
+ {41,13,rr,S,V,0}, /* lt.b.f */
+ {41,14,rr,S,V,0}, /* lt.h.f */
+ {41,15,rr,S,V,0}, /* lt.w.f */
+ {41,16,rr,S,V,0}, /* lt.l.f */
+ {43,13,rr,V,V,0}, /* neg.b.f */
+ {43,14,rr,V,V,0}, /* neg.h.f */
+ {43,15,rr,V,V,0}, /* neg.w.f */
+ {43,16,rr,V,V,0}, /* neg.l.f */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e0_format4[] = {
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e0_format5[] = {
+ {51,13,rr,V,V,0}, /* ldvi.b.f */
+ {51,14,rr,V,V,0}, /* ldvi.h.f */
+ {51,15,rr,V,V,0}, /* ldvi.w.f */
+ {51,16,rr,V,V,0}, /* ldvi.l.f */
+ {28,11,rr,V,V,0}, /* cvtw.s.f */
+ {31,15,rr,V,V,0}, /* cvts.w.f */
+ {28,16,rr,V,V,0}, /* cvtw.l.f */
+ {33,15,rr,V,V,0}, /* cvtl.w.f */
+ {52,13,rxr,V,V,0}, /* stvi.b.f */
+ {52,14,rxr,V,V,0}, /* stvi.h.f */
+ {52,15,rxr,V,V,0}, /* stvi.w.f */
+ {52,16,rxr,V,V,0}, /* stvi.l.f */
+ {52,13,rxr,S,V,0}, /* stvi.b.f */
+ {52,14,rxr,S,V,0}, /* stvi.h.f */
+ {52,15,rxr,S,V,0}, /* stvi.w.f */
+ {52,16,rxr,S,V,0}, /* stvi.l.f */
+};
+
+CONST struct formstr e0_format6[] = {
+ {0,0,rxl,S,CIR,0}, /* mov */
+ {0,0,lr,CIR,S,0}, /* mov */
+ {0,0,lr,TOC,S,0}, /* mov */
+ {0,0,lr,CPUID,S,0}, /* mov */
+ {0,0,rxl,S,TTR,0}, /* mov */
+ {0,0,lr,TTR,S,0}, /* mov */
+ {118,0,nops,0,0,0}, /* ctrsl */
+ {119,0,nops,0,0,0}, /* ctrsg */
+ {0,0,rxl,S,VMU,0}, /* mov */
+ {0,0,lr,VMU,S,0}, /* mov */
+ {0,0,rxl,S,VML,0}, /* mov */
+ {0,0,lr,VML,S,0}, /* mov */
+ {0,0,rxl,S,ICR,0}, /* mov */
+ {0,0,lr,ICR,S,0}, /* mov */
+ {0,0,rxl,S,TCPU,0}, /* mov */
+ {0,0,lr,TCPU,S,0}, /* mov */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {120,0,nops,0,0,0}, /* stop */
+ {0,0,0,0,0,0},
+ {0,0,rxl,S,TID,0}, /* mov */
+ {0,0,lr,TID,S,0}, /* mov */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e0_format7[] = {
+ {84,13,r,V,0,0}, /* sum.b.f */
+ {84,14,r,V,0,0}, /* sum.h.f */
+ {84,15,r,V,0,0}, /* sum.w.f */
+ {84,16,r,V,0,0}, /* sum.l.f */
+ {85,2,r,V,0,0}, /* all.f */
+ {86,2,r,V,0,0}, /* any.f */
+ {87,2,r,V,0,0}, /* parity.f */
+ {0,0,0,0,0,0},
+ {88,13,r,V,0,0}, /* max.b.f */
+ {88,14,r,V,0,0}, /* max.h.f */
+ {88,15,r,V,0,0}, /* max.w.f */
+ {88,16,r,V,0,0}, /* max.l.f */
+ {89,13,r,V,0,0}, /* min.b.f */
+ {89,14,r,V,0,0}, /* min.h.f */
+ {89,15,r,V,0,0}, /* min.w.f */
+ {89,16,r,V,0,0}, /* min.l.f */
+ {84,11,r,V,0,0}, /* sum.s.f */
+ {84,12,r,V,0,0}, /* sum.d.f */
+ {90,11,r,V,0,0}, /* prod.s.f */
+ {90,12,r,V,0,0}, /* prod.d.f */
+ {88,11,r,V,0,0}, /* max.s.f */
+ {88,12,r,V,0,0}, /* max.d.f */
+ {89,11,r,V,0,0}, /* min.s.f */
+ {89,12,r,V,0,0}, /* min.d.f */
+ {90,13,r,V,0,0}, /* prod.b.f */
+ {90,14,r,V,0,0}, /* prod.h.f */
+ {90,15,r,V,0,0}, /* prod.w.f */
+ {90,16,r,V,0,0}, /* prod.l.f */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e1_format0[] = {
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {10,18,rrr,S,V,V}, /* sub.s.t */
+ {10,19,rrr,S,V,V}, /* sub.d.t */
+ {4,18,rrr,S,V,V}, /* div.s.t */
+ {4,19,rrr,S,V,V}, /* div.d.t */
+ {3,18,rrr,V,V,V}, /* mul.s.t */
+ {3,19,rrr,V,V,V}, /* mul.d.t */
+ {4,18,rrr,V,V,V}, /* div.s.t */
+ {4,19,rrr,V,V,V}, /* div.d.t */
+ {3,18,rrr,V,S,V}, /* mul.s.t */
+ {3,19,rrr,V,S,V}, /* mul.d.t */
+ {4,18,rrr,V,S,V}, /* div.s.t */
+ {4,19,rrr,V,S,V}, /* div.d.t */
+ {5,1,rrr,V,V,V}, /* and.t */
+ {6,1,rrr,V,V,V}, /* or.t */
+ {7,1,rrr,V,V,V}, /* xor.t */
+ {8,1,rrr,V,V,V}, /* shf.t */
+ {5,1,rrr,V,S,V}, /* and.t */
+ {6,1,rrr,V,S,V}, /* or.t */
+ {7,1,rrr,V,S,V}, /* xor.t */
+ {8,1,rrr,V,S,V}, /* shf.t */
+ {9,18,rrr,V,V,V}, /* add.s.t */
+ {9,19,rrr,V,V,V}, /* add.d.t */
+ {10,18,rrr,V,V,V}, /* sub.s.t */
+ {10,19,rrr,V,V,V}, /* sub.d.t */
+ {9,18,rrr,V,S,V}, /* add.s.t */
+ {9,19,rrr,V,S,V}, /* add.d.t */
+ {10,18,rrr,V,S,V}, /* sub.s.t */
+ {10,19,rrr,V,S,V}, /* sub.d.t */
+ {9,20,rrr,V,V,V}, /* add.b.t */
+ {9,21,rrr,V,V,V}, /* add.h.t */
+ {9,22,rrr,V,V,V}, /* add.w.t */
+ {9,23,rrr,V,V,V}, /* add.l.t */
+ {9,20,rrr,V,S,V}, /* add.b.t */
+ {9,21,rrr,V,S,V}, /* add.h.t */
+ {9,22,rrr,V,S,V}, /* add.w.t */
+ {9,23,rrr,V,S,V}, /* add.l.t */
+ {10,20,rrr,V,V,V}, /* sub.b.t */
+ {10,21,rrr,V,V,V}, /* sub.h.t */
+ {10,22,rrr,V,V,V}, /* sub.w.t */
+ {10,23,rrr,V,V,V}, /* sub.l.t */
+ {10,20,rrr,V,S,V}, /* sub.b.t */
+ {10,21,rrr,V,S,V}, /* sub.h.t */
+ {10,22,rrr,V,S,V}, /* sub.w.t */
+ {10,23,rrr,V,S,V}, /* sub.l.t */
+ {3,20,rrr,V,V,V}, /* mul.b.t */
+ {3,21,rrr,V,V,V}, /* mul.h.t */
+ {3,22,rrr,V,V,V}, /* mul.w.t */
+ {3,23,rrr,V,V,V}, /* mul.l.t */
+ {3,20,rrr,V,S,V}, /* mul.b.t */
+ {3,21,rrr,V,S,V}, /* mul.h.t */
+ {3,22,rrr,V,S,V}, /* mul.w.t */
+ {3,23,rrr,V,S,V}, /* mul.l.t */
+ {4,20,rrr,V,V,V}, /* div.b.t */
+ {4,21,rrr,V,V,V}, /* div.h.t */
+ {4,22,rrr,V,V,V}, /* div.w.t */
+ {4,23,rrr,V,V,V}, /* div.l.t */
+ {4,20,rrr,V,S,V}, /* div.b.t */
+ {4,21,rrr,V,S,V}, /* div.h.t */
+ {4,22,rrr,V,S,V}, /* div.w.t */
+ {4,23,rrr,V,S,V}, /* div.l.t */
+};
+
+CONST struct formstr e1_format1[] = {
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {26,20,a2r,S,0,0}, /* ste.b.t */
+ {26,21,a2r,S,0,0}, /* ste.h.t */
+ {26,22,a2r,S,0,0}, /* ste.w.t */
+ {26,23,a2r,S,0,0}, /* ste.l.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {18,20,a1r,V,0,0}, /* ld.b.t */
+ {18,21,a1r,V,0,0}, /* ld.h.t */
+ {18,22,a1r,V,0,0}, /* ld.w.t */
+ {18,23,a1r,V,0,0}, /* ld.l.t */
+ {21,20,a2r,V,0,0}, /* st.b.t */
+ {21,21,a2r,V,0,0}, /* st.h.t */
+ {21,22,a2r,V,0,0}, /* st.w.t */
+ {21,23,a2r,V,0,0}, /* st.l.t */
+};
+
+CONST struct formstr e1_format2[] = {
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {28,20,rr,V,V,0}, /* cvtw.b.t */
+ {28,21,rr,V,V,0}, /* cvtw.h.t */
+ {29,22,rr,V,V,0}, /* cvtb.w.t */
+ {30,22,rr,V,V,0}, /* cvth.w.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {31,23,rr,V,V,0}, /* cvts.l.t */
+ {32,22,rr,V,V,0}, /* cvtd.w.t */
+ {33,18,rr,V,V,0}, /* cvtl.s.t */
+ {28,19,rr,V,V,0}, /* cvtw.d.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {116,18,rr,V,V,0}, /* frint.s.t */
+ {116,19,rr,V,V,0}, /* frint.d.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {81,18,rr,V,V,0}, /* sqrt.s.t */
+ {81,19,rr,V,V,0}, /* sqrt.d.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e1_format3[] = {
+ {32,18,rr,V,V,0}, /* cvtd.s.t */
+ {31,19,rr,V,V,0}, /* cvts.d.t */
+ {33,19,rr,V,V,0}, /* cvtl.d.t */
+ {32,23,rr,V,V,0}, /* cvtd.l.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {36,1,rr,V,V,0}, /* tzc.t */
+ {44,1,rr,V,V,0}, /* lop.t */
+ {117,1,rr,V,V,0}, /* xpnd.t */
+ {42,1,rr,V,V,0}, /* not.t */
+ {8,1,rr,S,V,0}, /* shf.t */
+ {35,24,rr,V,V,0}, /* plc.t.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {37,18,rr,V,V,0}, /* eq.s.t */
+ {37,19,rr,V,V,0}, /* eq.d.t */
+ {43,18,rr,V,V,0}, /* neg.s.t */
+ {43,19,rr,V,V,0}, /* neg.d.t */
+ {37,18,rr,S,V,0}, /* eq.s.t */
+ {37,19,rr,S,V,0}, /* eq.d.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {40,18,rr,V,V,0}, /* le.s.t */
+ {40,19,rr,V,V,0}, /* le.d.t */
+ {41,18,rr,V,V,0}, /* lt.s.t */
+ {41,19,rr,V,V,0}, /* lt.d.t */
+ {40,18,rr,S,V,0}, /* le.s.t */
+ {40,19,rr,S,V,0}, /* le.d.t */
+ {41,18,rr,S,V,0}, /* lt.s.t */
+ {41,19,rr,S,V,0}, /* lt.d.t */
+ {37,20,rr,V,V,0}, /* eq.b.t */
+ {37,21,rr,V,V,0}, /* eq.h.t */
+ {37,22,rr,V,V,0}, /* eq.w.t */
+ {37,23,rr,V,V,0}, /* eq.l.t */
+ {37,20,rr,S,V,0}, /* eq.b.t */
+ {37,21,rr,S,V,0}, /* eq.h.t */
+ {37,22,rr,S,V,0}, /* eq.w.t */
+ {37,23,rr,S,V,0}, /* eq.l.t */
+ {40,20,rr,V,V,0}, /* le.b.t */
+ {40,21,rr,V,V,0}, /* le.h.t */
+ {40,22,rr,V,V,0}, /* le.w.t */
+ {40,23,rr,V,V,0}, /* le.l.t */
+ {40,20,rr,S,V,0}, /* le.b.t */
+ {40,21,rr,S,V,0}, /* le.h.t */
+ {40,22,rr,S,V,0}, /* le.w.t */
+ {40,23,rr,S,V,0}, /* le.l.t */
+ {41,20,rr,V,V,0}, /* lt.b.t */
+ {41,21,rr,V,V,0}, /* lt.h.t */
+ {41,22,rr,V,V,0}, /* lt.w.t */
+ {41,23,rr,V,V,0}, /* lt.l.t */
+ {41,20,rr,S,V,0}, /* lt.b.t */
+ {41,21,rr,S,V,0}, /* lt.h.t */
+ {41,22,rr,S,V,0}, /* lt.w.t */
+ {41,23,rr,S,V,0}, /* lt.l.t */
+ {43,20,rr,V,V,0}, /* neg.b.t */
+ {43,21,rr,V,V,0}, /* neg.h.t */
+ {43,22,rr,V,V,0}, /* neg.w.t */
+ {43,23,rr,V,V,0}, /* neg.l.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e1_format4[] = {
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e1_format5[] = {
+ {51,20,rr,V,V,0}, /* ldvi.b.t */
+ {51,21,rr,V,V,0}, /* ldvi.h.t */
+ {51,22,rr,V,V,0}, /* ldvi.w.t */
+ {51,23,rr,V,V,0}, /* ldvi.l.t */
+ {28,18,rr,V,V,0}, /* cvtw.s.t */
+ {31,22,rr,V,V,0}, /* cvts.w.t */
+ {28,23,rr,V,V,0}, /* cvtw.l.t */
+ {33,22,rr,V,V,0}, /* cvtl.w.t */
+ {52,20,rxr,V,V,0}, /* stvi.b.t */
+ {52,21,rxr,V,V,0}, /* stvi.h.t */
+ {52,22,rxr,V,V,0}, /* stvi.w.t */
+ {52,23,rxr,V,V,0}, /* stvi.l.t */
+ {52,20,rxr,S,V,0}, /* stvi.b.t */
+ {52,21,rxr,S,V,0}, /* stvi.h.t */
+ {52,22,rxr,S,V,0}, /* stvi.w.t */
+ {52,23,rxr,S,V,0}, /* stvi.l.t */
+};
+
+CONST struct formstr e1_format6[] = {
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+CONST struct formstr e1_format7[] = {
+ {84,20,r,V,0,0}, /* sum.b.t */
+ {84,21,r,V,0,0}, /* sum.h.t */
+ {84,22,r,V,0,0}, /* sum.w.t */
+ {84,23,r,V,0,0}, /* sum.l.t */
+ {85,1,r,V,0,0}, /* all.t */
+ {86,1,r,V,0,0}, /* any.t */
+ {87,1,r,V,0,0}, /* parity.t */
+ {0,0,0,0,0,0},
+ {88,20,r,V,0,0}, /* max.b.t */
+ {88,21,r,V,0,0}, /* max.h.t */
+ {88,22,r,V,0,0}, /* max.w.t */
+ {88,23,r,V,0,0}, /* max.l.t */
+ {89,20,r,V,0,0}, /* min.b.t */
+ {89,21,r,V,0,0}, /* min.h.t */
+ {89,22,r,V,0,0}, /* min.w.t */
+ {89,23,r,V,0,0}, /* min.l.t */
+ {84,18,r,V,0,0}, /* sum.s.t */
+ {84,19,r,V,0,0}, /* sum.d.t */
+ {90,18,r,V,0,0}, /* prod.s.t */
+ {90,19,r,V,0,0}, /* prod.d.t */
+ {88,18,r,V,0,0}, /* max.s.t */
+ {88,19,r,V,0,0}, /* max.d.t */
+ {89,18,r,V,0,0}, /* min.s.t */
+ {89,19,r,V,0,0}, /* min.d.t */
+ {90,20,r,V,0,0}, /* prod.b.t */
+ {90,21,r,V,0,0}, /* prod.h.t */
+ {90,22,r,V,0,0}, /* prod.w.t */
+ {90,23,r,V,0,0}, /* prod.l.t */
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0},
+};
+
+char *lop[] = {
+ "mov", /* 0 */
+ "merg", /* 1 */
+ "mask", /* 2 */
+ "mul", /* 3 */
+ "div", /* 4 */
+ "and", /* 5 */
+ "or", /* 6 */
+ "xor", /* 7 */
+ "shf", /* 8 */
+ "add", /* 9 */
+ "sub", /* 10 */
+ "exit", /* 11 */
+ "jmp", /* 12 */
+ "jmpi", /* 13 */
+ "jmpa", /* 14 */
+ "jmps", /* 15 */
+ "tac", /* 16 */
+ "ldea", /* 17 */
+ "ld", /* 18 */
+ "tas", /* 19 */
+ "pshea", /* 20 */
+ "st", /* 21 */
+ "call", /* 22 */
+ "calls", /* 23 */
+ "callq", /* 24 */
+ "pfork", /* 25 */
+ "ste", /* 26 */
+ "incr", /* 27 */
+ "cvtw", /* 28 */
+ "cvtb", /* 29 */
+ "cvth", /* 30 */
+ "cvts", /* 31 */
+ "cvtd", /* 32 */
+ "cvtl", /* 33 */
+ "ldpa", /* 34 */
+ "plc", /* 35 */
+ "tzc", /* 36 */
+ "eq", /* 37 */
+ "leu", /* 38 */
+ "ltu", /* 39 */
+ "le", /* 40 */
+ "lt", /* 41 */
+ "not", /* 42 */
+ "neg", /* 43 */
+ "lop", /* 44 */
+ "cprs", /* 45 */
+ "nop", /* 46 */
+ "br", /* 47 */
+ "bri", /* 48 */
+ "bra", /* 49 */
+ "brs", /* 50 */
+ "ldvi", /* 51 */
+ "stvi", /* 52 */
+ "ldsdr", /* 53 */
+ "ldkdr", /* 54 */
+ "ln", /* 55 */
+ "patu", /* 56 */
+ "pate", /* 57 */
+ "pich", /* 58 */
+ "plch", /* 59 */
+ "idle", /* 60 */
+ "rtnq", /* 61 */
+ "cfork", /* 62 */
+ "rtn", /* 63 */
+ "wfork", /* 64 */
+ "join", /* 65 */
+ "rtnc", /* 66 */
+ "exp", /* 67 */
+ "sin", /* 68 */
+ "cos", /* 69 */
+ "psh", /* 70 */
+ "pop", /* 71 */
+ "eni", /* 72 */
+ "dsi", /* 73 */
+ "bkpt", /* 74 */
+ "msync", /* 75 */
+ "mski", /* 76 */
+ "xmti", /* 77 */
+ "tstvv", /* 78 */
+ "diag", /* 79 */
+ "pbkpt", /* 80 */
+ "sqrt", /* 81 */
+ "casr", /* 82 */
+ "atan", /* 83 */
+ "sum", /* 84 */
+ "all", /* 85 */
+ "any", /* 86 */
+ "parity", /* 87 */
+ "max", /* 88 */
+ "min", /* 89 */
+ "prod", /* 90 */
+ "halt", /* 91 */
+ "sysc", /* 92 */
+ "trap", /* 93 */
+ "tst", /* 94 */
+ "lck", /* 95 */
+ "ulk", /* 96 */
+ "spawn", /* 97 */
+ "ldcmr", /* 98 */
+ "stcmr", /* 99 */
+ "popr", /* 100 */
+ "pshr", /* 101 */
+ "rcvr", /* 102 */
+ "matm", /* 103 */
+ "sndr", /* 104 */
+ "putr", /* 105 */
+ "getr", /* 106 */
+ "matr", /* 107 */
+ "mat", /* 108 */
+ "get", /* 109 */
+ "rcv", /* 110 */
+ "inc", /* 111 */
+ "put", /* 112 */
+ "snd", /* 113 */
+ "enal", /* 114 */
+ "enag", /* 115 */
+ "frint", /* 116 */
+ "xpnd", /* 117 */
+ "ctrsl", /* 118 */
+ "ctrsg", /* 119 */
+ "stop", /* 120 */
+};
+
+char *rop[] = {
+ "", /* 0 */
+ ".t", /* 1 */
+ ".f", /* 2 */
+ ".s", /* 3 */
+ ".d", /* 4 */
+ ".b", /* 5 */
+ ".h", /* 6 */
+ ".w", /* 7 */
+ ".l", /* 8 */
+ ".x", /* 9 */
+ ".u", /* 10 */
+ ".s.f", /* 11 */
+ ".d.f", /* 12 */
+ ".b.f", /* 13 */
+ ".h.f", /* 14 */
+ ".w.f", /* 15 */
+ ".l.f", /* 16 */
+ ".t.f", /* 17 */
+ ".s.t", /* 18 */
+ ".d.t", /* 19 */
+ ".b.t", /* 20 */
+ ".h.t", /* 21 */
+ ".w.t", /* 22 */
+ ".l.t", /* 23 */
+ ".t.t", /* 24 */
+};
diff --git a/include/opcode/d10v.h b/include/opcode/d10v.h
new file mode 100644
index 0000000..4b74c98
--- /dev/null
+++ b/include/opcode/d10v.h
@@ -0,0 +1,194 @@
+/* d10v.h -- Header file for D10V opcode table
+ Copyright 1996, 1997, 1998 Free Software Foundation, Inc.
+ Written by Martin Hunt (hunt@cygnus.com), Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef D10V_H
+#define D10V_H
+
+/* Format Specifier */
+#define FM00 0
+#define FM01 0x40000000
+#define FM10 0x80000000
+#define FM11 0xC0000000
+
+#define NOP 0x5e00
+#define OPCODE_DIVS 0x14002800
+
+/* The opcode table is an array of struct d10v_opcode. */
+
+struct d10v_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* the opcode format */
+ int format;
+
+ /* These numbers were picked so we can do if( i & SHORT_OPCODE) */
+#define SHORT_OPCODE 1
+#define LONG_OPCODE 8
+#define SHORT_2 1 /* short with 2 operands */
+#define SHORT_B 3 /* short with 8-bit branch */
+#define LONG_B 8 /* long with 16-bit branch */
+#define LONG_L 10 /* long with 3 operands */
+#define LONG_R 12 /* reserved */
+
+ /* just a placeholder for variable-length instructions */
+ /* for example, "bra" will be a fake for "bra.s" and bra.l" */
+ /* which will immediately follow in the opcode table. */
+#define OPCODE_FAKE 32
+
+ /* the number of cycles */
+ int cycles;
+
+ /* the execution unit(s) used */
+ int unit;
+#define EITHER 0
+#define IU 1
+#define MU 2
+#define BOTH 3
+
+ /* execution type; parallel or sequential */
+ /* this field is used to decide if two instructions */
+ /* can be executed in parallel */
+ int exec_type;
+#define PARONLY 1 /* parallel only */
+#define SEQ 2 /* must be sequential */
+#define PAR 4 /* may be parallel */
+#define BRANCH_LINK 8 /* subroutine call. must be aligned */
+#define RMEM 16 /* reads memory */
+#define WMEM 32 /* writes memory */
+#define RF0 64 /* reads f0 */
+#define WF0 128 /* modifies f0 */
+#define WCAR 256 /* write Carry */
+#define BRANCH 512 /* branch, no link */
+
+ /* the opcode */
+ long opcode;
+
+ /* mask. if( (i & mask) == opcode ) then match */
+ long mask;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[6];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct d10v_opcode d10v_opcodes[];
+extern const int d10v_num_opcodes;
+
+/* The operands table is an array of struct d10v_operand. */
+struct d10v_operand
+{
+ /* The number of bits in the operand. */
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+ int shift;
+
+ /* One bit syntax flags. */
+ int flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the d10v_opcodes table. */
+
+extern const struct d10v_operand d10v_operands[];
+
+/* Values defined for the flags field of a struct d10v_operand. */
+
+/* the operand must be an even number */
+#define OPERAND_EVEN (1)
+
+/* the operand must be an odd number */
+#define OPERAND_ODD (2)
+
+/* this is the destination register; it will be modified */
+/* this is used by the optimizer */
+#define OPERAND_DEST (4)
+
+/* number or symbol */
+#define OPERAND_NUM (8)
+
+/* address or label */
+#define OPERAND_ADDR (0x10)
+
+/* register */
+#define OPERAND_REG (0x20)
+
+/* postincrement + */
+#define OPERAND_PLUS (0x40)
+
+/* postdecrement - */
+#define OPERAND_MINUS (0x80)
+
+/* @ */
+#define OPERAND_ATSIGN (0x100)
+
+/* @( */
+#define OPERAND_ATPAR (0x200)
+
+/* accumulator 0 */
+#define OPERAND_ACC0 (0x400)
+
+/* accumulator 1 */
+#define OPERAND_ACC1 (0x800)
+
+/* f0 / f1 flag register */
+#define OPERAND_FFLAG (0x1000)
+
+/* c flag register */
+#define OPERAND_CFLAG (0x2000)
+
+/* control register */
+#define OPERAND_CONTROL (0x4000)
+
+/* predecrement mode '@-sp' */
+#define OPERAND_ATMINUS (0x8000)
+
+/* signed number */
+#define OPERAND_SIGNED (0x10000)
+
+/* special accumulator shifts need a 4-bit number */
+/* 1 <= x <= 16 */
+#define OPERAND_SHIFT (0x20000)
+
+/* general purpose register */
+#define OPERAND_GPR (0x40000)
+
+/* Structure to hold information about predefined registers. */
+struct pd_reg
+{
+ char *name; /* name to recognize */
+ char *pname; /* name to print for this register */
+ int value;
+};
+
+extern const struct pd_reg d10v_predefined_registers[];
+int d10v_reg_name_cnt();
+
+/* an expressionS only has one register type, so we fake it */
+/* by setting high bits to indicate type */
+#define REGISTER_MASK 0xFF
+
+#endif /* D10V_H */
diff --git a/include/opcode/d30v.h b/include/opcode/d30v.h
new file mode 100644
index 0000000..b828dab
--- /dev/null
+++ b/include/opcode/d30v.h
@@ -0,0 +1,273 @@
+/* d30v.h -- Header file for D30V opcode table
+ Copyright 1997 Free Software Foundation, Inc.
+ Written by Martin Hunt (hunt@cygnus.com), Cygnus Solutions
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef D30V_H
+#define D30V_H
+
+#define NOP 0x00F00000
+
+/* Structure to hold information about predefined registers. */
+struct pd_reg
+{
+ char *name; /* name to recognize */
+ char *pname; /* name to print for this register */
+ int value;
+};
+
+extern const struct pd_reg pre_defined_registers[];
+int reg_name_cnt();
+
+/* the number of control registers */
+#define MAX_CONTROL_REG 64
+
+/* define the format specifiers */
+#define FM00 0
+#define FM01 0x80000000
+#define FM10 0x8000000000000000LL
+#define FM11 0x8000000080000000LL
+
+/* define the opcode classes */
+#define BRA 0
+#define LOGIC 1
+#define IMEM 2
+#define IALU1 4
+#define IALU2 5
+
+/* define the execution condition codes */
+#define ECC_AL 0 /* ALways (default) */
+#define ECC_TX 1 /* F0=True, F1=Don't care */
+#define ECC_FX 2 /* F0=False, F1=Don't care */
+#define ECC_XT 3 /* F0=Don't care, F1=True */
+#define ECC_XF 4 /* F0=Don't care, F1=False */
+#define ECC_TT 5 /* F0=True, F1=True */
+#define ECC_TF 6 /* F0=True, F1=False */
+#define ECC_RESERVED 7 /* reserved */
+#define ECC_MAX ECC_RESERVED
+
+extern const char *d30v_ecc_names[];
+
+/* condition code table for CMP and CMPU */
+extern const char *d30v_cc_names[];
+
+/* The opcode table is an array of struct d30v_opcode. */
+struct d30v_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* the opcode */
+ int op1; /* first part, "IALU1" for example */
+ int op2; /* the rest of the opcode */
+
+ /* opcode format(s). These numbers correspond to entries */
+ /* in the d30v_format_table */
+ unsigned char format[4];
+
+#define SHORT_M 1
+#define SHORT_M2 5 /* for ld2w and st2w */
+#define SHORT_A 9
+#define SHORT_B1 11
+#define SHORT_B2 12
+#define SHORT_B3 13
+#define SHORT_B3b 15
+#define SHORT_D1 17
+#define SHORT_D2 19
+#define SHORT_D2B 21
+#define SHORT_U 23 /* unary SHORT_A. ABS for example */
+#define SHORT_F 25 /* SHORT_A with flag registers */
+#define SHORT_AF 27 /* SHORT_A with only the first register a flag register */
+#define SHORT_T 29 /* for trap instruction */
+#define SHORT_A5 30 /* SHORT_A with a 5-bit immediate instead of 6 */
+#define SHORT_CMP 32 /* special form for CMPcc */
+#define SHORT_CMPU 34 /* special form for CMPUcc */
+#define SHORT_A1 36 /* special form of SHORT_A for MACa opcodes where a=1 */
+#define SHORT_AA 38 /* SHORT_A with the first register an accumulator */
+#define SHORT_RA 40 /* SHORT_A with the second register an accumulator */
+#define SHORT_MODINC 42
+#define SHORT_MODDEC 43
+#define SHORT_C1 44
+#define SHORT_C2 45
+#define SHORT_UF 46
+#define SHORT_A2 47
+#define SHORT_A5S 49
+#define SHORT_NONE 51 /* no operands */
+#define LONG 52
+#define LONG_U 53 /* unary LONG */
+#define LONG_AF 54 /* LONG with the first register a flag register */
+#define LONG_CMP 55 /* special form for CMPcc and CMPUcc */
+#define LONG_M 56 /* Memory long for ldb, stb */
+#define LONG_M2 57 /* Memory long for ld2w, st2w */
+#define LONG_2 58 /* LONG with 2 operands; bratnz */
+#define LONG_2b 59 /* LONG_2 with modifier of 3 */
+#define LONG_D 60 /* for DBRAI*/
+#define LONG_Db 61 /* for repeati*/
+
+ /* the execution unit(s) used */
+ int unit;
+#define EITHER 0
+#define IU 1
+#define MU 2
+#define EITHER_BUT_PREFER_MU 3
+
+ /* this field is used to decide if two instructions */
+ /* can be executed in parallel */
+ long flags_used;
+ long flags_set;
+#define FLAG_0 (1L<<0)
+#define FLAG_1 (1L<<1)
+#define FLAG_2 (1L<<2)
+#define FLAG_3 (1L<<3)
+#define FLAG_4 (1L<<4) /* S (saturation) */
+#define FLAG_5 (1L<<5) /* V (overflow) */
+#define FLAG_6 (1L<<6) /* VA (accumulated overflow) */
+#define FLAG_7 (1L<<7) /* C (carry/borrow) */
+#define FLAG_SM (1L<<8) /* SM (stack mode) */
+#define FLAG_RP (1L<<9) /* RP (repeat enable) */
+#define FLAG_CONTROL (1L<<10) /* control registers */
+#define FLAG_A0 (1L<<11) /* A0 */
+#define FLAG_A1 (1L<<12) /* A1 */
+#define FLAG_JMP (1L<<13) /* instruction is a branch */
+#define FLAG_JSR (1L<<14) /* subroutine call. must be aligned */
+#define FLAG_MEM (1L<<15) /* reads/writes memory */
+#define FLAG_2WORD (1L<<16) /* 2 word/4 byte operation */
+#define FLAG_MUL16 (1L<<17) /* 16 bit multiply */
+#define FLAG_MUL32 (1L<<18) /* 32 bit multiply */
+#define FLAG_ADDSUBppp (1L<<19) /* ADDppp or SUBppp */
+#define FLAG_DELAY (1L<<20) /* This is a delayed branch or jump */
+#define FLAG_LKR (1L<<21) /* insn in left slot kills right slot */
+#define FLAG_CVVA (FLAG_5|FLAG_6|FLAG_7)
+#define FLAG_C FLAG_7
+#define FLAG_ALL (FLAG_0 | \
+ FLAG_1 | \
+ FLAG_2 | \
+ FLAG_3 | \
+ FLAG_4 | \
+ FLAG_5 | \
+ FLAG_6 | \
+ FLAG_7 | \
+ FLAG_SM | \
+ FLAG_RP | \
+ FLAG_CONTROL)
+
+ int reloc_flag;
+#define RELOC_PCREL 1
+#define RELOC_ABS 2
+};
+
+extern const struct d30v_opcode d30v_opcode_table[];
+extern const int d30v_num_opcodes;
+
+/* The operands table is an array of struct d30v_operand. */
+struct d30v_operand
+{
+ /* the length of the field */
+ int length;
+
+ /* The number of significant bits in the operand. */
+ int bits;
+
+ /* position relative to Ra */
+ int position;
+
+ /* syntax flags. */
+ long flags;
+};
+extern const struct d30v_operand d30v_operand_table[];
+
+/* Values defined for the flags field of a struct d30v_operand. */
+
+/* this is the destination register; it will be modified */
+/* this is used by the optimizer */
+#define OPERAND_DEST (1)
+
+/* number or symbol */
+#define OPERAND_NUM (2)
+
+/* address or label */
+#define OPERAND_ADDR (4)
+
+/* register */
+#define OPERAND_REG (8)
+
+/* postincrement + */
+#define OPERAND_PLUS (0x10)
+
+/* postdecrement - */
+#define OPERAND_MINUS (0x20)
+
+/* signed number */
+#define OPERAND_SIGNED (0x40)
+
+/* this operand must be shifted left by 3 */
+#define OPERAND_SHIFT (0x80)
+
+/* flag register */
+#define OPERAND_FLAG (0x100)
+
+/* control register */
+#define OPERAND_CONTROL (0x200)
+
+/* accumulator */
+#define OPERAND_ACC (0x400)
+
+/* @ */
+#define OPERAND_ATSIGN (0x800)
+
+/* @( */
+#define OPERAND_ATPAR (0x1000)
+
+/* predecrement mode '@-sp' */
+#define OPERAND_ATMINUS (0x2000)
+
+/* this operand changes the instruction name */
+/* for example, CPMcc, CMPUcc */
+#define OPERAND_NAME (0x4000)
+
+/* fake operand for mvtsys and mvfsys */
+#define OPERAND_SPECIAL (0x8000)
+
+/* let the optimizer know that two registers are affected */
+#define OPERAND_2REG (0x10000)
+
+/* The format table is an array of struct d30v_format. */
+struct d30v_format
+{
+ int form; /* SHORT_A, LONG, etc */
+ int modifier; /* two bit modifier following opcode */
+ unsigned char operands[5];
+};
+extern const struct d30v_format d30v_format_table[];
+
+
+/* an instruction is defined by an opcode and a format */
+/* for example, "add" has one opcode, but three different */
+/* formats, 2 SHORT_A forms and a LONG form. */
+struct d30v_insn
+{
+ struct d30v_opcode *op; /* pointer to an entry in the opcode table */
+ struct d30v_format *form; /* pointer to an entry in the format table */
+ int ecc; /* execution condition code */
+};
+
+/* an expressionS only has one register type, so we fake it */
+/* by setting high bits to indicate type */
+#define REGISTER_MASK 0xFF
+
+#endif /* D30V_H */
diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h
new file mode 100644
index 0000000..3a05e4e
--- /dev/null
+++ b/include/opcode/h8300.h
@@ -0,0 +1,604 @@
+/* Opcode table for the H8-300
+ Copyright (C) 1991, 92, 93, 95, 96, 97, 1998 Free Software Foundation.
+ Written by Steve Chamberlain, sac@cygnus.com.
+
+ This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+/* Instructions are stored as a sequence of nibbles.
+ If the nibble has value 15 or less then the representation is complete.
+ Otherwise, we record what it contains with several flags. */
+
+typedef int op_type;
+
+#define Hex0 0
+#define Hex1 1
+#define Hex2 2
+#define Hex3 3
+#define Hex4 4
+#define Hex5 5
+#define Hex6 6
+#define Hex7 7
+#define Hex8 8
+#define Hex9 9
+#define HexA 10
+#define HexB 11
+#define HexC 12
+#define HexD 13
+#define HexE 14
+#define HexF 15
+
+#define L_8 0x01
+#define L_16 0x02
+#define L_32 0x04
+#define L_P 0x08
+#define L_24 0x10
+#define MEMRELAX 0x20 /* move insn which may relax */
+#define SRC 0x40
+#define DST 0x80
+
+#define REG 0x100
+#define EXR 0x200
+#define MACREG 0x800
+#define SRC_IN_DST 0x400
+#define IMM 0x1000
+#define DISP 0x2000
+#define IND 0x4000
+#define INC 0x8000
+#define DEC 0x10000
+#define L_3 0x20000
+#define KBIT 0x40000
+#define DBIT 0x80000
+#define DISPREG 0x100000
+#define IGNORE 0x200000
+#define E 0x400000 /* FIXME: end of nibble sequence? */
+#define L_2 0x800000
+#define B30 0x1000000 /* bit 3 must be low */
+#define B31 0x2000000 /* bit 3 must be high */
+#define CCR 0x4000000
+#define ABS 0x8000000
+#define ABSJMP 0x10000000
+#define ABS8MEM 0x20000000
+#define PCREL 0x40000000
+#define MEMIND 0x80000000
+
+#define IMM3 IMM|L_3
+#define IMM2 IMM|L_2
+
+#define SIZE (L_2|L_3|L_8|L_16|L_32|L_P|L_24)
+#define MODE (REG|IMM|DISP|IND|INC|DEC|CCR|ABS|MEMIND|EXR)
+
+#define RD8 (DST|L_8|REG)
+#define RD16 (DST|L_16|REG)
+#define RD32 (DST|L_32|REG)
+#define RS8 (SRC|L_8|REG)
+#define RS16 (SRC|L_16|REG)
+#define RS32 (SRC|L_32|REG)
+
+#define RSP (SRC|L_P|REG)
+#define RDP (DST|L_P|REG)
+
+#define IMM8 (IMM|SRC|L_8)
+#define IMM16 (IMM|SRC|L_16)
+#define IMM32 (IMM|SRC|L_32)
+
+#define ABS8SRC (SRC|ABS|L_8|ABS8MEM)
+#define ABS8DST (DST|ABS|L_8|ABS8MEM)
+
+#define DISP8 (PCREL|L_8)
+#define DISP16 (PCREL|L_16)
+
+#define DISP8SRC (DISP|L_8|SRC)
+#define DISP16SRC (DISP|L_16|SRC)
+
+#define DISP8DST (DISP|L_8|DST)
+#define DISP16DST (DISP|L_16|DST)
+
+#define ABS16SRC (SRC|ABS|L_16)
+#define ABS16DST (DST|ABS|L_16)
+#define ABS24SRC (SRC|ABS|L_24)
+#define ABS24DST (DST|ABS|L_24)
+#define ABS32SRC (SRC|ABS|L_32)
+#define ABS32DST (DST|ABS|L_32)
+
+#define RDDEC (DST|DEC)
+#define RSINC (SRC|INC)
+#define RDINC (DST|INC)
+
+#define RDIND (DST|IND)
+#define RSIND (SRC|IND)
+
+#if 1
+#define OR8 RS8 /* ??? OR as in One Register? */
+#define OR16 RS16
+#define OR32 RS32
+#else
+#define OR8 RD8
+#define OR16 RD16
+#define OR32 RD32
+#endif
+
+struct code
+{
+ op_type nib[30];
+};
+
+struct arg
+{
+ op_type nib[3];
+};
+
+struct h8_opcode
+{
+ int how;
+ int inbase;
+ int time;
+ char *name;
+ struct arg args;
+ struct code data;
+ int length;
+ int noperands;
+ int idx;
+ int size;
+};
+
+#ifdef DEFINE_TABLE
+
+#define BITOP(code, imm, name, op00, op01,op10,op11, op20,op21,op30)\
+{ code, 1, 2, name, {{imm,RD8,E}}, {{op00, op01, imm, RD8, E, 0, 0, 0, 0}}, 0, 0, 0, 0},\
+{ code, 1, 6, name, {{imm,RDIND,E}},{{op10, op11, B30|RDIND, 0, op00,op01, imm, 0, E}}, 0, 0, 0, 0},\
+{ code, 1, 6, name, {{imm,ABS8DST,E}},{{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0, 0}\
+,{ code, 0, 6, name, {{imm,ABS16DST,E}},{{0x6,0xa,0x1,op30,ABS16DST,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0, 0},\
+{ code, 0, 6, name, {{imm,ABS32DST,E}},{{0x6,0xa,0x3,op30,ABS32DST,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0, 0}
+
+
+#define EBITOP(code, imm, name, op00, op01,op10,op11, op20,op21,op30)\
+ BITOP(code,imm, name, op00+1, op01, op10,op11, op20,op21,op30),\
+ BITOP(code,RS8, name, op00, op01, op10,op11, op20,op21,op30)
+
+#define WTWOP(code,name, op1, op2) \
+{ code, 1, 2, name, {{RS16, RD16, E}}, {{ op1, op2, RS16, RD16, E, 0, 0, 0, 0}}, 0, 0, 0, 0}
+
+#define BRANCH(code, name, op) \
+{ code, 1, 4,name,{{DISP8,E,0}}, {{ 0x4, op, DISP8, IGNORE, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \
+{ code, 0, 6,name,{{DISP16,E,0}}, {{ 0x5, 0x8, op, 0x0, DISP16, IGNORE, IGNORE, IGNORE, E,0}}, 0, 0, 0, 0}
+
+#define SOP(code, x,name) \
+{code, 1, x, name
+
+#define NEW_SOP(code, in,x,name) \
+{code, in, x, name
+#define EOP ,0,0,0 }
+
+#define TWOOP(code, name, op1, op2,op3) \
+{ code,1, 2,name, {{IMM8, RD8, E}}, {{ op1, RD8, IMM8, IGNORE, E, 0, 0, 0, 0}}, 0, 0, 0, 0},\
+{ code, 1, 2,name, {{RS8, RD8, E}}, {{ op2, op3, RS8, RD8, E, 0, 0, 0, 0}}, 0, 0, 0, 0}
+
+#define UNOP(code,name, op1, op2) \
+{ code, 1, 2, name, {{OR8, E, 0}}, {{ op1, op2, 0, OR8, E, 0, 0, 0, 0}}, 0, 0, 0, 0}
+
+#define UNOP3(code, name, op1, op2, op3) \
+{ O(code,SB), 1, 2, name, {{OR8, E, 0}}, {{op1, op2, op3+0, OR8, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \
+{ O(code,SW), 0, 2, name, {{OR16, E, 0}}, {{op1, op2, op3+1, OR16, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \
+{ O(code,SL), 0, 2, name, {{OR32, E, 0}}, {{op1, op2, op3+3, OR32|B30, E, 0, 0, 0, 0}}, 0, 0, 0, 0} \
+,{ O(code,SB), 1, 2, name, {{IMM, OR8 | SRC_IN_DST, E}}, {{op1, op2, op3+4, OR8 | SRC_IN_DST, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \
+{ O(code,SW), 0, 2, name, {{IMM, OR16 | SRC_IN_DST, E}}, {{op1, op2, op3+5, OR16 | SRC_IN_DST, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \
+{ O(code,SL), 0, 2, name, {{IMM, OR32 | SRC_IN_DST, E}}, {{op1, op2, op3+7, OR32 | SRC_IN_DST|B30 , E, 0, 0, 0, 0}}, 0, 0, 0, 0}
+
+
+#define IMM32LIST IMM32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define IMM24LIST IMM24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define IMM16LIST IMM16,IGNORE,IGNORE,IGNORE
+#define A16LIST L_16,IGNORE,IGNORE,IGNORE
+#define DISP24LIST DISP|L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define DISP32LIST DISP|L_32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define ABS24LIST ABS|L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define ABS32LIST ABS|L_32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define A24LIST L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define A32LIST L_32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define PREFIX32 0x0,0x1,0x0,0x0
+#define PREFIXLDC 0x0,0x1,0x4,0x0
+
+
+#define O(op, size) (op*4+size)
+
+#define O_RECOMPILE 0
+#define O_ADD 1
+#define O_ADDX 2
+#define O_AND 3
+#define O_BAND 4
+#define O_BRA 5
+#define O_BRN 6
+#define O_BHI 7
+#define O_BLS 8
+#define O_BCC 9
+#define O_BCS 10
+#define O_BNE 11
+#define O_BVC 12
+#define O_BVS 13
+#define O_BPL 14
+#define O_BMI 15
+#define O_BGE 16
+#define O_BLT 17
+#define O_BGT 18
+#define O_BLE 19
+#define O_ANDC 20
+#define O_BEQ 21
+#define O_BCLR 22
+#define O_BIAND 23
+#define O_BILD 24
+#define O_BIOR 25
+#define O_BIXOR 26
+#define O_BIST 27
+#define O_BLD 28
+#define O_BNOT 29
+#define O_BSET 30
+#define O_BSR 31
+#define O_BXOR 32
+#define O_CMP 33
+#define O_DAA 34
+#define O_DAS 35
+#define O_DEC 36
+#define O_DIVU 37
+#define O_DIVS 38
+#define O_INC 39
+#define O_LDC 40
+#define O_MOV_TO_MEM 41
+#define O_OR 42
+#define O_ROTL 43
+#define O_ROTR 44
+#define O_ROTXL 45
+#define O_ROTXR 46
+#define O_BPT 47
+#define O_SHAL 48
+#define O_SHAR 49
+#define O_SHLL 50
+#define O_SHLR 51
+#define O_SUB 52
+#define O_SUBS 53
+#define O_TRAPA 54
+#define O_XOR 55
+#define O_XORC 56
+#define O_BOR 57
+#define O_BST 58
+#define O_BTST 59
+#define O_EEPMOV 60
+#define O_EXTS 61
+#define O_EXTU 62
+#define O_JMP 63
+#define O_JSR 64
+#define O_MULU 65
+#define O_MULS 66
+#define O_NOP 67
+#define O_NOT 68
+#define O_ORC 69
+#define O_RTE 70
+#define O_STC 71
+#define O_SUBX 72
+#define O_NEG 73
+#define O_RTS 74
+#define O_SLEEP 75
+#define O_ILL 76
+#define O_ADDS 77
+#define O_SYSCALL 78
+#define O_MOV_TO_REG 79
+#define O_TAS 80
+#define O_CLRMAC 82
+#define O_LDMAC 83
+#define O_MAC 84
+#define O_LDM 85
+#define O_STM 86
+#define O_STMAC 87
+#define O_LAST 88
+#define SB 0
+#define SW 1
+#define SL 2
+#define SN 3
+
+
+/* FIXME: Lots of insns have "E, 0, 0, 0, 0" in the nibble code sequences.
+ Methinks the zeroes aren't necessary. Once confirmed, nuke 'em. */
+
+struct h8_opcode h8_opcodes[] =
+{
+ TWOOP(O(O_ADD,SB),"add.b", 0x8, 0x0,0x8),
+
+ NEW_SOP(O(O_ADD,SW),1,2,"add.w"),{{RS16,RD16,E}},{{0x0,0x9,RS16,RD16,E}} EOP,
+ NEW_SOP(O(O_ADD,SW),0,4,"add.w"),{{IMM16,RD16,E}},{{0x7,0x9,0x1,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}} EOP,
+ NEW_SOP(O(O_ADD,SL),0,2,"add.l"),{{RS32,RD32,E }}, {{0x0,0xA,B31|RS32,B30|RD32,E}} EOP,
+ NEW_SOP(O(O_ADD,SL),0,6,"add.l"),{{IMM32,RD32,E }},{{0x7,0xA,0x1,B30|RD32,IMM32LIST,E}} EOP,
+ NEW_SOP(O(O_ADDS,SL),1,2,"adds"), {{KBIT,RDP,E}}, {{0x0,0xB,KBIT,RDP,E,0,0,0,0}} EOP,
+
+ TWOOP(O(O_ADDX,SB),"addx",0x9,0x0,0xE),
+ TWOOP(O(O_AND,SB), "and.b",0xE,0x1,0x6),
+
+ NEW_SOP(O(O_AND,SW),0,2,"and.w"),{{RS16,RD16,E }},{{0x6,0x6,RS16,RD16,E}} EOP,
+ NEW_SOP(O(O_AND,SW),0,4,"and.w"),{{IMM16,RD16,E }},{{0x7,0x9,0x6,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}} EOP,
+
+ NEW_SOP(O(O_AND,SL),0,6,"and.l"),{{IMM32,RD32,E }},{{0x7,0xA,0x6,B30|RD32,IMM32LIST,E}} EOP,
+ NEW_SOP(O(O_AND,SL),0,2,"and.l") ,{{RS32,RD32,E }},{{0x0,0x1,0xF,0x0,0x6,0x6,B30|RS32,B30|RD32,E}} EOP,
+
+ NEW_SOP(O(O_ANDC,SB),1,2,"andc"), {{IMM8,CCR,E}},{{ 0x0,0x6,IMM8,IGNORE,E,0,0,0,0}} EOP,
+ NEW_SOP(O(O_ANDC,SB),1,2,"andc"), {{IMM8,EXR,E}},{{ 0x0,0x1,0x4,0x1,0x0,0x6,IMM8,IGNORE,E,0,0,0,0}} EOP,
+
+ BITOP(O(O_BAND,SB), IMM3|B30,"band",0x7,0x6,0x7,0xC,0x7,0xE,0x0),
+ BRANCH(O(O_BRA,SB),"bra",0x0),
+ BRANCH(O(O_BRA,SB),"bt",0x0),
+ BRANCH(O(O_BRN,SB),"brn",0x1),
+ BRANCH(O(O_BRN,SB),"bf",0x1),
+ BRANCH(O(O_BHI,SB),"bhi",0x2),
+ BRANCH(O(O_BLS,SB),"bls",0x3),
+ BRANCH(O(O_BCC,SB),"bcc",0x4),
+ BRANCH(O(O_BCC,SB),"bhs",0x4),
+ BRANCH(O(O_BCS,SB),"bcs",0x5),
+ BRANCH(O(O_BCS,SB),"blo",0x5),
+ BRANCH(O(O_BNE,SB),"bne",0x6),
+ BRANCH(O(O_BEQ,SB),"beq",0x7),
+ BRANCH(O(O_BVC,SB),"bvc",0x8),
+ BRANCH(O(O_BVS,SB),"bvs",0x9),
+ BRANCH(O(O_BPL,SB),"bpl",0xA),
+ BRANCH(O(O_BMI,SB),"bmi",0xB),
+ BRANCH(O(O_BGE,SB),"bge",0xC),
+ BRANCH(O(O_BLT,SB),"blt",0xD),
+ BRANCH(O(O_BGT,SB),"bgt",0xE),
+ BRANCH(O(O_BLE,SB),"ble",0xF),
+
+ EBITOP(O(O_BCLR,SB),IMM3|B30,"bclr", 0x6,0x2,0x7,0xD,0x7,0xF,0x8),
+ BITOP(O(O_BIAND,SB),IMM3|B31,"biand",0x7,0x6,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BILD,SB), IMM3|B31,"bild", 0x7,0x7,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BIOR,SB), IMM3|B31,"bior", 0x7,0x4,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BIST,SB), IMM3|B31,"bist", 0x6,0x7,0x7,0xD,0x7,0xF,0x8),
+ BITOP(O(O_BIXOR,SB),IMM3|B31,"bixor",0x7,0x5,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BLD,SB), IMM3|B30,"bld", 0x7,0x7,0x7,0xC,0x7,0xE,0x0),
+ EBITOP(O(O_BNOT,SB),IMM3|B30,"bnot", 0x6,0x1,0x7,0xD,0x7,0xF,0x8),
+ BITOP(O(O_BOR,SB), IMM3|B30,"bor", 0x7,0x4,0x7,0xC,0x7,0xE,0x0),
+ EBITOP(O(O_BSET,SB),IMM3|B30,"bset", 0x6,0x0,0x7,0xD,0x7,0xF,0x8),
+
+ SOP(O(O_BSR,SB),6,"bsr"),{{DISP8,E,0}},{{ 0x5,0x5,DISP8,IGNORE,E,0,0,0,0}} EOP,
+ SOP(O(O_BSR,SB),6,"bsr"),{{DISP16,E,0}},{{ 0x5,0xC,0x0,0x0,DISP16,IGNORE,IGNORE,IGNORE,E,0,0,0,0}} EOP,
+ BITOP(O(O_BST,SB), IMM3|B30,"bst",0x6,0x7,0x7,0xD,0x7,0xF,0x8),
+ EBITOP(O(O_BTST,SB), IMM3|B30,"btst",0x6,0x3,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BXOR,SB), IMM3|B30,"bxor",0x7,0x5,0x7,0xC,0x7,0xE,0x0),
+
+ TWOOP(O(O_CMP,SB), "cmp.b",0xA,0x1,0xC),
+ WTWOP(O(O_CMP,SW), "cmp.w",0x1,0xD),
+
+ NEW_SOP(O(O_CMP,SW),1,2,"cmp.w"),{{RS16,RD16,E }},{{0x1,0xD,RS16,RD16,E}} EOP,
+ NEW_SOP(O(O_CMP,SW),0,4,"cmp.w"),{{IMM16,RD16,E }},{{0x7,0x9,0x2,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}} EOP,
+
+ NEW_SOP(O(O_CMP,SL),0,6,"cmp.l"),{{IMM32,RD32,E }},{{0x7,0xA,0x2,B30|RD32,IMM32LIST,E}} EOP,
+ NEW_SOP(O(O_CMP,SL),0,2,"cmp.l") ,{{RS32,RD32,E }},{{0x1,0xF,B31|RS32,B30|RD32,E}} EOP,
+
+ UNOP(O(O_DAA,SB), "daa",0x0,0xF),
+ UNOP(O(O_DAS,SB), "das",0x1,0xF),
+ UNOP(O(O_DEC,SB), "dec.b",0x1,0xA),
+
+ NEW_SOP(O(O_DEC, SW),0,2,"dec.w") ,{{DBIT,RD16,E }},{{0x1,0xB,0x5|DBIT,RD16,E}} EOP,
+ NEW_SOP(O(O_DEC, SL),0,2,"dec.l") ,{{DBIT,RD32,E }},{{0x1,0xB,0x7|DBIT,RD32|B30,E}} EOP,
+
+ NEW_SOP(O(O_DIVU,SB),1,6,"divxu.b"), {{RS8,RD16,E}}, {{0x5,0x1,RS8,RD16,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_DIVU,SW),0,20,"divxu.w"),{{RS16,RD32,E}},{{0x5,0x3,RS16,B30|RD32,E}}EOP,
+
+ NEW_SOP(O(O_DIVS,SB),0,20,"divxs.b") ,{{RS8,RD16,E }},{{0x0,0x1,0xD,0x0,0x5,0x1,RS8,RD16,E}} EOP,
+ NEW_SOP(O(O_DIVS,SW),0,02,"divxs.w") ,{{RS16,RD32,E }},{{0x0,0x1,0xD,0x0,0x5,0x3,RS16,B30|RD32,E}} EOP,
+
+ NEW_SOP(O(O_EEPMOV,SB),1,50,"eepmov.b"),{{E,0,0}},{{0x7,0xB,0x5,0xC,0x5,0x9,0x8,0xF,E}}EOP,
+ NEW_SOP(O(O_EEPMOV,SW),0,50,"eepmov.w"),{{E,0,0}},{{0x7,0xB,0xD,0x4,0x5,0x9,0x8,0xF,E}} EOP,
+
+ NEW_SOP(O(O_EXTS,SW),0,2,"exts.w"),{{OR16,E,0}},{{0x1,0x7,0xD,OR16,E }}EOP,
+ NEW_SOP(O(O_EXTS,SL),0,2,"exts.l"),{{OR32,E,0}},{{0x1,0x7,0xF,OR32|B30,E }}EOP,
+
+ NEW_SOP(O(O_EXTU,SW),0,2,"extu.w"),{{OR16,E,0}},{{0x1,0x7,0x5,OR16,E }}EOP,
+ NEW_SOP(O(O_EXTU,SL),0,2,"extu.l"),{{OR32,E,0}},{{0x1,0x7,0x7,OR32|B30,E }}EOP,
+
+ UNOP(O(O_INC,SB), "inc",0x0,0xA),
+
+ NEW_SOP(O(O_INC,SW),0,2,"inc.w") ,{{DBIT,RD16,E }},{{0x0,0xB,0x5|DBIT,RD16,E}} EOP,
+ NEW_SOP(O(O_INC,SL),0,2,"inc.l") ,{{DBIT,RD32,E }},{{0x0,0xB,0x7|DBIT,RD32|B30,E}} EOP,
+
+ SOP(O(O_JMP,SB),4,"jmp"),{{RSIND,E,0}},{{0x5,0x9,B30|RSIND,0x0,E,0,0,0,0}}EOP,
+ SOP(O(O_JMP,SB),6,"jmp"),{{SRC|ABSJMP,E,0}},{{0x5,0xA,SRC|ABSJMP,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_JMP,SB),8,"jmp"),{{SRC|MEMIND,E,0}},{{0x5,0xB,SRC|MEMIND,IGNORE,E,0,0,0,0}}EOP,
+
+ SOP(O(O_JSR,SB),6,"jsr"),{{SRC|RSIND,E,0}}, {{0x5,0xD,B30|RSIND,0x0,E,0,0,0,0}}EOP,
+ SOP(O(O_JSR,SB),8,"jsr"),{{SRC|ABSJMP,E,0}},{{0x5,0xE,SRC|ABSJMP,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_JSR,SB),8,"jsr"),{{SRC|MEMIND,E,0}},{{0x5,0xF,SRC|MEMIND,IGNORE,E,0,0,0,0}}EOP,
+
+ NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{IMM8,CCR,E}}, {{ 0x0,0x7,IMM8,IGNORE,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{OR8,CCR,E}}, {{ 0x0,0x3,0x0,OR8,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{ABS16SRC,CCR,E}}, {{PREFIXLDC,0x6,0xB,0x0,0x0,ABS16SRC,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{ABS32SRC,CCR,E}}, {{PREFIXLDC,0x6,0xB,0x2,0x0,SRC|ABS32LIST,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,CCR,E}},{{PREFIXLDC,0x6,0xF,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,CCR,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,CCR,E}}, {{PREFIXLDC,0x6,0xD,B30|RSINC,0x0,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR,E}}, {{PREFIXLDC,0x6,0x9,B30|RDIND,0x0,E}} EOP,
+
+ NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{IMM8,EXR,E}}, {{ 0x0,0x1,0x4,0x1,0x0,0x7,IMM8,IGNORE,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{OR8,EXR,E}}, {{ 0x0,0x3,0x1,OR8,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{ABS16SRC,EXR,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0xb,0x0,0x0,ABS16SRC,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{ABS32SRC,EXR,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0xb,0x2,0x0,SRC|ABS32LIST,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,EXR,E}},{{ 0x0,0x1,0x4,0x1,0x6,0xf,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,EXR,E}},{{ 0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,EXR,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0xd,B30|RSINC,0x0,E}}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RDIND,0x0,E}} EOP,
+
+ SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{{ABS|SRC|L_16|MEMRELAX,RD8,E}}, {{ 0x6,0xA,0x0,RD8,SRC|ABS|MEMRELAX|A16LIST,E}}EOP,
+ SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{ABS|SRC|L_32|MEMRELAX,RD8,E }}, {{ 0x6,0xA,0x2,RD8,SRC|ABS|MEMRELAX|A32LIST,E }}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),4,"mov.b"),{{RS8,ABS|L_16|MEMRELAX|DST,E}}, {{ 0x6,0xA,0x8,RS8,DST|ABS|MEMRELAX|A16LIST,E}}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{{RS8,ABS|DST|L_32|MEMRELAX,E }}, {{ 0x6,0xA,0xA,RS8,DST|ABS|MEMRELAX|A32LIST,E }}EOP,
+
+ SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{DISP|L_32|SRC,RD8,E}}, {{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xA,0x2,RD8,SRC|DISP32LIST,E}}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{{RS8,DISP|L_32|DST,E}}, {{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xA,0xA,RS8,DST|DISP32LIST,E}}EOP,
+
+
+
+ SOP(O(O_MOV_TO_REG,SB),2,"mov.b"),{{RS8,RD8,E}}, {{ 0x0,0xC,RS8,RD8,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_REG,SB),2,"mov.b"),{{IMM8,RD8,E}}, {{ 0xF,RD8,IMM8,IGNORE,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{{RSIND,RD8,E}}, {{ 0x6,0x8,B30|RSIND,RD8,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{DISP16SRC,RD8,E}}, {{ 0x6,0xE,B30|DISPREG,RD8,DISP16SRC,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{RSINC,RD8,E}}, {{ 0x6,0xC,B30|RSINC,RD8,E,0,0,0,0}}EOP,
+
+ SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{{ABS8SRC,RD8,E}}, {{ 0x2,RD8,ABS8SRC,IGNORE,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),4,"mov.b"),{{RS8,RDIND,E}}, {{ 0x6,0x8,RDIND|B31,RS8,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{{RS8,DISP16DST,E}}, {{ 0x6,0xE,DISPREG|B31,RS8,DISP16DST,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{{RS8,RDDEC|B31,E}}, {{ 0x6,0xC,RDDEC|B31,RS8,E,0,0,0,0}}EOP,
+
+ SOP(O(O_MOV_TO_MEM,SB),4,"mov.b"),{{RS8,ABS8DST,E}}, {{ 0x3,RS8,ABS8DST,IGNORE,E,0,0,0,0}}EOP,
+
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{{RS16,RDIND,E}}, {{ 0x6,0x9,RDIND|B31,RS16,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{{DISP|L_32|SRC,RD16,E}},{{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0x2,RD16,SRC|DISP32LIST,E}}EOP,
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{{RS16,DISP|L_32|DST,E}},{{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0xA,RS16,DST|DISP32LIST,E}}EOP,
+ SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{{ABS|L_32|MEMRELAX|SRC,RD16,E }},{{ 0x6,0xB,0x2,RD16,SRC|MEMRELAX|ABS32LIST,E }}EOP,
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{{RS16,ABS|L_32|MEMRELAX|DST,E }},{{ 0x6,0xB,0xA,RS16,DST|MEMRELAX|ABS32LIST,E }}EOP,
+ SOP(O(O_MOV_TO_REG,SW),2,"mov.w"),{{RS16,RD16,E}}, {{ 0x0,0xD,RS16, RD16,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_REG,SW),4,"mov.w"),{{IMM16,RD16,E}}, {{ 0x7,0x9,0x0,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_MOV_TO_REG,SW),4,"mov.w"),{{RSIND,RD16,E}}, {{ 0x6,0x9,B30|RSIND,RD16,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{{DISP16SRC,RD16,E}}, {{ 0x6,0xF,B30|DISPREG,RD16,DISP16SRC,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{{RSINC,RD16,E}}, {{ 0x6,0xD,B30|RSINC,RD16,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{{ABS16SRC,RD16,E}}, {{ 0x6,0xB,0x0,RD16,ABS16SRC,IGNORE,IGNORE,IGNORE,E}}EOP,
+
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{{RS16,DISP16DST,E}}, {{ 0x6,0xF,DISPREG|B31,RS16,DISP16DST,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{{RS16,RDDEC,E}}, {{ 0x6,0xD,RDDEC|B31,RS16,E,0,0,0,0}}EOP,
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{{RS16,ABS16DST,E}}, {{ 0x6,0xB,0x8,RS16,ABS16DST,IGNORE,IGNORE,IGNORE,E}}EOP,
+
+ SOP(O(O_MOV_TO_REG,SL),4,"mov.l"),{{IMM32,RD32,E}}, {{ 0x7,0xA,0x0,B30|RD32,IMM32LIST,E}}EOP,
+ SOP(O(O_MOV_TO_REG,SL),2,"mov.l"),{{RS32,RD32,E}}, {{ 0x0,0xF,B31|RS32,B30|RD32,E,0,0,0,0}}EOP,
+
+ SOP(O(O_MOV_TO_REG,SL),4,"mov.l"),{{RSIND,RD32,E}}, {{ PREFIX32,0x6,0x9,RSIND|B30,B30|RD32,E,0,0,0,0 }}EOP,
+ SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{{DISP16SRC,RD32,E}}, {{ PREFIX32,0x6,0xF,DISPREG|B30,B30|RD32,DISP16SRC,IGNORE,IGNORE,IGNORE,E }}EOP,
+ SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{{DISP|L_32|SRC,RD32,E}},{{ PREFIX32,0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0x2,B30|RD32,SRC|DISP32LIST,E }}EOP,
+ SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{{RSINC,RD32,E}}, {{ PREFIX32,0x6,0xD,B30|RSINC,B30|RD32,E,0,0,0,0 }}EOP,
+ SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{{ABS16SRC,RD32,E}}, {{ PREFIX32,0x6,0xB,0x0,B30|RD32,ABS16SRC,IGNORE,IGNORE,IGNORE,E }}EOP,
+ SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{{ABS32SRC|MEMRELAX,RD32,E }}, {{ PREFIX32,0x6,0xB,0x2,B30|RD32,SRC|MEMRELAX|ABS32LIST,E }}EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{{RS32,RDIND,E}}, {{ PREFIX32,0x6,0x9,RDIND|B31,B30|RS32,E,0,0,0,0 }}EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{{RS32,DISP16DST,E}}, {{ PREFIX32,0x6,0xF,DISPREG|B31,B30|RS32,DISP16DST,IGNORE,IGNORE,IGNORE,E }}EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{{RS32,DISP|L_32|DST,E}},{{ PREFIX32,0x7,0x8,B31|DISPREG,0x0,0x6,0xB,0xA,B30|RS32,DST|DISP32LIST,E }}EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{{RS32,RDDEC,E}}, {{ PREFIX32,0x6,0xD,RDDEC|B31,B30|RS32,E,0,0,0,0 }}EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{{RS32,ABS16DST,E}}, {{ PREFIX32,0x6,0xB,0x8,B30|RS32,ABS16DST,IGNORE,IGNORE,IGNORE,E }}EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{{RS32,ABS32DST|MEMRELAX,E }}, {{ PREFIX32,0x6,0xB,0xA,B30|RS32,DST|MEMRELAX|ABS32LIST,E }}EOP,
+
+ SOP(O(O_MOV_TO_REG,SB),10,"movfpe"),{{ABS16SRC,RD8,E}},{{ 0x6,0xA,0x4,RD8,ABS16SRC,IGNORE,IGNORE,IGNORE,E}}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),10,"movtpe"),{{RS8,ABS16DST,E}},{{ 0x6,0xA,0xC,RS8,ABS16DST,IGNORE,IGNORE,IGNORE,E}}EOP,
+
+ NEW_SOP(O(O_MULU,SB),1,14,"mulxu.b"),{{RS8,RD16,E}}, {{ 0x5,0x0,RS8,RD16,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_MULU,SW),0,14,"mulxu.w"),{{RS16,RD32,E}},{{ 0x5,0x2,RS16,B30|RD32,E,0,0,0,0}}EOP,
+
+ NEW_SOP(O(O_MULS,SB),0,20,"mulxs.b"),{{RS8,RD16,E}}, {{ 0x0,0x1,0xc,0x0,0x5,0x0,RS8,RD16,E}}EOP,
+ NEW_SOP(O(O_MULS,SW),0,20,"mulxs.w"),{{RS16,RD32,E}},{{ 0x0,0x1,0xc,0x0,0x5,0x2,RS16,B30|RD32,E}}EOP,
+
+ /* ??? This can use UNOP3. */
+ NEW_SOP(O(O_NEG,SB),1,2,"neg.b"),{{ OR8,E, 0}},{{ 0x1,0x7,0x8,OR8,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_NEG,SW),0,2,"neg.w"),{{ OR16,E,0}},{{ 0x1,0x7,0x9,OR16,E}}EOP,
+ NEW_SOP(O(O_NEG,SL),0,2,"neg.l"),{{ OR32,E,0}},{{ 0x1,0x7,0xB,B30|OR32,E}}EOP,
+
+ NEW_SOP(O(O_NOP,SN),1,2,"nop"),{{E,0,0}},{{ 0x0,0x0,0x0,0x0,E,0,0,0,0}}EOP,
+
+ /* ??? This can use UNOP3. */
+ NEW_SOP(O(O_NOT,SB),1,2,"not.b"),{{ OR8,E, 0}},{{ 0x1,0x7,0x0,OR8,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_NOT,SW),0,2,"not.w"),{{ OR16,E,0}},{{ 0x1,0x7,0x1,OR16,E}}EOP,
+ NEW_SOP(O(O_NOT,SL),0,2,"not.l"),{{ OR32,E,0}},{{ 0x1,0x7,0x3,B30|OR32,E}}EOP,
+
+ TWOOP(O(O_OR, SB),"or.b",0xC,0x1,0x4),
+ NEW_SOP(O(O_OR,SW),0,4,"or.w"),{{IMM16,RD16,E }},{{0x7,0x9,0x4,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}} EOP,
+ NEW_SOP(O(O_OR,SW),0,2,"or.w"),{{RS16,RD16,E }},{{0x6,0x4,RS16,RD16,E}} EOP,
+
+ NEW_SOP(O(O_OR,SL),0,6,"or.l"),{{IMM32,RD32,E }},{{0x7,0xA,0x4,B30|RD32,IMM32LIST,E}} EOP,
+ NEW_SOP(O(O_OR,SL),0,2,"or.l"),{{RS32,RD32,E }},{{0x0,0x1,0xF,0x0,0x6,0x4,B30|RS32,B30|RD32,E}} EOP,
+
+ NEW_SOP(O(O_ORC,SB),1,2,"orc"),{{IMM8,CCR,E}},{{ 0x0,0x4,IMM8,IGNORE,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_ORC,SB),1,2,"orc"),{{IMM8,EXR,E}},{{ 0x0,0x1,0x4,0x1,0x0,0x4,IMM8,IGNORE,E,0,0,0,0}}EOP,
+
+ NEW_SOP(O(O_MOV_TO_REG,SW),1,6,"pop.w"),{{OR16,E,0}},{{ 0x6,0xD,0x7,OR16,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_MOV_TO_REG,SL),0,6,"pop.l"),{{OR32,E,0}},{{ PREFIX32,0x6,0xD,0x7,OR32|B30,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_MOV_TO_MEM,SW),1,6,"push.w"),{{OR16,E,0}},{{ 0x6,0xD,0xF,OR16,E,0,0,0,0}}EOP,
+ NEW_SOP(O(O_MOV_TO_MEM,SL),0,6,"push.l"),{{OR32,E,0}},{{ PREFIX32,0x6,0xD,0xF,OR32|B30,E,0,0,0,0}}EOP,
+
+ UNOP3(O_ROTL, "rotl", 0x1,0x2,0x8),
+ UNOP3(O_ROTR, "rotr", 0x1,0x3,0x8),
+ UNOP3(O_ROTXL, "rotxl",0x1,0x2,0x0),
+ UNOP3(O_ROTXR, "rotxr",0x1,0x3,0x0),
+
+ SOP(O(O_BPT,SN), 10,"bpt"),{{E,0,0}},{{ 0x7,0xA,0xF,0xF,E,0,0,0,0}}EOP,
+ SOP(O(O_RTE,SN), 10,"rte"),{{E,0,0}},{{ 0x5,0x6,0x7,0x0,E,0,0,0,0}}EOP,
+ SOP(O(O_RTS,SN), 8,"rts"),{{E,0,0}},{{ 0x5,0x4,0x7,0x0,E,0,0,0,0}}EOP,
+
+ UNOP3(O_SHAL, "shal",0x1,0x0,0x8),
+ UNOP3(O_SHAR, "shar",0x1,0x1,0x8),
+ UNOP3(O_SHLL, "shll",0x1,0x0,0x0),
+ UNOP3(O_SHLR, "shlr",0x1,0x1,0x0),
+
+ SOP(O(O_SLEEP,SN),2,"sleep"),{{E,0,0}},{{ 0x0,0x1,0x8,0x0,E,0,0,0,0}} EOP,
+
+ NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{CCR,RD8,E}},{{ 0x0,0x2,0x0,RD8,E,0,0,0,0}} EOP,
+
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR,RSIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR,DISP|DST|L_16,E}},{{PREFIXLDC,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR,DISP|DST|L_32,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR,RDDEC,E}}, {{PREFIXLDC,0x6,0xD,B31|RDDEC,0x0,E}}EOP,
+
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR,ABS16SRC,E}}, {{PREFIXLDC,0x6,0xB,0x8,0x0,ABS16DST,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR,ABS32SRC,E}}, {{PREFIXLDC,0x6,0xB,0xA,0x0,DST|ABS32LIST,E}}EOP,
+
+ NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{EXR,RD8,E}},{{ 0x0,0x2,0x1,RD8,E,0,0,0,0}} EOP,
+
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR,RSIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR,DISP|DST|L_16,E}},{{0x0,0x1,0x4,0x1,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR,DISP|DST|L_32,E}},{{0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR,RDDEC,E}}, {{0x0,0x1,0x4,0x1,0x6,0xD,B31|RDDEC,0x0,E}}EOP,
+
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR,ABS16SRC,E}}, {{0x0,0x1,0x4,0x1,0x6,0xB,0x8,0x0,ABS16DST,IGNORE,IGNORE,IGNORE,E}}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR,ABS32SRC,E}}, {{0x0,0x1,0x4,0x1,0x6,0xB,0xA,0x0,DST|ABS32LIST,E}}EOP,
+
+ SOP(O(O_SUB,SB),2,"sub.b"),{{RS8,RD8,E}},{{ 0x1,0x8,RS8,RD8,E,0,0,0,0}}EOP,
+
+ NEW_SOP(O(O_SUB,SW),1,2,"sub.w"),{{RS16,RD16,E }}, {{0x1,0x9,RS16,RD16,E}} EOP,
+ NEW_SOP(O(O_SUB,SW),0,4,"sub.w"),{{IMM16,RD16,E }}, {{0x7,0x9,0x3,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}} EOP,
+ NEW_SOP(O(O_SUB,SL),0,2,"sub.l") ,{{RS32,RD32,E }}, {{0x1,0xA,B31|RS32,B30|RD32,E}} EOP,
+ NEW_SOP(O(O_SUB,SL),0,6,"sub.l"), {{IMM32,RD32,E }},{{0x7,0xA,0x3,B30|RD32,IMM32LIST,E}} EOP,
+
+ SOP(O(O_SUBS,SL),2,"subs"),{{KBIT,RDP,E}},{{ 0x1,0xB,KBIT,RDP,E,0,0,0,0}}EOP,
+ TWOOP(O(O_SUBX,SB),"subx",0xB,0x1,0xE),
+
+ NEW_SOP(O(O_TRAPA,SB),0,2,"trapa"),{{ IMM2,E}}, {{0x5,0x7,IMM2,IGNORE,E }}EOP,
+ NEW_SOP(O(O_TAS,SB),0,2,"tas"),{{RSIND,E}}, {{0x0,0x1,0xe,0x0,0x7,0xb,B30|RSIND,0xc,E }}EOP,
+
+ TWOOP(O(O_XOR, SB),"xor",0xD,0x1,0x5),
+
+ NEW_SOP(O(O_XOR,SW),0,4,"xor.w"),{{IMM16,RD16,E }},{{0x7,0x9,0x5,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}} EOP,
+ NEW_SOP(O(O_XOR,SW),0,2,"xor.w"),{{RS16,RD16,E }},{{0x6,0x5,RS16,RD16,E}} EOP,
+
+ NEW_SOP(O(O_XOR,SL),0,6,"xor.l"),{{IMM32,RD32,E }},{{0x7,0xA,0x5,B30|RD32,IMM32LIST,E}} EOP,
+ NEW_SOP(O(O_XOR,SL),0,2,"xor.l") ,{{RS32,RD32,E }},{{0x0,0x1,0xF,0x0,0x6,0x5,B30|RS32,B30|RD32,E}} EOP,
+
+ SOP(O(O_XORC,SB),2,"xorc"),{{IMM8,CCR,E}},{{ 0x0,0x5,IMM8,IGNORE,E,0,0,0,0}}EOP,
+ SOP(O(O_XORC,SB),2,"xorc"),{{IMM8,EXR,E}},{{ 0x0,0x1,0x4,0x1,0x0,0x5,IMM8,IGNORE,E,0,0,0,0}}EOP,
+
+ NEW_SOP(O(O_CLRMAC,SN),1,2,"clrmac"),{{E, 0, 0}},{{0x0,0x1,0xa,0x0,E}} EOP,
+ NEW_SOP(O(O_MAC,SL),1,2,"mac"),{{RSINC,RDINC,E}},{{0x0,0x1,0x6,0x0,0x6,0xd,B30|RSINC,B30|RDINC,E}} EOP,
+ NEW_SOP(O(O_LDMAC,SL),1,2,"ldmac"),{{RS32,MACREG,E}},{{0x0,0x3,MACREG,RS32,E}} EOP,
+ NEW_SOP(O(O_STMAC,SL),1,2,"stmac"),{{MACREG,RD32,E}},{{0x0,0x2,MACREG,RD32,E}} EOP,
+ NEW_SOP(O(O_LDM,SL),0,6,"ldm.l"),{{RSINC, RS32, E}},{{ 0x0,0x1,IGNORE,0x0,0x6,0xD,0x7,IGNORE,E}}EOP,
+ NEW_SOP(O(O_STM,SL),0,6,"stm.l"),{{RS32, RDDEC, E}},{{0x0,0x1,IGNORE,0x0,0x6,0xD,0xF,IGNORE,E}}EOP,
+ { 0 }
+};
+#else
+extern struct h8_opcode h8_opcodes[] ;
+#endif
+
+
+
+
diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h
new file mode 100644
index 0000000..30ccb6c
--- /dev/null
+++ b/include/opcode/hppa.h
@@ -0,0 +1,486 @@
+/* Table of opcodes for the PA-RISC.
+ Copyright (C) 1990, 1991, 1993, 1995, 1999 Free Software Foundation, Inc.
+
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
+
+GAS/GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS/GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS or GDB; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined(__STDC__) && !defined(const)
+#define const
+#endif
+
+/*
+ * Structure of an opcode table entry.
+ */
+
+/* There are two kinds of delay slot nullification: normal which is
+ * controled by the nullification bit, and conditional, which depends
+ * on the direction of the branch and its success or failure.
+ *
+ * NONE is unfortunately #defined in the hiux system include files.
+ * #undef it away.
+ */
+#undef NONE
+struct pa_opcode
+{
+ const char *name;
+ unsigned long int match; /* Bits that must be set... */
+ unsigned long int mask; /* ... in these bits. */
+ char *args;
+ enum pa_arch arch;
+};
+
+
+/*
+ All hppa opcodes are 32 bits.
+
+ The match component is a mask saying which bits must match a
+ particular opcode in order for an instruction to be an instance
+ of that opcode.
+
+ The args component is a string containing one character
+ for each operand of the instruction.
+
+ Bit positions in this description follow HP usage of lsb = 31,
+ "at" is lsb of field.
+
+ In the args field, the following characters must match exactly:
+
+ '+,() '
+
+ In the args field, the following characters are unused:
+
+ ' "#$% *+- ./ :; '
+ ' [\] '
+ ' { } '
+
+ Here are all the characters:
+
+ ' !"#$%&'()*+-,./0123456789:;<=>?@'
+ 'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
+ 'abcdefghijklmnopqrstuvwxyz{|}~'
+
+Kinds of operands:
+ x integer register field at 15.
+ b integer register field at 10.
+ t integer register field at 31.
+ y floating point register field at 31
+ 5 5 bit immediate at 15.
+ s 2 bit space specifier at 17.
+ S 3 bit space specifier at 18.
+ c indexed load completer.
+ C short load and store completer.
+ Y Store Bytes Short completer
+ < non-negated compare/subtract conditions.
+ a compare/subtract conditions
+ d non-negated add conditions
+ & logical instruction conditions
+ U unit instruction conditions
+ > shift/extract/deposit conditions.
+ ~ bvb,bb conditions
+ V 5 bit immediate value at 31
+ i 11 bit immediate value at 31
+ j 14 bit immediate value at 31
+ k 21 bit immediate value at 31
+ n nullification for branch instructions
+ N nullification for spop and copr instructions
+ w 12 bit branch displacement
+ W 17 bit branch displacement (PC relative)
+ z 17 bit branch displacement (just a number, not an address)
+
+Also these:
+
+ p 5 bit shift count at 26 (to support the SHD instruction) encoded as
+ 31-p
+ P 5 bit bit position at 26
+ T 5 bit field length at 31 (encoded as 32-T)
+ A 13 bit immediate at 18 (to support the BREAK instruction)
+ ^ like b, but describes a control register
+ Z System Control Completer (to support LPA, LHA, etc.)
+ D 26 bit immediate at 31 (to support the DIAG instruction)
+
+ f 3 bit Special Function Unit identifier at 25
+ O 20 bit Special Function Unit operation split between 15 bits at 20
+ and 5 bits at 31
+ o 15 bit Special Function Unit operation at 20
+ 2 22 bit Special Function Unit operation split between 17 bits at 20
+ and 5 bits at 31
+ 1 15 bit Special Function Unit operation split between 10 bits at 20
+ and 5 bits at 31
+ 0 10 bit Special Function Unit operation split between 5 bits at 20
+ and 5 bits at 31
+ u 3 bit coprocessor unit identifier at 25
+ F Source Floating Point Operand Format Completer encoded 2 bits at 20
+ I Source Floating Point Operand Format Completer encoded 1 bits at 20
+ (for 0xe format FP instructions)
+ G Destination Floating Point Operand Format Completer encoded 2 bits at 18
+ M Floating-Point Compare Conditions (encoded as 5 bits at 31)
+ ? non-negated/negated compare/subtract conditions.
+ @ non-negated/negated add conditions.
+ ! non-negated add conditions.
+
+ s 2 bit space specifier at 17.
+ b register field at 10.
+ r 5 bit immediate value at 31 (for the break instruction)
+ (very similar to V above, except the value is unsigned instead of
+ low_sign_ext)
+ R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
+ (same as r above, except the value is in a different location)
+ Q 5 bit immediate value at 10 (a bit position specified in
+ the bb instruction. It's the same as r above, except the
+ value is in a different location)
+ | shift/extract/deposit conditions when used in a conditional branch
+
+And these (PJH) for PA-89 F.P. registers and instructions:
+
+ v a 't' operand type extended to handle L/R register halves.
+ E a 'b' operand type extended to handle L/R register halves.
+ X an 'x' operand type extended to handle L/R register halves.
+ J a 'b' operand type further extended to handle extra 1.1 registers
+ K a 'x' operand type further extended to handle extra 1.1 registers
+ 4 a variation of the 'b' operand type for 'fmpyadd' and 'fmpysub'
+ 6 a variation of the 'x' operand type for 'fmpyadd' and 'fmpysub'
+ 7 a variation of the 't' operand type for 'fmpyadd' and 'fmpysub'
+ 8 5 bit register field at 20 (used in 'fmpyadd' and 'fmpysub')
+ 9 5 bit register field at 25 (used in 'fmpyadd' and 'fmpysub')
+ H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
+ (very similar to 'F')
+*/
+
+
+/* List of characters not to put a space after. Note that
+ "," is included, as the "spopN" operations use literal
+ commas in their completer sections. */
+static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
+
+/* The order of the opcodes in this table is significant:
+
+ * The assembler requires that all instances of the same mnemonic must be
+ consecutive. If they aren't, the assembler will bomb at runtime.
+
+ * The disassembler should not care about the order of the opcodes. */
+
+static const struct pa_opcode pa_opcodes[] =
+{
+
+
+/* pseudo-instructions */
+
+{ "b", 0xe8000000, 0xffe0e000, "nW", pa10}, /* bl foo,r0 */
+{ "ldi", 0x34000000, 0xffe0c000, "j,x", pa10}, /* ldo val(r0),r */
+{ "comib", 0x84000000, 0xfc000000, "?n5,b,w", pa10}, /* comib{tf}*/
+{ "comb", 0x80000000, 0xfc000000, "?nx,b,w", pa10}, /* comb{tf} */
+{ "addb", 0xa0000000, 0xfc000000, "@nx,b,w", pa10}, /* addb{tf} */
+{ "addib", 0xa4000000, 0xfc000000, "@n5,b,w", pa10}, /* addib{tf}*/
+{ "nop", 0x08000240, 0xffffffff, "", pa10}, /* or 0,0,0 */
+{ "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10}, /* or r,0,t */
+{ "mtsar", 0x01601840, 0xffe0ffff, "x", pa10}, /* mtctl r,cr11 */
+
+/* Loads and Stores for integer registers. */
+{ "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10},
+{ "ldw", 0x48000000, 0xfc000000, "j(b),x", pa10},
+{ "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10},
+{ "ldh", 0x44000000, 0xfc000000, "j(b),x", pa10},
+{ "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10},
+{ "ldb", 0x40000000, 0xfc000000, "j(b),x", pa10},
+{ "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10},
+{ "stw", 0x68000000, 0xfc000000, "x,j(b)", pa10},
+{ "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10},
+{ "sth", 0x64000000, 0xfc000000, "x,j(b)", pa10},
+{ "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10},
+{ "stb", 0x60000000, 0xfc000000, "x,j(b)", pa10},
+{ "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10},
+{ "ldwm", 0x4c000000, 0xfc000000, "j(b),x", pa10},
+{ "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10},
+{ "stwm", 0x6c000000, 0xfc000000, "x,j(b)", pa10},
+{ "ldwx", 0x0c000080, 0xfc001fc0, "cx(s,b),t", pa10},
+{ "ldwx", 0x0c000080, 0xfc001fc0, "cx(b),t", pa10},
+{ "ldhx", 0x0c000040, 0xfc001fc0, "cx(s,b),t", pa10},
+{ "ldhx", 0x0c000040, 0xfc001fc0, "cx(b),t", pa10},
+{ "ldbx", 0x0c000000, 0xfc001fc0, "cx(s,b),t", pa10},
+{ "ldbx", 0x0c000000, 0xfc001fc0, "cx(b),t", pa10},
+{ "ldwax", 0x0c000180, 0xfc00dfc0, "cx(b),t", pa10},
+{ "ldcwx", 0x0c0001c0, 0xfc001fc0, "cx(s,b),t", pa10},
+{ "ldcwx", 0x0c0001c0, 0xfc001fc0, "cx(b),t", pa10},
+{ "ldws", 0x0c001080, 0xfc001fc0, "C5(s,b),t", pa10},
+{ "ldws", 0x0c001080, 0xfc001fc0, "C5(b),t", pa10},
+{ "ldhs", 0x0c001040, 0xfc001fc0, "C5(s,b),t", pa10},
+{ "ldhs", 0x0c001040, 0xfc001fc0, "C5(b),t", pa10},
+{ "ldbs", 0x0c001000, 0xfc001fc0, "C5(s,b),t", pa10},
+{ "ldbs", 0x0c001000, 0xfc001fc0, "C5(b),t", pa10},
+{ "ldwas", 0x0c001180, 0xfc00dfc0, "C5(b),t", pa10},
+{ "ldcws", 0x0c0011c0, 0xfc001fc0, "C5(s,b),t", pa10},
+{ "ldcws", 0x0c0011c0, 0xfc001fc0, "C5(b),t", pa10},
+{ "stws", 0x0c001280, 0xfc001fc0, "Cx,V(s,b)", pa10},
+{ "stws", 0x0c001280, 0xfc001fc0, "Cx,V(b)", pa10},
+{ "sths", 0x0c001240, 0xfc001fc0, "Cx,V(s,b)", pa10},
+{ "sths", 0x0c001240, 0xfc001fc0, "Cx,V(b)", pa10},
+{ "stbs", 0x0c001200, 0xfc001fc0, "Cx,V(s,b)", pa10},
+{ "stbs", 0x0c001200, 0xfc001fc0, "Cx,V(b)", pa10},
+{ "stwas", 0x0c001380, 0xfc00dfc0, "Cx,V(b)", pa10},
+{ "stbys", 0x0c001300, 0xfc001fc0, "Yx,V(s,b)", pa10},
+{ "stbys", 0x0c001300, 0xfc001fc0, "Yx,V(b)", pa10},
+
+/* Immediate instructions. */
+{ "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10},
+{ "ldil", 0x20000000, 0xfc000000, "k,b", pa10},
+{ "addil", 0x28000000, 0xfc000000, "k,b", pa10},
+
+/* Branching instructions. */
+{ "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10},
+{ "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10},
+{ "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10},
+{ "bv", 0xe800c000, 0xfc00fffd, "nx(b)", pa10},
+{ "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10},
+{ "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10},
+{ "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10},
+{ "movb", 0xc8000000, 0xfc000000, "|nx,b,w", pa10},
+{ "movib", 0xcc000000, 0xfc000000, "|n5,b,w", pa10},
+{ "combt", 0x80000000, 0xfc000000, "<nx,b,w", pa10},
+{ "combf", 0x88000000, 0xfc000000, "<nx,b,w", pa10},
+{ "comibt", 0x84000000, 0xfc000000, "<n5,b,w", pa10},
+{ "comibf", 0x8c000000, 0xfc000000, "<n5,b,w", pa10},
+{ "addbt", 0xa0000000, 0xfc000000, "!nx,b,w", pa10},
+{ "addbf", 0xa8000000, 0xfc000000, "!nx,b,w", pa10},
+{ "addibt", 0xa4000000, 0xfc000000, "!n5,b,w", pa10},
+{ "addibf", 0xac000000, 0xfc000000, "!n5,b,w", pa10},
+{ "bb", 0xc4004000, 0xfc004000, "~nx,Q,w", pa10},
+{ "bvb", 0xc0004000, 0xffe04000, "~nx,w", pa10},
+
+/* Computation Instructions */
+
+{ "add", 0x08000600, 0xfc000fe0, "dx,b,t", pa10},
+{ "addl", 0x08000a00, 0xfc000fe0, "dx,b,t", pa10},
+{ "addo", 0x08000e00, 0xfc000fe0, "dx,b,t", pa10},
+{ "addc", 0x08000700, 0xfc000fe0, "dx,b,t", pa10},
+{ "addco", 0x08000f00, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh1add", 0x08000640, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh1addl", 0x08000a40, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh1addo", 0x08000e40, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh2add", 0x08000680, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh2addl", 0x08000a80, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh2addo", 0x08000e80, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh3add", 0x080006c0, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh3addl", 0x08000ac0, 0xfc000fe0, "dx,b,t", pa10},
+{ "sh3addo", 0x08000ec0, 0xfc000fe0, "dx,b,t", pa10},
+{ "sub", 0x08000400, 0xfc000fe0, "ax,b,t", pa10},
+{ "subo", 0x08000c00, 0xfc000fe0, "ax,b,t", pa10},
+{ "subb", 0x08000500, 0xfc000fe0, "ax,b,t", pa10},
+{ "subbo", 0x08000d00, 0xfc000fe0, "ax,b,t", pa10},
+{ "subt", 0x080004c0, 0xfc000fe0, "ax,b,t", pa10},
+{ "subto", 0x08000cc0, 0xfc000fe0, "ax,b,t", pa10},
+{ "ds", 0x08000440, 0xfc000fe0, "ax,b,t", pa10},
+{ "comclr", 0x08000880, 0xfc000fe0, "ax,b,t", pa10},
+{ "or", 0x08000240, 0xfc000fe0, "&x,b,t", pa10},
+{ "xor", 0x08000280, 0xfc000fe0, "&x,b,t", pa10},
+{ "and", 0x08000200, 0xfc000fe0, "&x,b,t", pa10},
+{ "andcm", 0x08000000, 0xfc000fe0, "&x,b,t", pa10},
+{ "uxor", 0x08000380, 0xfc000fe0, "Ux,b,t", pa10},
+{ "uaddcm", 0x08000980, 0xfc000fe0, "Ux,b,t", pa10},
+{ "uaddcmt", 0x080009c0, 0xfc000fe0, "Ux,b,t", pa10},
+{ "dcor", 0x08000b80, 0xfc1f0fe0, "Ub,t", pa10},
+{ "idcor", 0x08000bc0, 0xfc1f0fe0, "Ub,t", pa10},
+{ "addi", 0xb4000000, 0xfc000800, "di,b,x", pa10},
+{ "addio", 0xb4000800, 0xfc000800, "di,b,x", pa10},
+{ "addit", 0xb0000000, 0xfc000800, "di,b,x", pa10},
+{ "addito", 0xb0000800, 0xfc000800, "di,b,x", pa10},
+{ "subi", 0x94000000, 0xfc000800, "ai,b,x", pa10},
+{ "subio", 0x94000800, 0xfc000800, "ai,b,x", pa10},
+{ "comiclr", 0x90000000, 0xfc000800, "ai,b,x", pa10},
+
+/* Extract and Deposit Instructions */
+
+{ "vshd", 0xd0000000, 0xfc001fe0, ">x,b,t", pa10},
+{ "shd", 0xd0000800, 0xfc001c00, ">x,b,p,t", pa10},
+{ "vextru", 0xd0001000, 0xfc001fe0, ">b,T,x", pa10},
+{ "vextrs", 0xd0001400, 0xfc001fe0, ">b,T,x", pa10},
+{ "extru", 0xd0001800, 0xfc001c00, ">b,P,T,x", pa10},
+{ "extrs", 0xd0001c00, 0xfc001c00, ">b,P,T,x", pa10},
+{ "zvdep", 0xd4000000, 0xfc001fe0, ">x,T,b", pa10},
+{ "vdep", 0xd4000400, 0xfc001fe0, ">x,T,b", pa10},
+{ "zdep", 0xd4000800, 0xfc001c00, ">x,p,T,b", pa10},
+{ "dep", 0xd4000c00, 0xfc001c00, ">x,p,T,b", pa10},
+{ "zvdepi", 0xd4001000, 0xfc001fe0, ">5,T,b", pa10},
+{ "vdepi", 0xd4001400, 0xfc001fe0, ">5,T,b", pa10},
+{ "zdepi", 0xd4001800, 0xfc001c00, ">5,p,T,b", pa10},
+{ "depi", 0xd4001c00, 0xfc001c00, ">5,p,T,b", pa10},
+
+/* System Control Instructions */
+
+{ "break", 0x00000000, 0xfc001fe0, "r,A", pa10},
+{ "rfi", 0x00000c00, 0xffffffff, "", pa10},
+{ "rfir", 0x00000ca0, 0xffffffff, "", pa11},
+{ "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10},
+{ "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10},
+{ "mtsm", 0x00001860, 0xffe0ffff, "x", pa10},
+{ "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10},
+{ "ldsid", 0x000010a0, 0xfc1f3fe0, "(b),t", pa10},
+{ "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10},
+{ "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10},
+{ "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10},
+{ "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10},
+{ "sync", 0x00000400, 0xffffffff, "", pa10},
+{ "syncdma", 0x00100400, 0xffffffff, "", pa10},
+{ "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10},
+{ "prober", 0x04001180, 0xfc003fe0, "(b),x,t", pa10},
+{ "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10},
+{ "proberi", 0x04003180, 0xfc003fe0, "(b),R,t", pa10},
+{ "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10},
+{ "probew", 0x040011c0, 0xfc003fe0, "(b),x,t", pa10},
+{ "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10},
+{ "probewi", 0x040031c0, 0xfc003fe0, "(b),R,t", pa10},
+{ "lpa", 0x04001340, 0xfc003fc0, "Zx(s,b),t", pa10},
+{ "lpa", 0x04001340, 0xfc003fc0, "Zx(b),t", pa10},
+{ "lha", 0x04001300, 0xfc003fc0, "Zx(s,b),t", pa10},
+{ "lha", 0x04001300, 0xfc003fc0, "Zx(b),t", pa10},
+{ "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa10},
+{ "lci", 0x04001300, 0xfc003fe0, "x(b),t", pa10},
+{ "pdtlb", 0x04001200, 0xfc003fdf, "Zx(s,b)", pa10},
+{ "pdtlb", 0x04001200, 0xfc003fdf, "Zx(b)", pa10},
+{ "pitlb", 0x04000200, 0xfc001fdf, "Zx(S,b)", pa10},
+{ "pitlb", 0x04000200, 0xfc001fdf, "Zx(b)", pa10},
+{ "pdtlbe", 0x04001240, 0xfc003fdf, "Zx(s,b)", pa10},
+{ "pdtlbe", 0x04001240, 0xfc003fdf, "Zx(b)", pa10},
+{ "pitlbe", 0x04000240, 0xfc001fdf, "Zx(S,b)", pa10},
+{ "pitlbe", 0x04000240, 0xfc001fdf, "Zx(b)", pa10},
+{ "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10},
+{ "idtlba", 0x04001040, 0xfc003fff, "x,(b)", pa10},
+{ "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10},
+{ "iitlba", 0x04000040, 0xfc001fff, "x,(b)", pa10},
+{ "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10},
+{ "idtlbp", 0x04001000, 0xfc003fff, "x,(b)", pa10},
+{ "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10},
+{ "iitlbp", 0x04000000, 0xfc001fff, "x,(b)", pa10},
+{ "pdc", 0x04001380, 0xfc003fdf, "Zx(s,b)", pa10},
+{ "pdc", 0x04001380, 0xfc003fdf, "Zx(b)", pa10},
+{ "fdc", 0x04001280, 0xfc003fdf, "Zx(s,b)", pa10},
+{ "fdc", 0x04001280, 0xfc003fdf, "Zx(b)", pa10},
+{ "fic", 0x04000280, 0xfc001fdf, "Zx(S,b)", pa10},
+{ "fic", 0x04000280, 0xfc001fdf, "Zx(b)", pa10},
+{ "fdce", 0x040012c0, 0xfc003fdf, "Zx(s,b)", pa10},
+{ "fdce", 0x040012c0, 0xfc003fdf, "Zx(b)", pa10},
+{ "fice", 0x040002c0, 0xfc001fdf, "Zx(S,b)", pa10},
+{ "fice", 0x040002c0, 0xfc001fdf, "Zx(b)", pa10},
+{ "diag", 0x14000000, 0xfc000000, "D", pa10},
+
+/* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
+ the Timex FPU or the Mustang ERS (not sure which) manual. */
+{ "gfw", 0x04001680, 0xfc003fdf, "Zx(s,b)", pa11},
+{ "gfw", 0x04001680, 0xfc003fdf, "Zx(b)", pa11},
+{ "gfr", 0x04001a80, 0xfc003fdf, "Zx(s,b)", pa11},
+{ "gfr", 0x04001a80, 0xfc003fdf, "Zx(b)", pa11},
+
+/* Floating Point Coprocessor Instructions */
+
+{ "fldwx", 0x24000000, 0xfc001f80, "cx(s,b),v", pa10},
+{ "fldwx", 0x24000000, 0xfc001f80, "cx(b),v", pa10},
+{ "flddx", 0x2c000000, 0xfc001fc0, "cx(s,b),y", pa10},
+{ "flddx", 0x2c000000, 0xfc001fc0, "cx(b),y", pa10},
+{ "fstwx", 0x24000200, 0xfc001f80, "cv,x(s,b)", pa10},
+{ "fstwx", 0x24000200, 0xfc001f80, "cv,x(b)", pa10},
+{ "fstdx", 0x2c000200, 0xfc001fc0, "cy,x(s,b)", pa10},
+{ "fstdx", 0x2c000200, 0xfc001fc0, "cy,x(b)", pa10},
+{ "fstqx", 0x3c000200, 0xfc001fc0, "cy,x(s,b)", pa10},
+{ "fstqx", 0x3c000200, 0xfc001fc0, "cy,x(b)", pa10},
+{ "fldws", 0x24001000, 0xfc001f80, "C5(s,b),v", pa10},
+{ "fldws", 0x24001000, 0xfc001f80, "C5(b),v", pa10},
+{ "fldds", 0x2c001000, 0xfc001fc0, "C5(s,b),y", pa10},
+{ "fldds", 0x2c001000, 0xfc001fc0, "C5(b),y", pa10},
+{ "fstws", 0x24001200, 0xfc001f80, "Cv,5(s,b)", pa10},
+{ "fstws", 0x24001200, 0xfc001f80, "Cv,5(b)", pa10},
+{ "fstds", 0x2c001200, 0xfc001fc0, "Cy,5(s,b)", pa10},
+{ "fstds", 0x2c001200, 0xfc001fc0, "Cy,5(b)", pa10},
+{ "fstqs", 0x3c001200, 0xfc001fc0, "Cy,5(s,b)", pa10},
+{ "fstqs", 0x3c001200, 0xfc001fc0, "Cy,5(b)", pa10},
+{ "fadd", 0x30000600, 0xfc00e7e0, "FE,X,v", pa10},
+{ "fadd", 0x38000600, 0xfc00e720, "IJ,K,v", pa10},
+{ "fsub", 0x30002600, 0xfc00e7e0, "FE,X,v", pa10},
+{ "fsub", 0x38002600, 0xfc00e720, "IJ,K,v", pa10},
+{ "fmpy", 0x30004600, 0xfc00e7e0, "FE,X,v", pa10},
+{ "fmpy", 0x38004600, 0xfc00e720, "IJ,K,v", pa10},
+{ "fdiv", 0x30006600, 0xfc00e7e0, "FE,X,v", pa10},
+{ "fdiv", 0x38006600, 0xfc00e720, "IJ,K,v", pa10},
+{ "fsqrt", 0x30008000, 0xfc1fe7e0, "FE,v", pa10},
+{ "fsqrt", 0x38008000, 0xfc1fe720, "FJ,v", pa10},
+{ "fabs", 0x30006000, 0xfc1fe7e0, "FE,v", pa10},
+{ "fabs", 0x38006000, 0xfc1fe720, "FJ,v", pa10},
+{ "frem", 0x30008600, 0xfc00e7e0, "FE,X,v", pa10},
+{ "frem", 0x38008600, 0xfc00e720, "FJ,K,v", pa10},
+{ "frnd", 0x3000a000, 0xfc1fe7e0, "FE,v", pa10},
+{ "frnd", 0x3800a000, 0xfc1fe720, "FJ,v", pa10},
+{ "fcpy", 0x30004000, 0xfc1fe7e0, "FE,v", pa10},
+{ "fcpy", 0x38004000, 0xfc1fe720, "FJ,v", pa10},
+{ "fcnvff", 0x30000200, 0xfc1f87e0, "FGE,v", pa10},
+{ "fcnvff", 0x38000200, 0xfc1f8720, "FGJ,v", pa10},
+{ "fcnvxf", 0x30008200, 0xfc1f87e0, "FGE,v", pa10},
+{ "fcnvxf", 0x38008200, 0xfc1f8720, "FGJ,v", pa10},
+{ "fcnvfx", 0x30010200, 0xfc1f87e0, "FGE,v", pa10},
+{ "fcnvfx", 0x38010200, 0xfc1f8720, "FGJ,v", pa10},
+{ "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGE,v", pa10},
+{ "fcnvfxt", 0x38018200, 0xfc1f8720, "FGJ,v", pa10},
+{ "fmpyfadd", 0xb8000000, 0xfc000020, "FE,X,3,v", pa20},
+{ "fmpynfadd", 0xb8000020, 0xfc000020, "FE,X,3,v", pa20},
+{ "fneg", 0x3000c000, 0xfc1fe7e0, "FE,v", pa20},
+{ "fneg", 0x3800c000, 0xfc1fe720, "FJ,v", pa20},
+{ "fnegabs", 0x3000e000, 0xfc1fe7e0, "FE,v", pa20},
+{ "fnegabs", 0x3800e000, 0xfc1fe720, "FJ,v", pa20},
+{ "fcmp", 0x30000400, 0xfc00e7e0, "FME,X", pa10},
+{ "fcmp", 0x38000400, 0xfc00e720, "IMJ,K", pa10},
+{ "xmpyu", 0x38004700, 0xfc00e720, "E,X,v", pa11},
+{ "fmpyadd", 0x18000000, 0xfc000000, "H4,6,7,9,8", pa11},
+{ "fmpysub", 0x98000000, 0xfc000000, "H4,6,7,9,8", pa11},
+{ "ftest", 0x30002420, 0xffffffff, "", pa10},
+{ "fid", 0x30000000, 0xffffffff, "", pa11},
+
+
+/* Assist Instructions */
+
+{ "spop0", 0x10000000, 0xfc000600, "f,ON", pa10},
+{ "spop1", 0x10000200, 0xfc000600, "f,oNt", pa10},
+{ "spop2", 0x10000400, 0xfc000600, "f,1Nb", pa10},
+{ "spop3", 0x10000600, 0xfc000600, "f,0Nx,b", pa10},
+{ "copr", 0x30000000, 0xfc000000, "u,2N", pa10},
+{ "cldwx", 0x24000000, 0xfc001e00, "ucx(s,b),t", pa10},
+{ "cldwx", 0x24000000, 0xfc001e00, "ucx(b),t", pa10},
+{ "clddx", 0x2c000000, 0xfc001e00, "ucx(s,b),t", pa10},
+{ "clddx", 0x2c000000, 0xfc001e00, "ucx(b),t", pa10},
+{ "cstwx", 0x24000200, 0xfc001e00, "uct,x(s,b)", pa10},
+{ "cstwx", 0x24000200, 0xfc001e00, "uct,x(b)", pa10},
+{ "cstdx", 0x2c000200, 0xfc001e00, "uct,x(s,b)", pa10},
+{ "cstdx", 0x2c000200, 0xfc001e00, "uct,x(b)", pa10},
+{ "cldws", 0x24001000, 0xfc001e00, "uC5(s,b),t", pa10},
+{ "cldws", 0x24001000, 0xfc001e00, "uC5(b),t", pa10},
+{ "cldds", 0x2c001000, 0xfc001e00, "uC5(s,b),t", pa10},
+{ "cldds", 0x2c001000, 0xfc001e00, "uC5(b),t", pa10},
+{ "cstws", 0x24001200, 0xfc001e00, "uCt,5(s,b)", pa10},
+{ "cstws", 0x24001200, 0xfc001e00, "uCt,5(b)", pa10},
+{ "cstds", 0x2c001200, 0xfc001e00, "uCt,5(s,b)", pa10},
+{ "cstds", 0x2c001200, 0xfc001e00, "uCt,5(b)", pa10},
+};
+
+#define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
+
+/* SKV 12/18/92. Added some denotations for various operands. */
+
+#define PA_IMM11_AT_31 'i'
+#define PA_IMM14_AT_31 'j'
+#define PA_IMM21_AT_31 'k'
+#define PA_DISP12 'w'
+#define PA_DISP17 'W'
+
+#define N_HPPA_OPERAND_FORMATS 5
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
new file mode 100644
index 0000000..ef8fece
--- /dev/null
+++ b/include/opcode/i386.h
@@ -0,0 +1,1063 @@
+/* opcode/i386.h -- Intel 80386 opcode table
+ Copyright 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999 Free Software Foundation.
+
+This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The UnixWare assembler, and probably other AT&T derived ix86 Unix
+ assemblers, generate floating point instructions with reversed
+ source and destination registers in certain cases. Unfortunately,
+ gcc and possibly many other programs use this reversed syntax, so
+ we're stuck with it.
+
+ eg. `fsub %st(3),%st' results in st <- st - st(3) as expected, but
+ `fsub %st,%st(3)' results in st(3) <- st - st(3), rather than
+ the expected st(3) <- st(3) - st !
+
+ This happens with all the non-commutative arithmetic floating point
+ operations with two register operands, where the source register is
+ %st, and destination register is %st(i). Look for FloatDR below. */
+
+#ifndef UNIXWARE_COMPAT
+/* Set non-zero for broken, compatible instructions. Set to zero for
+ non-broken opcodes at your peril. gcc generates UnixWare
+ compatible instructions. */
+#define UNIXWARE_COMPAT 1
+#endif
+
+
+static const template i386_optab[] = {
+
+#define X None
+#define ReverseModrm (ReverseRegRegmem|Modrm)
+#define NoSuf (No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf)
+#define b_Suf (No_wSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf)
+#define w_Suf (No_bSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf)
+#define l_Suf (No_bSuf|No_wSuf|No_sSuf|No_dSuf|No_xSuf)
+#define d_Suf (No_bSuf|No_wSuf|No_sSuf|No_lSuf|No_xSuf)
+#define x_Suf (No_bSuf|No_wSuf|No_sSuf|No_lSuf|No_dSuf)
+#define bw_Suf (No_lSuf|No_sSuf|No_dSuf|No_xSuf)
+#define bl_Suf (No_wSuf|No_sSuf|No_dSuf|No_xSuf)
+#define wl_Suf (No_bSuf|No_sSuf|No_dSuf|No_xSuf)
+#define sl_Suf (No_bSuf|No_wSuf|No_dSuf|No_xSuf)
+#define sld_Suf (No_bSuf|No_wSuf|No_xSuf)
+#define sldx_Suf (No_bSuf|No_wSuf)
+#define bwl_Suf (No_sSuf|No_dSuf|No_xSuf)
+#define bwld_Suf (No_sSuf|No_xSuf)
+#define FP (NoSuf|IgnoreSize)
+#define l_FP (l_Suf|IgnoreSize)
+#define d_FP (d_Suf|IgnoreSize)
+#define x_FP (x_Suf|IgnoreSize)
+#define sl_FP (sl_Suf|IgnoreSize)
+#define sld_FP (sld_Suf|IgnoreSize)
+#define sldx_FP (sldx_Suf|IgnoreSize)
+#if UNIXWARE_COMPAT
+#define FloatDR FloatD
+#else
+#define FloatDR (FloatD|FloatR)
+#endif
+
+/* move instructions */
+#define MOV_AX_DISP32 0xa0
+{ "mov", 2, 0xa0, X, bwl_Suf|D|W, { Disp16|Disp32, Acc, 0 } },
+{ "mov", 2, 0x88, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0 } },
+{ "mov", 2, 0xb0, X, bwl_Suf|W|ShortForm, { Imm, Reg, 0 } },
+{ "mov", 2, 0xc6, X, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0 } },
+/* The next two instructions accept WordReg so that a segment register
+ can be copied to a 32 bit register, and vice versa, without using a
+ size prefix. When moving to a 32 bit register, the upper 16 bits
+ are set to an implementation defined value (on the Pentium Pro,
+ the implementation defined value is zero). */
+{ "mov", 2, 0x8c, X, wl_Suf|Modrm, { SReg3|SReg2, WordReg|WordMem, 0 } },
+{ "mov", 2, 0x8e, X, wl_Suf|Modrm|IgnoreSize, { WordReg|WordMem, SReg3|SReg2, 0 } },
+/* move to/from control debug registers */
+{ "mov", 2, 0x0f20, X, l_Suf|D|Modrm|IgnoreSize, { Control, Reg32, 0} },
+{ "mov", 2, 0x0f21, X, l_Suf|D|Modrm|IgnoreSize, { Debug, Reg32, 0} },
+{ "mov", 2, 0x0f24, X, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32, 0} },
+
+/* move with sign extend */
+/* "movsbl" & "movsbw" must not be unified into "movsb" to avoid
+ conflict with the "movs" string move instruction. */
+{"movsbl", 2, 0x0fbe, X, NoSuf|ReverseModrm, { Reg8|ByteMem, Reg32, 0} },
+{"movsbw", 2, 0x0fbe, X, NoSuf|ReverseModrm, { Reg8|ByteMem, Reg16, 0} },
+{"movswl", 2, 0x0fbf, X, NoSuf|ReverseModrm, { Reg16|ShortMem, Reg32, 0} },
+/* Intel Syntax */
+{"movsx", 2, 0x0fbf, X, w_Suf|ReverseModrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} },
+{"movsx", 2, 0x0fbe, X, b_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} },
+
+/* move with zero extend */
+{"movzb", 2, 0x0fb6, X, wl_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} },
+{"movzwl", 2, 0x0fb7, X, NoSuf|ReverseModrm, { Reg16|ShortMem, Reg32, 0} },
+/* Intel Syntax */
+{"movzx", 2, 0x0fb7, X, w_Suf|ReverseModrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} },
+{"movzx", 2, 0x0fb6, X, b_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} },
+
+/* push instructions */
+{"push", 1, 0x50, X, wl_Suf|ShortForm, { WordReg,0,0 } },
+{"push", 1, 0xff, 6, wl_Suf|Modrm, { WordReg|WordMem, 0, 0 } },
+{"push", 1, 0x6a, X, wl_Suf, { Imm8S, 0, 0} },
+{"push", 1, 0x68, X, wl_Suf, { Imm16|Imm32, 0, 0} },
+{"push", 1, 0x06, X, wl_Suf|Seg2ShortForm, { SReg2,0,0 } },
+{"push", 1, 0x0fa0, X, wl_Suf|Seg3ShortForm, { SReg3,0,0 } },
+/* push all */
+{"pusha", 0, 0x60, X, wl_Suf, { 0, 0, 0 } },
+
+/* pop instructions */
+{"pop", 1, 0x58, X, wl_Suf|ShortForm, { WordReg,0,0 } },
+{"pop", 1, 0x8f, 0, wl_Suf|Modrm, { WordReg|WordMem, 0, 0 } },
+#define POP_SEG_SHORT 0x07
+{"pop", 1, 0x07, X, wl_Suf|Seg2ShortForm, { SReg2,0,0 } },
+{"pop", 1, 0x0fa1, X, wl_Suf|Seg3ShortForm, { SReg3,0,0 } },
+/* pop all */
+{"popa", 0, 0x61, X, wl_Suf, { 0, 0, 0 } },
+
+/* xchg exchange instructions
+ xchg commutes: we allow both operand orders */
+{"xchg", 2, 0x90, X, wl_Suf|ShortForm, { WordReg, Acc, 0 } },
+{"xchg", 2, 0x90, X, wl_Suf|ShortForm, { Acc, WordReg, 0 } },
+{"xchg", 2, 0x86, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } },
+{"xchg", 2, 0x86, X, bwl_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } },
+
+/* in/out from ports */
+{"in", 2, 0xe4, X, bwl_Suf|W, { Imm8, Acc, 0 } },
+{"in", 2, 0xec, X, bwl_Suf|W, { InOutPortReg, Acc, 0 } },
+{"in", 1, 0xe4, X, bwl_Suf|W, { Imm8, 0, 0 } },
+{"in", 1, 0xec, X, bwl_Suf|W, { InOutPortReg, 0, 0 } },
+{"out", 2, 0xe6, X, bwl_Suf|W, { Acc, Imm8, 0 } },
+{"out", 2, 0xee, X, bwl_Suf|W, { Acc, InOutPortReg, 0 } },
+{"out", 1, 0xe6, X, bwl_Suf|W, { Imm8, 0, 0 } },
+{"out", 1, 0xee, X, bwl_Suf|W, { InOutPortReg, 0, 0 } },
+
+/* load effective address */
+{"lea", 2, 0x8d, X, wl_Suf|Modrm, { WordMem, WordReg, 0 } },
+
+/* load segment registers from memory */
+{"lds", 2, 0xc5, X, wl_Suf|Modrm, { WordMem, WordReg, 0} },
+{"les", 2, 0xc4, X, wl_Suf|Modrm, { WordMem, WordReg, 0} },
+{"lfs", 2, 0x0fb4, X, wl_Suf|Modrm, { WordMem, WordReg, 0} },
+{"lgs", 2, 0x0fb5, X, wl_Suf|Modrm, { WordMem, WordReg, 0} },
+{"lss", 2, 0x0fb2, X, wl_Suf|Modrm, { WordMem, WordReg, 0} },
+
+/* flags register instructions */
+{"clc", 0, 0xf8, X, NoSuf, { 0, 0, 0} },
+{"cld", 0, 0xfc, X, NoSuf, { 0, 0, 0} },
+{"cli", 0, 0xfa, X, NoSuf, { 0, 0, 0} },
+{"clts", 0, 0x0f06, X, NoSuf, { 0, 0, 0} },
+{"cmc", 0, 0xf5, X, NoSuf, { 0, 0, 0} },
+{"lahf", 0, 0x9f, X, NoSuf, { 0, 0, 0} },
+{"sahf", 0, 0x9e, X, NoSuf, { 0, 0, 0} },
+{"pushf", 0, 0x9c, X, wl_Suf, { 0, 0, 0} },
+{"popf", 0, 0x9d, X, wl_Suf, { 0, 0, 0} },
+{"stc", 0, 0xf9, X, NoSuf, { 0, 0, 0} },
+{"std", 0, 0xfd, X, NoSuf, { 0, 0, 0} },
+{"sti", 0, 0xfb, X, NoSuf, { 0, 0, 0} },
+
+/* arithmetic */
+{"add", 2, 0x00, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"add", 2, 0x83, 0, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"add", 2, 0x04, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"add", 2, 0x80, 0, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"inc", 1, 0x40, X, wl_Suf|ShortForm, { WordReg, 0, 0} },
+{"inc", 1, 0xfe, 0, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"sub", 2, 0x28, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"sub", 2, 0x83, 5, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"sub", 2, 0x2c, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"sub", 2, 0x80, 5, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"dec", 1, 0x48, X, wl_Suf|ShortForm, { WordReg, 0, 0} },
+{"dec", 1, 0xfe, 1, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"sbb", 2, 0x18, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"sbb", 2, 0x83, 3, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"sbb", 2, 0x1c, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"sbb", 2, 0x80, 3, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"cmp", 2, 0x38, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"cmp", 2, 0x83, 7, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"cmp", 2, 0x3c, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"cmp", 2, 0x80, 7, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"test", 2, 0x84, X, bwl_Suf|W|Modrm, { Reg|AnyMem, Reg, 0} },
+{"test", 2, 0x84, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"test", 2, 0xa8, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"test", 2, 0xf6, 0, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"and", 2, 0x20, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"and", 2, 0x83, 4, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"and", 2, 0x24, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"and", 2, 0x80, 4, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"or", 2, 0x08, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"or", 2, 0x83, 1, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"or", 2, 0x0c, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"or", 2, 0x80, 1, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"xor", 2, 0x30, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"xor", 2, 0x83, 6, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"xor", 2, 0x34, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"xor", 2, 0x80, 6, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+/* iclr with 1 operand is really xor with 2 operands. */
+{"clr", 1, 0x30, X, bwl_Suf|W|Modrm|regKludge, { Reg, 0, 0 } },
+
+{"adc", 2, 0x10, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} },
+{"adc", 2, 0x83, 2, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} },
+{"adc", 2, 0x14, X, bwl_Suf|W, { Imm, Acc, 0} },
+{"adc", 2, 0x80, 2, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} },
+
+{"neg", 1, 0xf6, 3, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+{"not", 1, 0xf6, 2, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"aaa", 0, 0x37, X, NoSuf, { 0, 0, 0} },
+{"aas", 0, 0x3f, X, NoSuf, { 0, 0, 0} },
+{"daa", 0, 0x27, X, NoSuf, { 0, 0, 0} },
+{"das", 0, 0x2f, X, NoSuf, { 0, 0, 0} },
+{"aad", 0, 0xd50a, X, NoSuf, { 0, 0, 0} },
+{"aad", 1, 0xd5, X, NoSuf, { Imm8S, 0, 0} },
+{"aam", 0, 0xd40a, X, NoSuf, { 0, 0, 0} },
+{"aam", 1, 0xd4, X, NoSuf, { Imm8S, 0, 0} },
+
+/* conversion insns */
+/* conversion: intel naming */
+{"cbw", 0, 0x98, X, NoSuf|Size16, { 0, 0, 0} },
+{"cwde", 0, 0x98, X, NoSuf|Size32, { 0, 0, 0} },
+{"cwd", 0, 0x99, X, NoSuf|Size16, { 0, 0, 0} },
+{"cdq", 0, 0x99, X, NoSuf|Size32, { 0, 0, 0} },
+/* att naming */
+{"cbtw", 0, 0x98, X, NoSuf|Size16, { 0, 0, 0} },
+{"cwtl", 0, 0x98, X, NoSuf|Size32, { 0, 0, 0} },
+{"cwtd", 0, 0x99, X, NoSuf|Size16, { 0, 0, 0} },
+{"cltd", 0, 0x99, X, NoSuf|Size32, { 0, 0, 0} },
+
+/* Warning! the mul/imul (opcode 0xf6) must only have 1 operand! They are
+ expanding 64-bit multiplies, and *cannot* be selected to accomplish
+ 'imul %ebx, %eax' (opcode 0x0faf must be used in this case)
+ These multiplies can only be selected with single operand forms. */
+{"mul", 1, 0xf6, 4, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+{"imul", 1, 0xf6, 5, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+{"imul", 2, 0x0faf, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"imul", 3, 0x6b, X, wl_Suf|ReverseModrm, { Imm8S, WordReg|WordMem, WordReg} },
+{"imul", 3, 0x69, X, wl_Suf|ReverseModrm, { Imm16|Imm32, WordReg|WordMem, WordReg} },
+/* imul with 2 operands mimics imul with 3 by putting the register in
+ both i.rm.reg & i.rm.regmem fields. regKludge enables this
+ transformation. */
+{"imul", 2, 0x6b, X, wl_Suf|Modrm|regKludge,{ Imm8S, WordReg, 0} },
+{"imul", 2, 0x69, X, wl_Suf|Modrm|regKludge,{ Imm16|Imm32, WordReg, 0} },
+
+{"div", 1, 0xf6, 6, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+{"div", 2, 0xf6, 6, bwl_Suf|W|Modrm, { Reg|AnyMem, Acc, 0} },
+{"idiv", 1, 0xf6, 7, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+{"idiv", 2, 0xf6, 7, bwl_Suf|W|Modrm, { Reg|AnyMem, Acc, 0} },
+
+{"rol", 2, 0xd0, 0, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"rol", 2, 0xc0, 0, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"rol", 2, 0xd2, 0, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"rol", 1, 0xd0, 0, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"ror", 2, 0xd0, 1, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"ror", 2, 0xc0, 1, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"ror", 2, 0xd2, 1, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"ror", 1, 0xd0, 1, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"rcl", 2, 0xd0, 2, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"rcl", 2, 0xc0, 2, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"rcl", 2, 0xd2, 2, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"rcl", 1, 0xd0, 2, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"rcr", 2, 0xd0, 3, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"rcr", 2, 0xc0, 3, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"rcr", 2, 0xd2, 3, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"rcr", 1, 0xd0, 3, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"sal", 2, 0xd0, 4, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"sal", 2, 0xc0, 4, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"sal", 2, 0xd2, 4, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"sal", 1, 0xd0, 4, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+{"shl", 2, 0xd0, 4, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"shl", 2, 0xc0, 4, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"shl", 2, 0xd2, 4, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"shl", 1, 0xd0, 4, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"shld", 3, 0x0fa4, X, wl_Suf|Modrm, { Imm8, WordReg, WordReg|WordMem} },
+{"shld", 3, 0x0fa5, X, wl_Suf|Modrm, { ShiftCount, WordReg, WordReg|WordMem} },
+{"shld", 2, 0x0fa5, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} },
+
+{"shr", 2, 0xd0, 5, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"shr", 2, 0xc0, 5, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"shr", 2, 0xd2, 5, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"shr", 1, 0xd0, 5, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+{"shrd", 3, 0x0fac, X, wl_Suf|Modrm, { Imm8, WordReg, WordReg|WordMem} },
+{"shrd", 3, 0x0fad, X, wl_Suf|Modrm, { ShiftCount, WordReg, WordReg|WordMem} },
+{"shrd", 2, 0x0fad, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} },
+
+{"sar", 2, 0xd0, 7, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} },
+{"sar", 2, 0xc0, 7, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} },
+{"sar", 2, 0xd2, 7, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} },
+{"sar", 1, 0xd0, 7, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} },
+
+/* control transfer instructions */
+{"call", 1, 0xe8, X, wl_Suf|JumpDword, { Disp16|Disp32, 0, 0} },
+{"call", 1, 0xff, 2, wl_Suf|Modrm, { WordReg|WordMem|JumpAbsolute, 0, 0} },
+/* Intel Syntax */
+{"call", 2, 0x9a, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
+{"lcall", 2, 0x9a, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
+{"lcall", 1, 0xff, 3, wl_Suf|Modrm, { WordMem, 0, 0} },
+
+#define JUMP_PC_RELATIVE 0xeb
+{"jmp", 1, 0xeb, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jmp", 1, 0xff, 4, wl_Suf|Modrm, { WordReg|WordMem|JumpAbsolute, 0, 0} },
+/* Intel Syntax */
+{"jmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
+{"jmp", 1, 0xff, 5, wl_Suf|Modrm, { WordMem, 0, 0} },
+{"ljmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} },
+{"ljmp", 1, 0xff, 5, wl_Suf|Modrm, { WordMem, 0, 0} },
+
+{"ret", 0, 0xc3, X, wl_Suf, { 0, 0, 0} },
+{"ret", 1, 0xc2, X, wl_Suf, { Imm16, 0, 0} },
+{"lret", 0, 0xcb, X, wl_Suf, { 0, 0, 0} },
+{"lret", 1, 0xca, X, wl_Suf, { Imm16, 0, 0} },
+{"enter", 2, 0xc8, X, wl_Suf, { Imm16, Imm8, 0} },
+{"leave", 0, 0xc9, X, wl_Suf, { 0, 0, 0} },
+
+/* conditional jumps */
+{"jo", 1, 0x70, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jno", 1, 0x71, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jb", 1, 0x72, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jc", 1, 0x72, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnae", 1, 0x72, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnb", 1, 0x73, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnc", 1, 0x73, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jae", 1, 0x73, X, NoSuf|Jump, { Disp, 0, 0} },
+{"je", 1, 0x74, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jz", 1, 0x74, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jne", 1, 0x75, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnz", 1, 0x75, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jbe", 1, 0x76, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jna", 1, 0x76, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnbe", 1, 0x77, X, NoSuf|Jump, { Disp, 0, 0} },
+{"ja", 1, 0x77, X, NoSuf|Jump, { Disp, 0, 0} },
+{"js", 1, 0x78, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jns", 1, 0x79, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jp", 1, 0x7a, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jpe", 1, 0x7a, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnp", 1, 0x7b, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jpo", 1, 0x7b, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jl", 1, 0x7c, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnge", 1, 0x7c, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnl", 1, 0x7d, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jge", 1, 0x7d, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jle", 1, 0x7e, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jng", 1, 0x7e, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jnle", 1, 0x7f, X, NoSuf|Jump, { Disp, 0, 0} },
+{"jg", 1, 0x7f, X, NoSuf|Jump, { Disp, 0, 0} },
+
+/* jcxz vs. jecxz is chosen on the basis of the address size prefix. */
+{"jcxz", 1, 0xe3, X, NoSuf|JumpByte|Size16, { Disp, 0, 0} },
+{"jecxz", 1, 0xe3, X, NoSuf|JumpByte|Size32, { Disp, 0, 0} },
+
+/* The loop instructions also use the address size prefix to select
+ %cx rather than %ecx for the loop count, so the `w' form of these
+ instructions emit an address size prefix rather than a data size
+ prefix. */
+{"loop", 1, 0xe2, X, wl_Suf|JumpByte, { Disp, 0, 0} },
+{"loopz", 1, 0xe1, X, wl_Suf|JumpByte, { Disp, 0, 0} },
+{"loope", 1, 0xe1, X, wl_Suf|JumpByte, { Disp, 0, 0} },
+{"loopnz", 1, 0xe0, X, wl_Suf|JumpByte, { Disp, 0, 0} },
+{"loopne", 1, 0xe0, X, wl_Suf|JumpByte, { Disp, 0, 0} },
+
+/* set byte on flag instructions */
+{"seto", 1, 0x0f90, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setno", 1, 0x0f91, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setb", 1, 0x0f92, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setc", 1, 0x0f92, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnae", 1, 0x0f92, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnb", 1, 0x0f93, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnc", 1, 0x0f93, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setae", 1, 0x0f93, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"sete", 1, 0x0f94, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setz", 1, 0x0f94, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setne", 1, 0x0f95, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnz", 1, 0x0f95, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setbe", 1, 0x0f96, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setna", 1, 0x0f96, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnbe", 1, 0x0f97, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"seta", 1, 0x0f97, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"sets", 1, 0x0f98, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setns", 1, 0x0f99, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setp", 1, 0x0f9a, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setpe", 1, 0x0f9a, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnp", 1, 0x0f9b, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setpo", 1, 0x0f9b, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setl", 1, 0x0f9c, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnge", 1, 0x0f9c, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnl", 1, 0x0f9d, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setge", 1, 0x0f9d, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setle", 1, 0x0f9e, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setng", 1, 0x0f9e, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setnle", 1, 0x0f9f, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+{"setg", 1, 0x0f9f, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} },
+
+/* string manipulation */
+{"cmps", 0, 0xa6, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"cmps", 2, 0xa6, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} },
+{"scmp", 0, 0xa6, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"scmp", 2, 0xa6, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} },
+{"ins", 0, 0x6c, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"ins", 2, 0x6c, X, bwld_Suf|W|IsString, { InOutPortReg, AnyMem|EsSeg, 0} },
+{"outs", 0, 0x6e, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"outs", 2, 0x6e, X, bwld_Suf|W|IsString, { AnyMem, InOutPortReg, 0} },
+{"lods", 0, 0xac, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"lods", 1, 0xac, X, bwld_Suf|W|IsString, { AnyMem, 0, 0} },
+{"lods", 2, 0xac, X, bwld_Suf|W|IsString, { AnyMem, Acc, 0} },
+{"slod", 0, 0xac, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"slod", 1, 0xac, X, bwld_Suf|W|IsString, { AnyMem, 0, 0} },
+{"slod", 2, 0xac, X, bwld_Suf|W|IsString, { AnyMem, Acc, 0} },
+{"movs", 0, 0xa4, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"movs", 2, 0xa4, X, bwld_Suf|W|IsString, { AnyMem, AnyMem|EsSeg, 0} },
+{"smov", 0, 0xa4, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"smov", 2, 0xa4, X, bwld_Suf|W|IsString, { AnyMem, AnyMem|EsSeg, 0} },
+{"scas", 0, 0xae, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"scas", 1, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} },
+{"scas", 2, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, Acc, 0} },
+{"ssca", 0, 0xae, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"ssca", 1, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} },
+{"ssca", 2, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, Acc, 0} },
+{"stos", 0, 0xaa, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"stos", 1, 0xaa, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} },
+{"stos", 2, 0xaa, X, bwld_Suf|W|IsString, { Acc, AnyMem|EsSeg, 0} },
+{"ssto", 0, 0xaa, X, bwld_Suf|W|IsString, { 0, 0, 0} },
+{"ssto", 1, 0xaa, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} },
+{"ssto", 2, 0xaa, X, bwld_Suf|W|IsString, { Acc, AnyMem|EsSeg, 0} },
+{"xlat", 0, 0xd7, X, b_Suf|IsString, { 0, 0, 0} },
+{"xlat", 1, 0xd7, X, b_Suf|IsString, { AnyMem, 0, 0} },
+
+/* bit manipulation */
+{"bsf", 2, 0x0fbc, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"bsr", 2, 0x0fbd, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"bt", 2, 0x0fa3, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} },
+{"bt", 2, 0x0fba, 4, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} },
+{"btc", 2, 0x0fbb, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} },
+{"btc", 2, 0x0fba, 7, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} },
+{"btr", 2, 0x0fb3, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} },
+{"btr", 2, 0x0fba, 6, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} },
+{"bts", 2, 0x0fab, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} },
+{"bts", 2, 0x0fba, 5, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} },
+
+/* interrupts & op. sys insns */
+/* See gas/config/tc-i386.c for conversion of 'int $3' into the special
+ int 3 insn. */
+#define INT_OPCODE 0xcd
+#define INT3_OPCODE 0xcc
+{"int", 1, 0xcd, X, NoSuf, { Imm8, 0, 0} },
+{"int3", 0, 0xcc, X, NoSuf, { 0, 0, 0} },
+{"into", 0, 0xce, X, NoSuf, { 0, 0, 0} },
+{"iret", 0, 0xcf, X, wl_Suf, { 0, 0, 0} },
+/* i386sl, i486sl, later 486, and Pentium */
+{"rsm", 0, 0x0faa, X, NoSuf, { 0, 0, 0} },
+
+{"bound", 2, 0x62, X, wl_Suf|Modrm, { WordReg, WordMem, 0} },
+
+{"hlt", 0, 0xf4, X, NoSuf, { 0, 0, 0} },
+/* nop is actually 'xchgl %eax, %eax' */
+{"nop", 0, 0x90, X, NoSuf, { 0, 0, 0} },
+
+/* protection control */
+{"arpl", 2, 0x63, X, NoSuf|Modrm|IgnoreSize,{ Reg16, Reg16|ShortMem, 0} },
+{"lar", 2, 0x0f02, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"lgdt", 1, 0x0f01, 2, wl_Suf|Modrm, { WordMem, 0, 0} },
+{"lidt", 1, 0x0f01, 3, wl_Suf|Modrm, { WordMem, 0, 0} },
+{"lldt", 1, 0x0f00, 2, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
+{"lmsw", 1, 0x0f01, 6, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
+{"lsl", 2, 0x0f03, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"ltr", 1, 0x0f00, 3, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
+
+{"sgdt", 1, 0x0f01, 0, wl_Suf|Modrm, { WordMem, 0, 0} },
+{"sidt", 1, 0x0f01, 1, wl_Suf|Modrm, { WordMem, 0, 0} },
+{"sldt", 1, 0x0f00, 0, wl_Suf|Modrm, { WordReg|WordMem, 0, 0} },
+{"smsw", 1, 0x0f01, 4, wl_Suf|Modrm, { WordReg|WordMem, 0, 0} },
+{"str", 1, 0x0f00, 1, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
+
+{"verr", 1, 0x0f00, 4, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
+{"verw", 1, 0x0f00, 5, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} },
+
+/* floating point instructions */
+
+/* load */
+{"fld", 1, 0xd9c0, X, FP|ShortForm, { FloatReg, 0, 0} }, /* register */
+{"fld", 1, 0xd9, 0, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* %st0 <-- mem float/double */
+{"fld", 1, 0xd9c0, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} },
+/* Intel Syntax */
+{"fld", 1, 0xdb, 5, x_FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem efloat */
+{"fild", 1, 0xdf, 0, sl_Suf|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* %st0 <-- mem word(16)/dword(32) */
+/* Intel Syntax */
+{"fild", 1, 0xdf, 5, d_Suf|IgnoreSize|Modrm,{ LLongMem, 0, 0} }, /* %st0 <-- mem qword (64) */
+{"fildq", 1, 0xdf, 5, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem qword (64) */
+{"fildll", 1, 0xdf, 5, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem qword (64) */
+{"fldt", 1, 0xdb, 5, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem efloat */
+{"fbld", 1, 0xdf, 4, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem bcd */
+
+/* store (no pop) */
+{"fst", 1, 0xddd0, X, FP|ShortForm, { FloatReg, 0, 0} }, /* register */
+{"fst", 1, 0xd9, 2, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* %st0 --> mem float/double */
+{"fst", 1, 0xddd0, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} },
+{"fist", 1, 0xdf, 2, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* %st0 --> mem word(16)/dword(32) */
+
+/* store (with pop) */
+{"fstp", 1, 0xddd8, X, FP|ShortForm, { FloatReg, 0, 0} }, /* register */
+{"fstp", 1, 0xd9, 3, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* %st0 --> mem float/double */
+{"fstp", 1, 0xddd8, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} },
+/* Intel Syntax */
+{"fstp", 1, 0xdb, 7, x_FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem efloat */
+{"fistp", 1, 0xdf, 3, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* %st0 --> mem word(16)/dword(32) */
+/* Intel Syntax */
+{"fistp", 1, 0xdf, 7, d_FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem qword (64) */
+{"fistpq", 1, 0xdf, 7, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem qword (64) */
+{"fistpll",1, 0xdf, 7, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem qword (64) */
+{"fstpt", 1, 0xdb, 7, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem efloat */
+{"fbstp", 1, 0xdf, 6, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem bcd */
+
+/* exchange %st<n> with %st0 */
+{"fxch", 1, 0xd9c8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fxch", 0, 0xd9c9, X, FP, { 0, 0, 0} }, /* alias for fxch %st(1) */
+
+/* comparison (without pop) */
+{"fcom", 1, 0xd8d0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fcom", 0, 0xd8d1, X, FP, { 0, 0, 0} }, /* alias for fcom %st(1) */
+{"fcom", 1, 0xd8, 2, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* compare %st0, mem float/double */
+{"fcom", 1, 0xd8d0, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} },
+{"ficom", 1, 0xde, 2, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* compare %st0, mem word/dword */
+
+/* comparison (with pop) */
+{"fcomp", 1, 0xd8d8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fcomp", 0, 0xd8d9, X, FP, { 0, 0, 0} }, /* alias for fcomp %st(1) */
+{"fcomp", 1, 0xd8, 3, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* compare %st0, mem float/double */
+{"fcomp", 1, 0xd8d8, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} },
+{"ficomp", 1, 0xde, 3, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* compare %st0, mem word/dword */
+{"fcompp", 0, 0xded9, X, FP, { 0, 0, 0} }, /* compare %st0, %st1 & pop 2 */
+
+/* unordered comparison (with pop) */
+{"fucom", 1, 0xdde0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fucom", 0, 0xdde1, X, FP, { 0, 0, 0} }, /* alias for fucom %st(1) */
+{"fucomp", 1, 0xdde8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fucomp", 0, 0xdde9, X, FP, { 0, 0, 0} }, /* alias for fucomp %st(1) */
+{"fucompp",0, 0xdae9, X, FP, { 0, 0, 0} }, /* ucompare %st0, %st1 & pop twice */
+
+{"ftst", 0, 0xd9e4, X, FP, { 0, 0, 0} }, /* test %st0 */
+{"fxam", 0, 0xd9e5, X, FP, { 0, 0, 0} }, /* examine %st0 */
+
+/* load constants into %st0 */
+{"fld1", 0, 0xd9e8, X, FP, { 0, 0, 0} }, /* %st0 <-- 1.0 */
+{"fldl2t", 0, 0xd9e9, X, FP, { 0, 0, 0} }, /* %st0 <-- log2(10) */
+{"fldl2e", 0, 0xd9ea, X, FP, { 0, 0, 0} }, /* %st0 <-- log2(e) */
+{"fldpi", 0, 0xd9eb, X, FP, { 0, 0, 0} }, /* %st0 <-- pi */
+{"fldlg2", 0, 0xd9ec, X, FP, { 0, 0, 0} }, /* %st0 <-- log10(2) */
+{"fldln2", 0, 0xd9ed, X, FP, { 0, 0, 0} }, /* %st0 <-- ln(2) */
+{"fldz", 0, 0xd9ee, X, FP, { 0, 0, 0} }, /* %st0 <-- 0.0 */
+
+/* arithmetic */
+
+/* add */
+{"fadd", 2, 0xd8c0, X, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
+{"fadd", 1, 0xd8c0, X, FP|ShortForm, { FloatReg, 0, 0} }, /* alias for fadd %st(i), %st */
+#if UNIXWARE_COMPAT
+{"fadd", 0, 0xdec1, X, FP|Ugh, { 0, 0, 0} }, /* alias for faddp */
+#endif
+{"fadd", 1, 0xd8, 0, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} },
+{"fiadd", 1, 0xde, 0, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} },
+
+{"faddp", 2, 0xdec0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"faddp", 1, 0xdec0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"faddp", 0, 0xdec1, X, FP, { 0, 0, 0} }, /* alias for faddp %st, %st(1) */
+{"faddp", 2, 0xdec0, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
+
+/* subtract */
+{"fsub", 2, 0xd8e0, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
+{"fsub", 1, 0xd8e0, X, FP|ShortForm, { FloatReg, 0, 0} },
+#if UNIXWARE_COMPAT
+{"fsub", 0, 0xdee1, X, FP|Ugh, { 0, 0, 0} }, /* alias for fsubp */
+#endif
+{"fsub", 1, 0xd8, 4, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} },
+{"fisub", 1, 0xde, 4, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} },
+
+#if UNIXWARE_COMPAT
+{"fsubp", 2, 0xdee0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubp", 1, 0xdee0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fsubp", 0, 0xdee1, X, FP, { 0, 0, 0} },
+{"fsubp", 2, 0xdee0, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
+#else
+{"fsubp", 2, 0xdee8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubp", 1, 0xdee8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fsubp", 0, 0xdee9, X, FP, { 0, 0, 0} },
+#endif
+
+/* subtract reverse */
+{"fsubr", 2, 0xd8e8, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
+{"fsubr", 1, 0xd8e8, X, FP|ShortForm, { FloatReg, 0, 0} },
+#if UNIXWARE_COMPAT
+{"fsubr", 0, 0xdee9, X, FP|Ugh, { 0, 0, 0} }, /* alias for fsubrp */
+#endif
+{"fsubr", 1, 0xd8, 5, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} },
+{"fisubr", 1, 0xde, 5, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} },
+
+#if UNIXWARE_COMPAT
+{"fsubrp", 2, 0xdee8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubrp", 1, 0xdee8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fsubrp", 0, 0xdee9, X, FP, { 0, 0, 0} },
+{"fsubrp", 2, 0xdee8, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
+#else
+{"fsubrp", 2, 0xdee0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubrp", 1, 0xdee0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fsubrp", 0, 0xdee1, X, FP, { 0, 0, 0} },
+#endif
+
+/* multiply */
+{"fmul", 2, 0xd8c8, X, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
+{"fmul", 1, 0xd8c8, X, FP|ShortForm, { FloatReg, 0, 0} },
+#if UNIXWARE_COMPAT
+{"fmul", 0, 0xdec9, X, FP|Ugh, { 0, 0, 0} }, /* alias for fmulp */
+#endif
+{"fmul", 1, 0xd8, 1, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} },
+{"fimul", 1, 0xde, 1, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} },
+
+{"fmulp", 2, 0xdec8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fmulp", 1, 0xdec8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fmulp", 0, 0xdec9, X, FP, { 0, 0, 0} },
+{"fmulp", 2, 0xdec8, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
+
+/* divide */
+{"fdiv", 2, 0xd8f0, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
+{"fdiv", 1, 0xd8f0, X, FP|ShortForm, { FloatReg, 0, 0} },
+#if UNIXWARE_COMPAT
+{"fdiv", 0, 0xdef1, X, FP|Ugh, { 0, 0, 0} }, /* alias for fdivp */
+#endif
+{"fdiv", 1, 0xd8, 6, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} },
+{"fidiv", 1, 0xde, 6, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} },
+
+#if UNIXWARE_COMPAT
+{"fdivp", 2, 0xdef0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivp", 1, 0xdef0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fdivp", 0, 0xdef1, X, FP, { 0, 0, 0} },
+{"fdivp", 2, 0xdef0, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
+#else
+{"fdivp", 2, 0xdef8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivp", 1, 0xdef8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fdivp", 0, 0xdef9, X, FP, { 0, 0, 0} },
+#endif
+
+/* divide reverse */
+{"fdivr", 2, 0xd8f8, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
+{"fdivr", 1, 0xd8f8, X, FP|ShortForm, { FloatReg, 0, 0} },
+#if UNIXWARE_COMPAT
+{"fdivr", 0, 0xdef9, X, FP|Ugh, { 0, 0, 0} }, /* alias for fdivrp */
+#endif
+{"fdivr", 1, 0xd8, 7, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} },
+{"fidivr", 1, 0xde, 7, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} },
+
+#if UNIXWARE_COMPAT
+{"fdivrp", 2, 0xdef8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivrp", 1, 0xdef8, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fdivrp", 0, 0xdef9, X, FP, { 0, 0, 0} },
+{"fdivrp", 2, 0xdef8, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
+#else
+{"fdivrp", 2, 0xdef0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivrp", 1, 0xdef0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fdivrp", 0, 0xdef1, X, FP, { 0, 0, 0} },
+#endif
+
+{"f2xm1", 0, 0xd9f0, X, FP, { 0, 0, 0} },
+{"fyl2x", 0, 0xd9f1, X, FP, { 0, 0, 0} },
+{"fptan", 0, 0xd9f2, X, FP, { 0, 0, 0} },
+{"fpatan", 0, 0xd9f3, X, FP, { 0, 0, 0} },
+{"fxtract",0, 0xd9f4, X, FP, { 0, 0, 0} },
+{"fprem1", 0, 0xd9f5, X, FP, { 0, 0, 0} },
+{"fdecstp",0, 0xd9f6, X, FP, { 0, 0, 0} },
+{"fincstp",0, 0xd9f7, X, FP, { 0, 0, 0} },
+{"fprem", 0, 0xd9f8, X, FP, { 0, 0, 0} },
+{"fyl2xp1",0, 0xd9f9, X, FP, { 0, 0, 0} },
+{"fsqrt", 0, 0xd9fa, X, FP, { 0, 0, 0} },
+{"fsincos",0, 0xd9fb, X, FP, { 0, 0, 0} },
+{"frndint",0, 0xd9fc, X, FP, { 0, 0, 0} },
+{"fscale", 0, 0xd9fd, X, FP, { 0, 0, 0} },
+{"fsin", 0, 0xd9fe, X, FP, { 0, 0, 0} },
+{"fcos", 0, 0xd9ff, X, FP, { 0, 0, 0} },
+{"fchs", 0, 0xd9e0, X, FP, { 0, 0, 0} },
+{"fabs", 0, 0xd9e1, X, FP, { 0, 0, 0} },
+
+/* processor control */
+{"fninit", 0, 0xdbe3, X, FP, { 0, 0, 0} },
+{"finit", 0, 0xdbe3, X, FP|FWait, { 0, 0, 0} },
+{"fldcw", 1, 0xd9, 5, FP|Modrm, { ShortMem, 0, 0} },
+{"fnstcw", 1, 0xd9, 7, FP|Modrm, { ShortMem, 0, 0} },
+{"fstcw", 1, 0xd9, 7, FP|FWait|Modrm, { ShortMem, 0, 0} },
+{"fnstsw", 1, 0xdfe0, X, FP, { Acc, 0, 0} },
+{"fnstsw", 1, 0xdd, 7, FP|Modrm, { ShortMem, 0, 0} },
+{"fnstsw", 0, 0xdfe0, X, FP, { 0, 0, 0} },
+{"fstsw", 1, 0xdfe0, X, FP|FWait, { Acc, 0, 0} },
+{"fstsw", 1, 0xdd, 7, FP|FWait|Modrm, { ShortMem, 0, 0} },
+{"fstsw", 0, 0xdfe0, X, FP|FWait, { 0, 0, 0} },
+{"fnclex", 0, 0xdbe2, X, FP, { 0, 0, 0} },
+{"fclex", 0, 0xdbe2, X, FP|FWait, { 0, 0, 0} },
+/* Short forms of fldenv, fstenv use data size prefix.
+ FIXME: Are these the right suffixes? */
+{"fnstenv",1, 0xd9, 6, sl_Suf|Modrm, { LLongMem, 0, 0} },
+{"fstenv", 1, 0xd9, 6, sl_Suf|FWait|Modrm, { LLongMem, 0, 0} },
+{"fldenv", 1, 0xd9, 4, sl_Suf|Modrm, { LLongMem, 0, 0} },
+{"fnsave", 1, 0xdd, 6, sl_Suf|Modrm, { LLongMem, 0, 0} },
+{"fsave", 1, 0xdd, 6, sl_Suf|FWait|Modrm, { LLongMem, 0, 0} },
+{"frstor", 1, 0xdd, 4, sl_Suf|Modrm, { LLongMem, 0, 0} },
+
+{"ffree", 1, 0xddc0, X, FP|ShortForm, { FloatReg, 0, 0} },
+/* P6:free st(i), pop st */
+{"ffreep", 1, 0xdfc0, X, FP|ShortForm, { FloatReg, 0, 0} },
+{"fnop", 0, 0xd9d0, X, FP, { 0, 0, 0} },
+#define FWAIT_OPCODE 0x9b
+{"fwait", 0, 0x9b, X, FP, { 0, 0, 0} },
+
+/*
+ opcode prefixes; we allow them as seperate insns too
+*/
+#define ADDR_PREFIX_OPCODE 0x67
+{"addr16", 0, 0x67, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
+{"addr32", 0, 0x67, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
+{"aword", 0, 0x67, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
+{"adword", 0, 0x67, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
+#define DATA_PREFIX_OPCODE 0x66
+{"data16", 0, 0x66, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
+{"data32", 0, 0x66, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
+{"word", 0, 0x66, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} },
+{"dword", 0, 0x66, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} },
+#define LOCK_PREFIX_OPCODE 0xf0
+{"lock", 0, 0xf0, X, NoSuf|IsPrefix, { 0, 0, 0} },
+{"wait", 0, 0x9b, X, NoSuf|IsPrefix, { 0, 0, 0} },
+#define CS_PREFIX_OPCODE 0x2e
+{"cs", 0, 0x2e, X, NoSuf|IsPrefix, { 0, 0, 0} },
+#define DS_PREFIX_OPCODE 0x3e
+{"ds", 0, 0x3e, X, NoSuf|IsPrefix, { 0, 0, 0} },
+#define ES_PREFIX_OPCODE 0x26
+{"es", 0, 0x26, X, NoSuf|IsPrefix, { 0, 0, 0} },
+#define FS_PREFIX_OPCODE 0x64
+{"fs", 0, 0x64, X, NoSuf|IsPrefix, { 0, 0, 0} },
+#define GS_PREFIX_OPCODE 0x65
+{"gs", 0, 0x65, X, NoSuf|IsPrefix, { 0, 0, 0} },
+#define SS_PREFIX_OPCODE 0x36
+{"ss", 0, 0x36, X, NoSuf|IsPrefix, { 0, 0, 0} },
+#define REPNE_PREFIX_OPCODE 0xf2
+#define REPE_PREFIX_OPCODE 0xf3
+{"rep", 0, 0xf3, X, NoSuf|IsPrefix, { 0, 0, 0} },
+{"repe", 0, 0xf3, X, NoSuf|IsPrefix, { 0, 0, 0} },
+{"repz", 0, 0xf3, X, NoSuf|IsPrefix, { 0, 0, 0} },
+{"repne", 0, 0xf2, X, NoSuf|IsPrefix, { 0, 0, 0} },
+{"repnz", 0, 0xf2, X, NoSuf|IsPrefix, { 0, 0, 0} },
+
+/* 486 extensions */
+
+{"bswap", 1, 0x0fc8, X, NoSuf|ShortForm, { Reg32,0,0 } },
+{"xadd", 2, 0x0fc0, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } },
+{"cmpxchg", 2, 0x0fb0, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } },
+{"invd", 0, 0x0f08, X, NoSuf, { 0, 0, 0} },
+{"wbinvd", 0, 0x0f09, X, NoSuf, { 0, 0, 0} },
+{"invlpg", 1, 0x0f01, 7, NoSuf|Modrm, { AnyMem, 0, 0} },
+
+/* 586 and late 486 extensions */
+{"cpuid", 0, 0x0fa2, X, NoSuf, { 0, 0, 0} },
+
+/* Pentium extensions */
+{"wrmsr", 0, 0x0f30, X, NoSuf, { 0, 0, 0} },
+{"rdtsc", 0, 0x0f31, X, NoSuf, { 0, 0, 0} },
+{"rdmsr", 0, 0x0f32, X, NoSuf, { 0, 0, 0} },
+{"cmpxchg8b",1,0x0fc7, 1, NoSuf|Modrm, { LLongMem, 0, 0} },
+{"sysenter", 0, 0x0f34, X, NoSuf, { 0, 0, 0} },
+{"sysexit", 0, 0x0f35, X, NoSuf, { 0, 0, 0} },
+{"fxsave", 1, 0x0fae, 0, FP|Modrm, { LLongMem, 0, 0} },
+{"fxrstor", 1, 0x0fae, 1, FP|Modrm, { LLongMem, 0, 0} },
+
+/* Pentium Pro extensions */
+{"rdpmc", 0, 0x0f33, X, NoSuf, { 0, 0, 0} },
+
+{"ud2", 0, 0x0f0b, X, NoSuf, { 0, 0, 0} }, /* official undefined instr. */
+{"ud2a", 0, 0x0f0b, X, NoSuf, { 0, 0, 0} }, /* alias for ud2 */
+{"ud2b", 0, 0x0fb9, X, NoSuf, { 0, 0, 0} }, /* 2nd. official undefined instr. */
+
+{"cmovo", 2, 0x0f40, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovno", 2, 0x0f41, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovb", 2, 0x0f42, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovc", 2, 0x0f42, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnae", 2, 0x0f42, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovae", 2, 0x0f43, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnc", 2, 0x0f43, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnb", 2, 0x0f43, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmove", 2, 0x0f44, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovz", 2, 0x0f44, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovne", 2, 0x0f45, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnz", 2, 0x0f45, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovbe", 2, 0x0f46, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovna", 2, 0x0f46, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmova", 2, 0x0f47, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnbe", 2, 0x0f47, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovs", 2, 0x0f48, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovns", 2, 0x0f49, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovp", 2, 0x0f4a, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnp", 2, 0x0f4b, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovl", 2, 0x0f4c, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnge", 2, 0x0f4c, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovge", 2, 0x0f4d, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnl", 2, 0x0f4d, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovle", 2, 0x0f4e, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovng", 2, 0x0f4e, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovg", 2, 0x0f4f, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+{"cmovnle", 2, 0x0f4f, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} },
+
+{"fcmovb", 2, 0xdac0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovnae",2, 0xdac0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmove", 2, 0xdac8, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovbe", 2, 0xdad0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovna", 2, 0xdad0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovu", 2, 0xdad8, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovae", 2, 0xdbc0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovnb", 2, 0xdbc0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovne", 2, 0xdbc8, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmova", 2, 0xdbd0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovnbe",2, 0xdbd0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcmovnu", 2, 0xdbd8, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+
+{"fcomi", 2, 0xdbf0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcomi", 0, 0xdbf1, X, NoSuf|ShortForm, { 0, 0, 0} },
+{"fcomi", 1, 0xdbf0, X, NoSuf|ShortForm, { FloatReg, 0, 0} },
+{"fucomi", 2, 0xdbe8, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fucomi", 0, 0xdbe9, X, NoSuf|ShortForm, { 0, 0, 0} },
+{"fucomi", 1, 0xdbe8, X, NoSuf|ShortForm, { FloatReg, 0, 0} },
+{"fcomip", 2, 0xdff0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcompi", 2, 0xdff0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fcompi", 0, 0xdff1, X, NoSuf|ShortForm, { 0, 0, 0} },
+{"fcompi", 1, 0xdff0, X, NoSuf|ShortForm, { FloatReg, 0, 0} },
+{"fucomip", 2, 0xdfe8, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fucompi", 2, 0xdfe8, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} },
+{"fucompi", 0, 0xdfe9, X, NoSuf|ShortForm, { 0, 0, 0} },
+{"fucompi", 1, 0xdfe8, X, NoSuf|ShortForm, { FloatReg, 0, 0} },
+
+/* MMX instructions. */
+
+{"emms", 0, 0x0f77, X, NoSuf, { 0, 0, 0 } },
+{"movd", 2, 0x0f6e, X, NoSuf|Modrm, { Reg32|LongMem, RegMMX, 0 } },
+{"movd", 2, 0x0f7e, X, NoSuf|Modrm, { RegMMX, Reg32|LongMem, 0 } },
+{"movq", 2, 0x0f6f, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"movq", 2, 0x0f7f, X, NoSuf|Modrm, { RegMMX, RegMMX|LongMem, 0 } },
+{"packssdw", 2, 0x0f6b, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"packsswb", 2, 0x0f63, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"packuswb", 2, 0x0f67, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"paddb", 2, 0x0ffc, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"paddw", 2, 0x0ffd, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"paddd", 2, 0x0ffe, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"paddsb", 2, 0x0fec, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"paddsw", 2, 0x0fed, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"paddusb", 2, 0x0fdc, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"paddusw", 2, 0x0fdd, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pand", 2, 0x0fdb, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pandn", 2, 0x0fdf, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pcmpeqb", 2, 0x0f74, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pcmpeqw", 2, 0x0f75, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pcmpeqd", 2, 0x0f76, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pcmpgtb", 2, 0x0f64, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pcmpgtw", 2, 0x0f65, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pcmpgtd", 2, 0x0f66, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pmaddwd", 2, 0x0ff5, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pmulhw", 2, 0x0fe5, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pmullw", 2, 0x0fd5, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"por", 2, 0x0feb, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psllw", 2, 0x0ff1, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psllw", 2, 0x0f71, 6, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"pslld", 2, 0x0ff2, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pslld", 2, 0x0f72, 6, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"psllq", 2, 0x0ff3, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psllq", 2, 0x0f73, 6, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"psraw", 2, 0x0fe1, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psraw", 2, 0x0f71, 4, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"psrad", 2, 0x0fe2, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psrad", 2, 0x0f72, 4, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"psrlw", 2, 0x0fd1, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psrlw", 2, 0x0f71, 2, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"psrld", 2, 0x0fd2, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psrld", 2, 0x0f72, 2, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"psrlq", 2, 0x0fd3, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psrlq", 2, 0x0f73, 2, NoSuf|Modrm, { Imm8, RegMMX, 0 } },
+{"psubb", 2, 0x0ff8, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psubw", 2, 0x0ff9, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psubd", 2, 0x0ffa, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psubsb", 2, 0x0fe8, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psubsw", 2, 0x0fe9, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psubusb", 2, 0x0fd8, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psubusw", 2, 0x0fd9, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"punpckhbw",2, 0x0f68, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"punpckhwd",2, 0x0f69, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"punpckhdq",2, 0x0f6a, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"punpcklbw",2, 0x0f60, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"punpcklwd",2, 0x0f61, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"punpckldq",2, 0x0f62, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pxor", 2, 0x0fef, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+
+
+/* AMD 3DNow! instructions */
+#define AMD_3DNOW_OPCODE 0x0f0f
+
+{"prefetch", 1, 0x0f0d, 0, NoSuf|Modrm, { ByteMem, 0, 0 } },
+{"prefetchw",1, 0x0f0d, 1, NoSuf|Modrm, { ByteMem, 0, 0 } },
+{"femms", 0, 0x0f0e, X, NoSuf, { 0, 0, 0 } },
+{"pavgusb", 2, 0x0f0f, 0xbf, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pf2id", 2, 0x0f0f, 0x1d, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfacc", 2, 0x0f0f, 0xae, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfadd", 2, 0x0f0f, 0x9e, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfcmpeq", 2, 0x0f0f, 0xb0, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfcmpge", 2, 0x0f0f, 0x90, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfcmpgt", 2, 0x0f0f, 0xa0, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfmax", 2, 0x0f0f, 0xa4, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfmin", 2, 0x0f0f, 0x94, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfmul", 2, 0x0f0f, 0xb4, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfrcp", 2, 0x0f0f, 0x96, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfrcpit1", 2, 0x0f0f, 0xa6, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfrcpit2", 2, 0x0f0f, 0xb6, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfrsqit1", 2, 0x0f0f, 0xa7, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfrsqrt", 2, 0x0f0f, 0x97, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfsub", 2, 0x0f0f, 0x9a, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pfsubr", 2, 0x0f0f, 0xaa, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pi2fd", 2, 0x0f0f, 0x0d, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pmulhrw", 2, 0x0f0f, 0xb7, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+
+{NULL, 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */
+};
+#undef X
+#undef ReverseModrm
+#undef NoSuf
+#undef b_Suf
+#undef w_Suf
+#undef l_Suf
+#undef bw_Suf
+#undef bl_Suf
+#undef wl_Suf
+#undef sl_Suf
+#undef bwl_Suf
+#undef FP
+#undef l_FP
+#undef sl_FP
+
+#define MAX_MNEM_SIZE 16 /* for parsing insn mnemonics from input */
+
+
+/* 386 register table */
+
+static const reg_entry i386_regtab[] = {
+ /* 8 bit regs */
+ {"al", Reg8|Acc, 0},
+ {"cl", Reg8|ShiftCount, 1},
+ {"dl", Reg8, 2},
+ {"bl", Reg8, 3},
+ {"ah", Reg8, 4},
+ {"ch", Reg8, 5},
+ {"dh", Reg8, 6},
+ {"bh", Reg8, 7},
+ /* 16 bit regs */
+ {"ax", Reg16|Acc, 0},
+ {"cx", Reg16, 1},
+ {"dx", Reg16|InOutPortReg, 2},
+ {"bx", Reg16|BaseIndex, 3},
+ {"sp", Reg16, 4},
+ {"bp", Reg16|BaseIndex, 5},
+ {"si", Reg16|BaseIndex, 6},
+ {"di", Reg16|BaseIndex, 7},
+ /* 32 bit regs */
+ {"eax", Reg32|BaseIndex|Acc, 0},
+ {"ecx", Reg32|BaseIndex, 1},
+ {"edx", Reg32|BaseIndex, 2},
+ {"ebx", Reg32|BaseIndex, 3},
+ {"esp", Reg32, 4},
+ {"ebp", Reg32|BaseIndex, 5},
+ {"esi", Reg32|BaseIndex, 6},
+ {"edi", Reg32|BaseIndex, 7},
+ /* segment registers */
+ {"es", SReg2, 0},
+ {"cs", SReg2, 1},
+ {"ss", SReg2, 2},
+ {"ds", SReg2, 3},
+ {"fs", SReg3, 4},
+ {"gs", SReg3, 5},
+ /* control registers */
+ {"cr0", Control, 0},
+ {"cr1", Control, 1},
+ {"cr2", Control, 2},
+ {"cr3", Control, 3},
+ {"cr4", Control, 4},
+ {"cr5", Control, 5},
+ {"cr6", Control, 6},
+ {"cr7", Control, 7},
+ /* debug registers */
+ {"db0", Debug, 0},
+ {"db1", Debug, 1},
+ {"db2", Debug, 2},
+ {"db3", Debug, 3},
+ {"db4", Debug, 4},
+ {"db5", Debug, 5},
+ {"db6", Debug, 6},
+ {"db7", Debug, 7},
+ {"dr0", Debug, 0},
+ {"dr1", Debug, 1},
+ {"dr2", Debug, 2},
+ {"dr3", Debug, 3},
+ {"dr4", Debug, 4},
+ {"dr5", Debug, 5},
+ {"dr6", Debug, 6},
+ {"dr7", Debug, 7},
+ /* test registers */
+ {"tr0", Test, 0},
+ {"tr1", Test, 1},
+ {"tr2", Test, 2},
+ {"tr3", Test, 3},
+ {"tr4", Test, 4},
+ {"tr5", Test, 5},
+ {"tr6", Test, 6},
+ {"tr7", Test, 7},
+ /* float registers */
+ {"st(0)", FloatReg|FloatAcc, 0},
+ {"st", FloatReg|FloatAcc, 0},
+ {"st(1)", FloatReg, 1},
+ {"st(2)", FloatReg, 2},
+ {"st(3)", FloatReg, 3},
+ {"st(4)", FloatReg, 4},
+ {"st(5)", FloatReg, 5},
+ {"st(6)", FloatReg, 6},
+ {"st(7)", FloatReg, 7},
+ {"mm0", RegMMX, 0},
+ {"mm1", RegMMX, 1},
+ {"mm2", RegMMX, 2},
+ {"mm3", RegMMX, 3},
+ {"mm4", RegMMX, 4},
+ {"mm5", RegMMX, 5},
+ {"mm6", RegMMX, 6},
+ {"mm7", RegMMX, 7}
+};
+
+#define MAX_REG_NAME_SIZE 8 /* for parsing register names from input */
+
+/* segment stuff */
+static const seg_entry cs = { "cs", 0x2e };
+static const seg_entry ds = { "ds", 0x3e };
+static const seg_entry ss = { "ss", 0x36 };
+static const seg_entry es = { "es", 0x26 };
+static const seg_entry fs = { "fs", 0x64 };
+static const seg_entry gs = { "gs", 0x65 };
+
+/* end of opcode/i386.h */
diff --git a/include/opcode/i860.h b/include/opcode/i860.h
new file mode 100644
index 0000000..b6ebd25
--- /dev/null
+++ b/include/opcode/i860.h
@@ -0,0 +1,491 @@
+/* Table of opcodes for the i860.
+ Copyright (C) 1989 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
+
+GAS/GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS/GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS or GDB; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined(__STDC__) && !defined(const)
+#define const
+#endif
+
+/*
+ * Structure of an opcode table entry.
+ */
+struct i860_opcode
+{
+ const char *name;
+ unsigned long match; /* Bits that must be set. */
+ unsigned long lose; /* Bits that must not be set. */
+ const char *args;
+ /* Nonzero if this is a possible expand-instruction. */
+ char expand;
+};
+
+enum expand_type
+{
+ E_MOV = 1, E_ADDR, E_U32, E_AND, E_S32, E_DELAY
+};
+
+/*
+ All i860 opcodes are 32 bits, except for the pseudoinstructions
+ and the operations utilizing a 32-bit address expression, an
+ unsigned 32-bit constant, or a signed 32-bit constant.
+ These opcodes are expanded into a two-instruction sequence for
+ any situation where the immediate operand does not fit in 32 bits.
+ In the case of the add and subtract operations the expansion is
+ to a three-instruction sequence (ex: orh, or, adds). In cases
+ where the address is to be relocated, the instruction is
+ expanded to handle the worse case, this could be optimized at
+ the final link if the actual address were known.
+
+ The pseudoinstructions are: mov, fmov, pmov, nop, and fnop.
+ These instructions are implemented as a one or two instruction
+ sequence of other operations.
+
+ The match component is a mask saying which bits must match a
+ particular opcode in order for an instruction to be an instance
+ of that opcode.
+
+ The args component is a string containing one character
+ for each operand of the instruction.
+
+Kinds of operands:
+ # Number used by optimizer. It is ignored.
+ 1 src1 integer register.
+ 2 src2 integer register.
+ d dest register.
+ c ctrlreg control register.
+ i 16 bit immediate.
+ I 16 bit immediate, aligned.
+ 5 5 bit immediate.
+ l lbroff 26 bit PC relative immediate.
+ r sbroff 16 bit PC relative immediate.
+ s split 16 bit immediate.
+ S split 16 bit immediate, aligned.
+ e src1 floating point register.
+ f src2 floating point register.
+ g dest floating point register.
+
+*/
+
+/* The order of the opcodes in this table is significant:
+
+ * The assembler requires that all instances of the same mnemonic must be
+ consecutive. If they aren't, the assembler will bomb at runtime.
+
+ * The disassembler should not care about the order of the opcodes. */
+
+static struct i860_opcode i860_opcodes[] =
+{
+
+/* REG-Format Instructions */
+{ "ld.c", 0x30000000, 0xcc000000, "c,d", 0 }, /* ld.c csrc2,idest */
+{ "ld.b", 0x00000000, 0xfc000000, "1(2),d", 0 }, /* ld.b isrc1(isrc2),idest */
+{ "ld.b", 0x04000000, 0xf8000000, "I(2),d", E_ADDR }, /* ld.b #const(isrc2),idest */
+{ "ld.s", 0x10000000, 0xec000001, "1(2),d", 0 }, /* ld.s isrc1(isrc2),idest */
+{ "ld.s", 0x14000001, 0xe8000000, "I(2),d", E_ADDR }, /* ld.s #const(isrc2),idest */
+{ "ld.l", 0x10000001, 0xec000000, "1(2),d", 0 }, /* ld.l isrc1(isrc2),idest */
+{ "ld.l", 0x14000001, 0xe8000000, "I(2),d", E_ADDR }, /* ld.l #const(isrc2),idest */
+
+{ "st.c", 0x38000000, 0xc4000000, "1,c", 0 }, /* st.c isrc1ni,csrc2 */
+{ "st.b", 0x0c000000, 0xf0000000, "1,S(2)", E_ADDR }, /* st.b isrc1ni,#const(isrc2) */
+{ "st.s", 0x1c000000, 0xe0000000, "1,S(2)", E_ADDR }, /* st.s isrc1ni,#const(isrc2) */
+{ "st.l", 0x1c000001, 0xe0000000, "1,S(2)", E_ADDR }, /* st.l isrc1ni,#const(isrc2) */
+
+{ "ixfr", 0x08000000, 0xf4000000, "1,g", 0 }, /* ixfr isrc1ni,fdest */
+
+{ "fld.l", 0x20000002, 0xdc000001, "1(2),g", 0 }, /* fld.l isrc1(isrc2),fdest */
+{ "fld.l", 0x24000002, 0xd8000001, "i(2),g", E_ADDR }, /* fld.l #const(isrc2),fdest */
+{ "fld.l", 0x20000003, 0xdc000000, "1(2)++,g", 0 }, /* fld.l isrc1(isrc2)++,fdest */
+{ "fld.l", 0x24000003, 0xd8000000, "i(2)++,g", E_ADDR }, /* fld.l #const(isrc2)++,fdest */
+{ "fld.d", 0x20000000, 0xdc000007, "1(2),g", 0 }, /* fld.d isrc1(isrc2),fdest */
+{ "fld.d", 0x24000000, 0xd8000007, "i(2),g", E_ADDR }, /* fld.d #const(isrc2),fdest */
+{ "fld.d", 0x20000001, 0xdc000006, "1(2)++,g", 0 }, /* fld.d isrc1(isrc2)++,fdest */
+{ "fld.d", 0x24000001, 0xd8000006, "i(2)++,g", E_ADDR }, /* fld.d #const(isrc2)++,fdest */
+{ "fld.q", 0x20000004, 0xdc000003, "1(2),g", 0 }, /* fld.q isrc1(isrc2),fdest */
+{ "fld.q", 0x24000004, 0xd8000003, "i(2),g", E_ADDR }, /* fld.q #const(isrc2),fdest */
+{ "fld.q", 0x20000005, 0xdc000002, "1(2)++,g", 0 }, /* fld.q isrc1(isrc2)++,fdest */
+{ "fld.q", 0x24000005, 0xd8000002, "i(2)++,g", E_ADDR }, /* fld.q #const(isrc2)++,fdest */
+
+{ "pfld.l", 0x60000000, 0x9c000003, "1(2),g", 0 }, /* pfld.l isrc1(isrc2),fdest */
+{ "pfld.l", 0x64000000, 0x98000003, "i(2),g", E_ADDR }, /* pfld.l #const(isrc2),fdest */
+{ "pfld.l", 0x60000001, 0x9c000002, "1(2)++,g", 0 }, /* pfld.l isrc1(isrc2)++,fdest */
+{ "pfld.l", 0x64000001, 0x98000002, "i(2)++,g", E_ADDR }, /* pfld.l #const(isrc2)++,fdest */
+{ "pfld.d", 0x60000000, 0x9c000007, "1(2),g", 0 }, /* pfld.d isrc1(isrc2),fdest */
+{ "pfld.d", 0x64000000, 0x98000007, "i(2),g", E_ADDR }, /* pfld.d #const(isrc2),fdest */
+{ "pfld.d", 0x60000001, 0x9c000006, "1(2)++,g", 0 }, /* pfld.d isrc1(isrc2)++,fdest */
+{ "pfld.d", 0x64000001, 0x98000006, "i(2)++,g", E_ADDR }, /* pfld.d #const(isrc2)++,fdest */
+
+{ "fst.l", 0x28000002, 0xd4000001, "g,1(2)", 0 }, /* fst.l fdest,isrc1(isrc2) */
+{ "fst.l", 0x2c000002, 0xd0000001, "g,i(2)", E_ADDR }, /* fst.l fdest,#const(isrc2) */
+{ "fst.l", 0x28000003, 0xd4000000, "g,1(2)++", 0 }, /* fst.l fdest,isrc1(isrc2)++ */
+{ "fst.l", 0x2c000003, 0xd0000000, "g,i(2)++", E_ADDR }, /* fst.l fdest,#const(isrc2)++ */
+{ "fst.d", 0x28000000, 0xd4000007, "g,1(2)", 0 }, /* fst.d fdest,isrc1(isrc2) */
+{ "fst.d", 0x2c000000, 0xd0000007, "g,i(2)", E_ADDR }, /* fst.d fdest,#const(isrc2) */
+{ "fst.d", 0x28000001, 0xd4000006, "g,1(2)++", 0 }, /* fst.d fdest,isrc1(isrc2)++ */
+{ "fst.d", 0x2c000001, 0xd0000006, "g,i(2)++", E_ADDR }, /* fst.d fdest,#const(isrc2)++ */
+
+{ "pst.d", 0x3c000000, 0xc0000007, "g,i(2)", E_ADDR }, /* pst.d fdest,#const(isrc2) */
+{ "pst.d", 0x3c000001, 0xc0000006, "g,i(2)++", E_ADDR }, /* pst.d fdest,#const(isrc2)++ */
+
+{ "addu", 0x80000000, 0x7c000000, "1,2,d", 0 }, /* addu isrc1,isrc2,idest */
+{ "addu", 0x84000000, 0x78000000, "i,2,d", E_S32 }, /* addu #const,isrc2,idest */
+{ "adds", 0x90000000, 0x6c000000, "1,2,d", 0 }, /* adds isrc1,isrc2,idest */
+{ "adds", 0x94000000, 0x68000000, "i,2,d", E_S32 }, /* adds #const,isrc2,idest */
+{ "subu", 0x88000000, 0x74000000, "1,2,d", 0 }, /* subu isrc1,isrc2,idest */
+{ "subu", 0x8c000000, 0x70000000, "i,2,d", E_S32 }, /* subu #const,isrc2,idest */
+{ "subs", 0x98000000, 0x64000000, "1,2,d", 0 }, /* subs isrc1,isrc2,idest */
+{ "subs", 0x9c000000, 0x60000000, "i,2,d", E_S32 }, /* subs #const,isrc2,idest */
+
+{ "shl", 0xa0000000, 0x5c000000, "1,2,d", 0 }, /* shl isrc1,isrc2,idest */
+{ "shl", 0xa4000000, 0x58000000, "i,2,d", 0 }, /* shl #const,isrc2,idest */
+{ "shr", 0xa8000000, 0x54000000, "1,2,d", 0 }, /* shr isrc1,isrc2,idest */
+{ "shr", 0xac000000, 0x50000000, "i,2,d", 0 }, /* shr #const,isrc2,idest */
+{ "shrd", 0xb0000000, 0x4c000000, "1,2,d", 0 }, /* shrd isrc1,isrc2,idest */
+{ "shra", 0xb8000000, 0x44000000, "1,2,d", 0 }, /* shra isrc1,isrc2,idest */
+{ "shra", 0xbc000000, 0x40000000, "i,2,d", 0 }, /* shra #const,isrc2,idest */
+
+{ "mov", 0xa0000000, 0x5c00f800, "2,d", 0 }, /* shl r0,isrc2,idest */
+{ "mov", 0x94000000, 0x69e00000, "i,d", E_MOV }, /* adds #const,r0,idest */
+{ "nop", 0xa0000000, 0x5ffff800, "", 0 }, /* shl r0,r0,r0 */
+{ "fnop", 0xb0000000, 0x4ffff800, "", 0 }, /* shrd r0,r0,r0 */
+
+{ "trap", 0x44000000, 0xb8000000, "1,2,d", 0 }, /* trap isrc1ni,isrc2,idest */
+
+{ "flush", 0x34000000, 0xc81f0001, "i(2)", E_ADDR }, /* flush #const(isrc2) */
+{ "flush", 0x34000001, 0xc81f0000, "i(2)++", E_ADDR }, /* flush #const(isrc2)++ */
+
+{ "and", 0xc0000000, 0x3c000000, "1,2,d", 0 }, /* and isrc1,isrc2,idest */
+{ "and", 0xc4000000, 0x38000000, "i,2,d", E_AND }, /* and #const,isrc2,idest */
+{ "andh", 0xc8000000, 0x34000000, "1,2,d", 0 }, /* andh isrc1,isrc2,idest */
+{ "andh", 0xcc000000, 0x30000000, "i,2,d", 0 }, /* andh #const,isrc2,idest */
+{ "andnot", 0xd0000000, 0x2c000000, "1,2,d", 0 }, /* andnot isrc1,isrc2,idest */
+{ "andnot", 0xd4000000, 0x28000000, "i,2,d", E_U32 }, /* andnot #const,isrc2,idest */
+{ "andnoth", 0xd8000000, 0x24000000, "1,2,d", 0 }, /* andnoth isrc1,isrc2,idest */
+{ "andnoth", 0xdc000000, 0x20000000, "i,2,d", 0 }, /* andnoth #const,isrc2,idest */
+{ "or", 0xe0000000, 0x1c000000, "1,2,d", 0 }, /* or isrc1,isrc2,idest */
+{ "or", 0xe4000000, 0x18000000, "i,2,d", E_U32 }, /* or #const,isrc2,idest */
+{ "orh", 0xe8000000, 0x14000000, "1,2,d", 0 }, /* orh isrc1,isrc2,idest */
+{ "orh", 0xec000000, 0x10000000, "i,2,d", 0 }, /* orh #const,isrc2,idest */
+{ "xor", 0xf0000000, 0x0c000000, "1,2,d", 0 }, /* xor isrc1,isrc2,idest */
+{ "xor", 0xf4000000, 0x08000000, "i,2,d", E_U32 }, /* xor #const,isrc2,idest */
+{ "xorh", 0xf8000000, 0x04000000, "1,2,d", 0 }, /* xorh isrc1,isrc2,idest */
+{ "xorh", 0xfc000000, 0x00000000, "i,2,d", 0 }, /* xorh #const,isrc2,idest */
+
+{ "bte", 0x58000000, 0xa4000000, "1,2,s", 0 }, /* bte isrc1s,isrc2,sbroff */
+{ "bte", 0x5c000000, 0xa0000000, "5,2,s", 0 }, /* bte #const5,isrc2,sbroff */
+{ "btne", 0x50000000, 0xac000000, "1,2,s", 0 }, /* btne isrc1s,isrc2,sbroff */
+{ "btne", 0x54000000, 0xa8000000, "5,2,s", 0 }, /* btne #const5,isrc2,sbroff */
+{ "bla", 0xb4000000, 0x48000000, "1,2,s", E_DELAY }, /* bla isrc1s,isrc2,sbroff */
+{ "bri", 0x40000000, 0xbc000000, "1", E_DELAY }, /* bri isrc1ni */
+
+/* Core Escape Instruction Format */
+{ "lock", 0x4c000001, 0xb000001e, "", 0 }, /* lock set BL in dirbase */
+{ "calli", 0x4c000002, 0xb000001d, "1", E_DELAY }, /* calli isrc1ni */
+{ "intovr", 0x4c000004, 0xb000001b, "", 0 }, /* intovr trap on integer overflow */
+{ "unlock", 0x4c000007, 0xb0000018, "", 0 }, /* unlock clear BL in dirbase */
+
+/* CTRL-Format Instructions */
+{ "br", 0x68000000, 0x94000000, "l", E_DELAY }, /* br lbroff */
+{ "call", 0x6c000000, 0x90000000, "l", E_DELAY }, /* call lbroff */
+{ "bc", 0x70000000, 0x8c000000, "l", 0 }, /* bc lbroff */
+{ "bc.t", 0x74000000, 0x88000000, "l", E_DELAY }, /* bc.t lbroff */
+{ "bnc", 0x78000000, 0x84000000, "l", 0 }, /* bnc lbroff */
+{ "bnc.t", 0x7c000000, 0x80000000, "l", E_DELAY }, /* bnc.t lbroff */
+
+/* Floating Point Escape Instruction Format - pfam.p fsrc1,fsrc2,fdest */
+{ "r2p1.ss", 0x48000400, 0xb40003ff, "e,f,g", 0 },
+{ "r2p1.sd", 0x48000480, 0xb400037f, "e,f,g", 0 },
+{ "r2p1.dd", 0x48000580, 0xb400027f, "e,f,g", 0 },
+{ "r2pt.ss", 0x48000401, 0xb40003fe, "e,f,g", 0 },
+{ "r2pt.sd", 0x48000481, 0xb400037e, "e,f,g", 0 },
+{ "r2pt.dd", 0x48000581, 0xb400027e, "e,f,g", 0 },
+{ "r2ap1.ss", 0x48000402, 0xb40003fd, "e,f,g", 0 },
+{ "r2ap1.sd", 0x48000482, 0xb400037d, "e,f,g", 0 },
+{ "r2ap1.dd", 0x48000582, 0xb400027d, "e,f,g", 0 },
+{ "r2apt.ss", 0x48000403, 0xb40003fc, "e,f,g", 0 },
+{ "r2apt.sd", 0x48000483, 0xb400037c, "e,f,g", 0 },
+{ "r2apt.dd", 0x48000583, 0xb400027c, "e,f,g", 0 },
+{ "i2p1.ss", 0x48000404, 0xb40003fb, "e,f,g", 0 },
+{ "i2p1.sd", 0x48000484, 0xb400037b, "e,f,g", 0 },
+{ "i2p1.dd", 0x48000584, 0xb400027b, "e,f,g", 0 },
+{ "i2pt.ss", 0x48000405, 0xb40003fa, "e,f,g", 0 },
+{ "i2pt.sd", 0x48000485, 0xb400037a, "e,f,g", 0 },
+{ "i2pt.dd", 0x48000585, 0xb400027a, "e,f,g", 0 },
+{ "i2ap1.ss", 0x48000406, 0xb40003f9, "e,f,g", 0 },
+{ "i2ap1.sd", 0x48000486, 0xb4000379, "e,f,g", 0 },
+{ "i2ap1.dd", 0x48000586, 0xb4000279, "e,f,g", 0 },
+{ "i2apt.ss", 0x48000407, 0xb40003f8, "e,f,g", 0 },
+{ "i2apt.sd", 0x48000487, 0xb4000378, "e,f,g", 0 },
+{ "i2apt.dd", 0x48000587, 0xb4000278, "e,f,g", 0 },
+{ "rat1p2.ss", 0x48000408, 0xb40003f7, "e,f,g", 0 },
+{ "rat1p2.sd", 0x48000488, 0xb4000377, "e,f,g", 0 },
+{ "rat1p2.dd", 0x48000588, 0xb4000277, "e,f,g", 0 },
+{ "m12apm.ss", 0x48000409, 0xb40003f6, "e,f,g", 0 },
+{ "m12apm.sd", 0x48000489, 0xb4000376, "e,f,g", 0 },
+{ "m12apm.dd", 0x48000589, 0xb4000276, "e,f,g", 0 },
+{ "ra1p2.ss", 0x4800040a, 0xb40003f5, "e,f,g", 0 },
+{ "ra1p2.sd", 0x4800048a, 0xb4000375, "e,f,g", 0 },
+{ "ra1p2.dd", 0x4800058a, 0xb4000275, "e,f,g", 0 },
+{ "m12ttpa.ss", 0x4800040b, 0xb40003f4, "e,f,g", 0 },
+{ "m12ttpa.sd", 0x4800048b, 0xb4000374, "e,f,g", 0 },
+{ "m12ttpa.dd", 0x4800058b, 0xb4000274, "e,f,g", 0 },
+{ "iat1p2.ss", 0x4800040c, 0xb40003f3, "e,f,g", 0 },
+{ "iat1p2.sd", 0x4800048c, 0xb4000373, "e,f,g", 0 },
+{ "iat1p2.dd", 0x4800058c, 0xb4000273, "e,f,g", 0 },
+{ "m12tpm.ss", 0x4800040d, 0xb40003f2, "e,f,g", 0 },
+{ "m12tpm.sd", 0x4800048d, 0xb4000372, "e,f,g", 0 },
+{ "m12tpm.dd", 0x4800058d, 0xb4000272, "e,f,g", 0 },
+{ "ia1p2.ss", 0x4800040e, 0xb40003f1, "e,f,g", 0 },
+{ "ia1p2.sd", 0x4800048e, 0xb4000371, "e,f,g", 0 },
+{ "ia1p2.dd", 0x4800058e, 0xb4000271, "e,f,g", 0 },
+{ "m12tpa.ss", 0x4800040f, 0xb40003f0, "e,f,g", 0 },
+{ "m12tpa.sd", 0x4800048f, 0xb4000370, "e,f,g", 0 },
+{ "m12tpa.dd", 0x4800058f, 0xb4000270, "e,f,g", 0 },
+
+/* Floating Point Escape Instruction Format - pfsm.p fsrc1,fsrc2,fdest */
+{ "r2s1.ss", 0x48000410, 0xb40003ef, "e,f,g", 0 },
+{ "r2s1.sd", 0x48000490, 0xb400036f, "e,f,g", 0 },
+{ "r2s1.dd", 0x48000590, 0xb400026f, "e,f,g", 0 },
+{ "r2st.ss", 0x48000411, 0xb40003ee, "e,f,g", 0 },
+{ "r2st.sd", 0x48000491, 0xb400036e, "e,f,g", 0 },
+{ "r2st.dd", 0x48000591, 0xb400026e, "e,f,g", 0 },
+{ "r2as1.ss", 0x48000412, 0xb40003ed, "e,f,g", 0 },
+{ "r2as1.sd", 0x48000492, 0xb400036d, "e,f,g", 0 },
+{ "r2as1.dd", 0x48000592, 0xb400026d, "e,f,g", 0 },
+{ "r2ast.ss", 0x48000413, 0xb40003ec, "e,f,g", 0 },
+{ "r2ast.sd", 0x48000493, 0xb400036c, "e,f,g", 0 },
+{ "r2ast.dd", 0x48000593, 0xb400026c, "e,f,g", 0 },
+{ "i2s1.ss", 0x48000414, 0xb40003eb, "e,f,g", 0 },
+{ "i2s1.sd", 0x48000494, 0xb400036b, "e,f,g", 0 },
+{ "i2s1.dd", 0x48000594, 0xb400026b, "e,f,g", 0 },
+{ "i2st.ss", 0x48000415, 0xb40003ea, "e,f,g", 0 },
+{ "i2st.sd", 0x48000495, 0xb400036a, "e,f,g", 0 },
+{ "i2st.dd", 0x48000595, 0xb400026a, "e,f,g", 0 },
+{ "i2as1.ss", 0x48000416, 0xb40003e9, "e,f,g", 0 },
+{ "i2as1.sd", 0x48000496, 0xb4000369, "e,f,g", 0 },
+{ "i2as1.dd", 0x48000596, 0xb4000269, "e,f,g", 0 },
+{ "i2ast.ss", 0x48000417, 0xb40003e8, "e,f,g", 0 },
+{ "i2ast.sd", 0x48000497, 0xb4000368, "e,f,g", 0 },
+{ "i2ast.dd", 0x48000597, 0xb4000268, "e,f,g", 0 },
+{ "rat1s2.ss", 0x48000418, 0xb40003e7, "e,f,g", 0 },
+{ "rat1s2.sd", 0x48000498, 0xb4000367, "e,f,g", 0 },
+{ "rat1s2.dd", 0x48000598, 0xb4000267, "e,f,g", 0 },
+{ "m12asm.ss", 0x48000419, 0xb40003e6, "e,f,g", 0 },
+{ "m12asm.sd", 0x48000499, 0xb4000366, "e,f,g", 0 },
+{ "m12asm.dd", 0x48000599, 0xb4000266, "e,f,g", 0 },
+{ "ra1s2.ss", 0x4800041a, 0xb40003e5, "e,f,g", 0 },
+{ "ra1s2.sd", 0x4800049a, 0xb4000365, "e,f,g", 0 },
+{ "ra1s2.dd", 0x4800059a, 0xb4000265, "e,f,g", 0 },
+{ "m12ttsa.ss", 0x4800041b, 0xb40003e4, "e,f,g", 0 },
+{ "m12ttsa.sd", 0x4800049b, 0xb4000364, "e,f,g", 0 },
+{ "m12ttsa.dd", 0x4800059b, 0xb4000264, "e,f,g", 0 },
+{ "iat1s2.ss", 0x4800041c, 0xb40003e3, "e,f,g", 0 },
+{ "iat1s2.sd", 0x4800049c, 0xb4000363, "e,f,g", 0 },
+{ "iat1s2.dd", 0x4800059c, 0xb4000263, "e,f,g", 0 },
+{ "m12tsm.ss", 0x4800041d, 0xb40003e2, "e,f,g", 0 },
+{ "m12tsm.sd", 0x4800049d, 0xb4000362, "e,f,g", 0 },
+{ "m12tsm.dd", 0x4800059d, 0xb4000262, "e,f,g", 0 },
+{ "ia1s2.ss", 0x4800041e, 0xb40003e1, "e,f,g", 0 },
+{ "ia1s2.sd", 0x4800049e, 0xb4000361, "e,f,g", 0 },
+{ "ia1s2.dd", 0x4800059e, 0xb4000261, "e,f,g", 0 },
+{ "m12tsa.ss", 0x4800041f, 0xb40003e0, "e,f,g", 0 },
+{ "m12tsa.sd", 0x4800049f, 0xb4000360, "e,f,g", 0 },
+{ "m12tsa.dd", 0x4800059f, 0xb4000260, "e,f,g", 0 },
+
+/* Floating Point Escape Instruction Format - pfmam.p fsrc1,fsrc2,fdest */
+{ "mr2p1.ss", 0x48000000, 0xb40007ff, "e,f,g", 0 },
+{ "mr2p1.sd", 0x48000080, 0xb400077f, "e,f,g", 0 },
+{ "mr2p1.dd", 0x48000180, 0xb400067f, "e,f,g", 0 },
+{ "mr2pt.ss", 0x48000001, 0xb40007fe, "e,f,g", 0 },
+{ "mr2pt.sd", 0x48000081, 0xb400077e, "e,f,g", 0 },
+{ "mr2pt.dd", 0x48000181, 0xb400067e, "e,f,g", 0 },
+{ "mr2mp1.ss", 0x48000002, 0xb40007fd, "e,f,g", 0 },
+{ "mr2mp1.sd", 0x48000082, 0xb400077d, "e,f,g", 0 },
+{ "mr2mp1.dd", 0x48000182, 0xb400067d, "e,f,g", 0 },
+{ "mr2mpt.ss", 0x48000003, 0xb40007fc, "e,f,g", 0 },
+{ "mr2mpt.sd", 0x48000083, 0xb400077c, "e,f,g", 0 },
+{ "mr2mpt.dd", 0x48000183, 0xb400067c, "e,f,g", 0 },
+{ "mi2p1.ss", 0x48000004, 0xb40007fb, "e,f,g", 0 },
+{ "mi2p1.sd", 0x48000084, 0xb400077b, "e,f,g", 0 },
+{ "mi2p1.dd", 0x48000184, 0xb400067b, "e,f,g", 0 },
+{ "mi2pt.ss", 0x48000005, 0xb40007fa, "e,f,g", 0 },
+{ "mi2pt.sd", 0x48000085, 0xb400077a, "e,f,g", 0 },
+{ "mi2pt.dd", 0x48000185, 0xb400067a, "e,f,g", 0 },
+{ "mi2mp1.ss", 0x48000006, 0xb40007f9, "e,f,g", 0 },
+{ "mi2mp1.sd", 0x48000086, 0xb4000779, "e,f,g", 0 },
+{ "mi2mp1.dd", 0x48000186, 0xb4000679, "e,f,g", 0 },
+{ "mi2mpt.ss", 0x48000007, 0xb40007f8, "e,f,g", 0 },
+{ "mi2mpt.sd", 0x48000087, 0xb4000778, "e,f,g", 0 },
+{ "mi2mpt.dd", 0x48000187, 0xb4000678, "e,f,g", 0 },
+{ "mrmt1p2.ss", 0x48000008, 0xb40007f7, "e,f,g", 0 },
+{ "mrmt1p2.sd", 0x48000088, 0xb4000777, "e,f,g", 0 },
+{ "mrmt1p2.dd", 0x48000188, 0xb4000677, "e,f,g", 0 },
+{ "mm12mpm.ss", 0x48000009, 0xb40007f6, "e,f,g", 0 },
+{ "mm12mpm.sd", 0x48000089, 0xb4000776, "e,f,g", 0 },
+{ "mm12mpm.dd", 0x48000189, 0xb4000676, "e,f,g", 0 },
+{ "mrm1p2.ss", 0x4800000a, 0xb40007f5, "e,f,g", 0 },
+{ "mrm1p2.sd", 0x4800008a, 0xb4000775, "e,f,g", 0 },
+{ "mrm1p2.dd", 0x4800018a, 0xb4000675, "e,f,g", 0 },
+{ "mm12ttpm.ss",0x4800000b, 0xb40007f4, "e,f,g", 0 },
+{ "mm12ttpm.sd",0x4800008b, 0xb4000774, "e,f,g", 0 },
+{ "mm12ttpm.dd",0x4800018b, 0xb4000674, "e,f,g", 0 },
+{ "mimt1p2.ss", 0x4800000c, 0xb40007f3, "e,f,g", 0 },
+{ "mimt1p2.sd", 0x4800008c, 0xb4000773, "e,f,g", 0 },
+{ "mimt1p2.dd", 0x4800018c, 0xb4000673, "e,f,g", 0 },
+{ "mm12tpm.ss", 0x4800000d, 0xb40007f2, "e,f,g", 0 },
+{ "mm12tpm.sd", 0x4800008d, 0xb4000772, "e,f,g", 0 },
+{ "mm12tpm.dd", 0x4800018d, 0xb4000672, "e,f,g", 0 },
+{ "mim1p2.ss", 0x4800000e, 0xb40007f1, "e,f,g", 0 },
+{ "mim1p2.sd", 0x4800008e, 0xb4000771, "e,f,g", 0 },
+{ "mim1p2.dd", 0x4800018e, 0xb4000671, "e,f,g", 0 },
+
+/* Floating Point Escape Instruction Format - pfmsm.p fsrc1,fsrc2,fdest */
+{ "mr2s1.ss", 0x48000010, 0xb40007ef, "e,f,g", 0 },
+{ "mr2s1.sd", 0x48000090, 0xb400076f, "e,f,g", 0 },
+{ "mr2s1.dd", 0x48000190, 0xb400066f, "e,f,g", 0 },
+{ "mr2st.ss", 0x48000011, 0xb40007ee, "e,f,g", 0 },
+{ "mr2st.sd", 0x48000091, 0xb400076e, "e,f,g", 0 },
+{ "mr2st.dd", 0x48000191, 0xb400066e, "e,f,g", 0 },
+{ "mr2ms1.ss", 0x48000012, 0xb40007ed, "e,f,g", 0 },
+{ "mr2ms1.sd", 0x48000092, 0xb400076d, "e,f,g", 0 },
+{ "mr2ms1.dd", 0x48000192, 0xb400066d, "e,f,g", 0 },
+{ "mr2mst.ss", 0x48000013, 0xb40007ec, "e,f,g", 0 },
+{ "mr2mst.sd", 0x48000093, 0xb400076c, "e,f,g", 0 },
+{ "mr2mst.dd", 0x48000193, 0xb400066c, "e,f,g", 0 },
+{ "mi2s1.ss", 0x48000014, 0xb40007eb, "e,f,g", 0 },
+{ "mi2s1.sd", 0x48000094, 0xb400076b, "e,f,g", 0 },
+{ "mi2s1.dd", 0x48000194, 0xb400066b, "e,f,g", 0 },
+{ "mi2st.ss", 0x48000015, 0xb40007ea, "e,f,g", 0 },
+{ "mi2st.sd", 0x48000095, 0xb400076a, "e,f,g", 0 },
+{ "mi2st.dd", 0x48000195, 0xb400066a, "e,f,g", 0 },
+{ "mi2ms1.ss", 0x48000016, 0xb40007e9, "e,f,g", 0 },
+{ "mi2ms1.sd", 0x48000096, 0xb4000769, "e,f,g", 0 },
+{ "mi2ms1.dd", 0x48000196, 0xb4000669, "e,f,g", 0 },
+{ "mi2mst.ss", 0x48000017, 0xb40007e8, "e,f,g", 0 },
+{ "mi2mst.sd", 0x48000097, 0xb4000768, "e,f,g", 0 },
+{ "mi2mst.dd", 0x48000197, 0xb4000668, "e,f,g", 0 },
+{ "mrmt1s2.ss", 0x48000018, 0xb40007e7, "e,f,g", 0 },
+{ "mrmt1s2.sd", 0x48000098, 0xb4000767, "e,f,g", 0 },
+{ "mrmt1s2.dd", 0x48000198, 0xb4000667, "e,f,g", 0 },
+{ "mm12msm.ss", 0x48000019, 0xb40007e6, "e,f,g", 0 },
+{ "mm12msm.sd", 0x48000099, 0xb4000766, "e,f,g", 0 },
+{ "mm12msm.dd", 0x48000199, 0xb4000666, "e,f,g", 0 },
+{ "mrm1s2.ss", 0x4800001a, 0xb40007e5, "e,f,g", 0 },
+{ "mrm1s2.sd", 0x4800009a, 0xb4000765, "e,f,g", 0 },
+{ "mrm1s2.dd", 0x4800019a, 0xb4000665, "e,f,g", 0 },
+{ "mm12ttsm.ss",0x4800001b, 0xb40007e4, "e,f,g", 0 },
+{ "mm12ttsm.sd",0x4800009b, 0xb4000764, "e,f,g", 0 },
+{ "mm12ttsm.dd",0x4800019b, 0xb4000664, "e,f,g", 0 },
+{ "mimt1s2.ss", 0x4800001c, 0xb40007e3, "e,f,g", 0 },
+{ "mimt1s2.sd", 0x4800009c, 0xb4000763, "e,f,g", 0 },
+{ "mimt1s2.dd", 0x4800019c, 0xb4000663, "e,f,g", 0 },
+{ "mm12tsm.ss", 0x4800001d, 0xb40007e2, "e,f,g", 0 },
+{ "mm12tsm.sd", 0x4800009d, 0xb4000762, "e,f,g", 0 },
+{ "mm12tsm.dd", 0x4800019d, 0xb4000662, "e,f,g", 0 },
+{ "mim1s2.ss", 0x4800001e, 0xb40007e1, "e,f,g", 0 },
+{ "mim1s2.sd", 0x4800009e, 0xb4000761, "e,f,g", 0 },
+{ "mim1s2.dd", 0x4800019e, 0xb4000661, "e,f,g", 0 },
+
+
+{ "fmul.ss", 0x48000020, 0xb40007df, "e,f,g", 0 }, /* fmul.p fsrc1,fsrc2,fdest */
+{ "fmul.sd", 0x480000a0, 0xb400075f, "e,f,g", 0 }, /* fmul.p fsrc1,fsrc2,fdest */
+{ "fmul.dd", 0x480001a0, 0xb400065f, "e,f,g", 0 }, /* fmul.p fsrc1,fsrc2,fdest */
+{ "pfmul.ss", 0x48000420, 0xb40003df, "e,f,g", 0 }, /* pfmul.p fsrc1,fsrc2,fdest */
+{ "pfmul.sd", 0x480004a0, 0xb400035f, "e,f,g", 0 }, /* pfmul.p fsrc1,fsrc2,fdest */
+{ "pfmul.dd", 0x480005a0, 0xb400025f, "e,f,g", 0 }, /* pfmul.p fsrc1,fsrc2,fdest */
+{ "pfmul3.dd", 0x480005a4, 0xb400025b, "e,f,g", 0 }, /* pfmul3.p fsrc1,fsrc2,fdest */
+{ "fmlow.dd", 0x480001a1, 0xb400065e, "e,f,g", 0 }, /* fmlow.dd fsrc1,fsrc2,fdest */
+{ "frcp.ss", 0x48000022, 0xb40007dd, "f,g", 0 }, /* frcp.p fsrc2,fdest */
+{ "frcp.sd", 0x480000a2, 0xb400075d, "f,g", 0 }, /* frcp.p fsrc2,fdest */
+{ "frcp.dd", 0x480001a2, 0xb400065d, "f,g", 0 }, /* frcp.p fsrc2,fdest */
+{ "frsqr.ss", 0x48000023, 0xb40007dc, "f,g", 0 }, /* frsqr.p fsrc2,fdest */
+{ "frsqr.sd", 0x480000a3, 0xb400075c, "f,g", 0 }, /* frsqr.p fsrc2,fdest */
+{ "frsqr.dd", 0x480001a3, 0xb400065c, "f,g", 0 }, /* frsqr.p fsrc2,fdest */
+{ "fadd.ss", 0x48000030, 0xb40007cf, "e,f,g", 0 }, /* fadd.p fsrc1,fsrc2,fdest */
+{ "fadd.sd", 0x480000b0, 0xb400074f, "e,f,g", 0 }, /* fadd.p fsrc1,fsrc2,fdest */
+{ "fadd.dd", 0x480001b0, 0xb400064f, "e,f,g", 0 }, /* fadd.p fsrc1,fsrc2,fdest */
+{ "pfadd.ss", 0x48000430, 0xb40003cf, "e,f,g", 0 }, /* pfadd.p fsrc1,fsrc2,fdest */
+{ "pfadd.sd", 0x480004b0, 0xb400034f, "e,f,g", 0 }, /* pfadd.p fsrc1,fsrc2,fdest */
+{ "pfadd.dd", 0x480005b0, 0xb400024f, "e,f,g", 0 }, /* pfadd.p fsrc1,fsrc2,fdest */
+{ "fsub.ss", 0x48000031, 0xb40007ce, "e,f,g", 0 }, /* fsub.p fsrc1,fsrc2,fdest */
+{ "fsub.sd", 0x480000b1, 0xb400074e, "e,f,g", 0 }, /* fsub.p fsrc1,fsrc2,fdest */
+{ "fsub.dd", 0x480001b1, 0xb400064e, "e,f,g", 0 }, /* fsub.p fsrc1,fsrc2,fdest */
+{ "pfsub.ss", 0x48000431, 0xb40003ce, "e,f,g", 0 }, /* pfsub.p fsrc1,fsrc2,fdest */
+{ "pfsub.sd", 0x480004b1, 0xb400034e, "e,f,g", 0 }, /* pfsub.p fsrc1,fsrc2,fdest */
+{ "pfsub.dd", 0x480005b1, 0xb400024e, "e,f,g", 0 }, /* pfsub.p fsrc1,fsrc2,fdest */
+{ "fix.ss", 0x48000032, 0xb40007cd, "e,g", 0 }, /* fix.p fsrc1,fdest */
+{ "fix.sd", 0x480000b2, 0xb400074d, "e,g", 0 }, /* fix.p fsrc1,fdest */
+{ "fix.dd", 0x480001b2, 0xb400064d, "e,g", 0 }, /* fix.p fsrc1,fdest */
+{ "pfix.ss", 0x48000432, 0xb40003cd, "e,g", 0 }, /* pfix.p fsrc1,fdest */
+{ "pfix.sd", 0x480004b2, 0xb400034d, "e,g", 0 }, /* pfix.p fsrc1,fdest */
+{ "pfix.dd", 0x480005b2, 0xb400024d, "e,g", 0 }, /* pfix.p fsrc1,fdest */
+{ "famov.ss", 0x48000033, 0xb40007cc, "e,g", 0 }, /* famov.p fsrc1,fdest */
+{ "famov.ds", 0x48000133, 0xb40006cc, "e,g", 0 }, /* famov.p fsrc1,fdest */
+{ "famov.sd", 0x480000b3, 0xb400074c, "e,g", 0 }, /* famov.p fsrc1,fdest */
+{ "famov.dd", 0x480001b3, 0xb400064c, "e,g", 0 }, /* famov.p fsrc1,fdest */
+{ "pfamov.ss", 0x48000433, 0xb40003cc, "e,g", 0 }, /* pfamov.p fsrc1,fdest */
+{ "pfamov.ds", 0x48000533, 0xb40002cc, "e,g", 0 }, /* pfamov.p fsrc1,fdest */
+{ "pfamov.sd", 0x480004b3, 0xb400034c, "e,g", 0 }, /* pfamov.p fsrc1,fdest */
+{ "pfamov.dd", 0x480005b3, 0xb400024c, "e,g", 0 }, /* pfamov.p fsrc1,fdest */
+/* pfgt has R bit cleared; pfle has R bit set */
+{ "pfgt.ss", 0x48000434, 0xb40003cb, "e,f,g", 0 }, /* pfgt.p fsrc1,fsrc2,fdest */
+{ "pfgt.sd", 0x48000434, 0xb40003cb, "e,f,g", 0 }, /* pfgt.p fsrc1,fsrc2,fdest */
+{ "pfgt.dd", 0x48000534, 0xb40002cb, "e,f,g", 0 }, /* pfgt.p fsrc1,fsrc2,fdest */
+/* pfgt has R bit cleared; pfle has R bit set */
+{ "pfle.ss", 0x480004b4, 0xb400034b, "e,f,g", 0 }, /* pfle.p fsrc1,fsrc2,fdest */
+{ "pfle.sd", 0x480004b4, 0xb400034b, "e,f,g", 0 }, /* pfle.p fsrc1,fsrc2,fdest */
+{ "pfle.dd", 0x480005b4, 0xb400024b, "e,f,g", 0 }, /* pfle.p fsrc1,fsrc2,fdest */
+{ "ftrunc.ss", 0x4800003a, 0xb40007c5, "e,g", 0 }, /* ftrunc.p fsrc1,fdest */
+{ "ftrunc.sd", 0x480000ba, 0xb4000745, "e,g", 0 }, /* ftrunc.p fsrc1,fdest */
+{ "ftrunc.dd", 0x480001ba, 0xb4000645, "e,g", 0 }, /* ftrunc.p fsrc1,fdest */
+{ "pftrunc.ss", 0x4800043a, 0xb40003c5, "e,g", 0 }, /* pftrunc.p fsrc1,fdest */
+{ "pftrunc.sd", 0x480004ba, 0xb4000345, "e,g", 0 }, /* pftrunc.p fsrc1,fdest */
+{ "pftrunc.dd", 0x480005ba, 0xb4000245, "e,g", 0 }, /* pftrunc.p fsrc1,fdest */
+{ "fxfr", 0x48000040, 0xb40007bf, "e,d", 0 }, /* fxfr fsrc1,idest */
+{ "fiadd.ss", 0x48000049, 0xb40007b6, "e,f,g", 0 }, /* fiadd.w fsrc1,fsrc2,fdest */
+{ "fiadd.dd", 0x480001c9, 0xb4000636, "e,f,g", 0 }, /* fiadd.w fsrc1,fsrc2,fdest */
+{ "pfiadd.ss", 0x48000449, 0xb40003b6, "e,f,g", 0 }, /* pfiadd.w fsrc1,fsrc2,fdest */
+{ "pfiadd.dd", 0x480005c9, 0xb4000236, "e,f,g", 0 }, /* pfiadd.w fsrc1,fsrc2,fdest */
+{ "fisub.ss", 0x4800004d, 0xb40007b2, "e,f,g", 0 }, /* fisub.w fsrc1,fsrc2,fdest */
+{ "fisub.dd", 0x480001cd, 0xb4000632, "e,f,g", 0 }, /* fisub.w fsrc1,fsrc2,fdest */
+{ "pfisub.ss", 0x4800044d, 0xb40003b2, "e,f,g", 0 }, /* pfisub.w fsrc1,fsrc2,fdest */
+{ "pfisub.dd", 0x480005cd, 0xb4000232, "e,f,g", 0 }, /* pfisub.w fsrc1,fsrc2,fdest */
+{ "fzchkl", 0x48000057, 0xb40007a8, "e,f,g", 0 }, /* fzchkl fsrc1,fsrc2,fdest */
+{ "pfzchkl", 0x48000457, 0xb40003a8, "e,f,g", 0 }, /* pfzchkl fsrc1,fsrc2,fdest */
+{ "fzchks", 0x4800005f, 0xb40007a0, "e,f,g", 0 }, /* fzchks fsrc1,fsrc2,fdest */
+{ "pfzchks", 0x4800045f, 0xb40003a0, "e,f,g", 0 }, /* pfzchks fsrc1,fsrc2,fdest */
+{ "faddp", 0x48000050, 0xb40007af, "e,f,g", 0 }, /* faddp fsrc1,fsrc2,fdest */
+{ "pfaddp", 0x48000450, 0xb40003af, "e,f,g", 0 }, /* pfaddp fsrc1,fsrc2,fdest */
+{ "faddz", 0x48000051, 0xb40007ae, "e,f,g", 0 }, /* faddz fsrc1,fsrc2,fdest */
+{ "pfaddz", 0x48000451, 0xb40003ae, "e,f,g", 0 }, /* pfaddz fsrc1,fsrc2,fdest */
+{ "form", 0x4800005a, 0xb40007a5, "e,g", 0 }, /* form fsrc1,fdest */
+{ "pform", 0x4800045a, 0xb40003a5, "e,g", 0 }, /* pform fsrc1,fdest */
+
+/* Floating point pseudo-instructions */
+{ "fmov.ss", 0x48000049, 0xb7e007b6, "e,g", 0 }, /* fiadd.ss fsrc1,f0,fdest */
+{ "fmov.dd", 0x480001c9, 0xb7e00636, "e,g", 0 }, /* fiadd.dd fsrc1,f0,fdest */
+{ "fmov.sd", 0x480000b0, 0xb7e0074f, "e,g", 0 }, /* fadd.sd fsrc1,f0,fdest */
+{ "fmov.ds", 0x48000130, 0xb7e006cf, "e,g", 0 }, /* fadd.ds fsrc1,f0,fdest */
+{ "pfmov.ds", 0x48000530, 0xb73002cf, "e,g", 0 }, /* pfadd.ds fsrc1,f0,fdest */
+{ "pfmov.dd", 0x480005c9, 0xb7e00236, "e,g", 0 }, /* pfiadd.dd fsrc1,f0,fdest */
+
+
+};
+
+#define NUMOPCODES ((sizeof i860_opcodes)/(sizeof i860_opcodes[0]))
+
+
diff --git a/include/opcode/i960.h b/include/opcode/i960.h
new file mode 100644
index 0000000..b52fc33
--- /dev/null
+++ b/include/opcode/i960.h
@@ -0,0 +1,509 @@
+/* Basic 80960 instruction formats.
+ *
+ * The 'COJ' instructions are actually COBR instructions with the 'b' in
+ * the mnemonic replaced by a 'j'; they are ALWAYS "de-optimized" if necessary:
+ * if the displacement will not fit in 13 bits, the assembler will replace them
+ * with the corresponding compare and branch instructions.
+ *
+ * All of the 'MEMn' instructions are the same format; the 'n' in the name
+ * indicates the default index scale factor (the size of the datum operated on).
+ *
+ * The FBRA formats are not actually an instruction format. They are the
+ * "convenience directives" for branching on floating-point comparisons,
+ * each of which generates 2 instructions (a 'bno' and one other branch).
+ *
+ * The CALLJ format is not actually an instruction format. It indicates that
+ * the instruction generated (a CTRL-format 'call') should have its relocation
+ * specially flagged for link-time replacement with a 'bal' or 'calls' if
+ * appropriate.
+ */
+
+#define CTRL 0
+#define COBR 1
+#define COJ 2
+#define REG 3
+#define MEM1 4
+#define MEM2 5
+#define MEM4 6
+#define MEM8 7
+#define MEM12 8
+#define MEM16 9
+#define FBRA 10
+#define CALLJ 11
+
+/* Masks for the mode bits in REG format instructions */
+#define M1 0x0800
+#define M2 0x1000
+#define M3 0x2000
+
+/* Generate the 12-bit opcode for a REG format instruction by placing the
+ * high 8 bits in instruction bits 24-31, the low 4 bits in instruction bits
+ * 7-10.
+ */
+
+#define REG_OPC(opc) ((opc & 0xff0) << 20) | ((opc & 0xf) << 7)
+
+/* Generate a template for a REG format instruction: place the opcode bits
+ * in the appropriate fields and OR in mode bits for the operands that will not
+ * be used. I.e.,
+ * set m1=1, if src1 will not be used
+ * set m2=1, if src2 will not be used
+ * set m3=1, if dst will not be used
+ *
+ * Setting the "unused" mode bits to 1 speeds up instruction execution(!).
+ * The information is also useful to us because some 1-operand REG instructions
+ * use the src1 field, others the dst field; and some 2-operand REG instructions
+ * use src1/src2, others src1/dst. The set mode bits enable us to distinguish.
+ */
+#define R_0(opc) ( REG_OPC(opc) | M1 | M2 | M3 ) /* No operands */
+#define R_1(opc) ( REG_OPC(opc) | M2 | M3 ) /* 1 operand: src1 */
+#define R_1D(opc) ( REG_OPC(opc) | M1 | M2 ) /* 1 operand: dst */
+#define R_2(opc) ( REG_OPC(opc) | M3 ) /* 2 ops: src1/src2 */
+#define R_2D(opc) ( REG_OPC(opc) | M2 ) /* 2 ops: src1/dst */
+#define R_3(opc) ( REG_OPC(opc) ) /* 3 operands */
+
+/* DESCRIPTOR BYTES FOR REGISTER OPERANDS
+ *
+ * Interpret names as follows:
+ * R: global or local register only
+ * RS: global, local, or (if target allows) special-function register only
+ * RL: global or local register, or integer literal
+ * RSL: global, local, or (if target allows) special-function register;
+ * or integer literal
+ * F: global, local, or floating-point register
+ * FL: global, local, or floating-point register; or literal (including
+ * floating point)
+ *
+ * A number appended to a name indicates that registers must be aligned,
+ * as follows:
+ * 2: register number must be multiple of 2
+ * 4: register number must be multiple of 4
+ */
+
+#define SFR 0x10 /* Mask for the "sfr-OK" bit */
+#define LIT 0x08 /* Mask for the "literal-OK" bit */
+#define FP 0x04 /* Mask for "floating-point-OK" bit */
+
+/* This macro ors the bits together. Note that 'align' is a mask
+ * for the low 0, 1, or 2 bits of the register number, as appropriate.
+ */
+#define OP(align,lit,fp,sfr) ( align | lit | fp | sfr )
+
+#define R OP( 0, 0, 0, 0 )
+#define RS OP( 0, 0, 0, SFR )
+#define RL OP( 0, LIT, 0, 0 )
+#define RSL OP( 0, LIT, 0, SFR )
+#define F OP( 0, 0, FP, 0 )
+#define FL OP( 0, LIT, FP, 0 )
+#define R2 OP( 1, 0, 0, 0 )
+#define RL2 OP( 1, LIT, 0, 0 )
+#define F2 OP( 1, 0, FP, 0 )
+#define FL2 OP( 1, LIT, FP, 0 )
+#define R4 OP( 3, 0, 0, 0 )
+#define RL4 OP( 3, LIT, 0, 0 )
+#define F4 OP( 3, 0, FP, 0 )
+#define FL4 OP( 3, LIT, FP, 0 )
+
+#define M 0x7f /* Memory operand (MEMA & MEMB format instructions) */
+
+/* Macros to extract info from the register operand descriptor byte 'od'.
+ */
+#define SFR_OK(od) (od & SFR) /* TRUE if sfr operand allowed */
+#define LIT_OK(od) (od & LIT) /* TRUE if literal operand allowed */
+#define FP_OK(od) (od & FP) /* TRUE if floating-point op allowed */
+#define REG_ALIGN(od,n) ((od & 0x3 & n) == 0)
+ /* TRUE if reg #n is properly aligned */
+#define MEMOP(od) (od == M) /* TRUE if operand is a memory operand*/
+
+/* Description of a single i80960 instruction */
+struct i960_opcode {
+ long opcode; /* 32 bits, constant fields filled in, rest zeroed */
+ char *name; /* Assembler mnemonic */
+ short iclass; /* Class: see #defines below */
+ char format; /* REG, COBR, CTRL, MEMn, COJ, FBRA, or CALLJ */
+ char num_ops; /* Number of operands */
+ char operand[3];/* Operand descriptors; same order as assembler instr */
+};
+
+/* Classes of 960 intructions:
+ * - each instruction falls into one class.
+ * - each target architecture supports one or more classes.
+ *
+ * EACH CONSTANT MUST CONTAIN 1 AND ONLY 1 SET BIT!: see targ_has_iclass().
+ */
+#define I_BASE 0x01 /* 80960 base instruction set */
+#define I_CX 0x02 /* 80960Cx instruction */
+#define I_DEC 0x04 /* Decimal instruction */
+#define I_FP 0x08 /* Floating point instruction */
+#define I_KX 0x10 /* 80960Kx instruction */
+#define I_MIL 0x20 /* Military instruction */
+#define I_CASIM 0x40 /* CA simulator instruction */
+#define I_CX2 0x80 /* Cx/Jx/Hx instructions */
+#define I_JX 0x100 /* Jx/Hx instruction */
+#define I_HX 0x200 /* Hx instructions */
+
+/******************************************************************************
+ *
+ * TABLE OF i960 INSTRUCTION DESCRIPTIONS
+ *
+ ******************************************************************************/
+
+const struct i960_opcode i960_opcodes[] = {
+
+ /* if a CTRL instruction has an operand, it's always a displacement */
+
+ /* callj default=='call' */
+ { 0x09000000, "callj", I_BASE, CALLJ, 1, { 0, 0, 0 } },
+ { 0x08000000, "b", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x09000000, "call", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x0a000000, "ret", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x0b000000, "bal", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x10000000, "bno", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* bf same as bno */
+ { 0x10000000, "bf", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* bru same as bno */
+ { 0x10000000, "bru", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x11000000, "bg", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* brg same as bg */
+ { 0x11000000, "brg", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x12000000, "be", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* bre same as be */
+ { 0x12000000, "bre", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x13000000, "bge", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* brge same as bge */
+ { 0x13000000, "brge", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x14000000, "bl", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* brl same as bl */
+ { 0x14000000, "brl", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x15000000, "bne", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* brlg same as bne */
+ { 0x15000000, "brlg", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x16000000, "ble", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* brle same as ble */
+ { 0x16000000, "brle", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x17000000, "bo", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* bt same as bo */
+ { 0x17000000, "bt", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ /* bro same as bo */
+ { 0x17000000, "bro", I_BASE, CTRL, 1, { 0, 0, 0 } },
+ { 0x18000000, "faultno", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ /* faultf same as faultno */
+ { 0x18000000, "faultf", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x19000000, "faultg", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x1a000000, "faulte", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x1b000000, "faultge", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x1c000000, "faultl", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x1d000000, "faultne", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x1e000000, "faultle", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ { 0x1f000000, "faulto", I_BASE, CTRL, 0, { 0, 0, 0 } },
+ /* faultt syn for faulto */
+ { 0x1f000000, "faultt", I_BASE, CTRL, 0, { 0, 0, 0 } },
+
+ { 0x01000000, "syscall", I_CASIM,CTRL, 0, { 0, 0, 0 } },
+
+ /* If a COBR (or COJ) has 3 operands, the last one is always a
+ * displacement and does not appear explicitly in the table.
+ */
+
+ { 0x20000000, "testno", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x21000000, "testg", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x22000000, "teste", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x23000000, "testge", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x24000000, "testl", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x25000000, "testne", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x26000000, "testle", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x27000000, "testo", I_BASE, COBR, 1, { R, 0, 0 } },
+ { 0x30000000, "bbc", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x31000000, "cmpobg", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x32000000, "cmpobe", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x33000000, "cmpobge", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x34000000, "cmpobl", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x35000000, "cmpobne", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x36000000, "cmpoble", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x37000000, "bbs", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x38000000, "cmpibno", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x39000000, "cmpibg", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x3a000000, "cmpibe", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x3b000000, "cmpibge", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x3c000000, "cmpibl", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x3d000000, "cmpibne", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x3e000000, "cmpible", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x3f000000, "cmpibo", I_BASE, COBR, 3, { RL, RS, 0 } },
+ { 0x31000000, "cmpojg", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x32000000, "cmpoje", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x33000000, "cmpojge", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x34000000, "cmpojl", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x35000000, "cmpojne", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x36000000, "cmpojle", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x38000000, "cmpijno", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x39000000, "cmpijg", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x3a000000, "cmpije", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x3b000000, "cmpijge", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x3c000000, "cmpijl", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x3d000000, "cmpijne", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x3e000000, "cmpijle", I_BASE, COJ, 3, { RL, RS, 0 } },
+ { 0x3f000000, "cmpijo", I_BASE, COJ, 3, { RL, RS, 0 } },
+
+ { 0x80000000, "ldob", I_BASE, MEM1, 2, { M, R, 0 } },
+ { 0x82000000, "stob", I_BASE, MEM1, 2, { R, M, 0 } },
+ { 0x84000000, "bx", I_BASE, MEM1, 1, { M, 0, 0 } },
+ { 0x85000000, "balx", I_BASE, MEM1, 2, { M, R, 0 } },
+ { 0x86000000, "callx", I_BASE, MEM1, 1, { M, 0, 0 } },
+ { 0x88000000, "ldos", I_BASE, MEM2, 2, { M, R, 0 } },
+ { 0x8a000000, "stos", I_BASE, MEM2, 2, { R, M, 0 } },
+ { 0x8c000000, "lda", I_BASE, MEM1, 2, { M, R, 0 } },
+ { 0x90000000, "ld", I_BASE, MEM4, 2, { M, R, 0 } },
+ { 0x92000000, "st", I_BASE, MEM4, 2, { R, M, 0 } },
+ { 0x98000000, "ldl", I_BASE, MEM8, 2, { M, R2, 0 } },
+ { 0x9a000000, "stl", I_BASE, MEM8, 2, { R2, M, 0 } },
+ { 0xa0000000, "ldt", I_BASE, MEM12, 2, { M, R4, 0 } },
+ { 0xa2000000, "stt", I_BASE, MEM12, 2, { R4, M, 0 } },
+ { 0xb0000000, "ldq", I_BASE, MEM16, 2, { M, R4, 0 } },
+ { 0xb2000000, "stq", I_BASE, MEM16, 2, { R4, M, 0 } },
+ { 0xc0000000, "ldib", I_BASE, MEM1, 2, { M, R, 0 } },
+ { 0xc2000000, "stib", I_BASE, MEM1, 2, { R, M, 0 } },
+ { 0xc8000000, "ldis", I_BASE, MEM2, 2, { M, R, 0 } },
+ { 0xca000000, "stis", I_BASE, MEM2, 2, { R, M, 0 } },
+
+ { R_3(0x580), "notbit", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x581), "and", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x582), "andnot", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x583), "setbit", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x584), "notand", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x586), "xor", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x587), "or", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x588), "nor", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x589), "xnor", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_2D(0x58a), "not", I_BASE, REG, 2, { RSL,RS, 0 } },
+ { R_3(0x58b), "ornot", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x58c), "clrbit", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x58d), "notor", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x58e), "nand", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x58f), "alterbit", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x590), "addo", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x591), "addi", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x592), "subo", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x593), "subi", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x598), "shro", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x59a), "shrdi", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x59b), "shri", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x59c), "shlo", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x59d), "rotate", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x59e), "shli", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_2(0x5a0), "cmpo", I_BASE, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x5a1), "cmpi", I_BASE, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x5a2), "concmpo", I_BASE, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x5a3), "concmpi", I_BASE, REG, 2, { RSL,RSL, 0 } },
+ { R_3(0x5a4), "cmpinco", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x5a5), "cmpinci", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x5a6), "cmpdeco", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x5a7), "cmpdeci", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_2(0x5ac), "scanbyte", I_BASE, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x5ae), "chkbit", I_BASE, REG, 2, { RSL,RSL, 0 } },
+ { R_3(0x5b0), "addc", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x5b2), "subc", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_2D(0x5cc), "mov", I_BASE, REG, 2, { RSL,RS, 0 } },
+ { R_2D(0x5dc), "movl", I_BASE, REG, 2, { RL2,R2, 0 } },
+ { R_2D(0x5ec), "movt", I_BASE, REG, 2, { RL4,R4, 0 } },
+ { R_2D(0x5fc), "movq", I_BASE, REG, 2, { RL4,R4, 0 } },
+ { R_3(0x610), "atmod", I_BASE, REG, 3, { RS, RSL,R } },
+ { R_3(0x612), "atadd", I_BASE, REG, 3, { RS, RSL,RS } },
+ { R_2D(0x640), "spanbit", I_BASE, REG, 2, { RSL,RS, 0 } },
+ { R_2D(0x641), "scanbit", I_BASE, REG, 2, { RSL,RS, 0 } },
+ { R_3(0x645), "modac", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x650), "modify", I_BASE, REG, 3, { RSL,RSL,R } },
+ { R_3(0x651), "extract", I_BASE, REG, 3, { RSL,RSL,R } },
+ { R_3(0x654), "modtc", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x655), "modpc", I_BASE, REG, 3, { RSL,RSL,R } },
+ { R_1(0x660), "calls", I_BASE, REG, 1, { RSL, 0, 0 } },
+ { R_0(0x66b), "mark", I_BASE, REG, 0, { 0, 0, 0 } },
+ { R_0(0x66c), "fmark", I_BASE, REG, 0, { 0, 0, 0 } },
+ { R_0(0x66d), "flushreg", I_BASE, REG, 0, { 0, 0, 0 } },
+ { R_0(0x66f), "syncf", I_BASE, REG, 0, { 0, 0, 0 } },
+ { R_3(0x670), "emul", I_BASE, REG, 3, { RSL,RSL,R2 } },
+ { R_3(0x671), "ediv", I_BASE, REG, 3, { RSL,RL2,RS } },
+ { R_2D(0x672), "cvtadr", I_CASIM,REG, 2, { RL, R2, 0 } },
+ { R_3(0x701), "mulo", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x708), "remo", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x70b), "divo", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x741), "muli", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x748), "remi", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x749), "modi", I_BASE, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x74b), "divi", I_BASE, REG, 3, { RSL,RSL,RS } },
+
+ /* Floating-point instructions */
+
+ { R_2D(0x674), "cvtir", I_FP, REG, 2, { RL, F, 0 } },
+ { R_2D(0x675), "cvtilr", I_FP, REG, 2, { RL, F, 0 } },
+ { R_3(0x676), "scalerl", I_FP, REG, 3, { RL, FL2,F2 } },
+ { R_3(0x677), "scaler", I_FP, REG, 3, { RL, FL, F } },
+ { R_3(0x680), "atanr", I_FP, REG, 3, { FL, FL, F } },
+ { R_3(0x681), "logepr", I_FP, REG, 3, { FL, FL, F } },
+ { R_3(0x682), "logr", I_FP, REG, 3, { FL, FL, F } },
+ { R_3(0x683), "remr", I_FP, REG, 3, { FL, FL, F } },
+ { R_2(0x684), "cmpor", I_FP, REG, 2, { FL, FL, 0 } },
+ { R_2(0x685), "cmpr", I_FP, REG, 2, { FL, FL, 0 } },
+ { R_2D(0x688), "sqrtr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_2D(0x689), "expr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_2D(0x68a), "logbnr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_2D(0x68b), "roundr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_2D(0x68c), "sinr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_2D(0x68d), "cosr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_2D(0x68e), "tanr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_1(0x68f), "classr", I_FP, REG, 1, { FL, 0, 0 } },
+ { R_3(0x690), "atanrl", I_FP, REG, 3, { FL2,FL2,F2 } },
+ { R_3(0x691), "logeprl", I_FP, REG, 3, { FL2,FL2,F2 } },
+ { R_3(0x692), "logrl", I_FP, REG, 3, { FL2,FL2,F2 } },
+ { R_3(0x693), "remrl", I_FP, REG, 3, { FL2,FL2,F2 } },
+ { R_2(0x694), "cmporl", I_FP, REG, 2, { FL2,FL2, 0 } },
+ { R_2(0x695), "cmprl", I_FP, REG, 2, { FL2,FL2, 0 } },
+ { R_2D(0x698), "sqrtrl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_2D(0x699), "exprl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_2D(0x69a), "logbnrl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_2D(0x69b), "roundrl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_2D(0x69c), "sinrl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_2D(0x69d), "cosrl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_2D(0x69e), "tanrl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_1(0x69f), "classrl", I_FP, REG, 1, { FL2, 0, 0 } },
+ { R_2D(0x6c0), "cvtri", I_FP, REG, 2, { FL, R, 0 } },
+ { R_2D(0x6c1), "cvtril", I_FP, REG, 2, { FL, R2, 0 } },
+ { R_2D(0x6c2), "cvtzri", I_FP, REG, 2, { FL, R, 0 } },
+ { R_2D(0x6c3), "cvtzril", I_FP, REG, 2, { FL, R2, 0 } },
+ { R_2D(0x6c9), "movr", I_FP, REG, 2, { FL, F, 0 } },
+ { R_2D(0x6d9), "movrl", I_FP, REG, 2, { FL2,F2, 0 } },
+ { R_2D(0x6e1), "movre", I_FP, REG, 2, { FL4,F4, 0 } },
+ { R_3(0x6e2), "cpysre", I_FP, REG, 3, { FL4,FL4,F4 } },
+ { R_3(0x6e3), "cpyrsre", I_FP, REG, 3, { FL4,FL4,F4 } },
+ { R_3(0x78b), "divr", I_FP, REG, 3, { FL, FL, F } },
+ { R_3(0x78c), "mulr", I_FP, REG, 3, { FL, FL, F } },
+ { R_3(0x78d), "subr", I_FP, REG, 3, { FL, FL, F } },
+ { R_3(0x78f), "addr", I_FP, REG, 3, { FL, FL, F } },
+ { R_3(0x79b), "divrl", I_FP, REG, 3, { FL2,FL2,F2 } },
+ { R_3(0x79c), "mulrl", I_FP, REG, 3, { FL2,FL2,F2 } },
+ { R_3(0x79d), "subrl", I_FP, REG, 3, { FL2,FL2,F2 } },
+ { R_3(0x79f), "addrl", I_FP, REG, 3, { FL2,FL2,F2 } },
+
+ /* These are the floating point branch instructions. Each actually
+ * generates 2 branch instructions: the first a CTRL instruction with
+ * the indicated opcode, and the second a 'bno'.
+ */
+
+ { 0x12000000, "brue", I_FP, FBRA, 1, { 0, 0, 0 } },
+ { 0x11000000, "brug", I_FP, FBRA, 1, { 0, 0, 0 } },
+ { 0x13000000, "bruge", I_FP, FBRA, 1, { 0, 0, 0 } },
+ { 0x14000000, "brul", I_FP, FBRA, 1, { 0, 0, 0 } },
+ { 0x16000000, "brule", I_FP, FBRA, 1, { 0, 0, 0 } },
+ { 0x15000000, "brulg", I_FP, FBRA, 1, { 0, 0, 0 } },
+
+
+ /* Decimal instructions */
+
+ { R_3(0x642), "daddc", I_DEC, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x643), "dsubc", I_DEC, REG, 3, { RSL,RSL,RS } },
+ { R_2D(0x644), "dmovt", I_DEC, REG, 2, { RSL,RS, 0 } },
+
+
+ /* KX extensions */
+
+ { R_2(0x600), "synmov", I_KX, REG, 2, { R, R, 0 } },
+ { R_2(0x601), "synmovl", I_KX, REG, 2, { R, R, 0 } },
+ { R_2(0x602), "synmovq", I_KX, REG, 2, { R, R, 0 } },
+ { R_2D(0x615), "synld", I_KX, REG, 2, { R, R, 0 } },
+
+
+ /* MC extensions */
+
+ { R_3(0x603), "cmpstr", I_MIL, REG, 3, { R, R, RL } },
+ { R_3(0x604), "movqstr", I_MIL, REG, 3, { R, R, RL } },
+ { R_3(0x605), "movstr", I_MIL, REG, 3, { R, R, RL } },
+ { R_2D(0x613), "inspacc", I_MIL, REG, 2, { R, R, 0 } },
+ { R_2D(0x614), "ldphy", I_MIL, REG, 2, { R, R, 0 } },
+ { R_3(0x617), "fill", I_MIL, REG, 3, { R, RL, RL } },
+ { R_2D(0x646), "condrec", I_MIL, REG, 2, { R, R, 0 } },
+ { R_2D(0x656), "receive", I_MIL, REG, 2, { R, R, 0 } },
+ { R_3(0x662), "send", I_MIL, REG, 3, { R, RL, R } },
+ { R_1(0x663), "sendserv", I_MIL, REG, 1, { R, 0, 0 } },
+ { R_1(0x664), "resumprcs", I_MIL, REG, 1, { R, 0, 0 } },
+ { R_1(0x665), "schedprcs", I_MIL, REG, 1, { R, 0, 0 } },
+ { R_0(0x666), "saveprcs", I_MIL, REG, 0, { 0, 0, 0 } },
+ { R_1(0x668), "condwait", I_MIL, REG, 1, { R, 0, 0 } },
+ { R_1(0x669), "wait", I_MIL, REG, 1, { R, 0, 0 } },
+ { R_1(0x66a), "signal", I_MIL, REG, 1, { R, 0, 0 } },
+ { R_1D(0x673), "ldtime", I_MIL, REG, 1, { R2, 0, 0 } },
+
+
+ /* CX extensions */
+
+ { R_3(0x5d8), "eshro", I_CX2, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x630), "sdma", I_CX, REG, 3, { RSL,RSL,RL } },
+ { R_3(0x631), "udma", I_CX, REG, 0, { 0, 0, 0 } },
+ { R_3(0x659), "sysctl", I_CX2, REG, 3, { RSL,RSL,RL } },
+
+
+ /* Jx extensions. */
+ { R_3(0x780), "addono", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x790), "addog", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a0), "addoe", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b0), "addoge", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c0), "addol", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d0), "addone", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e0), "addole", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f0), "addoo", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x781), "addino", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x791), "addig", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a1), "addie", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b1), "addige", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c1), "addil", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d1), "addine", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e1), "addile", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f1), "addio", I_JX, REG, 3, { RSL,RSL,RS } },
+
+ { R_2D(0x5ad), "bswap", I_JX, REG, 2, { RSL, RS, 0 } },
+
+ { R_2(0x594), "cmpob", I_JX, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x595), "cmpib", I_JX, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x596), "cmpos", I_JX, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x597), "cmpis", I_JX, REG, 2, { RSL,RSL, 0 } },
+
+ { R_3(0x784), "selno", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x794), "selg", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a4), "sele", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b4), "selge", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c4), "sell", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d4), "selne", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e4), "selle", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f4), "selo", I_JX, REG, 3, { RSL,RSL,RS } },
+
+ { R_3(0x782), "subono", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x792), "subog", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a2), "suboe", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b2), "suboge", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c2), "subol", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d2), "subone", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e2), "subole", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f2), "suboo", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x783), "subino", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x793), "subig", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a3), "subie", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b3), "subige", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c3), "subil", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d3), "subine", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e3), "subile", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f3), "subio", I_JX, REG, 3, { RSL,RSL,RS } },
+
+ { R_3(0x65c), "dcctl", I_JX, REG, 3, { RSL,RSL,RL } },
+ { R_3(0x65b), "icctl", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_2D(0x658), "intctl", I_JX, REG, 2, { RSL, RS, 0 } },
+ { R_0(0x5b4), "intdis", I_JX, REG, 0, { 0, 0, 0 } },
+ { R_0(0x5b5), "inten", I_JX, REG, 0, { 0, 0, 0 } },
+ { R_0(0x65d), "halt", I_JX, REG, 1, { RSL, 0, 0 } },
+
+ /* Hx extensions. */
+ { 0xac000000, "dcinva", I_HX, MEM1, 1, { M, 0, 0 } },
+
+ /* END OF TABLE */
+
+ { 0, NULL, 0, 0, 0, { 0, 0, 0 } }
+};
+
+ /* end of i960-opcode.h */
diff --git a/include/opcode/m68k.h b/include/opcode/m68k.h
new file mode 100644
index 0000000..ecb3f95
--- /dev/null
+++ b/include/opcode/m68k.h
@@ -0,0 +1,315 @@
+/* Opcode table header for m680[01234]0/m6888[12]/m68851.
+ Copyright 1989, 91, 92, 93, 94, 95, 96, 1997 Free Software Foundation.
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
+
+/* These are used as bit flags for the arch field in the m68k_opcode
+ structure. */
+#define _m68k_undef 0
+#define m68000 0x001
+#define m68008 m68000 /* synonym for -m68000. otherwise unused. */
+#define m68010 0x002
+#define m68020 0x004
+#define m68030 0x008
+#define m68ec030 m68030 /* similar enough to -m68030 to ignore differences;
+ gas will deal with the few differences. */
+#define m68040 0x010
+/* there is no 68050 */
+#define m68060 0x020
+#define m68881 0x040
+#define m68882 m68881 /* synonym for -m68881. otherwise unused. */
+#define m68851 0x080
+#define cpu32 0x100 /* e.g., 68332 */
+#define mcf5200 0x200
+
+ /* handy aliases */
+#define m68040up (m68040 | m68060)
+#define m68030up (m68030 | m68040up)
+#define m68020up (m68020 | m68030up)
+#define m68010up (m68010 | cpu32 | m68020up)
+#define m68000up (m68000 | m68010up)
+
+#define mfloat (m68881 | m68882 | m68040 | m68060)
+#define mmmu (m68851 | m68030 | m68040 | m68060)
+
+/* The structure used to hold information for an opcode. */
+
+struct m68k_opcode
+{
+ /* The opcode name. */
+ const char *name;
+ /* The opcode itself. */
+ unsigned long opcode;
+ /* The mask used by the disassembler. */
+ unsigned long match;
+ /* The arguments. */
+ const char *args;
+ /* The architectures which support this opcode. */
+ unsigned int arch;
+};
+
+/* The structure used to hold information for an opcode alias. */
+
+struct m68k_opcode_alias
+{
+ /* The alias name. */
+ const char *alias;
+ /* The instruction for which this is an alias. */
+ const char *primary;
+};
+
+/* We store four bytes of opcode for all opcodes because that is the
+ most any of them need. The actual length of an instruction is
+ always at least 2 bytes, and is as much longer as necessary to hold
+ the operands it has.
+
+ The match field is a mask saying which bits must match particular
+ opcode in order for an instruction to be an instance of that
+ opcode.
+
+ The args field is a string containing two characters for each
+ operand of the instruction. The first specifies the kind of
+ operand; the second, the place it is stored. */
+
+/* Kinds of operands:
+ Characters used: AaBCcDdFfIJkLlMmnOopQqRrSsTtUVvWXYZ0123|*~%;@!&$?/<>#^+-
+
+ D data register only. Stored as 3 bits.
+ A address register only. Stored as 3 bits.
+ a address register indirect only. Stored as 3 bits.
+ R either kind of register. Stored as 4 bits.
+ r either kind of register indirect only. Stored as 4 bits.
+ At the moment, used only for cas2 instruction.
+ F floating point coprocessor register only. Stored as 3 bits.
+ O an offset (or width): immediate data 0-31 or data register.
+ Stored as 6 bits in special format for BF... insns.
+ + autoincrement only. Stored as 3 bits (number of the address register).
+ - autodecrement only. Stored as 3 bits (number of the address register).
+ Q quick immediate data. Stored as 3 bits.
+ This matches an immediate operand only when value is in range 1 .. 8.
+ M moveq immediate data. Stored as 8 bits.
+ This matches an immediate operand only when value is in range -128..127
+ T trap vector immediate data. Stored as 4 bits.
+
+ k K-factor for fmove.p instruction. Stored as a 7-bit constant or
+ a three bit register offset, depending on the field type.
+
+ # immediate data. Stored in special places (b, w or l)
+ which say how many bits to store.
+ ^ immediate data for floating point instructions. Special places
+ are offset by 2 bytes from '#'...
+ B pc-relative address, converted to an offset
+ that is treated as immediate data.
+ d displacement and register. Stores the register as 3 bits
+ and stores the displacement in the entire second word.
+
+ C the CCR. No need to store it; this is just for filtering validity.
+ S the SR. No need to store, just as with CCR.
+ U the USP. No need to store, just as with CCR.
+
+ I Coprocessor ID. Not printed if 1. The Coprocessor ID is always
+ extracted from the 'd' field of word one, which means that an extended
+ coprocessor opcode can be skipped using the 'i' place, if needed.
+
+ s System Control register for the floating point coprocessor.
+
+ J Misc register for movec instruction, stored in 'j' format.
+ Possible values:
+ 0x000 SFC Source Function Code reg [60, 40, 30, 20, 10]
+ 0x001 DFC Data Function Code reg [60, 40, 30, 20, 10]
+ 0x002 CACR Cache Control Register [60, 40, 30, 20]
+ 0x003 TC MMU Translation Control [60, 40]
+ 0x004 ITT0 Instruction Transparent
+ Translation reg 0 [60, 40]
+ 0x005 ITT1 Instruction Transparent
+ Translation reg 1 [60, 40]
+ 0x006 DTT0 Data Transparent
+ Translation reg 0 [60, 40]
+ 0x007 DTT1 Data Transparent
+ Translation reg 1 [60, 40]
+ 0x008 BUSCR Bus Control Register [60]
+ 0x800 USP User Stack Pointer [60, 40, 30, 20, 10]
+ 0x801 VBR Vector Base reg [60, 40, 30, 20, 10]
+ 0x802 CAAR Cache Address Register [ 30, 20]
+ 0x803 MSP Master Stack Pointer [ 40, 30, 20]
+ 0x804 ISP Interrupt Stack Pointer [ 40, 30, 20]
+ 0x805 MMUSR MMU Status reg [ 40]
+ 0x806 URP User Root Pointer [60, 40]
+ 0x807 SRP Supervisor Root Pointer [60, 40]
+ 0x808 PCR Processor Configuration reg [60]
+ 0xC00 ROMBAR ROM Base Address Register [520X]
+ 0xC04 RAMBAR0 RAM Base Address Register 0 [520X]
+ 0xC05 RAMBAR1 RAM Base Address Register 0 [520X]
+ 0xC0F MBAR0 RAM Base Address Register 0 [520X]
+
+ L Register list of the type d0-d7/a0-a7 etc.
+ (New! Improved! Can also hold fp0-fp7, as well!)
+ The assembler tries to see if the registers match the insn by
+ looking at where the insn wants them stored.
+
+ l Register list like L, but with all the bits reversed.
+ Used for going the other way. . .
+
+ c cache identifier which may be "nc" for no cache, "ic"
+ for instruction cache, "dc" for data cache, or "bc"
+ for both caches. Used in cinv and cpush. Always
+ stored in position "d".
+
+ The remainder are all stored as 6 bits using an address mode and a
+ register number; they differ in which addressing modes they match.
+
+ * all (modes 0-6,7.0-4)
+ ~ alterable memory (modes 2-6,7.0,7.1)
+ (not 0,1,7.2-4)
+ % alterable (modes 0-6,7.0,7.1)
+ (not 7.2-4)
+ ; data (modes 0,2-6,7.0-4)
+ (not 1)
+ @ data, but not immediate (modes 0,2-6,7.0-3)
+ (not 1,7.4)
+ ! control (modes 2,5,6,7.0-3)
+ (not 0,1,3,4,7.4)
+ & alterable control (modes 2,5,6,7.0,7.1)
+ (not 0,1,7.2-4)
+ $ alterable data (modes 0,2-6,7.0,7.1)
+ (not 1,7.2-4)
+ ? alterable control, or data register (modes 0,2,5,6,7.0,7.1)
+ (not 1,3,4,7.2-4)
+ / control, or data register (modes 0,2,5,6,7.0-3)
+ (not 1,3,4,7.4)
+ > *save operands (modes 2,4,5,6,7.0,7.1)
+ (not 0,1,3,7.2-4)
+ < *restore operands (modes 2,3,5,6,7.0-3)
+ (not 0,1,4,7.4)
+
+ coldfire move operands:
+ m (modes 0-4)
+ n (modes 5,7.2)
+ o (modes 6,7.0,7.1,7.3,7.4)
+ p (modes 0-5)
+
+ coldfire bset/bclr/btst/mulsl/mulul operands:
+ q (modes 0,2-5)
+ v (modes 0,2-5,7.0,7.1)
+*/
+
+/* For the 68851: */
+/*
+ I didn't use much imagination in choosing the
+ following codes, so many of them aren't very
+ mnemonic. -rab
+
+ 0 32 bit pmmu register
+ Possible values:
+ 000 TC Translation Control Register (68030, 68851)
+
+ 1 16 bit pmmu register
+ 111 AC Access Control (68851)
+
+ 2 8 bit pmmu register
+ 100 CAL Current Access Level (68851)
+ 101 VAL Validate Access Level (68851)
+ 110 SCC Stack Change Control (68851)
+
+ 3 68030-only pmmu registers (32 bit)
+ 010 TT0 Transparent Translation reg 0
+ (aka Access Control reg 0 -- AC0 -- on 68ec030)
+ 011 TT1 Transparent Translation reg 1
+ (aka Access Control reg 1 -- AC1 -- on 68ec030)
+
+ W wide pmmu registers
+ Possible values:
+ 001 DRP Dma Root Pointer (68851)
+ 010 SRP Supervisor Root Pointer (68030, 68851)
+ 011 CRP Cpu Root Pointer (68030, 68851)
+
+ f function code register (68030, 68851)
+ 0 SFC
+ 1 DFC
+
+ V VAL register only (68851)
+
+ X BADx, BACx (16 bit)
+ 100 BAD Breakpoint Acknowledge Data (68851)
+ 101 BAC Breakpoint Acknowledge Control (68851)
+
+ Y PSR (68851) (MMUSR on 68030) (ACUSR on 68ec030)
+ Z PCSR (68851)
+
+ | memory (modes 2-6, 7.*)
+
+ t address test level (68030 only)
+ Stored as 3 bits, range 0-7.
+ Also used for breakpoint instruction now.
+
+*/
+
+/* Places to put an operand, for non-general operands:
+ s source, low bits of first word.
+ d dest, shifted 9 in first word
+ 1 second word, shifted 12
+ 2 second word, shifted 6
+ 3 second word, shifted 0
+ 4 third word, shifted 12
+ 5 third word, shifted 6
+ 6 third word, shifted 0
+ 7 second word, shifted 7
+ 8 second word, shifted 10
+ 9 second word, shifted 5
+ D store in both place 1 and place 3; for divul and divsl.
+ B first word, low byte, for branch displacements
+ W second word (entire), for branch displacements
+ L second and third words (entire), for branch displacements
+ (also overloaded for move16)
+ b second word, low byte
+ w second word (entire) [variable word/long branch offset for dbra]
+ W second word (entire) (must be signed 16 bit value)
+ l second and third word (entire)
+ g variable branch offset for bra and similar instructions.
+ The place to store depends on the magnitude of offset.
+ t store in both place 7 and place 8; for floating point operations
+ c branch offset for cpBcc operations.
+ The place to store is word two if bit six of word one is zero,
+ and words two and three if bit six of word one is one.
+ i Increment by two, to skip over coprocessor extended operands. Only
+ works with the 'I' format.
+ k Dynamic K-factor field. Bits 6-4 of word 2, used as a register number.
+ Also used for dynamic fmovem instruction.
+ C floating point coprocessor constant - 7 bits. Also used for static
+ K-factors...
+ j Movec register #, stored in 12 low bits of second word.
+
+ Places to put operand, for general operands:
+ d destination, shifted 6 bits in first word
+ b source, at low bit of first word, and immediate uses one byte
+ w source, at low bit of first word, and immediate uses two bytes
+ l source, at low bit of first word, and immediate uses four bytes
+ s source, at low bit of first word.
+ Used sometimes in contexts where immediate is not allowed anyway.
+ f single precision float, low bit of 1st word, immediate uses 4 bytes
+ F double precision float, low bit of 1st word, immediate uses 8 bytes
+ x extended precision float, low bit of 1st word, immediate uses 12 bytes
+ p packed float, low bit of 1st word, immediate uses 12 bytes
+*/
+
+extern const struct m68k_opcode m68k_opcodes[];
+extern const struct m68k_opcode_alias m68k_opcode_aliases[];
+
+extern const int m68k_numopcodes, m68k_numaliases;
+
+/* end of m68k-opcode.h */
diff --git a/include/opcode/m88k.h b/include/opcode/m88k.h
new file mode 100644
index 0000000..a17fa03
--- /dev/null
+++ b/include/opcode/m88k.h
@@ -0,0 +1,923 @@
+/* Table of opcodes for the motorola 88k family.
+ Copyright 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB and GAS.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * Disassembler Instruction Table
+ *
+ * The first field of the table is the opcode field. If an opcode
+ * is specified which has any non-opcode bits on, a system error
+ * will occur when the system attempts the install it into the
+ * instruction table. The second parameter is a pointer to the
+ * instruction mnemonic. Each operand is specified by offset, width,
+ * and type. The offset is the bit number of the least significant
+ * bit of the operand with bit 0 being the least significant bit of
+ * the instruction. The width is the number of bits used to specify
+ * the operand. The type specifies the output format to be used for
+ * the operand. The valid formats are: register, register indirect,
+ * hex constant, and bit field specification. The last field is a
+ * pointer to the next instruction in the linked list. These pointers
+ * are initialized by init_disasm().
+ *
+ * Structure Format
+ *
+ * struct INSTAB {
+ * UPINT opcode;
+ * char *mnemonic;
+ * struct OPSPEC op1,op2,op3;
+ * struct SIM_FLAGS flgs;
+ * struct INSTAB *next;
+ * }
+ *
+ * struct OPSPEC {
+ * UPINT offset:5;
+ * UPINT width:6;
+ * UPINT type:5;
+ * }
+ *
+ * Revision History
+ *
+ * Revision 1.0 11/08/85 Creation date
+ * 1.1 02/05/86 Updated instruction mnemonic table MD
+ * 1.2 06/16/86 Updated SIM_FLAGS for floating point
+ * 1.3 09/20/86 Updated for new encoding
+ * 05/11/89 R. Trawick adapted from Motorola disassembler
+ */
+
+#include <stdio.h>
+
+
+/*
+ * This file contains the structures and constants needed to build the M88000
+ * simulator. It is the main include file, containing all the
+ * structures, macros and definitions except for the floating point
+ * instruction set.
+ */
+
+/*
+ * The following flag informs the Simulator as to what type of byte ordering
+ * will be used. For instance, a BOFLAG = 1 indicates a DEC VAX and IBM type
+ * of ordering shall be used.
+*/
+
+/* # define BOFLAG 1 */ /* BYTE ORDERING FLAG */
+
+/* define the number of bits in the primary opcode field of the instruction,
+ * the destination field, the source 1 and source 2 fields.
+ */
+# define OP 8 /* size of opcode field */
+# define DEST 6 /* size of destination */
+# define SOURCE1 6 /* size of source1 */
+# define SOURCE2 6 /* size of source2 */
+
+# define REGs 32 /* number of registers */
+
+# define WORD long
+# define FLAG unsigned
+# define STATE short
+
+# define TRUE 1
+# define FALSE 0
+
+# define READ 0
+# define WRITE 1
+
+/* The next four equates define the priorities that the various classes
+ * of instructions have regarding writing results back into registers and
+ * signalling exceptions.
+ */
+/* PMEM is also defined in <sys/param.h> on Delta 88's. Sigh! */
+#undef PMEM
+
+# define PINT 0 /* Integer Priority */
+# define PFLT 1 /* Floating Point Priority */
+# define PMEM 2 /* Memory Priority */
+# define NA 3 /* Not Applicable, instruction doesnt write to regs */
+# define HIPRI 3 /* highest of these priorities */
+
+/* The instruction registers are an artificial mechanism to speed up
+ * simulator execution. In the real processor, an instruction register
+ * is 32 bits wide. In the simulator, the 32 bit instruction is kept in
+ * a structure field called rawop, and the instruction is partially decoded,
+ * and split into various fields and flags which make up the other fields
+ * of the structure.
+ * The partial decode is done when the instructions are initially loaded
+ * into simulator memory. The simulator code memory is not an array of
+ * 32 bit words, but is an array of instruction register structures.
+ * Yes this wastes memory, but it executes much quicker.
+ */
+
+struct IR_FIELDS {
+ unsigned op:OP,
+ dest: DEST,
+ src1: SOURCE1,
+ src2: SOURCE2;
+ int ltncy,
+ extime,
+ wb_pri; /* writeback priority */
+ unsigned imm_flags:2,/* immediate size */
+ rs1_used:1, /* register source 1 used */
+ rs2_used:1, /* register source 2 used */
+ rsd_used:1, /* register source/dest. used */
+ c_flag:1, /* complement */
+ u_flag:1, /* upper half word */
+ n_flag:1, /* execute next */
+ wb_flag:1, /* uses writeback slot */
+ dest_64:1, /* dest size */
+ s1_64:1, /* source 1 size */
+ s2_64:1, /* source 2 size */
+ scale_flag:1, /* scaled register */
+ brk_flg:1;
+ };
+
+struct mem_segs {
+ struct mem_wrd *seg; /* pointer (returned by calloc) to segment */
+ unsigned long baseaddr; /* base load address from file headers */
+ unsigned long endaddr; /* Ending address of segment */
+ int flags; /* segment control flags (none defined 12/5/86) */
+};
+
+#define MAXSEGS (10) /* max number of segment allowed */
+#define MEMSEGSIZE (sizeof(struct mem_segs))/* size of mem_segs structure */
+
+
+#define BRK_RD (0x01) /* break on memory read */
+#define BRK_WR (0x02) /* break on memory write */
+#define BRK_EXEC (0x04) /* break on execution */
+#define BRK_CNT (0x08) /* break on terminal count */
+
+
+struct mem_wrd {
+ struct IR_FIELDS opcode; /* simulator instruction break down */
+ union {
+ unsigned long l; /* memory element break down */
+ unsigned short s[2];
+ unsigned char c[4];
+ } mem;
+};
+
+#define MEMWRDSIZE (sizeof(struct mem_wrd)) /* size of each 32 bit memory model */
+
+/* External declarations */
+
+extern struct mem_segs memory[];
+extern struct PROCESSOR m78000;
+
+struct PROCESSOR {
+ unsigned WORD
+ ip, /* execute instruction pointer */
+ vbr, /* vector base register */
+ psr; /* processor status register */
+
+ WORD S1bus, /* source 1 */
+ S2bus, /* source 2 */
+ Dbus, /* destination */
+ DAbus, /* data address bus */
+ ALU,
+ Regs[REGs], /* data registers */
+ time_left[REGs], /* max clocks before reg is available */
+ wb_pri[REGs], /* writeback priority of reg */
+ SFU0_regs[REGs], /* integer unit control regs */
+ SFU1_regs[REGs], /* floating point control regs */
+ Scoreboard[REGs],
+ Vbr;
+ unsigned WORD scoreboard,
+ Psw,
+ Tpsw;
+ FLAG jump_pending:1; /* waiting for a jump instr. */
+ };
+
+# define i26bit 1 /* size of immediate field */
+# define i16bit 2
+# define i10bit 3
+
+/* Definitions for fields in psr */
+
+# define mode 31
+# define rbo 30
+# define ser 29
+# define carry 28
+# define sf7m 11
+# define sf6m 10
+# define sf5m 9
+# define sf4m 8
+# define sf3m 7
+# define sf2m 6
+# define sf1m 5
+# define mam 4
+# define inm 3
+# define exm 2
+# define trm 1
+# define ovfm 0
+
+#define MODEMASK (1<<(mode-1))
+# define SILENT 0 /* simulate without output to crt */
+# define VERBOSE 1 /* simulate in verbose mode */
+# define PR_INSTR 2 /* only print instructions */
+
+# define RESET 16 /* reset phase */
+
+# define PHASE1 0 /* data path phases */
+# define PHASE2 1
+
+/* the 1 clock operations */
+
+# define ADDU 1
+# define ADDC 2
+# define ADDUC 3
+# define ADD 4
+
+# define SUBU ADD+1
+# define SUBB ADD+2
+# define SUBUB ADD+3
+# define SUB ADD+4
+
+# define AND_ ADD+5
+# define OR ADD+6
+# define XOR ADD+7
+# define CMP ADD+8
+
+/* the LOADS */
+
+# define LDAB CMP+1
+# define LDAH CMP+2
+# define LDA CMP+3
+# define LDAD CMP+4
+
+# define LDB LDAD+1
+# define LDH LDAD+2
+# define LD LDAD+3
+# define LDD LDAD+4
+# define LDBU LDAD+5
+# define LDHU LDAD+6
+
+/* the STORES */
+
+# define STB LDHU+1
+# define STH LDHU+2
+# define ST LDHU+3
+# define STD LDHU+4
+
+/* the exchange */
+
+# define XMEMBU LDHU+5
+# define XMEM LDHU+6
+
+/* the branches */
+# define JSR STD+1
+# define BSR STD+2
+# define BR STD+3
+# define JMP STD+4
+# define BB1 STD+5
+# define BB0 STD+6
+# define RTN STD+7
+# define BCND STD+8
+
+/* the TRAPS */
+# define TB1 BCND+1
+# define TB0 BCND+2
+# define TCND BCND+3
+# define RTE BCND+4
+# define TBND BCND+5
+
+/* the MISC instructions */
+# define MUL TBND + 1
+# define DIV MUL +2
+# define DIVU MUL +3
+# define MASK MUL +4
+# define FF0 MUL +5
+# define FF1 MUL +6
+# define CLR MUL +7
+# define SET MUL +8
+# define EXT MUL +9
+# define EXTU MUL +10
+# define MAK MUL +11
+# define ROT MUL +12
+
+/* control register manipulations */
+
+# define LDCR ROT +1
+# define STCR ROT +2
+# define XCR ROT +3
+
+# define FLDCR ROT +4
+# define FSTCR ROT +5
+# define FXCR ROT +6
+
+
+# define NOP XCR +1
+
+/* floating point instructions */
+
+# define FADD NOP +1
+# define FSUB NOP +2
+# define FMUL NOP +3
+# define FDIV NOP +4
+# define FSQRT NOP +5
+# define FCMP NOP +6
+# define FIP NOP +7
+# define FLT NOP +8
+# define INT NOP +9
+# define NINT NOP +10
+# define TRNC NOP +11
+# define FLDC NOP +12
+# define FSTC NOP +13
+# define FXC NOP +14
+
+# define UEXT(src,off,wid) ((((unsigned int)(src))>>(off)) & ((1<<(wid)) - 1))
+# define SEXT(src,off,wid) (((((int)(src))<<(32-((off)+(wid)))) >>(32-(wid))) )
+# define MAKE(src,off,wid) \
+ ((((unsigned int)(src)) & ((1<<(wid)) - 1)) << (off))
+
+# define opword(n) (unsigned long) (memaddr->mem.l)
+
+/* Constants and Masks */
+
+#define SFU0 0x80000000
+#define SFU1 0x84000000
+#define SFU7 0x9c000000
+#define RRI10 0xf0000000
+#define RRR 0xf4000000
+#define SFUMASK 0xfc00ffe0
+#define RRRMASK 0xfc00ffe0
+#define RRI10MASK 0xfc00fc00
+#define DEFMASK 0xfc000000
+#define CTRL 0x0000f000
+#define CTRLMASK 0xfc00f800
+
+/* Operands types */
+
+enum operand_type {
+ HEX = 1,
+ REG = 2,
+ CONT = 3,
+ IND = 3,
+ BF = 4,
+ REGSC = 5 /* scaled register */,
+ CRREG = 6 /* control register */,
+ FCRREG = 7 /* floating point control register */,
+ PCREL = 8,
+ CONDMASK = 9,
+ XREG = 10, /* extended register */
+ DEC = 11, /* decimal */
+};
+
+/* Hashing Specification */
+
+#define HASHVAL 79
+
+/* Type definitions */
+
+typedef unsigned int UINT;
+
+/* Structure templates */
+
+#if never
+typedef struct {
+ unsigned int offset:5;
+ unsigned int width:6;
+ unsigned int type:5;
+} OPSPEC;
+#endif
+
+typedef struct {
+ unsigned int offset;
+ unsigned int width;
+ enum operand_type type;
+} OPSPEC;
+
+ struct SIM_FLAGS {
+ int ltncy, /* latency (max number of clocks needed to execute) */
+ extime, /* execution time (min number of clocks needed to execute) */
+ wb_pri; /* writeback slot priority */
+ unsigned op:OP, /* simulator version of opcode */
+ imm_flags:2, /* 10,16 or 26 bit immediate flags */
+ rs1_used:1, /* register source 1 used */
+ rs2_used:1, /* register source 2 used */
+ rsd_used:1, /* register source/dest used */
+ c_flag:1, /* complement */
+ u_flag:1, /* upper half word */
+ n_flag:1, /* execute next */
+ wb_flag:1, /* uses writeback slot */
+ dest_64:1, /* double precision dest */
+ s1_64:1, /* double precision source 1 */
+ s2_64:1, /* double precision source 2 */
+ scale_flag:1; /* register is scaled */
+};
+
+typedef struct INSTRUCTAB {
+ unsigned int opcode;
+ char *mnemonic;
+ OPSPEC op1,op2,op3;
+ struct SIM_FLAGS flgs;
+ struct INSTRUCTAB *next;
+} INSTAB;
+
+
+#define NO_OPERAND {0,0,0}
+
+/* Opcode Mnemonic Op 1 Spec Op 2 Spec Op 3 Spec Simflags Next */
+
+static INSTAB instructions[] = {
+ {0xf400c800,"jsr ",{0,5,REG} ,NO_OPERAND ,NO_OPERAND , {2,2,NA,JSR , 0,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xf400cc00,"jsr.n ",{0,5,REG} ,NO_OPERAND ,NO_OPERAND , {1,1,NA,JSR , 0,0,1,0,0,0,1,1,0,0,0,0}, NULL },
+ {0xf400c000,"jmp ",{0,5,REG} ,NO_OPERAND ,NO_OPERAND , {2,2,NA,JMP , 0,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xf400c400,"jmp.n ",{0,5,REG} ,NO_OPERAND ,NO_OPERAND , {1,1,NA,JMP , 0,0,1,0,0,0,1,1,0,0,0,0}, NULL },
+ {0xc8000000,"bsr ",{0,26,PCREL},NO_OPERAND ,NO_OPERAND , {2,2,NA,BSR , i26bit,0,0,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xcc000000,"bsr.n ",{0,26,PCREL},NO_OPERAND ,NO_OPERAND , {1,1,NA,BSR , i26bit,0,0,0,0,0,1,1,0,0,0,0}, NULL },
+ {0xc0000000,"br ",{0,26,PCREL},NO_OPERAND ,NO_OPERAND , {2,2,NA,BR , i26bit,0,0,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xc4000000,"br.n ",{0,26,PCREL},NO_OPERAND ,NO_OPERAND , {1,1,NA,BR , i26bit,0,0,0,0,0,1,1,0,0,0,0}, NULL },
+ {0xd0000000,"bb0 ",{21,5,HEX} ,{16,5,REG} ,{0,16,PCREL},{2,2,NA,BB0, i16bit,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xd4000000,"bb0.n ",{21,5,HEX} ,{16,5,REG} ,{0,16,PCREL},{1,1,NA,BB0, i16bit,0,1,0,0,0,1,1,0,0,0,0}, NULL },
+ {0xd8000000,"bb1 ",{21,5,HEX},{16,5,REG} ,{0,16,PCREL},{2,2,NA,BB1, i16bit,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xdc000000,"bb1.n ",{21,5,HEX},{16,5,REG} ,{0,16,PCREL},{1,1,NA,BB1, i16bit,0,1,0,0,0,1,1,0,0,0,0}, NULL },
+ {0xf000d000,"tb0 ",{21,5,HEX} ,{16,5,REG} ,{0,10,HEX}, {2,2,NA,TB0 , i10bit,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xf000d800,"tb1 ",{21,5,HEX} ,{16,5,REG} ,{0,10,HEX}, {2,2,NA,TB1 , i10bit,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xe8000000,"bcnd ",{21,5,CONDMASK},{16,5,REG},{0,16,PCREL},{2,2,NA,BCND, i16bit,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xec000000,"bcnd.n ",{21,5,CONDMASK},{16,5,REG},{0,16,PCREL},{1,1,NA,BCND, i16bit,0,1,0,0,0,1,1,0,0,0,0}, NULL },
+ {0xf000e800,"tcnd ",{21,5,CONDMASK},{16,5,REG},{0,10,HEX}, {2,2,NA,TCND, i10bit,0,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xf8000000,"tbnd ",{16,5,REG} ,{0,16,HEX} ,NO_OPERAND , {2,2,NA,TBND, i10bit,1,0,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xf400f800,"tbnd ",{16,5,REG} ,{0,5,REG} ,NO_OPERAND , {2,2,NA,TBND, 0,1,1,0,0,0,0,1,0,0,0,0}, NULL },
+ {0xf400fc00,"rte ",NO_OPERAND ,NO_OPERAND ,NO_OPERAND , {2,2,NA,RTE , 0,0,0,0,0,0,0,1,0,0,0,0}, NULL },
+ {0x1c000000,"ld.b ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,LDB ,i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001c00,"ld.b ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,LDB , 0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0x0c000000,"ld.bu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,LDBU, i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4000c00,"ld.bu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,LDBU ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0x18000000,"ld.h ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,LDH ,i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001800,"ld.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,LDH ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001a00,"ld.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{3,1,PMEM,LDH ,0,1,1,1,0,0,0,1,0,0,0,1}, NULL },
+ {0x08000000,"ld.hu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,LDHU, i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4000800,"ld.hu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,LDHU ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4000a00,"ld.hu ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{3,1,PMEM,LDHU ,0,1,1,1,0,0,0,1,0,0,0,1}, NULL },
+ {0x14000000,"ld ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,LD ,i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001400,"ld ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,LD ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001600,"ld ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{3,1,PMEM,LD ,0,1,1,1,0,0,0,1,0,0,0,1}, NULL },
+ {0x10000000,"ld.d ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,LDD ,i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001000,"ld.d ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,LDD ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001200,"ld.d ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{3,1,PMEM,LDD ,0,1,1,1,0,0,0,1,0,0,0,1}, NULL },
+ {0xf4001500,"ld.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,LD ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4001700,"ld.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{3,1,PMEM,LD ,0,1,1,1,0,0,0,1,0,0,0,1}, NULL },
+ {0x2c000000,"st.b ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,NA,STB ,i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4002c00,"st.b ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,STB ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0x28000000,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,NA,STH ,i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4002800,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,STH ,0,1,1,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4002a00,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,NA,STH ,0,1,1,1,0,0,0,1,0,0,0,1}, NULL },
+ {0x24000000,"st ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,NA,ST ,i16bit,1,0,1,0,0,0,1,0,0,0,0}, NULL },
+ {0xf4002400,"st ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,ST ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0xf4002600,"st ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,NA,ST ,0,1,1,1,0,0,0,1,0,0,0,1} ,NULL },
+ {0x20000000,"st.d ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,NA,STD ,i16bit,0,1,0,0,0,0,1,0,0,0,0} ,NULL },
+ {0xf4002000,"st.d ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,STD ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0xf4002200,"st.d ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,NA,STD ,0,1,1,1,0,0,0,1,0,0,0,1} ,NULL },
+ {0xf4002500,"st.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,ST ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0xf4002700,"st.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,NA,ST ,0,1,1,1,0,0,0,1,0,0,0,1} ,NULL },
+/* m88100 only:
+ {0x00000000,"xmem.bu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,XMEMBU ,i16bit,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ */
+ {0xf4000000,"xmem.bu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,XMEM ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+/* m88100 only:
+ {0x04000000,"xmem ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {3,1,PMEM,XMEM ,i16bit,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ */
+ {0xf4000400,"xmem ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,XMEM ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0xf4000600,"xmem ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{3,1,PMEM,XMEM ,0,1,1,1,0,0,0,1,0,0,0,1} ,NULL },
+ {0xf4000500,"xmem.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {3,1,PMEM,XMEM ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0xf4000700,"xmem.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{3,1,PMEM,XMEM ,0,1,1,1,0,0,0,1,0,0,0,1} ,NULL },
+/* m88100 only:
+ {0xf4003e00,"lda.b ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,PINT,LDAH, 0,1,1,1,0,0,0,0,0,0,0,1} ,NULL },
+ */
+ {0xf4003e00,"lda.x ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,PINT,LDAH, 0,1,1,1,0,0,0,0,0,0,0,1} ,NULL },
+ {0xf4003a00,"lda.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,PINT,LDAH, 0,1,1,1,0,0,0,0,0,0,0,1} ,NULL },
+ {0xf4003600,"lda ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,PINT,LDA , 0,1,1,1,0,0,0,0,0,0,0,1} ,NULL },
+ {0xf4003200,"lda.d ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,PINT,LDAD, 0,1,1,1,0,0,0,0,0,0,0,1} ,NULL },
+
+ {0x80004000,"ldcr ",{21,5,REG} ,{5,6,CRREG} ,NO_OPERAND ,{1,1,PINT,LDCR, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x80008000,"stcr ",{16,5,REG} ,{5,6,CRREG} ,NO_OPERAND ,{1,1,PINT,STCR, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x8000c000,"xcr ",{21,5,REG} ,{16,5,REG} ,{5,6,CRREG},{1,1,PINT,XCR, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+
+ {0xf4006000,"addu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006200,"addu.ci ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006100,"addu.co ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006300,"addu.cio ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006400,"subu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUBU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006600,"subu.ci ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUBU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006500,"subu.co ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUBU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006700,"subu.cio ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUBU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006800,"divu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {32,32,PINT,DIVU, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4006900,"divu.d ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,}, NULL },
+ {0xf4006e00,"muls ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,}, NULL },
+ {0xf4006c00,"mulu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,4,PINT,MUL, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007000,"add ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADD , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007200,"add.ci ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADD , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007100,"add.co ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADD , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007300,"add.cio ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADD , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007400,"sub ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUB , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007600,"sub.ci ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUB , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007500,"sub.co ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUB , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007700,"sub.cio ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SUB , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007800,"divs ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {32,32,PINT,DIV , 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4007c00,"cmp ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,CMP, 0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+
+ {0x60000000,"addu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,ADDU, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x64000000,"subu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,SUBU, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+
+ {0x68000000,"divu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {32,32,PINT,DIVU, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x6c000000,"mulu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {4,1,PINT,MUL, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x70000000,"add ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,ADD, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x74000000,"sub ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,SUB, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x78000000,"divs ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {32,32,PINT,DIV, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x7c000000,"cmp ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,CMP, i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+
+ {0xf4004000,"and ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,AND_ ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4004400,"and.c ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,AND_ ,0,1,1,1,1,0,0,0,0,0,0,0} ,NULL },
+ {0xf4005800,"or ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,OR ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4005c00,"or.c ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,OR ,0,1,1,1,1,0,0,0,0,0,0,0} ,NULL },
+ {0xf4005000,"xor ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,XOR ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4005400,"xor.c ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,XOR ,0,1,1,1,1,0,0,0,0,0,0,0} ,NULL },
+ {0x40000000,"and ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,AND_ ,i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x44000000,"and.u ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,AND_ ,i16bit,1,0,1,0,1,0,0,0,0,0,0} ,NULL },
+ {0x58000000,"or ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,OR ,i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x5c000000,"or.u ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,OR ,i16bit,1,0,1,0,1,0,0,0,0,0,0} ,NULL },
+ {0x50000000,"xor ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,XOR ,i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x54000000,"xor.u ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,XOR ,i16bit,1,0,1,0,1,0,0,0,0,0,0} ,NULL },
+ {0x48000000,"mask ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,MASK ,i16bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0x4c000000,"mask.u ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,MASK ,i16bit,1,0,1,0,1,0,0,0,0,0,0} ,NULL },
+ {0xf400ec00,"ff0 ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {1,1,PINT,FF0 ,0,0,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf400e800,"ff1 ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {1,1,PINT,FF1 ,0,0,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf0008000,"clr ",{21,5,REG} ,{16,5,REG} ,{0,10,BF} , {1,1,PINT,CLR ,i10bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf0008800,"set ",{21,5,REG} ,{16,5,REG} ,{0,10,BF} , {1,1,PINT,SET ,i10bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf0009000,"ext ",{21,5,REG} ,{16,5,REG} ,{0,10,BF} , {1,1,PINT,EXT ,i10bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf0009800,"extu ",{21,5,REG} ,{16,5,REG} ,{0,10,BF} , {1,1,PINT,EXTU ,i10bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf000a000,"mak ",{21,5,REG} ,{16,5,REG} ,{0,10,BF} , {1,1,PINT,MAK ,i10bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf000a800,"rot ",{21,5,REG} ,{16,5,REG} ,{0,10,BF} , {1,1,PINT,ROT ,i10bit,1,0,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4008000,"clr ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,CLR ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4008800,"set ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,SET ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4009000,"ext ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,EXT ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf4009800,"extu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,EXTU ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf400a000,"mak ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,MAK ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+ {0xf400a800,"rot ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ROT ,0,1,1,1,0,0,0,0,0,0,0,0} ,NULL },
+
+ {0x84002800,"fadd.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {5,1,PFLT,FADD ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84002880,"fadd.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FADD ,0,1,1,1,0,0,0,1,0,0,1,0} ,NULL },
+ {0x84002a00,"fadd.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FADD ,0,1,1,1,0,0,0,1,0,1,0,0} ,NULL },
+ {0x84002a80,"fadd.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FADD ,0,1,1,1,0,0,0,1,0,1,1,0} ,NULL },
+ {0x84002820,"fadd.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FADD ,0,1,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x840028a0,"fadd.dsd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FADD ,0,1,1,1,0,0,0,1,1,0,1,0} ,NULL },
+ {0x84002a20,"fadd.dds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FADD ,0,1,1,1,0,0,0,1,1,1,0,0} ,NULL },
+ {0x84002aa0,"fadd.ddd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FADD ,0,1,1,1,0,0,0,1,1,1,1,0} ,NULL },
+ {0x84003000,"fsub.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {5,1,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84003080,"fsub.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,0,1,0} ,NULL },
+ {0x84003200,"fsub.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,1,0,0} ,NULL },
+ {0x84003280,"fsub.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,1,1,0} ,NULL },
+ {0x84003020,"fsub.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x840030a0,"fsub.dsd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,1,0,1,0} ,NULL },
+ {0x84003220,"fsub.dds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,1,1,0,0} ,NULL },
+ {0x840032a0,"fsub.ddd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,1,1,1,0} ,NULL },
+ {0x84000000,"fmul.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,1,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84000080,"fmul.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,0,1,0} ,NULL },
+ {0x84000200,"fmul.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,1,0,0} ,NULL },
+ {0x84000280,"fmul.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,1,1,0} ,NULL },
+ {0x84000020,"fmul.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x840000a0,"fmul.dsd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,1,0,1,0} ,NULL },
+ {0x84000220,"fmul.dds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,1,1,0,0} ,NULL },
+ {0x840002a0,"fmul.ddd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,1,1,1,0} ,NULL },
+ {0x84007000,"fdiv.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {30,30,PFLT,FDIV ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84007080,"fdiv.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0,0,0,1,0,0,1,0} ,NULL },
+ {0x84007200,"fdiv.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0,0,0,1,0,1,0,0} ,NULL },
+ {0x84007280,"fdiv.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0,0,0,1,0,1,1,0} ,NULL },
+ {0x84007020,"fdiv.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x840070a0,"fdiv.dsd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0,0,0,1,1,0,1,0} ,NULL },
+ {0x84007220,"fdiv.dds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0,0,0,1,1,1,0,0} ,NULL },
+ {0x840072a0,"fdiv.ddd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0,0,0,1,1,1,1,0} ,NULL },
+ {0x84007800,"fsqrt.ss ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {5,1,PFLT,FLT ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84007820,"fsqrt.sd ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {5,1,PFLT,FLT ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84007880,"fsqrt.ds ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {5,1,PFLT,FLT ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x840078a0,"fsqrt.dd ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {6,1,PFLT,FLT ,0,0,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x84003800,"fcmp.ss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {5,1,PFLT,FCMP ,0,1,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84003880,"fcmp.sd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,1,PFLT,FCMP ,0,1,1,1,0,0,0,1,0,1,0,0} ,NULL },
+ {0x84003a00,"fcmp.ds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,1,PFLT,FCMP ,0,1,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x84003a80,"fcmp.dd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,1,PFLT,FCMP ,0,1,1,1,0,0,0,1,1,1,0,0} ,NULL },
+ {0x84002000,"flt.s ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {5,1,PFLT,FLT ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84002020,"flt.d ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {6,1,PFLT,FLT ,0,0,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x84004800,"int.s ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {5,1,PFLT,INT ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84004880,"int.d ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {6,1,PFLT,INT ,0,0,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x84005000,"nint.s ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {5,1,PFLT,INT ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84005080,"nint.d ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {6,1,PFLT,INT ,0,0,1,1,0,0,0,1,1,0,0,0} ,NULL },
+ {0x84005800,"trnc.s ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {5,1,PFLT,TRNC ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x84005880,"trnc.d ",{21,5,REG} ,{0,5,REG} ,NO_OPERAND , {6,1,PFLT,TRNC ,0,0,1,1,0,0,0,1,1,0,0,0} ,NULL },
+
+ {0x80004800,"fldcr ",{21,5,REG} ,{5,6,FCRREG} ,NO_OPERAND , {1,1,PFLT,FLDC ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x80008800,"fstcr ",{16,5,REG} ,{5,6,FCRREG} ,NO_OPERAND , {1,1,PFLT,FSTC ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+ {0x8000c800,"fxcr ",{21,5,REG} ,{16,5,REG} ,{5,6,FCRREG} , {1,1,PFLT,FXC ,0,0,1,1,0,0,0,1,0,0,0,0} ,NULL },
+
+/* The following are new for the 88110. */
+
+ {0x8400aaa0,"fadd.ddd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400aa80,"fadd.dds ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400aac0,"fadd.ddx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400aa20,"fadd.dsd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400aa00,"fadd.dss ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400aa40,"fadd.dsx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400ab20,"fadd.dxd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400ab00,"fadd.dxs ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400ab40,"fadd.dxx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a8a0,"fadd.sdd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a880,"fadd.sds ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a8c0,"fadd.sdx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a820,"fadd.ssd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a800,"fadd.sss ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a840,"fadd.ssx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a920,"fadd.sxd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a900,"fadd.sxs ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400a940,"fadd.sxx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400aca0,"fadd.xdd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400ac80,"fadd.xds ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400acc0,"fadd.xdx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400ac20,"fadd.xsd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
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+ {0x8400b240,"fsub.dsx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
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+ {0x8400b300,"fsub.dxs ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b340,"fsub.dxx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b0a0,"fsub.sdd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b080,"fsub.sds ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b0c0,"fsub.sdx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b020,"fsub.ssd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b000,"fsub.sss ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b040,"fsub.ssx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b120,"fsub.sxd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b100,"fsub.sxs ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b140,"fsub.sxx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b4a0,"fsub.xdd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b480,"fsub.xds ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b4c0,"fsub.xdx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b420,"fsub.xsd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b400,"fsub.xss ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b440,"fsub.xsx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b520,"fsub.xxd ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b500,"fsub.xxs ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400b540,"fsub.xxx ",{21,5,XREG} ,{16,5,XREG} ,{0,5,XREG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x8400fc00,"illop", {0,2,DEC}, NO_OPERAND, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x8400c800,"int.ss ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400c880,"int.sd ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400c900,"int.sx ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x04000000,"ld ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x00000000,"ld.d ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x3c000000,"ld.x ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0xf0001400,"ld ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001000,"ld.d ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001800,"ld.x ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001500,"ld.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001100,"ld.d.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001900,"ld.x.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0xf0001600,"ld ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001200,"ld.d ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001a00,"ld.x ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001700,"ld.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001300,"ld.d.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0001b00,"ld.x.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x8400c000,"mov.s ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400c080,"mov.d ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x84004200,"mov.s ", {21,5,XREG}, {0,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x84004280,"mov.d ", {21,5,XREG}, {0,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400c300,"mov ", {21,5,XREG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0xf4006d00,"mulu.d ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x8400d080,"nint.sd ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400d000,"nint.ss ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400d100,"nint.sx ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x88002020,"padd.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88002040,"padd.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88002060,"padd ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x880021e0,"padds.s ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880021a0,"padds.s.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880021c0,"padds.s.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880020e0,"padds.u ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880020a0,"padds.u.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880020c0,"padds.u.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88002160,"padds.us ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88002120,"padds.us.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88002140,"padds.us.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x88003860,"pcmp ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x88000000,"pmul ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x88006260,"ppack.16 ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88006240,"ppack.16.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88006460,"ppack.32 ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88006420,"ppack.32.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88006440,"ppack.32.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88006160,"ppack.8 ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x88007200,"prot ", {21,5,REG}, {16,5,REG}, {5,6,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88007800,"prot ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x88003020,"psub.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88003040,"psub.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88003060,"psub ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x880031e0,"psubs.s ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880031a0,"psubs.s.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880031c0,"psubs.s.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880030e0,"psubs.u ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880030a0,"psubs.u.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x880030c0,"psubs.u.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88003160,"psubs.us ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88003120,"psubs.us.b ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88003140,"psubs.us.h ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x88006800,"punpk.n ", {21,5,REG}, {16,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x88006820,"punpk.b ", {21,5,REG}, {16,5,REG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x34000000,"st ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x30000000,"st.d ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x38000000,"st.x ", {21,5,XREG}, {16,5,REG}, {0,16,HEX}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0xf4002c80,"st.b.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002880,"st.h.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002480,"st.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002080,"st.d.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002d80,"st.b.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002980,"st.h.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002580,"st.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002180,"st.d.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0xf0002400,"st ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002000,"st.d ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002100,"st.d.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002180,"st.d.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002080,"st.d.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002500,"st.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002580,"st.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002480,"st.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002800,"st.x ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002900,"st.x.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002980,"st.x.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002880,"st.x.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REG}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0xf4002f80,"st.b.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002e80,"st.b.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002380,"st.d.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002280,"st.d.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002b80,"st.h.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002a80,"st.h.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002780,"st.usr.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf4002680,"st.wt ", {21,5,REG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0xf0002600,"st ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002200,"st.d ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002300,"st.d.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002380,"st.d.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002280,"st.d.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002700,"st.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002780,"st.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002680,"st.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002a00,"st.x ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002b00,"st.x.usr ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002b80,"st.x.usr.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0xf0002a80,"st.x.wt ", {21,5,XREG}, {16,5,REG}, {0,5,REGSC}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+ {0x8400d880,"trnc.sd ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400d800,"trnc.ss ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+ {0x8400d900,"trnc.sx ", {21,5,REG}, {0,5,XREG}, NO_OPERAND, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NULL },
+
+};
+
+/*
+ * Local Variables:
+ * fill-column: 131
+ * End:
+ */
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
new file mode 100644
index 0000000..f0a8c7e
--- /dev/null
+++ b/include/opcode/mips.h
@@ -0,0 +1,723 @@
+/* mips.h. Mips opcode list for GDB, the GNU debugger.
+ Copyright 1993, 94, 95, 96, 1997 Free Software Foundation, Inc.
+ Contributed by Ralph Campbell and OSF
+ Commented and modified by Ian Lance Taylor, Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _MIPS_H_
+#define _MIPS_H_
+
+/* These are bit masks and shift counts to use to access the various
+ fields of an instruction. To retrieve the X field of an
+ instruction, use the expression
+ (i >> OP_SH_X) & OP_MASK_X
+ To set the same field (to j), use
+ i = (i &~ (OP_MASK_X << OP_SH_X)) | (j << OP_SH_X)
+
+ Make sure you use fields that are appropriate for the instruction,
+ of course.
+
+ The 'i' format uses OP, RS, RT and IMMEDIATE.
+
+ The 'j' format uses OP and TARGET.
+
+ The 'r' format uses OP, RS, RT, RD, SHAMT and FUNCT.
+
+ The 'b' format uses OP, RS, RT and DELTA.
+
+ The floating point 'i' format uses OP, RS, RT and IMMEDIATE.
+
+ The floating point 'r' format uses OP, FMT, FT, FS, FD and FUNCT.
+
+ A breakpoint instruction uses OP, CODE and SPEC (10 bits of the
+ breakpoint instruction are not defined; Kane says the breakpoint
+ code field in BREAK is 20 bits; yet MIPS assemblers and debuggers
+ only use ten bits). An optional two-operand form of break/sdbbp
+ allows the lower ten bits to be set too.
+
+ The syscall instruction uses SYSCALL.
+
+ The general coprocessor instructions use COPZ. */
+
+#define OP_MASK_OP 0x3f
+#define OP_SH_OP 26
+#define OP_MASK_RS 0x1f
+#define OP_SH_RS 21
+#define OP_MASK_FR 0x1f
+#define OP_SH_FR 21
+#define OP_MASK_FMT 0x1f
+#define OP_SH_FMT 21
+#define OP_MASK_BCC 0x7
+#define OP_SH_BCC 18
+#define OP_MASK_CODE 0x3ff
+#define OP_SH_CODE 16
+#define OP_MASK_CODE2 0x3ff
+#define OP_SH_CODE2 6
+#define OP_MASK_RT 0x1f
+#define OP_SH_RT 16
+#define OP_MASK_FT 0x1f
+#define OP_SH_FT 16
+#define OP_MASK_CACHE 0x1f
+#define OP_SH_CACHE 16
+#define OP_MASK_RD 0x1f
+#define OP_SH_RD 11
+#define OP_MASK_FS 0x1f
+#define OP_SH_FS 11
+#define OP_MASK_PREFX 0x1f
+#define OP_SH_PREFX 11
+#define OP_MASK_CCC 0x7
+#define OP_SH_CCC 8
+#define OP_MASK_SYSCALL 0xfffff
+#define OP_SH_SYSCALL 6
+#define OP_MASK_SHAMT 0x1f
+#define OP_SH_SHAMT 6
+#define OP_MASK_FD 0x1f
+#define OP_SH_FD 6
+#define OP_MASK_TARGET 0x3ffffff
+#define OP_SH_TARGET 0
+#define OP_MASK_COPZ 0x1ffffff
+#define OP_SH_COPZ 0
+#define OP_MASK_IMMEDIATE 0xffff
+#define OP_SH_IMMEDIATE 0
+#define OP_MASK_DELTA 0xffff
+#define OP_SH_DELTA 0
+#define OP_MASK_FUNCT 0x3f
+#define OP_SH_FUNCT 0
+#define OP_MASK_SPEC 0x3f
+#define OP_SH_SPEC 0
+#define OP_SH_LOCC 8 /* FP condition code */
+#define OP_SH_HICC 18 /* FP condition code */
+#define OP_MASK_CC 0x7
+#define OP_SH_COP1NORM 25 /* Normal COP1 encoding */
+#define OP_MASK_COP1NORM 0x1 /* a single bit */
+#define OP_SH_COP1SPEC 21 /* COP1 encodings */
+#define OP_MASK_COP1SPEC 0xf
+#define OP_MASK_COP1SCLR 0x4
+#define OP_MASK_COP1CMP 0x3
+#define OP_SH_COP1CMP 4
+#define OP_SH_FORMAT 21 /* FP short format field */
+#define OP_MASK_FORMAT 0x7
+#define OP_SH_TRUE 16
+#define OP_MASK_TRUE 0x1
+#define OP_SH_GE 17
+#define OP_MASK_GE 0x01
+#define OP_SH_UNSIGNED 16
+#define OP_MASK_UNSIGNED 0x1
+#define OP_SH_HINT 16
+#define OP_MASK_HINT 0x1f
+#define OP_SH_MMI 0 /* Multimedia (parallel) op */
+#define OP_MASK_MMI 0x3f
+#define OP_SH_MMISUB 6
+#define OP_MASK_MMISUB 0x1f
+#define OP_MASK_PERFREG 0x1f /* Performance monitoring */
+#define OP_SH_PERFREG 1
+
+/* This structure holds information for a particular instruction. */
+
+struct mips_opcode
+{
+ /* The name of the instruction. */
+ const char *name;
+ /* A string describing the arguments for this instruction. */
+ const char *args;
+ /* The basic opcode for the instruction. When assembling, this
+ opcode is modified by the arguments to produce the actual opcode
+ that is used. If pinfo is INSN_MACRO, then this is 0. */
+ unsigned long match;
+ /* If pinfo is not INSN_MACRO, then this is a bit mask for the
+ relevant portions of the opcode when disassembling. If the
+ actual opcode anded with the match field equals the opcode field,
+ then we have found the correct instruction. If pinfo is
+ INSN_MACRO, then this field is the macro identifier. */
+ unsigned long mask;
+ /* For a macro, this is INSN_MACRO. Otherwise, it is a collection
+ of bits describing the instruction, notably any relevant hazard
+ information. */
+ unsigned long pinfo;
+ /* A collection of bits describing the instruction sets of which this
+ instruction or macro is a member. */
+ unsigned long membership;
+};
+
+/* These are the characters which may appears in the args field of an
+ instruction. They appear in the order in which the fields appear
+ when the instruction is used. Commas and parentheses in the args
+ string are ignored when assembling, and written into the output
+ when disassembling.
+
+ Each of these characters corresponds to a mask field defined above.
+
+ "<" 5 bit shift amount (OP_*_SHAMT)
+ ">" shift amount between 32 and 63, stored after subtracting 32 (OP_*_SHAMT)
+ "a" 26 bit target address (OP_*_TARGET)
+ "b" 5 bit base register (OP_*_RS)
+ "c" 10 bit breakpoint code (OP_*_CODE)
+ "d" 5 bit destination register specifier (OP_*_RD)
+ "h" 5 bit prefx hint (OP_*_PREFX)
+ "i" 16 bit unsigned immediate (OP_*_IMMEDIATE)
+ "j" 16 bit signed immediate (OP_*_DELTA)
+ "k" 5 bit cache opcode in target register position (OP_*_CACHE)
+ "o" 16 bit signed offset (OP_*_DELTA)
+ "p" 16 bit PC relative branch target address (OP_*_DELTA)
+ "q" 10 bit extra breakpoint code (OP_*_CODE2)
+ "r" 5 bit same register used as both source and target (OP_*_RS)
+ "s" 5 bit source register specifier (OP_*_RS)
+ "t" 5 bit target register (OP_*_RT)
+ "u" 16 bit upper 16 bits of address (OP_*_IMMEDIATE)
+ "v" 5 bit same register used as both source and destination (OP_*_RS)
+ "w" 5 bit same register used as both target and destination (OP_*_RT)
+ "C" 25 bit coprocessor function code (OP_*_COPZ)
+ "B" 20 bit syscall function code (OP_*_SYSCALL)
+ "x" accept and ignore register name
+ "z" must be zero register
+
+ Floating point instructions:
+ "D" 5 bit destination register (OP_*_FD)
+ "M" 3 bit compare condition code (OP_*_CCC) (only used for mips4 and up)
+ "N" 3 bit branch condition code (OP_*_BCC) (only used for mips4 and up)
+ "S" 5 bit fs source 1 register (OP_*_FS)
+ "T" 5 bit ft source 2 register (OP_*_FT)
+ "R" 5 bit fr source 3 register (OP_*_FR)
+ "V" 5 bit same register used as floating source and destination (OP_*_FS)
+ "W" 5 bit same register used as floating target and destination (OP_*_FT)
+
+ Coprocessor instructions:
+ "E" 5 bit target register (OP_*_RT)
+ "G" 5 bit destination register (OP_*_RD)
+ "P" 5 bit performance-monitor register (OP_*_PERFREG)
+
+ Macro instructions:
+ "A" General 32 bit expression
+ "I" 32 bit immediate
+ "F" 64 bit floating point constant in .rdata
+ "L" 64 bit floating point constant in .lit8
+ "f" 32 bit floating point constant
+ "l" 32 bit floating point constant in .lit4
+
+ Other:
+ "()" parens surrounding optional value
+ "," separates operands
+
+ Characters used so far, for quick reference when adding more:
+ "<>(),"
+ "ABCDEFGILMNSTRVW"
+ "abcdfhijklopqrstuvwxz"
+*/
+
+/* These are the bits which may be set in the pinfo field of an
+ instructions, if it is not equal to INSN_MACRO. */
+
+/* Modifies the general purpose register in OP_*_RD. */
+#define INSN_WRITE_GPR_D 0x00000001
+/* Modifies the general purpose register in OP_*_RT. */
+#define INSN_WRITE_GPR_T 0x00000002
+/* Modifies general purpose register 31. */
+#define INSN_WRITE_GPR_31 0x00000004
+/* Modifies the floating point register in OP_*_FD. */
+#define INSN_WRITE_FPR_D 0x00000008
+/* Modifies the floating point register in OP_*_FS. */
+#define INSN_WRITE_FPR_S 0x00000010
+/* Modifies the floating point register in OP_*_FT. */
+#define INSN_WRITE_FPR_T 0x00000020
+/* Reads the general purpose register in OP_*_RS. */
+#define INSN_READ_GPR_S 0x00000040
+/* Reads the general purpose register in OP_*_RT. */
+#define INSN_READ_GPR_T 0x00000080
+/* Reads the floating point register in OP_*_FS. */
+#define INSN_READ_FPR_S 0x00000100
+/* Reads the floating point register in OP_*_FT. */
+#define INSN_READ_FPR_T 0x00000200
+/* Reads the floating point register in OP_*_FR. */
+#define INSN_READ_FPR_R 0x00000400
+/* Modifies coprocessor condition code. */
+#define INSN_WRITE_COND_CODE 0x00000800
+/* Reads coprocessor condition code. */
+#define INSN_READ_COND_CODE 0x00001000
+/* TLB operation. */
+#define INSN_TLB 0x00002000
+/* Reads coprocessor register other than floating point register. */
+#define INSN_COP 0x00004000
+/* Instruction loads value from memory, requiring delay. */
+#define INSN_LOAD_MEMORY_DELAY 0x00008000
+/* Instruction loads value from coprocessor, requiring delay. */
+#define INSN_LOAD_COPROC_DELAY 0x00010000
+/* Instruction has unconditional branch delay slot. */
+#define INSN_UNCOND_BRANCH_DELAY 0x00020000
+/* Instruction has conditional branch delay slot. */
+#define INSN_COND_BRANCH_DELAY 0x00040000
+/* Conditional branch likely: if branch not taken, insn nullified. */
+#define INSN_COND_BRANCH_LIKELY 0x00080000
+/* Moves to coprocessor register, requiring delay. */
+#define INSN_COPROC_MOVE_DELAY 0x00100000
+/* Loads coprocessor register from memory, requiring delay. */
+#define INSN_COPROC_MEMORY_DELAY 0x00200000
+/* Reads the HI register. */
+#define INSN_READ_HI 0x00400000
+/* Reads the LO register. */
+#define INSN_READ_LO 0x00800000
+/* Modifies the HI register. */
+#define INSN_WRITE_HI 0x01000000
+/* Modifies the LO register. */
+#define INSN_WRITE_LO 0x02000000
+/* Takes a trap (easier to keep out of delay slot). */
+#define INSN_TRAP 0x04000000
+/* Instruction stores value into memory. */
+#define INSN_STORE_MEMORY 0x08000000
+/* Instruction uses single precision floating point. */
+#define FP_S 0x10000000
+/* Instruction uses double precision floating point. */
+#define FP_D 0x20000000
+/* Instruction is part of the tx39's integer multiply family. */
+#define INSN_MULT 0x40000000
+/* Instruction synchronize shared memory. */
+#define INSN_SYNC 0x80000000
+
+/* Instruction is actually a macro. It should be ignored by the
+ disassembler, and requires special treatment by the assembler. */
+#define INSN_MACRO 0xffffffff
+
+
+
+
+
+/* MIPS ISA field--CPU level at which insn is supported. */
+#define INSN_ISA 0x0000000F
+/* An instruction which is not part of any basic MIPS ISA.
+ (ie it is a chip specific instruction) */
+#define INSN_NO_ISA 0x00000000
+/* MIPS ISA 1 instruction. */
+#define INSN_ISA1 0x00000001
+/* MIPS ISA 2 instruction (R6000 or R4000). */
+#define INSN_ISA2 0x00000002
+/* MIPS ISA 3 instruction (R4000). */
+#define INSN_ISA3 0x00000003
+/* MIPS ISA 4 instruction (R8000). */
+#define INSN_ISA4 0x00000004
+
+/* Chip specific instructions. These are bitmasks. */
+/* MIPS R4650 instruction. */
+#define INSN_4650 0x00000010
+/* LSI R4010 instruction. */
+#define INSN_4010 0x00000020
+/* NEC VR4100 instruction. */
+#define INSN_4100 0x00000040
+/* Toshiba R3900 instruction. */
+#define INSN_3900 0x00000080
+
+
+/* This is a list of macro expanded instructions.
+ *
+ * _I appended means immediate
+ * _A appended means address
+ * _AB appended means address with base register
+ * _D appended means 64 bit floating point constant
+ * _S appended means 32 bit floating point constant
+ */
+enum {
+ M_ABS,
+ M_ADD_I,
+ M_ADDU_I,
+ M_AND_I,
+ M_BEQ,
+ M_BEQ_I,
+ M_BEQL_I,
+ M_BGE,
+ M_BGEL,
+ M_BGE_I,
+ M_BGEL_I,
+ M_BGEU,
+ M_BGEUL,
+ M_BGEU_I,
+ M_BGEUL_I,
+ M_BGT,
+ M_BGTL,
+ M_BGT_I,
+ M_BGTL_I,
+ M_BGTU,
+ M_BGTUL,
+ M_BGTU_I,
+ M_BGTUL_I,
+ M_BLE,
+ M_BLEL,
+ M_BLE_I,
+ M_BLEL_I,
+ M_BLEU,
+ M_BLEUL,
+ M_BLEU_I,
+ M_BLEUL_I,
+ M_BLT,
+ M_BLTL,
+ M_BLT_I,
+ M_BLTL_I,
+ M_BLTU,
+ M_BLTUL,
+ M_BLTU_I,
+ M_BLTUL_I,
+ M_BNE,
+ M_BNE_I,
+ M_BNEL_I,
+ M_DABS,
+ M_DADD_I,
+ M_DADDU_I,
+ M_DDIV_3,
+ M_DDIV_3I,
+ M_DDIVU_3,
+ M_DDIVU_3I,
+ M_DIV_3,
+ M_DIV_3I,
+ M_DIVU_3,
+ M_DIVU_3I,
+ M_DLA_AB,
+ M_DLI,
+ M_DMUL,
+ M_DMUL_I,
+ M_DMULO,
+ M_DMULO_I,
+ M_DMULOU,
+ M_DMULOU_I,
+ M_DREM_3,
+ M_DREM_3I,
+ M_DREMU_3,
+ M_DREMU_3I,
+ M_DSUB_I,
+ M_DSUBU_I,
+ M_DSUBU_I_2,
+ M_J_A,
+ M_JAL_1,
+ M_JAL_2,
+ M_JAL_A,
+ M_L_DOB,
+ M_L_DAB,
+ M_LA_AB,
+ M_LB_A,
+ M_LB_AB,
+ M_LBU_A,
+ M_LBU_AB,
+ M_LD_A,
+ M_LD_OB,
+ M_LD_AB,
+ M_LDC1_AB,
+ M_LDC2_AB,
+ M_LDC3_AB,
+ M_LDL_AB,
+ M_LDR_AB,
+ M_LH_A,
+ M_LH_AB,
+ M_LHU_A,
+ M_LHU_AB,
+ M_LI,
+ M_LI_D,
+ M_LI_DD,
+ M_LI_S,
+ M_LI_SS,
+ M_LL_AB,
+ M_LLD_AB,
+ M_LS_A,
+ M_LW_A,
+ M_LW_AB,
+ M_LWC0_A,
+ M_LWC0_AB,
+ M_LWC1_A,
+ M_LWC1_AB,
+ M_LWC2_A,
+ M_LWC2_AB,
+ M_LWC3_A,
+ M_LWC3_AB,
+ M_LWL_A,
+ M_LWL_AB,
+ M_LWR_A,
+ M_LWR_AB,
+ M_LWU_AB,
+ M_MUL,
+ M_MUL_I,
+ M_MULO,
+ M_MULO_I,
+ M_MULOU,
+ M_MULOU_I,
+ M_NOR_I,
+ M_OR_I,
+ M_REM_3,
+ M_REM_3I,
+ M_REMU_3,
+ M_REMU_3I,
+ M_ROL,
+ M_ROL_I,
+ M_ROR,
+ M_ROR_I,
+ M_S_DA,
+ M_S_DOB,
+ M_S_DAB,
+ M_S_S,
+ M_SC_AB,
+ M_SCD_AB,
+ M_SD_A,
+ M_SD_OB,
+ M_SD_AB,
+ M_SDC1_AB,
+ M_SDC2_AB,
+ M_SDC3_AB,
+ M_SDL_AB,
+ M_SDR_AB,
+ M_SEQ,
+ M_SEQ_I,
+ M_SGE,
+ M_SGE_I,
+ M_SGEU,
+ M_SGEU_I,
+ M_SGT,
+ M_SGT_I,
+ M_SGTU,
+ M_SGTU_I,
+ M_SLE,
+ M_SLE_I,
+ M_SLEU,
+ M_SLEU_I,
+ M_SLT_I,
+ M_SLTU_I,
+ M_SNE,
+ M_SNE_I,
+ M_SB_A,
+ M_SB_AB,
+ M_SH_A,
+ M_SH_AB,
+ M_SW_A,
+ M_SW_AB,
+ M_SWC0_A,
+ M_SWC0_AB,
+ M_SWC1_A,
+ M_SWC1_AB,
+ M_SWC2_A,
+ M_SWC2_AB,
+ M_SWC3_A,
+ M_SWC3_AB,
+ M_SWL_A,
+ M_SWL_AB,
+ M_SWR_A,
+ M_SWR_AB,
+ M_SUB_I,
+ M_SUBU_I,
+ M_SUBU_I_2,
+ M_TEQ_I,
+ M_TGE_I,
+ M_TGEU_I,
+ M_TLT_I,
+ M_TLTU_I,
+ M_TNE_I,
+ M_TRUNCWD,
+ M_TRUNCWS,
+ M_ULD,
+ M_ULD_A,
+ M_ULH,
+ M_ULH_A,
+ M_ULHU,
+ M_ULHU_A,
+ M_ULW,
+ M_ULW_A,
+ M_USH,
+ M_USH_A,
+ M_USW,
+ M_USW_A,
+ M_USD,
+ M_USD_A,
+ M_XOR_I,
+ M_COP0,
+ M_COP1,
+ M_COP2,
+ M_COP3,
+ M_NUM_MACROS
+};
+
+
+/* The order of overloaded instructions matters. Label arguments and
+ register arguments look the same. Instructions that can have either
+ for arguments must apear in the correct order in this table for the
+ assembler to pick the right one. In other words, entries with
+ immediate operands must apear after the same instruction with
+ registers.
+
+ Many instructions are short hand for other instructions (i.e., The
+ jal <register> instruction is short for jalr <register>). */
+
+extern const struct mips_opcode mips_builtin_opcodes[];
+extern const int bfd_mips_num_builtin_opcodes;
+extern struct mips_opcode *mips_opcodes;
+extern int bfd_mips_num_opcodes;
+#define NUMOPCODES bfd_mips_num_opcodes
+
+
+/* The rest of this file adds definitions for the mips16 TinyRISC
+ processor. */
+
+/* These are the bitmasks and shift counts used for the different
+ fields in the instruction formats. Other than OP, no masks are
+ provided for the fixed portions of an instruction, since they are
+ not needed.
+
+ The I format uses IMM11.
+
+ The RI format uses RX and IMM8.
+
+ The RR format uses RX, and RY.
+
+ The RRI format uses RX, RY, and IMM5.
+
+ The RRR format uses RX, RY, and RZ.
+
+ The RRI_A format uses RX, RY, and IMM4.
+
+ The SHIFT format uses RX, RY, and SHAMT.
+
+ The I8 format uses IMM8.
+
+ The I8_MOVR32 format uses RY and REGR32.
+
+ The IR_MOV32R format uses REG32R and MOV32Z.
+
+ The I64 format uses IMM8.
+
+ The RI64 format uses RY and IMM5.
+ */
+
+#define MIPS16OP_MASK_OP 0x1f
+#define MIPS16OP_SH_OP 11
+#define MIPS16OP_MASK_IMM11 0x7ff
+#define MIPS16OP_SH_IMM11 0
+#define MIPS16OP_MASK_RX 0x7
+#define MIPS16OP_SH_RX 8
+#define MIPS16OP_MASK_IMM8 0xff
+#define MIPS16OP_SH_IMM8 0
+#define MIPS16OP_MASK_RY 0x7
+#define MIPS16OP_SH_RY 5
+#define MIPS16OP_MASK_IMM5 0x1f
+#define MIPS16OP_SH_IMM5 0
+#define MIPS16OP_MASK_RZ 0x7
+#define MIPS16OP_SH_RZ 2
+#define MIPS16OP_MASK_IMM4 0xf
+#define MIPS16OP_SH_IMM4 0
+#define MIPS16OP_MASK_REGR32 0x1f
+#define MIPS16OP_SH_REGR32 0
+#define MIPS16OP_MASK_REG32R 0x1f
+#define MIPS16OP_SH_REG32R 3
+#define MIPS16OP_EXTRACT_REG32R(i) ((((i) >> 5) & 7) | ((i) & 0x18))
+#define MIPS16OP_MASK_MOVE32Z 0x7
+#define MIPS16OP_SH_MOVE32Z 0
+#define MIPS16OP_MASK_IMM6 0x3f
+#define MIPS16OP_SH_IMM6 5
+
+/* These are the characters which may appears in the args field of an
+ instruction. They appear in the order in which the fields appear
+ when the instruction is used. Commas and parentheses in the args
+ string are ignored when assembling, and written into the output
+ when disassembling.
+
+ "y" 3 bit register (MIPS16OP_*_RY)
+ "x" 3 bit register (MIPS16OP_*_RX)
+ "z" 3 bit register (MIPS16OP_*_RZ)
+ "Z" 3 bit register (MIPS16OP_*_MOVE32Z)
+ "v" 3 bit same register as source and destination (MIPS16OP_*_RX)
+ "w" 3 bit same register as source and destination (MIPS16OP_*_RY)
+ "0" zero register ($0)
+ "S" stack pointer ($sp or $29)
+ "P" program counter
+ "R" return address register ($ra or $31)
+ "X" 5 bit MIPS register (MIPS16OP_*_REGR32)
+ "Y" 5 bit MIPS register (MIPS16OP_*_REG32R)
+ "6" 6 bit unsigned break code (MIPS16OP_*_IMM6)
+ "a" 26 bit jump address
+ "e" 11 bit extension value
+ "l" register list for entry instruction
+ "L" register list for exit instruction
+
+ The remaining codes may be extended. Except as otherwise noted,
+ the full extended operand is a 16 bit signed value.
+ "<" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 5 bit unsigned)
+ ">" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 5 bit unsigned)
+ "[" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 6 bit unsigned)
+ "]" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 6 bit unsigned)
+ "4" 4 bit signed immediate * 0 (MIPS16OP_*_IMM4) (full 15 bit signed)
+ "5" 5 bit unsigned immediate * 0 (MIPS16OP_*_IMM5)
+ "H" 5 bit unsigned immediate * 2 (MIPS16OP_*_IMM5)
+ "W" 5 bit unsigned immediate * 4 (MIPS16OP_*_IMM5)
+ "D" 5 bit unsigned immediate * 8 (MIPS16OP_*_IMM5)
+ "j" 5 bit signed immediate * 0 (MIPS16OP_*_IMM5)
+ "8" 8 bit unsigned immediate * 0 (MIPS16OP_*_IMM8)
+ "V" 8 bit unsigned immediate * 4 (MIPS16OP_*_IMM8)
+ "C" 8 bit unsigned immediate * 8 (MIPS16OP_*_IMM8)
+ "U" 8 bit unsigned immediate * 0 (MIPS16OP_*_IMM8) (full 16 bit unsigned)
+ "k" 8 bit signed immediate * 0 (MIPS16OP_*_IMM8)
+ "K" 8 bit signed immediate * 8 (MIPS16OP_*_IMM8)
+ "p" 8 bit conditional branch address (MIPS16OP_*_IMM8)
+ "q" 11 bit branch address (MIPS16OP_*_IMM11)
+ "A" 8 bit PC relative address * 4 (MIPS16OP_*_IMM8)
+ "B" 5 bit PC relative address * 8 (MIPS16OP_*_IMM5)
+ "E" 5 bit PC relative address * 4 (MIPS16OP_*_IMM5)
+ */
+
+/* For the mips16, we use the same opcode table format and a few of
+ the same flags. However, most of the flags are different. */
+
+/* Modifies the register in MIPS16OP_*_RX. */
+#define MIPS16_INSN_WRITE_X 0x00000001
+/* Modifies the register in MIPS16OP_*_RY. */
+#define MIPS16_INSN_WRITE_Y 0x00000002
+/* Modifies the register in MIPS16OP_*_RZ. */
+#define MIPS16_INSN_WRITE_Z 0x00000004
+/* Modifies the T ($24) register. */
+#define MIPS16_INSN_WRITE_T 0x00000008
+/* Modifies the SP ($29) register. */
+#define MIPS16_INSN_WRITE_SP 0x00000010
+/* Modifies the RA ($31) register. */
+#define MIPS16_INSN_WRITE_31 0x00000020
+/* Modifies the general purpose register in MIPS16OP_*_REG32R. */
+#define MIPS16_INSN_WRITE_GPR_Y 0x00000040
+/* Reads the register in MIPS16OP_*_RX. */
+#define MIPS16_INSN_READ_X 0x00000080
+/* Reads the register in MIPS16OP_*_RY. */
+#define MIPS16_INSN_READ_Y 0x00000100
+/* Reads the register in MIPS16OP_*_MOVE32Z. */
+#define MIPS16_INSN_READ_Z 0x00000200
+/* Reads the T ($24) register. */
+#define MIPS16_INSN_READ_T 0x00000400
+/* Reads the SP ($29) register. */
+#define MIPS16_INSN_READ_SP 0x00000800
+/* Reads the RA ($31) register. */
+#define MIPS16_INSN_READ_31 0x00001000
+/* Reads the program counter. */
+#define MIPS16_INSN_READ_PC 0x00002000
+/* Reads the general purpose register in MIPS16OP_*_REGR32. */
+#define MIPS16_INSN_READ_GPR_X 0x00004000
+/* Is a branch insn. */
+#define MIPS16_INSN_BRANCH 0x00010000
+
+/* The following flags have the same value for the mips16 opcode
+ table:
+ INSN_UNCOND_BRANCH_DELAY
+ INSN_COND_BRANCH_DELAY
+ INSN_COND_BRANCH_LIKELY (never used)
+ INSN_READ_HI
+ INSN_READ_LO
+ INSN_WRITE_HI
+ INSN_WRITE_LO
+ INSN_TRAP
+ INSN_ISA3
+ */
+
+extern const struct mips_opcode mips16_opcodes[];
+extern const int bfd_mips16_num_opcodes;
+
+#endif /* _MIPS_H_ */
diff --git a/include/opcode/mn10200.h b/include/opcode/mn10200.h
new file mode 100644
index 0000000..42fa94b
--- /dev/null
+++ b/include/opcode/mn10200.h
@@ -0,0 +1,110 @@
+/* mn10200.h -- Header file for Matsushita 10200 opcode table
+ Copyright 1996, 1997 Free Software Foundation, Inc.
+ Written by Jeff Law, Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef MN10200_H
+#define MN10200_H
+
+/* The opcode table is an array of struct mn10200_opcode. */
+
+struct mn10200_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* The opcode itself. Those bits which will be filled in with
+ operands are zeroes. */
+ unsigned long opcode;
+
+ /* The opcode mask. This is used by the disassembler. This is a
+ mask containing ones indicating those bits which must match the
+ opcode field, and zeroes indicating those bits which need not
+ match (and are presumably filled in by operands). */
+ unsigned long mask;
+
+ /* The format of this opcode. */
+ unsigned char format;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[8];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct mn10200_opcode mn10200_opcodes[];
+extern const int mn10200_num_opcodes;
+
+
+/* The operands table is an array of struct mn10200_operand. */
+
+struct mn10200_operand
+{
+ /* The number of bits in the operand. */
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+ int shift;
+
+ /* One bit syntax flags. */
+ int flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the mn10200_opcodes table. */
+
+extern const struct mn10200_operand mn10200_operands[];
+
+/* Values defined for the flags field of a struct mn10200_operand. */
+#define MN10200_OPERAND_DREG 0x1
+
+#define MN10200_OPERAND_AREG 0x2
+
+#define MN10200_OPERAND_PSW 0x4
+
+#define MN10200_OPERAND_MDR 0x8
+
+#define MN10200_OPERAND_SIGNED 0x10
+
+#define MN10200_OPERAND_PROMOTE 0x20
+
+#define MN10200_OPERAND_PAREN 0x40
+
+#define MN10200_OPERAND_REPEATED 0x80
+
+#define MN10200_OPERAND_EXTENDED 0x100
+
+#define MN10200_OPERAND_NOCHECK 0x200
+
+#define MN10200_OPERAND_PCREL 0x400
+
+#define MN10200_OPERAND_MEMADDR 0x800
+
+#define MN10200_OPERAND_RELAX 0x1000
+
+#define FMT_1 1
+#define FMT_2 2
+#define FMT_3 3
+#define FMT_4 4
+#define FMT_5 5
+#define FMT_6 6
+#define FMT_7 7
+#endif /* MN10200_H */
diff --git a/include/opcode/mn10300.h b/include/opcode/mn10300.h
new file mode 100644
index 0000000..34e4b0b
--- /dev/null
+++ b/include/opcode/mn10300.h
@@ -0,0 +1,138 @@
+/* mn10300.h -- Header file for Matsushita 10300 opcode table
+ Copyright 1996, 1997 Free Software Foundation, Inc.
+ Written by Jeff Law, Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef MN10300_H
+#define MN10300_H
+
+/* The opcode table is an array of struct mn10300_opcode. */
+
+#define MN10300_MAX_OPERANDS 8
+struct mn10300_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* The opcode itself. Those bits which will be filled in with
+ operands are zeroes. */
+ unsigned long opcode;
+
+ /* The opcode mask. This is used by the disassembler. This is a
+ mask containing ones indicating those bits which must match the
+ opcode field, and zeroes indicating those bits which need not
+ match (and are presumably filled in by operands). */
+ unsigned long mask;
+
+ /* A bitmask. For each operand, nonzero if it must not have the same
+ register specification as all other operands with a nonzero bit in
+ this flag. ie 0x81 would indicate that operands 7 and 0 must not
+ match. Note that we count operands from left to right as they appear
+ in the operands specification below. */
+ unsigned int no_match_operands;
+
+ /* The format of this opcode. */
+ unsigned char format;
+
+ /* Bitmask indicating what cpu variants this opcode is available on.
+ We assume mn10300 base opcodes are available everywhere, so we only
+ have to note opcodes which are available on other variants. */
+ unsigned int machine;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[MN10300_MAX_OPERANDS];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct mn10300_opcode mn10300_opcodes[];
+extern const int mn10300_num_opcodes;
+
+
+/* The operands table is an array of struct mn10300_operand. */
+
+struct mn10300_operand
+{
+ /* The number of bits in the operand. */
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+ int shift;
+
+ /* One bit syntax flags. */
+ int flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the mn10300_opcodes table. */
+
+extern const struct mn10300_operand mn10300_operands[];
+
+/* Values defined for the flags field of a struct mn10300_operand. */
+#define MN10300_OPERAND_DREG 0x1
+
+#define MN10300_OPERAND_AREG 0x2
+
+#define MN10300_OPERAND_SP 0x4
+
+#define MN10300_OPERAND_PSW 0x8
+
+#define MN10300_OPERAND_MDR 0x10
+
+#define MN10300_OPERAND_SIGNED 0x20
+
+#define MN10300_OPERAND_PROMOTE 0x40
+
+#define MN10300_OPERAND_PAREN 0x80
+
+#define MN10300_OPERAND_REPEATED 0x100
+
+#define MN10300_OPERAND_EXTENDED 0x200
+
+#define MN10300_OPERAND_SPLIT 0x400
+
+#define MN10300_OPERAND_REG_LIST 0x800
+
+#define MN10300_OPERAND_PCREL 0x1000
+
+#define MN10300_OPERAND_MEMADDR 0x2000
+
+#define MN10300_OPERAND_RELAX 0x4000
+
+
+/* Opcode Formats. */
+#define FMT_S0 1
+#define FMT_S1 2
+#define FMT_S2 3
+#define FMT_S4 4
+#define FMT_S6 5
+#define FMT_D0 6
+#define FMT_D1 7
+#define FMT_D2 8
+#define FMT_D4 9
+#define FMT_D5 10
+
+/* Variants of the mn10300 which have additional opcodes. */
+#define MN103 300
+#define AM30 300
+
+
+#endif /* MN10300_H */
diff --git a/include/opcode/np1.h b/include/opcode/np1.h
new file mode 100644
index 0000000..d23adc7
--- /dev/null
+++ b/include/opcode/np1.h
@@ -0,0 +1,422 @@
+/* Print GOULD NPL instructions for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GDB; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+struct gld_opcode
+{
+ char *name;
+ unsigned long opcode;
+ unsigned long mask;
+ char *args;
+ int length;
+};
+
+/* We store four bytes of opcode for all opcodes because that
+ is the most any of them need. The actual length of an instruction
+ is always at least 2 bytes, and at most four. The length of the
+ instruction is based on the opcode.
+
+ The mask component is a mask saying which bits must match
+ particular opcode in order for an instruction to be an instance
+ of that opcode.
+
+ The args component is a string containing characters
+ that are used to format the arguments to the instruction. */
+
+/* Kinds of operands:
+ r Register in first field
+ R Register in second field
+ b Base register in first field
+ B Base register in second field
+ v Vector register in first field
+ V Vector register in first field
+ A Optional address register (base register)
+ X Optional index register
+ I Immediate data (16bits signed)
+ O Offset field (16bits signed)
+ h Offset field (15bits signed)
+ d Offset field (14bits signed)
+ S Shift count field
+
+ any other characters are printed as is...
+*/
+
+/* The assembler requires that this array be sorted as follows:
+ all instances of the same mnemonic must be consecutive.
+ All instances of the same mnemonic with the same number of operands
+ must be consecutive.
+ */
+struct gld_opcode gld_opcodes[] =
+{
+{ "lb", 0xb4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "lnb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "lbs", 0xec080000, 0xfc080000, "r,xOA,X", 4 },
+{ "lh", 0xb4000001, 0xfc080001, "r,xOA,X", 4 },
+{ "lnh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "lw", 0xb4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lnw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "ld", 0xb4000002, 0xfc080002, "r,xOA,X", 4 },
+{ "lnd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "li", 0xf8000000, 0xfc7f0000, "r,I", 4 },
+{ "lpa", 0x50080000, 0xfc080000, "r,xOA,X", 4 },
+{ "la", 0x50000000, 0xfc080000, "r,xOA,X", 4 },
+{ "labr", 0x58080000, 0xfc080000, "b,xOA,X", 4 },
+{ "lbp", 0x90080000, 0xfc080000, "r,xOA,X", 4 },
+{ "lhp", 0x90000001, 0xfc080001, "r,xOA,X", 4 },
+{ "lwp", 0x90000000, 0xfc080000, "r,xOA,X", 4 },
+{ "ldp", 0x90000002, 0xfc080002, "r,xOA,X", 4 },
+{ "suabr", 0x58000000, 0xfc080000, "b,xOA,X", 4 },
+{ "lf", 0xbc000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lfbr", 0xbc080000, 0xfc080000, "b,xOA,X", 4 },
+{ "lwbr", 0x5c000000, 0xfc080000, "b,xOA,X", 4 },
+{ "stb", 0xd4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "sth", 0xd4000001, 0xfc080001, "r,xOA,X", 4 },
+{ "stw", 0xd4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "std", 0xd4000002, 0xfc080002, "r,xOA,X", 4 },
+{ "stf", 0xdc000000, 0xfc080000, "r,xOA,X", 4 },
+{ "stfbr", 0xdc080000, 0xfc080000, "b,xOA,X", 4 },
+{ "stwbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 },
+{ "zmb", 0xd8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "zmh", 0xd8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "zmw", 0xd8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "zmd", 0xd8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "stbp", 0x94080000, 0xfc080000, "r,xOA,X", 4 },
+{ "sthp", 0x94000001, 0xfc080001, "r,xOA,X", 4 },
+{ "stwp", 0x94000000, 0xfc080000, "r,xOA,X", 4 },
+{ "stdp", 0x94000002, 0xfc080002, "r,xOA,X", 4 },
+{ "lil", 0xf80b0000, 0xfc7f0000, "r,D", 4 },
+{ "lwsl1", 0xec000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lwsl2", 0xfc000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lwsl3", 0xfc080000, 0xfc080000, "r,xOA,X", 4 },
+
+{ "lvb", 0xb0080000, 0xfc080000, "v,xOA,X", 4 },
+{ "lvh", 0xb0000001, 0xfc080001, "v,xOA,X", 4 },
+{ "lvw", 0xb0000000, 0xfc080000, "v,xOA,X", 4 },
+{ "lvd", 0xb0000002, 0xfc080002, "v,xOA,X", 4 },
+{ "liv", 0x3c040000, 0xfc0f0000, "v,R", 2 },
+{ "livf", 0x3c080000, 0xfc0f0000, "v,R", 2 },
+{ "stvb", 0xd0080000, 0xfc080000, "v,xOA,X", 4 },
+{ "stvh", 0xd0000001, 0xfc080001, "v,xOA,X", 4 },
+{ "stvw", 0xd0000000, 0xfc080000, "v,xOA,X", 4 },
+{ "stvd", 0xd0000002, 0xfc080002, "v,xOA,X", 4 },
+
+{ "trr", 0x2c000000, 0xfc0f0000, "r,R", 2 },
+{ "trn", 0x2c040000, 0xfc0f0000, "r,R", 2 },
+{ "trnd", 0x2c0c0000, 0xfc0f0000, "r,R", 2 },
+{ "trabs", 0x2c010000, 0xfc0f0000, "r,R", 2 },
+{ "trabsd", 0x2c090000, 0xfc0f0000, "r,R", 2 },
+{ "trc", 0x2c030000, 0xfc0f0000, "r,R", 2 },
+{ "xcr", 0x28040000, 0xfc0f0000, "r,R", 2 },
+{ "cxcr", 0x2c060000, 0xfc0f0000, "r,R", 2 },
+{ "cxcrd", 0x2c0e0000, 0xfc0f0000, "r,R", 2 },
+{ "tbrr", 0x2c020000, 0xfc0f0000, "r,B", 2 },
+{ "trbr", 0x28030000, 0xfc0f0000, "b,R", 2 },
+{ "xcbr", 0x28020000, 0xfc0f0000, "b,B", 2 },
+{ "tbrbr", 0x28010000, 0xfc0f0000, "b,B", 2 },
+
+{ "trvv", 0x28050000, 0xfc0f0000, "v,V", 2 },
+{ "trvvn", 0x2c050000, 0xfc0f0000, "v,V", 2 },
+{ "trvvnd", 0x2c0d0000, 0xfc0f0000, "v,V", 2 },
+{ "trvab", 0x2c070000, 0xfc0f0000, "v,V", 2 },
+{ "trvabd", 0x2c0f0000, 0xfc0f0000, "v,V", 2 },
+{ "cmpv", 0x14060000, 0xfc0f0000, "v,V", 2 },
+{ "expv", 0x14070000, 0xfc0f0000, "v,V", 2 },
+{ "mrvvlt", 0x10030000, 0xfc0f0000, "v,V", 2 },
+{ "mrvvle", 0x10040000, 0xfc0f0000, "v,V", 2 },
+{ "mrvvgt", 0x14030000, 0xfc0f0000, "v,V", 2 },
+{ "mrvvge", 0x14040000, 0xfc0f0000, "v,V", 2 },
+{ "mrvveq", 0x10050000, 0xfc0f0000, "v,V", 2 },
+{ "mrvvne", 0x10050000, 0xfc0f0000, "v,V", 2 },
+{ "mrvrlt", 0x100d0000, 0xfc0f0000, "v,R", 2 },
+{ "mrvrle", 0x100e0000, 0xfc0f0000, "v,R", 2 },
+{ "mrvrgt", 0x140d0000, 0xfc0f0000, "v,R", 2 },
+{ "mrvrge", 0x140e0000, 0xfc0f0000, "v,R", 2 },
+{ "mrvreq", 0x100f0000, 0xfc0f0000, "v,R", 2 },
+{ "mrvrne", 0x140f0000, 0xfc0f0000, "v,R", 2 },
+{ "trvr", 0x140b0000, 0xfc0f0000, "r,V", 2 },
+{ "trrv", 0x140c0000, 0xfc0f0000, "v,R", 2 },
+
+{ "bu", 0x40000000, 0xff880000, "xOA,X", 4 },
+{ "bns", 0x70080000, 0xff880000, "xOA,X", 4 },
+{ "bnco", 0x70880000, 0xff880000, "xOA,X", 4 },
+{ "bge", 0x71080000, 0xff880000, "xOA,X", 4 },
+{ "bne", 0x71880000, 0xff880000, "xOA,X", 4 },
+{ "bunge", 0x72080000, 0xff880000, "xOA,X", 4 },
+{ "bunle", 0x72880000, 0xff880000, "xOA,X", 4 },
+{ "bgt", 0x73080000, 0xff880000, "xOA,X", 4 },
+{ "bnany", 0x73880000, 0xff880000, "xOA,X", 4 },
+{ "bs" , 0x70000000, 0xff880000, "xOA,X", 4 },
+{ "bco", 0x70800000, 0xff880000, "xOA,X", 4 },
+{ "blt", 0x71000000, 0xff880000, "xOA,X", 4 },
+{ "beq", 0x71800000, 0xff880000, "xOA,X", 4 },
+{ "buge", 0x72000000, 0xff880000, "xOA,X", 4 },
+{ "bult", 0x72800000, 0xff880000, "xOA,X", 4 },
+{ "ble", 0x73000000, 0xff880000, "xOA,X", 4 },
+{ "bany", 0x73800000, 0xff880000, "xOA,X", 4 },
+{ "brlnk", 0x44000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bib", 0x48000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bih", 0x48080000, 0xfc080000, "r,xOA,X", 4 },
+{ "biw", 0x4c000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bid", 0x4c080000, 0xfc080000, "r,xOA,X", 4 },
+{ "bivb", 0x60000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bivh", 0x60080000, 0xfc080000, "r,xOA,X", 4 },
+{ "bivw", 0x64000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bivd", 0x64080000, 0xfc080000, "r,xOA,X", 4 },
+{ "bvsb", 0x68000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bvsh", 0x68080000, 0xfc080000, "r,xOA,X", 4 },
+{ "bvsw", 0x6c000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bvsd", 0x6c080000, 0xfc080000, "r,xOA,X", 4 },
+
+{ "camb", 0x80080000, 0xfc080000, "r,xOA,X", 4 },
+{ "camh", 0x80000001, 0xfc080001, "r,xOA,X", 4 },
+{ "camw", 0x80000000, 0xfc080000, "r,xOA,X", 4 },
+{ "camd", 0x80000002, 0xfc080002, "r,xOA,X", 4 },
+{ "car", 0x10000000, 0xfc0f0000, "r,R", 2 },
+{ "card", 0x14000000, 0xfc0f0000, "r,R", 2 },
+{ "ci", 0xf8050000, 0xfc7f0000, "r,I", 4 },
+{ "chkbnd", 0x5c080000, 0xfc080000, "r,xOA,X", 4 },
+
+{ "cavv", 0x10010000, 0xfc0f0000, "v,V", 2 },
+{ "cavr", 0x10020000, 0xfc0f0000, "v,R", 2 },
+{ "cavvd", 0x10090000, 0xfc0f0000, "v,V", 2 },
+{ "cavrd", 0x100b0000, 0xfc0f0000, "v,R", 2 },
+
+{ "anmb", 0x84080000, 0xfc080000, "r,xOA,X", 4 },
+{ "anmh", 0x84000001, 0xfc080001, "r,xOA,X", 4 },
+{ "anmw", 0x84000000, 0xfc080000, "r,xOA,X", 4 },
+{ "anmd", 0x84000002, 0xfc080002, "r,xOA,X", 4 },
+{ "anr", 0x04000000, 0xfc0f0000, "r,R", 2 },
+{ "ani", 0xf8080000, 0xfc7f0000, "r,I", 4 },
+{ "ormb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "ormh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "ormw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "ormd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "orr", 0x08000000, 0xfc0f0000, "r,R", 2 },
+{ "oi", 0xf8090000, 0xfc7f0000, "r,I", 4 },
+{ "eomb", 0x8c080000, 0xfc080000, "r,xOA,X", 4 },
+{ "eomh", 0x8c000001, 0xfc080001, "r,xOA,X", 4 },
+{ "eomw", 0x8c000000, 0xfc080000, "r,xOA,X", 4 },
+{ "eomd", 0x8c000002, 0xfc080002, "r,xOA,X", 4 },
+{ "eor", 0x0c000000, 0xfc0f0000, "r,R", 2 },
+{ "eoi", 0xf80a0000, 0xfc7f0000, "r,I", 4 },
+
+{ "anvv", 0x04010000, 0xfc0f0000, "v,V", 2 },
+{ "anvr", 0x04020000, 0xfc0f0000, "v,R", 2 },
+{ "orvv", 0x08010000, 0xfc0f0000, "v,V", 2 },
+{ "orvr", 0x08020000, 0xfc0f0000, "v,R", 2 },
+{ "eovv", 0x0c010000, 0xfc0f0000, "v,V", 2 },
+{ "eovr", 0x0c020000, 0xfc0f0000, "v,R", 2 },
+
+{ "sacz", 0x100c0000, 0xfc0f0000, "r,R", 2 },
+{ "sla", 0x1c400000, 0xfc600000, "r,S", 2 },
+{ "sll", 0x1c600000, 0xfc600000, "r,S", 2 },
+{ "slc", 0x24400000, 0xfc600000, "r,S", 2 },
+{ "slad", 0x20400000, 0xfc600000, "r,S", 2 },
+{ "slld", 0x20600000, 0xfc600000, "r,S", 2 },
+{ "sra", 0x1c000000, 0xfc600000, "r,S", 2 },
+{ "srl", 0x1c200000, 0xfc600000, "r,S", 2 },
+{ "src", 0x24000000, 0xfc600000, "r,S", 2 },
+{ "srad", 0x20000000, 0xfc600000, "r,S", 2 },
+{ "srld", 0x20200000, 0xfc600000, "r,S", 2 },
+{ "sda", 0x3c030000, 0xfc0f0000, "r,R", 2 },
+{ "sdl", 0x3c020000, 0xfc0f0000, "r,R", 2 },
+{ "sdc", 0x3c010000, 0xfc0f0000, "r,R", 2 },
+{ "sdad", 0x3c0b0000, 0xfc0f0000, "r,R", 2 },
+{ "sdld", 0x3c0a0000, 0xfc0f0000, "r,R", 2 },
+
+{ "svda", 0x3c070000, 0xfc0f0000, "v,R", 2 },
+{ "svdl", 0x3c060000, 0xfc0f0000, "v,R", 2 },
+{ "svdc", 0x3c050000, 0xfc0f0000, "v,R", 2 },
+{ "svdad", 0x3c0e0000, 0xfc0f0000, "v,R", 2 },
+{ "svdld", 0x3c0d0000, 0xfc0f0000, "v,R", 2 },
+
+{ "sbm", 0xac080000, 0xfc080000, "f,xOA,X", 4 },
+{ "zbm", 0xac000000, 0xfc080000, "f,xOA,X", 4 },
+{ "tbm", 0xa8080000, 0xfc080000, "f,xOA,X", 4 },
+{ "incmb", 0xa0000000, 0xfc080000, "xOA,X", 4 },
+{ "incmh", 0xa0080000, 0xfc080000, "xOA,X", 4 },
+{ "incmw", 0xa4000000, 0xfc080000, "xOA,X", 4 },
+{ "incmd", 0xa4080000, 0xfc080000, "xOA,X", 4 },
+{ "sbmd", 0x7c080000, 0xfc080000, "r,xOA,X", 4 },
+{ "zbmd", 0x7c000000, 0xfc080000, "r,xOA,X", 4 },
+{ "tbmd", 0x78080000, 0xfc080000, "r,xOA,X", 4 },
+
+{ "ssm", 0x9c080000, 0xfc080000, "f,xOA,X", 4 },
+{ "zsm", 0x9c000000, 0xfc080000, "f,xOA,X", 4 },
+{ "tsm", 0x98080000, 0xfc080000, "f,xOA,X", 4 },
+
+{ "admb", 0xc8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "admh", 0xc8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "admw", 0xc8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "admd", 0xc8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "adr", 0x38000000, 0xfc0f0000, "r,R", 2 },
+{ "armb", 0xe8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "armh", 0xe8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "armw", 0xe8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "armd", 0xe8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "adi", 0xf8010000, 0xfc0f0000, "r,I", 4 },
+{ "sumb", 0xcc080000, 0xfc080000, "r,xOA,X", 4 },
+{ "sumh", 0xcc000001, 0xfc080001, "r,xOA,X", 4 },
+{ "sumw", 0xcc000000, 0xfc080000, "r,xOA,X", 4 },
+{ "sumd", 0xcc000002, 0xfc080002, "r,xOA,X", 4 },
+{ "sur", 0x3c000000, 0xfc0f0000, "r,R", 2 },
+{ "sui", 0xf8020000, 0xfc0f0000, "r,I", 4 },
+{ "mpmb", 0xc0080000, 0xfc080000, "r,xOA,X", 4 },
+{ "mpmh", 0xc0000001, 0xfc080001, "r,xOA,X", 4 },
+{ "mpmw", 0xc0000000, 0xfc080000, "r,xOA,X", 4 },
+{ "mpr", 0x38020000, 0xfc0f0000, "r,R", 2 },
+{ "mprd", 0x3c0f0000, 0xfc0f0000, "r,R", 2 },
+{ "mpi", 0xf8030000, 0xfc0f0000, "r,I", 4 },
+{ "dvmb", 0xc4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "dvmh", 0xc4000001, 0xfc080001, "r,xOA,X", 4 },
+{ "dvmw", 0xc4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "dvr", 0x380a0000, 0xfc0f0000, "r,R", 2 },
+{ "dvi", 0xf8040000, 0xfc0f0000, "r,I", 4 },
+{ "exs", 0x38080000, 0xfc0f0000, "r,R", 2 },
+
+{ "advv", 0x30000000, 0xfc0f0000, "v,V", 2 },
+{ "advvd", 0x30080000, 0xfc0f0000, "v,V", 2 },
+{ "adrv", 0x34000000, 0xfc0f0000, "v,R", 2 },
+{ "adrvd", 0x34080000, 0xfc0f0000, "v,R", 2 },
+{ "suvv", 0x30010000, 0xfc0f0000, "v,V", 2 },
+{ "suvvd", 0x30090000, 0xfc0f0000, "v,V", 2 },
+{ "surv", 0x34010000, 0xfc0f0000, "v,R", 2 },
+{ "survd", 0x34090000, 0xfc0f0000, "v,R", 2 },
+{ "mpvv", 0x30020000, 0xfc0f0000, "v,V", 2 },
+{ "mprv", 0x34020000, 0xfc0f0000, "v,R", 2 },
+
+{ "adfw", 0xe0080000, 0xfc080000, "r,xOA,X", 4 },
+{ "adfd", 0xe0080002, 0xfc080002, "r,xOA,X", 4 },
+{ "adrfw", 0x38010000, 0xfc0f0000, "r,R", 2 },
+{ "adrfd", 0x38090000, 0xfc0f0000, "r,R", 2 },
+{ "surfw", 0xe0000000, 0xfc080000, "r,xOA,X", 4 },
+{ "surfd", 0xe0000002, 0xfc080002, "r,xOA,X", 4 },
+{ "surfw", 0x38030000, 0xfc0f0000, "r,R", 2 },
+{ "surfd", 0x380b0000, 0xfc0f0000, "r,R", 2 },
+{ "mpfw", 0xe4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "mpfd", 0xe4080002, 0xfc080002, "r,xOA,X", 4 },
+{ "mprfw", 0x38060000, 0xfc0f0000, "r,R", 2 },
+{ "mprfd", 0x380e0000, 0xfc0f0000, "r,R", 2 },
+{ "rfw", 0xe4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "rfd", 0xe4000002, 0xfc080002, "r,xOA,X", 4 },
+{ "rrfw", 0x0c0e0000, 0xfc0f0000, "r", 2 },
+{ "rrfd", 0x0c0f0000, 0xfc0f0000, "r", 2 },
+
+{ "advvfw", 0x30040000, 0xfc0f0000, "v,V", 2 },
+{ "advvfd", 0x300c0000, 0xfc0f0000, "v,V", 2 },
+{ "adrvfw", 0x34040000, 0xfc0f0000, "v,R", 2 },
+{ "adrvfd", 0x340c0000, 0xfc0f0000, "v,R", 2 },
+{ "suvvfw", 0x30050000, 0xfc0f0000, "v,V", 2 },
+{ "suvvfd", 0x300d0000, 0xfc0f0000, "v,V", 2 },
+{ "survfw", 0x34050000, 0xfc0f0000, "v,R", 2 },
+{ "survfd", 0x340d0000, 0xfc0f0000, "v,R", 2 },
+{ "mpvvfw", 0x30060000, 0xfc0f0000, "v,V", 2 },
+{ "mpvvfd", 0x300e0000, 0xfc0f0000, "v,V", 2 },
+{ "mprvfw", 0x34060000, 0xfc0f0000, "v,R", 2 },
+{ "mprvfd", 0x340e0000, 0xfc0f0000, "v,R", 2 },
+{ "rvfw", 0x30070000, 0xfc0f0000, "v", 2 },
+{ "rvfd", 0x300f0000, 0xfc0f0000, "v", 2 },
+
+{ "fltw", 0x38070000, 0xfc0f0000, "r,R", 2 },
+{ "fltd", 0x380f0000, 0xfc0f0000, "r,R", 2 },
+{ "fixw", 0x38050000, 0xfc0f0000, "r,R", 2 },
+{ "fixd", 0x380d0000, 0xfc0f0000, "r,R", 2 },
+{ "cfpds", 0x3c090000, 0xfc0f0000, "r,R", 2 },
+
+{ "fltvw", 0x080d0000, 0xfc0f0000, "v,V", 2 },
+{ "fltvd", 0x080f0000, 0xfc0f0000, "v,V", 2 },
+{ "fixvw", 0x080c0000, 0xfc0f0000, "v,V", 2 },
+{ "fixvd", 0x080e0000, 0xfc0f0000, "v,V", 2 },
+{ "cfpvds", 0x0c0d0000, 0xfc0f0000, "v,V", 2 },
+
+{ "orvrn", 0x000a0000, 0xfc0f0000, "r,V", 2 },
+{ "andvrn", 0x00080000, 0xfc0f0000, "r,V", 2 },
+{ "frsteq", 0x04090000, 0xfc0f0000, "r,V", 2 },
+{ "sigma", 0x0c080000, 0xfc0f0000, "r,V", 2 },
+{ "sigmad", 0x0c0a0000, 0xfc0f0000, "r,V", 2 },
+{ "sigmf", 0x08080000, 0xfc0f0000, "r,V", 2 },
+{ "sigmfd", 0x080a0000, 0xfc0f0000, "r,V", 2 },
+{ "prodf", 0x04080000, 0xfc0f0000, "r,V", 2 },
+{ "prodfd", 0x040a0000, 0xfc0f0000, "r,V", 2 },
+{ "maxv", 0x10080000, 0xfc0f0000, "r,V", 2 },
+{ "maxvd", 0x100a0000, 0xfc0f0000, "r,V", 2 },
+{ "minv", 0x14080000, 0xfc0f0000, "r,V", 2 },
+{ "minvd", 0x140a0000, 0xfc0f0000, "r,V", 2 },
+
+{ "lpsd", 0xf0000000, 0xfc080000, "xOA,X", 4 },
+{ "ldc", 0xf0080000, 0xfc080000, "xOA,X", 4 },
+{ "spm", 0x040c0000, 0xfc0f0000, "r", 2 },
+{ "rpm", 0x040d0000, 0xfc0f0000, "r", 2 },
+{ "tritr", 0x00070000, 0xfc0f0000, "r", 2 },
+{ "trrit", 0x00060000, 0xfc0f0000, "r", 2 },
+{ "rpswt", 0x04080000, 0xfc0f0000, "r", 2 },
+{ "exr", 0xf8070000, 0xfc0f0000, "", 4 },
+{ "halt", 0x00000000, 0xfc0f0000, "", 2 },
+{ "wait", 0x00010000, 0xfc0f0000, "", 2 },
+{ "nop", 0x00020000, 0xfc0f0000, "", 2 },
+{ "eiae", 0x00030000, 0xfc0f0000, "", 2 },
+{ "efae", 0x000d0000, 0xfc0f0000, "", 2 },
+{ "diae", 0x000e0000, 0xfc0f0000, "", 2 },
+{ "dfae", 0x000f0000, 0xfc0f0000, "", 2 },
+{ "spvc", 0xf8060000, 0xfc0f0000, "r,T,N", 4 },
+{ "rdsts", 0x00090000, 0xfc0f0000, "r", 2 },
+{ "setcpu", 0x000c0000, 0xfc0f0000, "r", 2 },
+{ "cmc", 0x000b0000, 0xfc0f0000, "r", 2 },
+{ "trrcu", 0x00040000, 0xfc0f0000, "r", 2 },
+{ "attnio", 0x00050000, 0xfc0f0000, "", 2 },
+{ "fudit", 0x28080000, 0xfc0f0000, "", 2 },
+{ "break", 0x28090000, 0xfc0f0000, "", 2 },
+{ "frzss", 0x280a0000, 0xfc0f0000, "", 2 },
+{ "ripi", 0x04040000, 0xfc0f0000, "r,R", 2 },
+{ "xcp", 0x04050000, 0xfc0f0000, "r", 2 },
+{ "block", 0x04060000, 0xfc0f0000, "", 2 },
+{ "unblock", 0x04070000, 0xfc0f0000, "", 2 },
+{ "trsc", 0x08060000, 0xfc0f0000, "r,R", 2 },
+{ "tscr", 0x08070000, 0xfc0f0000, "r,R", 2 },
+{ "fq", 0x04080000, 0xfc0f0000, "r", 2 },
+{ "flupte", 0x2c080000, 0xfc0f0000, "r", 2 },
+{ "rviu", 0x040f0000, 0xfc0f0000, "", 2 },
+{ "ldel", 0x280c0000, 0xfc0f0000, "r,R", 2 },
+{ "ldu", 0x280d0000, 0xfc0f0000, "r,R", 2 },
+{ "stdecc", 0x280b0000, 0xfc0f0000, "r,R", 2 },
+{ "trpc", 0x08040000, 0xfc0f0000, "r", 2 },
+{ "tpcr", 0x08050000, 0xfc0f0000, "r", 2 },
+{ "ghalt", 0x0c050000, 0xfc0f0000, "r", 2 },
+{ "grun", 0x0c040000, 0xfc0f0000, "", 2 },
+{ "tmpr", 0x2c0a0000, 0xfc0f0000, "r,R", 2 },
+{ "trmp", 0x2c0b0000, 0xfc0f0000, "r,R", 2 },
+
+{ "trrve", 0x28060000, 0xfc0f0000, "r", 2 },
+{ "trver", 0x28070000, 0xfc0f0000, "r", 2 },
+{ "trvlr", 0x280f0000, 0xfc0f0000, "r", 2 },
+
+{ "linkfl", 0x18000000, 0xfc0f0000, "r,R", 2 },
+{ "linkbl", 0x18020000, 0xfc0f0000, "r,R", 2 },
+{ "linkfp", 0x18010000, 0xfc0f0000, "r,R", 2 },
+{ "linkbp", 0x18030000, 0xfc0f0000, "r,R", 2 },
+{ "linkpl", 0x18040000, 0xfc0f0000, "r,R", 2 },
+{ "ulinkl", 0x18080000, 0xfc0f0000, "r,R", 2 },
+{ "ulinkp", 0x18090000, 0xfc0f0000, "r,R", 2 },
+{ "ulinktl", 0x180a0000, 0xfc0f0000, "r,R", 2 },
+{ "ulinktp", 0x180b0000, 0xfc0f0000, "r,R", 2 },
+};
+
+int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]);
+
+struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) /
+ sizeof(gld_opcodes[0]);
diff --git a/include/opcode/ns32k.h b/include/opcode/ns32k.h
new file mode 100644
index 0000000..42bb8b8
--- /dev/null
+++ b/include/opcode/ns32k.h
@@ -0,0 +1,491 @@
+/* ns32k-opcode.h -- Opcode table for National Semi 32k processor
+ Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+#ifdef SEQUENT_COMPATABILITY
+#define DEF_MODEC 20
+#define DEF_MODEL 21
+#endif
+
+#ifndef DEF_MODEC
+#define DEF_MODEC 20
+#endif
+
+#ifndef DEF_MODEL
+#define DEF_MODEL 20
+#endif
+/*
+ After deciding the instruction entry (via hash.c) the instruction parser
+ will try to match the operands after the instruction to the required set
+ given in the entry operandfield. Every operand will result in a change in
+ the opcode or the addition of data to the opcode.
+ The operands in the source instruction are checked for inconsistent
+ semantics.
+
+ F : 32 bit float general form
+ L : 64 bit float "
+ B : byte "
+ W : word "
+ D : double-word "
+ A : double-word gen-address-form ie no regs, no immediate
+ I : integer writeable gen int except immediate (A + reg)
+ Z : floating writeable gen float except immediate (Z + freg)
+ d : displacement
+ b : displacement - pc relative addressing acb
+ p : displacement - pc relative addressing br bcond bsr cxp
+ q : quick
+ i : immediate (8 bits)
+ This is not a standard ns32k operandtype, it is used to build
+ instructions like svc arg1,arg2
+ Svc is the instruction SuperVisorCall and is sometimes used to
+ call OS-routines from usermode. Some args might be handy!
+ r : register number (3 bits)
+ O : setcfg instruction optionslist
+ C : cinv instruction optionslist
+ S : stringinstruction optionslist
+ U : registerlist save,enter
+ u : registerlist restore,exit
+ M : mmu register
+ P : cpu register
+ g : 3:rd operand of inss or exts instruction
+ G : 4:th operand of inss or exts instruction
+ Those operands are encoded in the same byte.
+ This byte is placed last in the instruction.
+ f : operand of sfsr
+ H : sequent-hack for bsr (Warning)
+
+column 1 instructions
+ 2 number of bits in opcode.
+ 3 number of bits in opcode explicitly
+ determined by the instruction type.
+ 4 opcodeseed, the number we build our opcode
+ from.
+ 5 operandtypes, used by operandparser.
+ 6 size in bytes of immediate
+*/
+struct ns32k_opcode {
+ char *name;
+ unsigned char opcode_id_size; /* not used by the assembler */
+ unsigned char opcode_size;
+ unsigned long opcode_seed;
+ char *operands;
+ unsigned char im_size; /* not used by dissassembler */
+ char *default_args; /* default to those args when none given */
+ char default_modec; /* default to this addr-mode when ambigous
+ ie when the argument of a general addr-mode
+ is a plain constant */
+ char default_model; /* is a plain label */
+};
+
+#ifdef comment
+/* This section was from the gdb version of this file. */
+
+#ifndef ns32k_opcodeT
+#define ns32k_opcodeT int
+#endif /* no ns32k_opcodeT */
+
+struct not_wot /* ns32k opcode table: wot to do with this */
+ /* particular opcode */
+{
+ int obits; /* number of opcode bits */
+ int ibits; /* number of instruction bits */
+ ns32k_opcodeT code; /* op-code (may be > 8 bits!) */
+ char *args; /* how to compile said opcode */
+};
+
+struct not /* ns32k opcode text */
+{
+ char * name; /* opcode name: lowercase string [key] */
+ struct not_wot detail; /* rest of opcode table [datum] */
+};
+
+/* Instructions look like this:
+
+ basic instruction--1, 2, or 3 bytes
+ index byte for operand A, if operand A is indexed--1 byte
+ index byte for operand B, if operand B is indexed--1 byte
+ addressing extension for operand A
+ addressing extension for operand B
+ implied operands
+
+ Operand A is the operand listed first in the following opcode table.
+ Operand B is the operand listed second in the following opcode table.
+ All instructions have at most 2 general operands, so this is enough.
+ The implied operands are associated with operands other than A and B.
+
+ Each operand has a digit and a letter.
+
+ The digit gives the position in the assembly language. The letter,
+ one of the following, tells us what kind of operand it is. */
+
+/* F : 32 bit float
+ * L : 64 bit float
+ * B : byte
+ * W : word
+ * D : double-word
+ * I : integer not immediate
+ * Z : floating not immediate
+ * d : displacement
+ * q : quick
+ * i : immediate (8 bits)
+ * r : register number (3 bits)
+ * p : displacement - pc relative addressing
+*/
+
+
+#endif /* comment */
+
+static const struct ns32k_opcode ns32k_opcodes[]=
+{
+ { "absf", 14,24, 0x35be, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "absl", 14,24, 0x34be, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "absb", 14,24, 0x304e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "absw", 14,24, 0x314e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "absd", 14,24, 0x334e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "acbb", 7,16, 0x4c, "2I1q3p", 1, "", DEF_MODEC,DEF_MODEL },
+ { "acbw", 7,16, 0x4d, "2I1q3p", 2, "", DEF_MODEC,DEF_MODEL },
+ { "acbd", 7,16, 0x4f, "2I1q3p", 4, "", DEF_MODEC,DEF_MODEL },
+ { "addf", 14,24, 0x01be, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "addl", 14,24, 0x00be, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "addb", 6,16, 0x00, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "addw", 6,16, 0x01, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "addd", 6,16, 0x03, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "addcb", 6,16, 0x10, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "addcw", 6,16, 0x11, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "addcd", 6,16, 0x13, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "addpb", 14,24, 0x3c4e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "addpw", 14,24, 0x3d4e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "addpd", 14,24, 0x3f4e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "addqb", 7,16, 0x0c, "2I1q", 1, "", DEF_MODEC,DEF_MODEL },
+ { "addqw", 7,16, 0x0d, "2I1q", 2, "", DEF_MODEC,DEF_MODEL },
+ { "addqd", 7,16, 0x0f, "2I1q", 4, "", DEF_MODEC,DEF_MODEL },
+ { "addr", 6,16, 0x27, "1A2I", 4, "", 21,21 },
+ { "adjspb", 11,16, 0x057c, "1B", 1, "", DEF_MODEC,DEF_MODEL },
+ { "adjspw", 11,16, 0x057d, "1W", 2, "", DEF_MODEC,DEF_MODEL },
+ { "adjspd", 11,16, 0x057f, "1D", 4, "", DEF_MODEC,DEF_MODEL },
+ { "andb", 6,16, 0x28, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "andw", 6,16, 0x29, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "andd", 6,16, 0x2b, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "ashb", 14,24, 0x044e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "ashw", 14,24, 0x054e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "ashd", 14,24, 0x074e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "beq", 8,8, 0x0a, "1p", 0, "", 21,21 },
+ { "bne", 8,8, 0x1a, "1p", 0, "", 21,21 },
+ { "bcs", 8,8, 0x2a, "1p", 0, "", 21,21 },
+ { "bcc", 8,8, 0x3a, "1p", 0, "", 21,21 },
+ { "bhi", 8,8, 0x4a, "1p", 0, "", 21,21 },
+ { "bls", 8,8, 0x5a, "1p", 0, "", 21,21 },
+ { "bgt", 8,8, 0x6a, "1p", 0, "", 21,21 },
+ { "ble", 8,8, 0x7a, "1p", 0, "", 21,21 },
+ { "bfs", 8,8, 0x8a, "1p", 0, "", 21,21 },
+ { "bfc", 8,8, 0x9a, "1p", 0, "", 21,21 },
+ { "blo", 8,8, 0xaa, "1p", 0, "", 21,21 },
+ { "bhs", 8,8, 0xba, "1p", 0, "", 21,21 },
+ { "blt", 8,8, 0xca, "1p", 0, "", 21,21 },
+ { "bge", 8,8, 0xda, "1p", 0, "", 21,21 },
+ { "but", 8,8, 0xea, "1p", 0, "", 21,21 },
+ { "buf", 8,8, 0xfa, "1p", 0, "", 21,21 },
+ { "bicb", 6,16, 0x08, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "bicw", 6,16, 0x09, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "bicd", 6,16, 0x0b, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "bicpsrb", 11,16, 0x17c, "1B", 1, "", DEF_MODEC,DEF_MODEL },
+ { "bicpsrw", 11,16, 0x17d, "1W", 2, "", DEF_MODEC,DEF_MODEL },
+ { "bispsrb", 11,16, 0x37c, "1B", 1, "", DEF_MODEC,DEF_MODEL },
+ { "bispsrw", 11,16, 0x37d, "1W", 2, "", DEF_MODEC,DEF_MODEL },
+ { "bpt", 8,8, 0xf2, "", 0, "", DEF_MODEC,DEF_MODEL },
+ { "br", 8,8, 0xea, "1p", 0, "", 21,21 },
+#ifdef SEQUENT_COMPATABILITY
+ { "bsr", 8,8, 0x02, "1H", 0, "", 21,21 },
+#else
+ { "bsr", 8,8, 0x02, "1p", 0, "", 21,21 },
+#endif
+ { "caseb", 11,16, 0x77c, "1B", 1, "", DEF_MODEC,DEF_MODEL },
+ { "casew", 11,16, 0x77d, "1W", 2, "", DEF_MODEC,DEF_MODEL },
+ { "cased", 11,16, 0x77f, "1D", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cbitb", 14,24, 0x084e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "cbitw", 14,24, 0x094e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "cbitd", 14,24, 0x0b4e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cbitib", 14,24, 0x0c4e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "cbitiw", 14,24, 0x0d4e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "cbitid", 14,24, 0x0f4e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "checkb", 11,24, 0x0ee, "2A3B1r", 1, "", DEF_MODEC,DEF_MODEL },
+ { "checkw", 11,24, 0x1ee, "2A3W1r", 2, "", DEF_MODEC,DEF_MODEL },
+ { "checkd", 11,24, 0x3ee, "2A3D1r", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cinv", 14,24, 0x271e, "2D1C", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cmpf", 14,24, 0x09be, "1F2F", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cmpl", 14,24, 0x08be, "1L2L", 8, "", DEF_MODEC,DEF_MODEL },
+ { "cmpb", 6,16, 0x04, "1B2B", 1, "", DEF_MODEC,DEF_MODEL },
+ { "cmpw", 6,16, 0x05, "1W2W", 2, "", DEF_MODEC,DEF_MODEL },
+ { "cmpd", 6,16, 0x07, "1D2D", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cmpmb", 14,24, 0x04ce, "1A2A3b", 1, "", DEF_MODEC,DEF_MODEL },
+ { "cmpmw", 14,24, 0x05ce, "1A2A3b", 2, "", DEF_MODEC,DEF_MODEL },
+ { "cmpmd", 14,24, 0x07ce, "1A2A3b", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cmpqb", 7,16, 0x1c, "2B1q", 1, "", DEF_MODEC,DEF_MODEL },
+ { "cmpqw", 7,16, 0x1d, "2W1q", 2, "", DEF_MODEC,DEF_MODEL },
+ { "cmpqd", 7,16, 0x1f, "2D1q", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cmpsb", 16,24, 0x040e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "cmpsw", 16,24, 0x050e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "cmpsd", 16,24, 0x070e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "cmpst", 16,24, 0x840e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "comb", 14,24, 0x344e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "comw", 14,24, 0x354e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "comd", 14,24, 0x374e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cvtp", 11,24, 0x036e, "2A3D1r", 4, "", DEF_MODEC,DEF_MODEL },
+ { "cxp", 8,8, 0x22, "1p", 0, "", 21,21 },
+ { "cxpd", 11,16, 0x07f, "1A", 4, "", DEF_MODEC,DEF_MODEL },
+ { "deib", 14,24, 0x2cce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "deiw", 14,24, 0x2dce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "deid", 14,24, 0x2fce, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "dia", 8,8, 0xc2, "", 1, "", DEF_MODEC,DEF_MODEL },
+ { "divf", 14,24, 0x21be, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "divl", 14,24, 0x20be, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "divb", 14,24, 0x3cce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "divw", 14,24, 0x3dce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "divd", 14,24, 0x3fce, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "enter", 8,8, 0x82, "1U2d", 0, "", DEF_MODEC,DEF_MODEL },
+ { "exit", 8,8, 0x92, "1u", 0, "", DEF_MODEC,DEF_MODEL },
+ { "extb", 11,24, 0x02e, "2I3B1r4d", 1, "", DEF_MODEC,DEF_MODEL },
+ { "extw", 11,24, 0x12e, "2I3W1r4d", 2, "", DEF_MODEC,DEF_MODEL },
+ { "extd", 11,24, 0x32e, "2I3D1r4d", 4, "", DEF_MODEC,DEF_MODEL },
+ { "extsb", 14,24, 0x0cce, "1I2I4G3g", 1, "", DEF_MODEC,DEF_MODEL },
+ { "extsw", 14,24, 0x0dce, "1I2I4G3g", 2, "", DEF_MODEC,DEF_MODEL },
+ { "extsd", 14,24, 0x0fce, "1I2I4G3g", 4, "", DEF_MODEC,DEF_MODEL },
+ { "ffsb", 14,24, 0x046e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "ffsw", 14,24, 0x056e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "ffsd", 14,24, 0x076e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "flag", 8,8, 0xd2, "", 0, "", DEF_MODEC,DEF_MODEL },
+ { "floorfb", 14,24, 0x3c3e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "floorfw", 14,24, 0x3d3e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "floorfd", 14,24, 0x3f3e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "floorlb", 14,24, 0x383e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "floorlw", 14,24, 0x393e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "floorld", 14,24, 0x3b3e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "ibitb", 14,24, 0x384e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "ibitw", 14,24, 0x394e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "ibitd", 14,24, 0x3b4e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "indexb", 11,24, 0x42e, "2B3B1r", 1, "", DEF_MODEC,DEF_MODEL },
+ { "indexw", 11,24, 0x52e, "2W3W1r", 2, "", DEF_MODEC,DEF_MODEL },
+ { "indexd", 11,24, 0x72e, "2D3D1r", 4, "", DEF_MODEC,DEF_MODEL },
+ { "insb", 11,24, 0x0ae, "2B3I1r4d", 1, "", DEF_MODEC,DEF_MODEL },
+ { "insw", 11,24, 0x1ae, "2W3I1r4d", 2, "", DEF_MODEC,DEF_MODEL },
+ { "insd", 11,24, 0x3ae, "2D3I1r4d", 4, "", DEF_MODEC,DEF_MODEL },
+ { "inssb", 14,24, 0x08ce, "1B2I4G3g", 1, "", DEF_MODEC,DEF_MODEL },
+ { "inssw", 14,24, 0x09ce, "1W2I4G3g", 2, "", DEF_MODEC,DEF_MODEL },
+ { "inssd", 14,24, 0x0bce, "1D2I4G3g", 4, "", DEF_MODEC,DEF_MODEL },
+ { "jsr", 11,16, 0x67f, "1A", 4, "", 21,21 },
+ { "jump", 11,16, 0x27f, "1A", 4, "", 21,21 },
+ { "lfsr", 19,24, 0x00f3e,"1D", 4, "", DEF_MODEC,DEF_MODEL },
+ { "lmr", 15,24, 0x0b1e, "2D1M", 4, "", DEF_MODEC,DEF_MODEL },
+ { "lprb", 7,16, 0x6c, "2B1P", 1, "", DEF_MODEC,DEF_MODEL },
+ { "lprw", 7,16, 0x6d, "2W1P", 2, "", DEF_MODEC,DEF_MODEL },
+ { "lprd", 7,16, 0x6f, "2D1P", 4, "", DEF_MODEC,DEF_MODEL },
+ { "lshb", 14,24, 0x144e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "lshw", 14,24, 0x154e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "lshd", 14,24, 0x174e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "meib", 14,24, 0x24ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "meiw", 14,24, 0x25ce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "meid", 14,24, 0x27ce, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "modb", 14,24, 0x38ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "modw", 14,24, 0x39ce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "modd", 14,24, 0x3bce, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movf", 14,24, 0x05be, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movl", 14,24, 0x04be, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "movb", 6,16, 0x14, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movw", 6,16, 0x15, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movd", 6,16, 0x17, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movbf", 14,24, 0x043e, "1B2Z", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movwf", 14,24, 0x053e, "1W2Z", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movdf", 14,24, 0x073e, "1D2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movbl", 14,24, 0x003e, "1B2Z", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movwl", 14,24, 0x013e, "1W2Z", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movdl", 14,24, 0x033e, "1D2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movfl", 14,24, 0x1b3e, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movlf", 14,24, 0x163e, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "movmb", 14,24, 0x00ce, "1A2A3b", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movmw", 14,24, 0x01ce, "1A2A3b", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movmd", 14,24, 0x03ce, "1A2A3b", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movqb", 7,16, 0x5c, "2I1q", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movqw", 7,16, 0x5d, "2I1q", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movqd", 7,16, 0x5f, "2I1q", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movsb", 16,24, 0x000e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "movsw", 16,24, 0x010e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "movsd", 16,24, 0x030e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "movst", 16,24, 0x800e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "movsub", 14,24, 0x0cae, "1A2A", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movsuw", 14,24, 0x0dae, "1A2A", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movsud", 14,24, 0x0fae, "1A2A", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movusb", 14,24, 0x1cae, "1A2A", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movusw", 14,24, 0x1dae, "1A2A", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movusd", 14,24, 0x1fae, "1A2A", 4, "", DEF_MODEC,DEF_MODEL },
+ { "movxbd", 14,24, 0x1cce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movxwd", 14,24, 0x1dce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movxbw", 14,24, 0x10ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movzbd", 14,24, 0x18ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "movzwd", 14,24, 0x19ce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "movzbw", 14,24, 0x14ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "mulf", 14,24, 0x31be, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "mull", 14,24, 0x30be, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "mulb", 14,24, 0x20ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "mulw", 14,24, 0x21ce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "muld", 14,24, 0x23ce, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "negf", 14,24, 0x15be, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "negl", 14,24, 0x14be, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "negb", 14,24, 0x204e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "negw", 14,24, 0x214e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "negd", 14,24, 0x234e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "nop", 8,8, 0xa2, "", 0, "", DEF_MODEC,DEF_MODEL },
+ { "notb", 14,24, 0x244e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "notw", 14,24, 0x254e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "notd", 14,24, 0x274e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "orb", 6,16, 0x18, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "orw", 6,16, 0x19, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "ord", 6,16, 0x1b, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "quob", 14,24, 0x30ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "quow", 14,24, 0x31ce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "quod", 14,24, 0x33ce, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "rdval", 19,24, 0x0031e,"1A", 4, "", DEF_MODEC,DEF_MODEL },
+ { "remb", 14,24, 0x34ce, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "remw", 14,24, 0x35ce, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "remd", 14,24, 0x37ce, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "restore", 8,8, 0x72, "1u", 0, "", DEF_MODEC,DEF_MODEL },
+ { "ret", 8,8, 0x12, "1d", 0, "", DEF_MODEC,DEF_MODEL },
+ { "reti", 8,8, 0x52, "", 0, "", DEF_MODEC,DEF_MODEL },
+ { "rett", 8,8, 0x42, "1d", 0, "", DEF_MODEC,DEF_MODEL },
+ { "rotb", 14,24, 0x004e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "rotw", 14,24, 0x014e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "rotd", 14,24, 0x034e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "roundfb", 14,24, 0x243e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "roundfw", 14,24, 0x253e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "roundfd", 14,24, 0x273e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "roundlb", 14,24, 0x203e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "roundlw", 14,24, 0x213e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "roundld", 14,24, 0x233e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "rxp", 8,8, 0x32, "1d", 0, "", DEF_MODEC,DEF_MODEL },
+ { "seqb", 11,16, 0x3c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "seqw", 11,16, 0x3d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "seqd", 11,16, 0x3f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sneb", 11,16, 0xbc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "snew", 11,16, 0xbd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sned", 11,16, 0xbf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "scsb", 11,16, 0x13c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "scsw", 11,16, 0x13d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "scsd", 11,16, 0x13f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sccb", 11,16, 0x1bc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sccw", 11,16, 0x1bd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sccd", 11,16, 0x1bf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "shib", 11,16, 0x23c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "shiw", 11,16, 0x23d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "shid", 11,16, 0x23f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "slsb", 11,16, 0x2bc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "slsw", 11,16, 0x2bd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "slsd", 11,16, 0x2bf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sgtb", 11,16, 0x33c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sgtw", 11,16, 0x33d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sgtd", 11,16, 0x33f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sleb", 11,16, 0x3bc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "slew", 11,16, 0x3bd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sled", 11,16, 0x3bf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sfsb", 11,16, 0x43c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sfsw", 11,16, 0x43d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sfsd", 11,16, 0x43f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sfcb", 11,16, 0x4bc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sfcw", 11,16, 0x4bd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sfcd", 11,16, 0x4bf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "slob", 11,16, 0x53c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "slow", 11,16, 0x53d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "slod", 11,16, 0x53f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "shsb", 11,16, 0x5bc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "shsw", 11,16, 0x5bd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "shsd", 11,16, 0x5bf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sltb", 11,16, 0x63c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sltw", 11,16, 0x63d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sltd", 11,16, 0x63f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sgeb", 11,16, 0x6bc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sgew", 11,16, 0x6bd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sged", 11,16, 0x6bf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sutb", 11,16, 0x73c, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sutw", 11,16, 0x73d, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sutd", 11,16, 0x73f, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sufb", 11,16, 0x7bc, "1B", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sufw", 11,16, 0x7bd, "1W", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sufd", 11,16, 0x7bf, "1D", 0, "", DEF_MODEC,DEF_MODEL },
+ { "save", 8,8, 0x62, "1U", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sbitb", 14,24, 0x184e, "1B2A", 1, "", DEF_MODEC,DEF_MODEL },
+ { "sbitw", 14,24, 0x194e, "1W2A", 2, "", DEF_MODEC,DEF_MODEL },
+ { "sbitd", 14,24, 0x1b4e, "1D2A", 4, "", DEF_MODEC,DEF_MODEL },
+ { "sbitib", 14,24, 0x1c4e, "1B2A", 1, "", DEF_MODEC,DEF_MODEL },
+ { "sbitiw", 14,24, 0x1d4e, "1W2A", 2, "", DEF_MODEC,DEF_MODEL },
+ { "sbitid", 14,24, 0x1f4e, "1D2A", 4, "", DEF_MODEC,DEF_MODEL },
+ { "setcfg", 15,24, 0x0b0e, "1O", 0, "", DEF_MODEC,DEF_MODEL },
+ { "sfsr", 14,24, 0x373e, "1f", 0, "", DEF_MODEC,DEF_MODEL },
+ { "skpsb", 16,24, 0x0c0e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "skpsw", 16,24, 0x0d0e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "skpsd", 16,24, 0x0f0e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "skpst", 16,24, 0x8c0e, "1S", 0, "[]", DEF_MODEC,DEF_MODEL },
+ { "smr", 15,24, 0x0f1e, "2I1M", 4, "", DEF_MODEC,DEF_MODEL },
+ { "sprb", 7,16, 0x2c, "2I1P", 1, "", DEF_MODEC,DEF_MODEL },
+ { "sprw", 7,16, 0x2d, "2I1P", 2, "", DEF_MODEC,DEF_MODEL },
+ { "sprd", 7,16, 0x2f, "2I1P", 4, "", DEF_MODEC,DEF_MODEL },
+ { "subf", 14,24, 0x11be, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "subl", 14,24, 0x10be, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "subb", 6,16, 0x20, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "subw", 6,16, 0x21, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "subd", 6,16, 0x23, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "subcb", 6,16, 0x30, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "subcw", 6,16, 0x31, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "subcd", 6,16, 0x33, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "subpb", 14,24, 0x2c4e, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "subpw", 14,24, 0x2d4e, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "subpd", 14,24, 0x2f4e, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+#ifdef NS32K_SVC_IMMED_OPERANDS
+ { "svc", 8,8, 0xe2, "2i1i", 1, "", DEF_MODEC,DEF_MODEL }, /* not really, but some unix uses it */
+#else
+ { "svc", 8,8, 0xe2, "", 0, "", DEF_MODEC,DEF_MODEL },
+#endif
+ { "tbitb", 6,16, 0x34, "1B2A", 1, "", DEF_MODEC,DEF_MODEL },
+ { "tbitw", 6,16, 0x35, "1W2A", 2, "", DEF_MODEC,DEF_MODEL },
+ { "tbitd", 6,16, 0x37, "1D2A", 4, "", DEF_MODEC,DEF_MODEL },
+ { "truncfb", 14,24, 0x2c3e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "truncfw", 14,24, 0x2d3e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "truncfd", 14,24, 0x2f3e, "1F2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "trunclb", 14,24, 0x283e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "trunclw", 14,24, 0x293e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "truncld", 14,24, 0x2b3e, "1L2I", 8, "", DEF_MODEC,DEF_MODEL },
+ { "wait", 8,8, 0xb2, "", 0, "", DEF_MODEC,DEF_MODEL },
+ { "wrval", 19,24, 0x0071e,"1A", 0, "", DEF_MODEC,DEF_MODEL },
+ { "xorb", 6,16, 0x38, "1B2I", 1, "", DEF_MODEC,DEF_MODEL },
+ { "xorw", 6,16, 0x39, "1W2I", 2, "", DEF_MODEC,DEF_MODEL },
+ { "xord", 6,16, 0x3b, "1D2I", 4, "", DEF_MODEC,DEF_MODEL },
+ { "dotf", 14,24, 0x0dfe, "1F2F", 4, "", DEF_MODEC,DEF_MODEL },
+ { "dotl", 14,24, 0x0cfe, "1L2L", 8, "", DEF_MODEC,DEF_MODEL },
+ { "logbf", 14,24, 0x15fe, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "logbl", 14,24, 0x14fe, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+ { "polyf", 14,24, 0x09fe, "1F2F", 4, "", DEF_MODEC,DEF_MODEL },
+ { "polyl", 14,24, 0x08fe, "1L2L", 8, "", DEF_MODEC,DEF_MODEL },
+ { "scalbf", 14,24, 0x11fe, "1F2Z", 4, "", DEF_MODEC,DEF_MODEL },
+ { "scalbl", 14,24, 0x10fe, "1L2Z", 8, "", DEF_MODEC,DEF_MODEL },
+};
+
+static const int numopcodes=sizeof(ns32k_opcodes)/sizeof(ns32k_opcodes[0]);
+
+static const struct ns32k_opcode *const endop = ns32k_opcodes+sizeof(ns32k_opcodes)/sizeof(ns32k_opcodes[0]);
+
+#define MAX_ARGS 4
+#define ARG_LEN 50
+
diff --git a/include/opcode/pn.h b/include/opcode/pn.h
new file mode 100644
index 0000000..0f59a2a
--- /dev/null
+++ b/include/opcode/pn.h
@@ -0,0 +1,282 @@
+/* Print GOULD PN (PowerNode) instructions for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GDB; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+struct gld_opcode
+{
+ char *name;
+ unsigned long opcode;
+ unsigned long mask;
+ char *args;
+ int length;
+};
+
+/* We store four bytes of opcode for all opcodes because that
+ is the most any of them need. The actual length of an instruction
+ is always at least 2 bytes, and at most four. The length of the
+ instruction is based on the opcode.
+
+ The mask component is a mask saying which bits must match
+ particular opcode in order for an instruction to be an instance
+ of that opcode.
+
+ The args component is a string containing characters
+ that are used to format the arguments to the instruction. */
+
+/* Kinds of operands:
+ r Register in first field
+ R Register in second field
+ b Base register in first field
+ B Base register in second field
+ v Vector register in first field
+ V Vector register in first field
+ A Optional address register (base register)
+ X Optional index register
+ I Immediate data (16bits signed)
+ O Offset field (16bits signed)
+ h Offset field (15bits signed)
+ d Offset field (14bits signed)
+ S Shift count field
+
+ any other characters are printed as is...
+*/
+
+/* The assembler requires that this array be sorted as follows:
+ all instances of the same mnemonic must be consecutive.
+ All instances of the same mnemonic with the same number of operands
+ must be consecutive.
+ */
+struct gld_opcode gld_opcodes[] =
+{
+{ "abm", 0xa0080000, 0xfc080000, "f,xOA,X", 4 },
+{ "abr", 0x18080000, 0xfc0c0000, "r,f", 2 },
+{ "aci", 0xfc770000, 0xfc7f8000, "r,I", 4 },
+{ "adfd", 0xe0080002, 0xfc080002, "r,xOA,X", 4 },
+{ "adfw", 0xe0080000, 0xfc080000, "r,xOA,X", 4 },
+{ "adi", 0xc8010000, 0xfc7f0000, "r,I", 4 },
+{ "admb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "admd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "admh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "admw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "adr", 0x38000000, 0xfc0f0000, "r,R", 2 },
+{ "adrfd", 0x38090000, 0xfc0f0000, "r,R", 2 },
+{ "adrfw", 0x38010000, 0xfc0f0000, "r,R", 2 },
+{ "adrm", 0x38080000, 0xfc0f0000, "r,R", 2 },
+{ "ai", 0xfc030000, 0xfc07ffff, "I", 4 },
+{ "anmb", 0x84080000, 0xfc080000, "r,xOA,X", 4 },
+{ "anmd", 0x84000002, 0xfc080002, "r,xOA,X", 4 },
+{ "anmh", 0x84000001, 0xfc080001, "r,xOA,X", 4 },
+{ "anmw", 0x84000000, 0xfc080000, "r,xOA,X", 4 },
+{ "anr", 0x04000000, 0xfc0f0000, "r,R", 2 },
+{ "armb", 0xe8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "armd", 0xe8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "armh", 0xe8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "armw", 0xe8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "bcf", 0xf0000000, 0xfc080000, "I,xOA,X", 4 },
+{ "bct", 0xec000000, 0xfc080000, "I,xOA,X", 4 },
+{ "bei", 0x00060000, 0xffff0000, "", 2 },
+{ "bft", 0xf0000000, 0xff880000, "xOA,X", 4 },
+{ "bib", 0xf4000000, 0xfc780000, "r,xOA", 4 },
+{ "bid", 0xf4600000, 0xfc780000, "r,xOA", 4 },
+{ "bih", 0xf4200000, 0xfc780000, "r,xOA", 4 },
+{ "biw", 0xf4400000, 0xfc780000, "r,xOA", 4 },
+{ "bl", 0xf8800000, 0xff880000, "xOA,X", 4 },
+{ "bsub", 0x5c080000, 0xff8f0000, "", 2 },
+{ "bsubm", 0x28080000, 0xfc080000, "", 4 },
+{ "bu", 0xec000000, 0xff880000, "xOA,X", 4 },
+{ "call", 0x28080000, 0xfc0f0000, "", 2 },
+{ "callm", 0x5c080000, 0xff880000, "", 4 },
+{ "camb", 0x90080000, 0xfc080000, "r,xOA,X", 4 },
+{ "camd", 0x90000002, 0xfc080002, "r,xOA,X", 4 },
+{ "camh", 0x90000001, 0xfc080001, "r,xOA,X", 4 },
+{ "camw", 0x90000000, 0xfc080000, "r.xOA,X", 4 },
+{ "car", 0x10000000, 0xfc0f0000, "r,R", 2 },
+{ "cd", 0xfc060000, 0xfc070000, "r,f", 4 },
+{ "cea", 0x000f0000, 0xffff0000, "", 2 },
+{ "ci", 0xc8050000, 0xfc7f0000, "r,I", 4 },
+{ "cmc", 0x040a0000, 0xfc7f0000, "r", 2 },
+{ "cmmb", 0x94080000, 0xfc080000, "r,xOA,X", 4 },
+{ "cmmd", 0x94000002, 0xfc080002, "r,xOA,X", 4 },
+{ "cmmh", 0x94000001, 0xfc080001, "r,xOA,X", 4 },
+{ "cmmw", 0x94000000, 0xfc080000, "r,xOA,X", 4 },
+{ "cmr", 0x14000000, 0xfc0f0000, "r,R", 2 },
+{ "daci", 0xfc7f0000, 0xfc7f8000, "r,I", 4 },
+{ "dae", 0x000e0000, 0xffff0000, "", 2 },
+{ "dai", 0xfc040000, 0xfc07ffff, "I", 4 },
+{ "dci", 0xfc6f0000, 0xfc7f8000, "r,I", 4 },
+{ "di", 0xfc010000, 0xfc07ffff, "I", 4 },
+{ "dvfd", 0xe4000002, 0xfc080002, "r,xOA,X", 4 },
+{ "dvfw", 0xe4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "dvi", 0xc8040000, 0xfc7f0000, "r,I", 4 },
+{ "dvmb", 0xc4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "dvmh", 0xc4000001, 0xfc080001, "r,xOA,X", 4 },
+{ "dvmw", 0xc4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "dvr", 0x380a0000, 0xfc0f0000, "r,R", 2 },
+{ "dvrfd", 0x380c0000, 0xfc0f0000, "r,R", 4 },
+{ "dvrfw", 0x38040000, 0xfc0f0000, "r,xOA,X", 4 },
+{ "eae", 0x00080000, 0xffff0000, "", 2 },
+{ "eci", 0xfc670000, 0xfc7f8080, "r,I", 4 },
+{ "ecwcs", 0xfc4f0000, 0xfc7f8000, "", 4 },
+{ "ei", 0xfc000000, 0xfc07ffff, "I", 4 },
+{ "eomb", 0x8c080000, 0xfc080000, "r,xOA,X", 4 },
+{ "eomd", 0x8c000002, 0xfc080002, "r,xOA,X", 4 },
+{ "eomh", 0x8c000001, 0xfc080001, "r,xOA,X", 4 },
+{ "eomw", 0x8c000000, 0xfc080000, "r,xOA,X", 4 },
+{ "eor", 0x0c000000, 0xfc0f0000, "r,R", 2 },
+{ "eorm", 0x0c080000, 0xfc0f0000, "r,R", 2 },
+{ "es", 0x00040000, 0xfc7f0000, "r", 2 },
+{ "exm", 0xa8000000, 0xff880000, "xOA,X", 4 },
+{ "exr", 0xc8070000, 0xfc7f0000, "r", 2 },
+{ "exrr", 0xc8070002, 0xfc7f0002, "r", 2 },
+{ "fixd", 0x380d0000, 0xfc0f0000, "r,R", 2 },
+{ "fixw", 0x38050000, 0xfc0f0000, "r,R", 2 },
+{ "fltd", 0x380f0000, 0xfc0f0000, "r,R", 2 },
+{ "fltw", 0x38070000, 0xfc0f0000, "r,R", 2 },
+{ "grio", 0xfc3f0000, 0xfc7f8000, "r,I", 4 },
+{ "halt", 0x00000000, 0xffff0000, "", 2 },
+{ "hio", 0xfc370000, 0xfc7f8000, "r,I", 4 },
+{ "jwcs", 0xfa080000, 0xff880000, "xOA,X", 4 },
+{ "la", 0x50000000, 0xfc000000, "r,xOA,X", 4 },
+{ "labr", 0x58080000, 0xfc080000, "b,xOA,X", 4 },
+{ "lb", 0xac080000, 0xfc080000, "r,xOA,X", 4 },
+{ "lcs", 0x00030000, 0xfc7f0000, "r", 2 },
+{ "ld", 0xac000002, 0xfc080002, "r,xOA,X", 4 },
+{ "lear", 0x80000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lf", 0xcc000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lfbr", 0xcc080000, 0xfc080000, "b,xOA,X", 4 },
+{ "lh", 0xac000001, 0xfc080001, "r,xOA,X", 4 },
+{ "li", 0xc8000000, 0xfc7f0000, "r,I", 4 },
+{ "lmap", 0x2c070000, 0xfc7f0000, "r", 2 },
+{ "lmb", 0xb0080000, 0xfc080000, "r,xOA,X", 4 },
+{ "lmd", 0xb0000002, 0xfc080002, "r,xOA,X", 4 },
+{ "lmh", 0xb0000001, 0xfc080001, "r,xOA,X", 4 },
+{ "lmw", 0xb0000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lnb", 0xb4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "lnd", 0xb4000002, 0xfc080002, "r,xOA,X", 4 },
+{ "lnh", 0xb4000001, 0xfc080001, "r,xOA,X", 4 },
+{ "lnw", 0xb4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lpsd", 0xf9800000, 0xff880000, "r,xOA,X", 4 },
+{ "lpsdcm", 0xfa800000, 0xff880000, "r,xOA,X", 4 },
+{ "lw", 0xac000000, 0xfc080000, "r,xOA,X", 4 },
+{ "lwbr", 0x5c000000, 0xfc080000, "b,xOA,X", 4 },
+{ "mpfd", 0xe4080002, 0xfc080002, "r,xOA,X", 4 },
+{ "mpfw", 0xe4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "mpi", 0xc8030000, 0xfc7f0000, "r,I", 4 },
+{ "mpmb", 0xc0080000, 0xfc080000, "r,xOA,X", 4 },
+{ "mpmh", 0xc0000001, 0xfc080001, "r,xOA,X", 4 },
+{ "mpmw", 0xc0000000, 0xfc080000, "r,xOA,X", 4 },
+{ "mpr", 0x38020000, 0xfc0f0000, "r,R", 2 },
+{ "mprfd", 0x380e0000, 0xfc0f0000, "r,R", 2 },
+{ "mprfw", 0x38060000, 0xfc0f0000, "r,R", 2 },
+{ "nop", 0x00020000, 0xffff0000, "", 2 },
+{ "ormb", 0x88080000, 0xfc080000, "r,xOA,X", 4 },
+{ "ormd", 0x88000002, 0xfc080002, "r,xOA,X", 4 },
+{ "ormh", 0x88000001, 0xfc080001, "r,xOA,X", 4 },
+{ "ormw", 0x88000000, 0xfc080000, "r,xOA,X", 4 },
+{ "orr", 0x08000000, 0xfc0f0000, "r,R", 2 },
+{ "orrm", 0x08080000, 0xfc0f0000, "r,R", 2 },
+{ "rdsts", 0x00090000, 0xfc7f0000, "r", 2 },
+{ "return", 0x280e0000, 0xfc7f0000, "", 2 },
+{ "ri", 0xfc020000, 0xfc07ffff, "I", 4 },
+{ "rnd", 0x00050000, 0xfc7f0000, "r", 2 },
+{ "rpswt", 0x040b0000, 0xfc7f0000, "r", 2 },
+{ "rschnl", 0xfc2f0000, 0xfc7f8000, "r,I", 4 },
+{ "rsctl", 0xfc470000, 0xfc7f8000, "r,I", 4 },
+{ "rwcs", 0x000b0000, 0xfc0f0000, "r,R", 2 },
+{ "sacz", 0x10080000, 0xfc0f0000, "r,R", 2 },
+{ "sbm", 0x98080000, 0xfc080000, "f,xOA,X", 4 },
+{ "sbr", 0x18000000, 0xfc0c0000, "r,f", 4 },
+{ "sea", 0x000d0000, 0xffff0000, "", 2 },
+{ "setcpu", 0x2c090000, 0xfc7f0000, "r", 2 },
+{ "sio", 0xfc170000, 0xfc7f8000, "r,I", 4 },
+{ "sipu", 0x000a0000, 0xffff0000, "", 2 },
+{ "sla", 0x1c400000, 0xfc600000, "r,S", 2 },
+{ "slad", 0x20400000, 0xfc600000, "r,S", 2 },
+{ "slc", 0x24400000, 0xfc600000, "r,S", 2 },
+{ "sll", 0x1c600000, 0xfc600000, "r,S", 2 },
+{ "slld", 0x20600000, 0xfc600000, "r,S", 2 },
+{ "smc", 0x04070000, 0xfc070000, "", 2 },
+{ "sra", 0x1c000000, 0xfc600000, "r,S", 2 },
+{ "srad", 0x20000000, 0xfc600000, "r,S", 2 },
+{ "src", 0x24000000, 0xfc600000, "r,S", 2 },
+{ "srl", 0x1c200000, 0xfc600000, "r,S", 2 },
+{ "srld", 0x20200000, 0xfc600000, "r,S", 2 },
+{ "stb", 0xd4080000, 0xfc080000, "r,xOA,X", 4 },
+{ "std", 0xd4000002, 0xfc080002, "r,xOA,X", 4 },
+{ "stf", 0xdc000000, 0xfc080000, "r,xOA,X", 4 },
+{ "stfbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 },
+{ "sth", 0xd4000001, 0xfc080001, "r,xOA,X", 4 },
+{ "stmb", 0xd8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "stmd", 0xd8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "stmh", 0xd8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "stmw", 0xd8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "stpio", 0xfc270000, 0xfc7f8000, "r,I", 4 },
+{ "stw", 0xd4000000, 0xfc080000, "r,xOA,X", 4 },
+{ "stwbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 },
+{ "suabr", 0x58000000, 0xfc080000, "b,xOA,X", 4 },
+{ "sufd", 0xe0000002, 0xfc080002, "r,xOA,X", 4 },
+{ "sufw", 0xe0000000, 0xfc080000, "r,xOA,X", 4 },
+{ "sui", 0xc8020000, 0xfc7f0000, "r,I", 4 },
+{ "sumb", 0xbc080000, 0xfc080000, "r,xOA,X", 4 },
+{ "sumd", 0xbc000002, 0xfc080002, "r,xOA,X", 4 },
+{ "sumh", 0xbc000001, 0xfc080001, "r,xOA,X", 4 },
+{ "sumw", 0xbc000000, 0xfc080000, "r,xOA,X", 4 },
+{ "sur", 0x3c000000, 0xfc0f0000, "r,R", 2 },
+{ "surfd", 0x380b0000, 0xfc0f0000, "r,xOA,X", 4 },
+{ "surfw", 0x38030000, 0xfc0f0000, "r,R", 2 },
+{ "surm", 0x3c080000, 0xfc0f0000, "r,R", 2 },
+{ "svc", 0xc8060000, 0xffff0000, "", 4 },
+{ "tbm", 0xa4080000, 0xfc080000, "f,xOA,X", 4 },
+{ "tbr", 0x180c0000, 0xfc0c0000, "r,f", 2 },
+{ "tbrr", 0x2c020000, 0xfc0f0000, "r,B", 2 },
+{ "tccr", 0x28040000, 0xfc7f0000, "", 2 },
+{ "td", 0xfc050000, 0xfc070000, "r,f", 4 },
+{ "tio", 0xfc1f0000, 0xfc7f8000, "r,I", 4 },
+{ "tmapr", 0x2c0a0000, 0xfc0f0000, "r,R", 2 },
+{ "tpcbr", 0x280c0000, 0xfc7f0000, "r", 2 },
+{ "trbr", 0x2c010000, 0xfc0f0000, "b,R", 2 },
+{ "trc", 0x2c030000, 0xfc0f0000, "r,R", 2 },
+{ "trcc", 0x28050000, 0xfc7f0000, "", 2 },
+{ "trcm", 0x2c0b0000, 0xfc0f0000, "r,R", 2 },
+{ "trn", 0x2c040000, 0xfc0f0000, "r,R", 2 },
+{ "trnm", 0x2c0c0000, 0xfc0f0000, "r,R", 2 },
+{ "trr", 0x2c000000, 0xfc0f0000, "r,R", 2 },
+{ "trrm", 0x2c080000, 0xfc0f0000, "r,R", 2 },
+{ "trsc", 0x2c0e0000, 0xfc0f0000, "r,R", 2 },
+{ "trsw", 0x28000000, 0xfc7f0000, "r", 2 },
+{ "tscr", 0x2c0f0000, 0xfc0f0000, "r,R", 2 },
+{ "uei", 0x00070000, 0xffff0000, "", 2 },
+{ "wait", 0x00010000, 0xffff0000, "", 2 },
+{ "wcwcs", 0xfc5f0000, 0xfc7f8000, "", 4 },
+{ "wwcs", 0x000c0000, 0xfc0f0000, "r,R", 2 },
+{ "xcbr", 0x28020000, 0xfc0f0000, "b,B", 2 },
+{ "xcr", 0x2c050000, 0xfc0f0000, "r,R", 2 },
+{ "xcrm", 0x2c0d0000, 0xfc0f0000, "r,R", 2 },
+{ "zbm", 0x9c080000, 0xfc080000, "f,xOA,X", 4 },
+{ "zbr", 0x18040000, 0xfc0c0000, "r,f", 2 },
+{ "zmb", 0xf8080000, 0xfc080000, "r,xOA,X", 4 },
+{ "zmd", 0xf8000002, 0xfc080002, "r,xOA,X", 4 },
+{ "zmh", 0xf8000001, 0xfc080001, "r,xOA,X", 4 },
+{ "zmw", 0xf8000000, 0xfc080000, "r,xOA,X", 4 },
+{ "zr", 0x0c000000, 0xfc0f0000, "r", 2 },
+};
+
+int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]);
+
+struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) /
+ sizeof(gld_opcodes[0]);
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
new file mode 100644
index 0000000..a9e3b24
--- /dev/null
+++ b/include/opcode/ppc.h
@@ -0,0 +1,248 @@
+/* ppc.h -- Header file for PowerPC opcode table
+ Copyright 1994, 1995 Free Software Foundation, Inc.
+ Written by Ian Lance Taylor, Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef PPC_H
+#define PPC_H
+
+/* The opcode table is an array of struct powerpc_opcode. */
+
+struct powerpc_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* The opcode itself. Those bits which will be filled in with
+ operands are zeroes. */
+ unsigned long opcode;
+
+ /* The opcode mask. This is used by the disassembler. This is a
+ mask containing ones indicating those bits which must match the
+ opcode field, and zeroes indicating those bits which need not
+ match (and are presumably filled in by operands). */
+ unsigned long mask;
+
+ /* One bit flags for the opcode. These are used to indicate which
+ specific processors support the instructions. The defined values
+ are listed below. */
+ unsigned long flags;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[8];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct powerpc_opcode powerpc_opcodes[];
+extern const int powerpc_num_opcodes;
+
+/* Values defined for the flags field of a struct powerpc_opcode. */
+
+/* Opcode is defined for the PowerPC architecture. */
+#define PPC_OPCODE_PPC (01)
+
+/* Opcode is defined for the POWER (RS/6000) architecture. */
+#define PPC_OPCODE_POWER (02)
+
+/* Opcode is defined for the POWER2 (Rios 2) architecture. */
+#define PPC_OPCODE_POWER2 (04)
+
+/* Opcode is only defined on 32 bit architectures. */
+#define PPC_OPCODE_32 (010)
+
+/* Opcode is only defined on 64 bit architectures. */
+#define PPC_OPCODE_64 (020)
+
+/* Opcode is supported by the Motorola PowerPC 601 processor. The 601
+ is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions,
+ but it also supports many additional POWER instructions. */
+#define PPC_OPCODE_601 (040)
+
+/* Opcode is supported in both the Power and PowerPC architectures
+ (ie, compiler's -mcpu=common or assembler's -mcom). */
+#define PPC_OPCODE_COMMON (0100)
+
+/* Opcode is supported for any Power or PowerPC platform (this is
+ for the assembler's -many option, and it eliminates duplicates). */
+#define PPC_OPCODE_ANY (0200)
+
+/* A macro to extract the major opcode from an instruction. */
+#define PPC_OP(i) (((i) >> 26) & 0x3f)
+
+/* The operands table is an array of struct powerpc_operand. */
+
+struct powerpc_operand
+{
+ /* The number of bits in the operand. */
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+ int shift;
+
+ /* Insertion function. This is used by the assembler. To insert an
+ operand value into an instruction, check this field.
+
+ If it is NULL, execute
+ i |= (op & ((1 << o->bits) - 1)) << o->shift;
+ (i is the instruction which we are filling in, o is a pointer to
+ this structure, and op is the opcode value; this assumes twos
+ complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction and the operand value. It will return the new value
+ of the instruction. If the ERRMSG argument is not NULL, then if
+ the operand value is illegal, *ERRMSG will be set to a warning
+ string (the operand will be inserted in any case). If the
+ operand value is legal, *ERRMSG will be unchanged (most operands
+ can accept any value). */
+ unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
+ const char **errmsg));
+
+ /* Extraction function. This is used by the disassembler. To
+ extract this operand type from an instruction, check this field.
+
+ If it is NULL, compute
+ op = ((i) >> o->shift) & ((1 << o->bits) - 1);
+ if ((o->flags & PPC_OPERAND_SIGNED) != 0
+ && (op & (1 << (o->bits - 1))) != 0)
+ op -= 1 << o->bits;
+ (i is the instruction, o is a pointer to this structure, and op
+ is the result; this assumes twos complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction value. It will return the value of the operand. If
+ the INVALID argument is not NULL, *INVALID will be set to
+ non-zero if this operand type can not actually be extracted from
+ this operand (i.e., the instruction does not match). If the
+ operand is valid, *INVALID will not be changed. */
+ long (*extract) PARAMS ((unsigned long instruction, int *invalid));
+
+ /* One bit syntax flags. */
+ unsigned long flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the powerpc_opcodes table. */
+
+extern const struct powerpc_operand powerpc_operands[];
+
+/* Values defined for the flags field of a struct powerpc_operand. */
+
+/* This operand takes signed values. */
+#define PPC_OPERAND_SIGNED (01)
+
+/* This operand takes signed values, but also accepts a full positive
+ range of values when running in 32 bit mode. That is, if bits is
+ 16, it takes any value from -0x8000 to 0xffff. In 64 bit mode,
+ this flag is ignored. */
+#define PPC_OPERAND_SIGNOPT (02)
+
+/* This operand does not actually exist in the assembler input. This
+ is used to support extended mnemonics such as mr, for which two
+ operands fields are identical. The assembler should call the
+ insert function with any op value. The disassembler should call
+ the extract function, ignore the return value, and check the value
+ placed in the valid argument. */
+#define PPC_OPERAND_FAKE (04)
+
+/* The next operand should be wrapped in parentheses rather than
+ separated from this one by a comma. This is used for the load and
+ store instructions which want their operands to look like
+ reg,displacement(reg)
+ */
+#define PPC_OPERAND_PARENS (010)
+
+/* This operand may use the symbolic names for the CR fields, which
+ are
+ lt 0 gt 1 eq 2 so 3 un 3
+ cr0 0 cr1 1 cr2 2 cr3 3
+ cr4 4 cr5 5 cr6 6 cr7 7
+ These may be combined arithmetically, as in cr2*4+gt. These are
+ only supported on the PowerPC, not the POWER. */
+#define PPC_OPERAND_CR (020)
+
+/* This operand names a register. The disassembler uses this to print
+ register names with a leading 'r'. */
+#define PPC_OPERAND_GPR (040)
+
+/* This operand names a floating point register. The disassembler
+ prints these with a leading 'f'. */
+#define PPC_OPERAND_FPR (0100)
+
+/* This operand is a relative branch displacement. The disassembler
+ prints these symbolically if possible. */
+#define PPC_OPERAND_RELATIVE (0200)
+
+/* This operand is an absolute branch address. The disassembler
+ prints these symbolically if possible. */
+#define PPC_OPERAND_ABSOLUTE (0400)
+
+/* This operand is optional, and is zero if omitted. This is used for
+ the optional BF and L fields in the comparison instructions. The
+ assembler must count the number of operands remaining on the line,
+ and the number of operands remaining for the opcode, and decide
+ whether this operand is present or not. The disassembler should
+ print this operand out only if it is not zero. */
+#define PPC_OPERAND_OPTIONAL (01000)
+
+/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
+ is omitted, then for the next operand use this operand value plus
+ 1, ignoring the next operand field for the opcode. This wretched
+ hack is needed because the Power rotate instructions can take
+ either 4 or 5 operands. The disassembler should print this operand
+ out regardless of the PPC_OPERAND_OPTIONAL field. */
+#define PPC_OPERAND_NEXT (02000)
+
+/* This operand should be regarded as a negative number for the
+ purposes of overflow checking (i.e., the normal most negative
+ number is disallowed and one more than the normal most positive
+ number is allowed). This flag will only be set for a signed
+ operand. */
+#define PPC_OPERAND_NEGATIVE (04000)
+
+/* The POWER and PowerPC assemblers use a few macros. We keep them
+ with the operands table for simplicity. The macro table is an
+ array of struct powerpc_macro. */
+
+struct powerpc_macro
+{
+ /* The macro name. */
+ const char *name;
+
+ /* The number of operands the macro takes. */
+ unsigned int operands;
+
+ /* One bit flags for the opcode. These are used to indicate which
+ specific processors support the instructions. The values are the
+ same as those for the struct powerpc_opcode flags field. */
+ unsigned long flags;
+
+ /* A format string to turn the macro into a normal instruction.
+ Each %N in the string is replaced with operand number N (zero
+ based). */
+ const char *format;
+};
+
+extern const struct powerpc_macro powerpc_macros[];
+extern const int powerpc_num_macros;
+
+#endif /* PPC_H */
diff --git a/include/opcode/pyr.h b/include/opcode/pyr.h
new file mode 100644
index 0000000..06632b8
--- /dev/null
+++ b/include/opcode/pyr.h
@@ -0,0 +1,287 @@
+/* pyramid.opcode.h -- gdb initial attempt. */
+
+/* pyramid opcode table: wot to do with this
+ particular opcode */
+
+struct pyr_datum
+{
+ char nargs;
+ char * args; /* how to compile said opcode */
+ unsigned long mask; /* Bit vector: which operand modes are valid
+ for this opcode */
+ unsigned char code; /* op-code (always 6(?) bits */
+};
+
+typedef struct pyr_insn_format {
+ unsigned int mode :4;
+ unsigned int operator :8;
+ unsigned int index_scale :2;
+ unsigned int index_reg :6;
+ unsigned int operand_1 :6;
+ unsigned int operand_2:6;
+} pyr_insn_format;
+
+
+/* We store four bytes of opcode for all opcodes.
+ Pyramid is sufficiently RISCy that:
+ - insns are always an integral number of words;
+ - the length of any insn can be told from the first word of
+ the insn. (ie, if there are zero, one, or two words of
+ immediate operand/offset).
+
+
+ The args component is a string containing two characters for each
+ operand of the instruction. The first specifies the kind of operand;
+ the second, the place it is stored. */
+
+/* Kinds of operands:
+ mask assembler syntax description
+ 0x0001: movw Rn,Rn register to register
+ 0x0002: movw K,Rn quick immediate to register
+ 0x0004: movw I,Rn long immediate to register
+ 0x0008: movw (Rn),Rn register indirect to register
+ movw (Rn)[x],Rn register indirect to register
+ 0x0010: movw I(Rn),Rn offset register indirect to register
+ movw I(Rn)[x],Rn offset register indirect, indexed, to register
+
+ 0x0020: movw Rn,(Rn) register to register indirect
+ 0x0040: movw K,(Rn) quick immediate to register indirect
+ 0x0080: movw I,(Rn) long immediate to register indirect
+ 0x0100: movw (Rn),(Rn) register indirect to-register indirect
+ 0x0100: movw (Rn),(Rn) register indirect to-register indirect
+ 0x0200: movw I(Rn),(Rn) register indirect+offset to register indirect
+ 0x0200: movw I(Rn),(Rn) register indirect+offset to register indirect
+
+ 0x0400: movw Rn,I(Rn) register to register indirect+offset
+ 0x0800: movw K,I(Rn) quick immediate to register indirect+offset
+ 0x1000: movw I,I(Rn) long immediate to register indirect+offset
+ 0x1000: movw (Rn),I(Rn) register indirect to-register indirect+offset
+ 0x1000: movw I(Rn),I(Rn) register indirect+offset to register indirect
+ +offset
+ 0x0000: (irregular) ???
+
+
+ Each insn has a four-bit field encoding the type(s) of its operands.
+*/
+
+/* Some common combinations
+ */
+
+/* the first 5,(0x1|0x2|0x4|0x8|0x10) ie (1|2|4|8|16), ie ( 32 -1)*/
+#define GEN_TO_REG (31)
+
+#define UNKNOWN ((unsigned long)-1)
+#define ANY (GEN_TO_REG | (GEN_TO_REG << 5) | (GEN_TO_REG << 15))
+
+#define CONVERT (1|8|0x10|0x20|0x200)
+
+#define K_TO_REG (2)
+#define I_TO_REG (4)
+#define NOTK_TO_REG (GEN_TO_REG & ~K_TO_REG)
+#define NOTI_TO_REG (GEN_TO_REG & ~I_TO_REG)
+
+/* The assembler requires that this array be sorted as follows:
+ all instances of the same mnemonic must be consecutive.
+ All instances of the same mnemonic with the same number of operands
+ must be consecutive.
+ */
+
+struct pyr_opcode /* pyr opcode text */
+{
+ char * name; /* opcode name: lowercase string [key] */
+ struct pyr_datum datum; /* rest of opcode table [datum] */
+};
+
+#define pyr_how args
+#define pyr_nargs nargs
+#define pyr_mask mask
+#define pyr_name name
+
+struct pyr_opcode pyr_opcodes[] =
+{
+ {"movb", { 2, "", UNKNOWN, 0x11}, },
+ {"movh", { 2, "", UNKNOWN, 0x12} },
+ {"movw", { 2, "", ANY, 0x10} },
+ {"movl", { 2, "", ANY, 0x13} },
+ {"mnegw", { 2, "", (0x1|0x8|0x10), 0x14} },
+ {"mnegf", { 2, "", 0x1, 0x15} },
+ {"mnegd", { 2, "", 0x1, 0x16} },
+ {"mcomw", { 2, "", (0x1|0x8|0x10), 0x17} },
+ {"mabsw", { 2, "", (0x1|0x8|0x10), 0x18} },
+ {"mabsf", { 2, "", 0x1, 0x19} },
+ {"mabsd", { 2, "", 0x1, 0x1a} },
+ {"mtstw", { 2, "", (0x1|0x8|0x10), 0x1c} },
+ {"mtstf", { 2, "", 0x1, 0x1d} },
+ {"mtstd", { 2, "", 0x1, 0x1e} },
+ {"mova", { 2, "", 0x8|0x10, 0x1f} },
+ {"movzbw", { 2, "", (0x1|0x8|0x10), 0x20} },
+ {"movzhw", { 2, "", (0x1|0x8|0x10), 0x21} },
+ /* 2 insns out of order here */
+ {"movbl", { 2, "", 1, 0x4f} },
+ {"filbl", { 2, "", 1, 0x4e} },
+
+ {"cvtbw", { 2, "", CONVERT, 0x22} },
+ {"cvthw", { 2, "", CONVERT, 0x23} },
+ {"cvtwb", { 2, "", CONVERT, 0x24} },
+ {"cvtwh", { 2, "", CONVERT, 0x25} },
+ {"cvtwf", { 2, "", CONVERT, 0x26} },
+ {"cvtwd", { 2, "", CONVERT, 0x27} },
+ {"cvtfw", { 2, "", CONVERT, 0x28} },
+ {"cvtfd", { 2, "", CONVERT, 0x29} },
+ {"cvtdw", { 2, "", CONVERT, 0x2a} },
+ {"cvtdf", { 2, "", CONVERT, 0x2b} },
+
+ {"addw", { 2, "", GEN_TO_REG, 0x40} },
+ {"addwc", { 2, "", GEN_TO_REG, 0x41} },
+ {"subw", { 2, "", GEN_TO_REG, 0x42} },
+ {"subwb", { 2, "", GEN_TO_REG, 0x43} },
+ {"rsubw", { 2, "", GEN_TO_REG, 0x44} },
+ {"mulw", { 2, "", GEN_TO_REG, 0x45} },
+ {"emul", { 2, "", GEN_TO_REG, 0x47} },
+ {"umulw", { 2, "", GEN_TO_REG, 0x46} },
+ {"divw", { 2, "", GEN_TO_REG, 0x48} },
+ {"ediv", { 2, "", GEN_TO_REG, 0x4a} },
+ {"rdivw", { 2, "", GEN_TO_REG, 0x4b} },
+ {"udivw", { 2, "", GEN_TO_REG, 0x49} },
+ {"modw", { 2, "", GEN_TO_REG, 0x4c} },
+ {"umodw", { 2, "", GEN_TO_REG, 0x4d} },
+
+
+ {"addf", { 2, "", 1, 0x50} },
+ {"addd", { 2, "", 1, 0x51} },
+ {"subf", { 2, "", 1, 0x52} },
+ {"subd", { 2, "", 1, 0x53} },
+ {"mulf", { 2, "", 1, 0x56} },
+ {"muld", { 2, "", 1, 0x57} },
+ {"divf", { 2, "", 1, 0x58} },
+ {"divd", { 2, "", 1, 0x59} },
+
+
+ {"cmpb", { 2, "", UNKNOWN, 0x61} },
+ {"cmph", { 2, "", UNKNOWN, 0x62} },
+ {"cmpw", { 2, "", UNKNOWN, 0x60} },
+ {"ucmpb", { 2, "", UNKNOWN, 0x66} },
+ /* WHY no "ucmph"??? */
+ {"ucmpw", { 2, "", UNKNOWN, 0x65} },
+ {"xchw", { 2, "", UNKNOWN, 0x0f} },
+
+
+ {"andw", { 2, "", GEN_TO_REG, 0x30} },
+ {"orw", { 2, "", GEN_TO_REG, 0x31} },
+ {"xorw", { 2, "", GEN_TO_REG, 0x32} },
+ {"bicw", { 2, "", GEN_TO_REG, 0x33} },
+ {"lshlw", { 2, "", GEN_TO_REG, 0x38} },
+ {"ashlw", { 2, "", GEN_TO_REG, 0x3a} },
+ {"ashll", { 2, "", GEN_TO_REG, 0x3c} },
+ {"ashrw", { 2, "", GEN_TO_REG, 0x3b} },
+ {"ashrl", { 2, "", GEN_TO_REG, 0x3d} },
+ {"rotlw", { 2, "", GEN_TO_REG, 0x3e} },
+ {"rotrw", { 2, "", GEN_TO_REG, 0x3f} },
+
+ /* push and pop insns are "going away next release". */
+ {"pushw", { 2, "", GEN_TO_REG, 0x0c} },
+ {"popw", { 2, "", (0x1|0x8|0x10), 0x0d} },
+ {"pusha", { 2, "", (0x8|0x10), 0x0e} },
+
+ {"bitsw", { 2, "", UNKNOWN, 0x35} },
+ {"bitcw", { 2, "", UNKNOWN, 0x36} },
+ /* some kind of ibra/dbra insns??*/
+ {"icmpw", { 2, "", UNKNOWN, 0x67} },
+ {"dcmpw", { 2, "", (1|4|0x20|0x80|0x400|0x1000), 0x69} },/*FIXME*/
+ {"acmpw", { 2, "", 1, 0x6b} },
+
+ /* Call is written as a 1-op insn, but is always (dis)assembled as a 2-op
+ insn with a 2nd op of tr14. The assembler will have to grok this. */
+ {"call", { 2, "", GEN_TO_REG, 0x04} },
+ {"call", { 1, "", GEN_TO_REG, 0x04} },
+
+ {"callk", { 1, "", UNKNOWN, 0x06} },/* system call?*/
+ /* Ret is usually written as a 0-op insn, but gets disassembled as a
+ 1-op insn. The operand is always tr15. */
+ {"ret", { 0, "", UNKNOWN, 0x09} },
+ {"ret", { 1, "", UNKNOWN, 0x09} },
+ {"adsf", { 2, "", (1|2|4), 0x08} },
+ {"retd", { 2, "", UNKNOWN, 0x0a} },
+ {"btc", { 2, "", UNKNOWN, 0x01} },
+ {"bfc", { 2, "", UNKNOWN, 0x02} },
+ /* Careful: halt is 0x00000000. Jump must have some other (mode?)bit set?? */
+ {"jump", { 1, "", UNKNOWN, 0x00} },
+ {"btp", { 2, "", UNKNOWN, 0xf00} },
+ /* read control-stack pointer is another 1-or-2 operand insn. */
+ {"rcsp", { 2, "", UNKNOWN, 0x01f} },
+ {"rcsp", { 1, "", UNKNOWN, 0x01f} }
+};
+
+/* end: pyramid.opcode.h */
+/* One day I will have to take the time to find out what operands
+ are valid for these insns, and guess at what they mean.
+
+ I can't imagine what the "I???" insns (iglob, etc) do.
+
+ the arithmetic-sounding insns ending in "p" sound awfully like BCD
+ arithmetic insns:
+ dshlp -> Decimal SHift Left Packed
+ dshrp -> Decimal SHift Right Packed
+ and cvtlp would be convert long to packed.
+ I have no idea how the operands are interpreted; but having them be
+ a long register with (address, length) of an in-memory packed BCD operand
+ would not be surprising.
+ They are unlikely to be a packed bcd string: 64 bits of long give
+ is only 15 digits+sign, which isn't enough for COBOL.
+ */
+#if 0
+ {"wcsp", { 2, "", UNKNOWN, 0x00} }, /*write csp?*/
+ /* The OSx Operating System Porting Guide claims SSL does things
+ with tr12 (a register reserved to it) to do with static block-structure
+ references. SSL=Set Static Link? It's "Going away next release". */
+ {"ssl", { 2, "", UNKNOWN, 0x00} },
+ {"ccmps", { 2, "", UNKNOWN, 0x00} },
+ {"lcd", { 2, "", UNKNOWN, 0x00} },
+ {"uemul", { 2, "", UNKNOWN, 0x00} }, /*unsigned emul*/
+ {"srf", { 2, "", UNKNOWN, 0x00} }, /*Gidget time???*/
+ {"mnegp", { 2, "", UNKNOWN, 0x00} }, /move-neg phys?*/
+ {"ldp", { 2, "", UNKNOWN, 0x00} }, /*load phys?*/
+ {"ldti", { 2, "", UNKNOWN, 0x00} },
+ {"ldb", { 2, "", UNKNOWN, 0x00} },
+ {"stp", { 2, "", UNKNOWN, 0x00} },
+ {"stti", { 2, "", UNKNOWN, 0x00} },
+ {"stb", { 2, "", UNKNOWN, 0x00} },
+ {"stu", { 2, "", UNKNOWN, 0x00} },
+ {"addp", { 2, "", UNKNOWN, 0x00} },
+ {"subp", { 2, "", UNKNOWN, 0x00} },
+ {"mulp", { 2, "", UNKNOWN, 0x00} },
+ {"divp", { 2, "", UNKNOWN, 0x00} },
+ {"dshlp", { 2, "", UNKNOWN, 0x00} }, /* dec shl packed? */
+ {"dshrp", { 2, "", UNKNOWN, 0x00} }, /* dec shr packed? */
+ {"movs", { 2, "", UNKNOWN, 0x00} }, /*move (string?)?*/
+ {"cmpp", { 2, "", UNKNOWN, 0x00} }, /* cmp phys?*/
+ {"cmps", { 2, "", UNKNOWN, 0x00} }, /* cmp (string?)?*/
+ {"cvtlp", { 2, "", UNKNOWN, 0x00} }, /* cvt long to p??*/
+ {"cvtpl", { 2, "", UNKNOWN, 0x00} }, /* cvt p to l??*/
+ {"dintr", { 2, "", UNKNOWN, 0x00} }, /* ?? intr ?*/
+ {"rphysw", { 2, "", UNKNOWN, 0x00} }, /* read phys word?*/
+ {"wphysw", { 2, "", UNKNOWN, 0x00} }, /* write phys word?*/
+ {"cmovs", { 2, "", UNKNOWN, 0x00} },
+ {"rsubw", { 2, "", UNKNOWN, 0x00} },
+ {"bicpsw", { 2, "", UNKNOWN, 0x00} }, /* clr bit in psw? */
+ {"bispsw", { 2, "", UNKNOWN, 0x00} }, /* set bit in psw? */
+ {"eio", { 2, "", UNKNOWN, 0x00} }, /* ?? ?io ? */
+ {"callp", { 2, "", UNKNOWN, 0x00} }, /* call phys?*/
+ {"callr", { 2, "", UNKNOWN, 0x00} },
+ {"lpcxt", { 2, "", UNKNOWN, 0x00} }, /*load proc context*/
+ {"rei", { 2, "", UNKNOWN, 0x00} }, /*ret from intrpt*/
+ {"rport", { 2, "", UNKNOWN, 0x00} }, /*read-port?*/
+ {"rtod", { 2, "", UNKNOWN, 0x00} }, /*read-time-of-day?*/
+ {"ssi", { 2, "", UNKNOWN, 0x00} },
+ {"vtpa", { 2, "", UNKNOWN, 0x00} }, /*virt-to-phys-addr?*/
+ {"wicl", { 2, "", UNKNOWN, 0x00} }, /* write icl ? */
+ {"wport", { 2, "", UNKNOWN, 0x00} }, /*write-port?*/
+ {"wtod", { 2, "", UNKNOWN, 0x00} }, /*write-time-of-day?*/
+ {"flic", { 2, "", UNKNOWN, 0x00} },
+ {"iglob", { 2, "", UNKNOWN, 0x00} }, /* I global? */
+ {"iphys", { 2, "", UNKNOWN, 0x00} }, /* I physical? */
+ {"ipid", { 2, "", UNKNOWN, 0x00} }, /* I pid? */
+ {"ivect", { 2, "", UNKNOWN, 0x00} }, /* I vector? */
+ {"lamst", { 2, "", UNKNOWN, 0x00} },
+ {"tio", { 2, "", UNKNOWN, 0x00} },
+#endif
diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h
new file mode 100644
index 0000000..4f159bd
--- /dev/null
+++ b/include/opcode/sparc.h
@@ -0,0 +1,240 @@
+/* Definitions for opcode table for the sparc.
+ Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 1997
+ Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and
+the GNU Binutils.
+
+GAS/GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GAS/GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS or GDB; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#include <ansidecl.h>
+
+/* The SPARC opcode table (and other related data) is defined in
+ the opcodes library in sparc-opc.c. If you change anything here, make
+ sure you fix up that file, and vice versa. */
+
+ /* FIXME-someday: perhaps the ,a's and such should be embedded in the
+ instruction's name rather than the args. This would make gas faster, pinsn
+ slower, but would mess up some macros a bit. xoxorich. */
+
+/* List of instruction sets variations.
+ These values are such that each element is either a superset of a
+ preceding each one or they conflict in which case SPARC_OPCODE_CONFLICT_P
+ returns non-zero.
+ The values are indices into `sparc_opcode_archs' defined in sparc-opc.c.
+ Don't change this without updating sparc-opc.c. */
+
+enum sparc_opcode_arch_val {
+ SPARC_OPCODE_ARCH_V6 = 0,
+ SPARC_OPCODE_ARCH_V7,
+ SPARC_OPCODE_ARCH_V8,
+ SPARC_OPCODE_ARCH_SPARCLET,
+ SPARC_OPCODE_ARCH_SPARCLITE,
+ /* v9 variants must appear last */
+ SPARC_OPCODE_ARCH_V9,
+ SPARC_OPCODE_ARCH_V9A, /* v9 with ultrasparc additions */
+ SPARC_OPCODE_ARCH_BAD /* error return from sparc_opcode_lookup_arch */
+};
+
+/* The highest architecture in the table. */
+#define SPARC_OPCODE_ARCH_MAX (SPARC_OPCODE_ARCH_BAD - 1)
+
+/* Given an enum sparc_opcode_arch_val, return the bitmask to use in
+ insn encoding/decoding. */
+#define SPARC_OPCODE_ARCH_MASK(arch) (1 << (arch))
+
+/* Given a valid sparc_opcode_arch_val, return non-zero if it's v9. */
+#define SPARC_OPCODE_ARCH_V9_P(arch) ((arch) >= SPARC_OPCODE_ARCH_V9)
+
+/* Table of cpu variants. */
+
+struct sparc_opcode_arch {
+ const char *name;
+ /* Mask of sparc_opcode_arch_val's supported.
+ EG: For v7 this would be
+ (SPARC_OPCODE_ARCH_MASK (..._V6) | SPARC_OPCODE_ARCH_MASK (..._V7)).
+ These are short's because sparc_opcode.architecture is. */
+ short supported;
+};
+
+extern const struct sparc_opcode_arch sparc_opcode_archs[];
+
+/* Given architecture name, look up it's sparc_opcode_arch_val value. */
+extern enum sparc_opcode_arch_val sparc_opcode_lookup_arch
+ PARAMS ((const char *));
+
+/* Return the bitmask of supported architectures for ARCH. */
+#define SPARC_OPCODE_SUPPORTED(ARCH) (sparc_opcode_archs[ARCH].supported)
+
+/* Non-zero if ARCH1 conflicts with ARCH2.
+ IE: ARCH1 as a supported bit set that ARCH2 doesn't, and vice versa. */
+#define SPARC_OPCODE_CONFLICT_P(ARCH1, ARCH2) \
+(((SPARC_OPCODE_SUPPORTED (ARCH1) & SPARC_OPCODE_SUPPORTED (ARCH2)) \
+ != SPARC_OPCODE_SUPPORTED (ARCH1)) \
+ && ((SPARC_OPCODE_SUPPORTED (ARCH1) & SPARC_OPCODE_SUPPORTED (ARCH2)) \
+ != SPARC_OPCODE_SUPPORTED (ARCH2)))
+
+/* Structure of an opcode table entry. */
+
+struct sparc_opcode {
+ const char *name;
+ unsigned long match; /* Bits that must be set. */
+ unsigned long lose; /* Bits that must not be set. */
+ const char *args;
+ /* This was called "delayed" in versions before the flags. */
+ char flags;
+ short architecture; /* Bitmask of sparc_opcode_arch_val's. */
+};
+
+#define F_DELAYED 1 /* Delayed branch */
+#define F_ALIAS 2 /* Alias for a "real" instruction */
+#define F_UNBR 4 /* Unconditional branch */
+#define F_CONDBR 8 /* Conditional branch */
+#define F_JSR 16 /* Subroutine call */
+#define F_FLOAT 32 /* Floating point instruction (not a branch) */
+#define F_FBR 64 /* Floating point branch */
+/* FIXME: Add F_ANACHRONISTIC flag for v9. */
+
+/*
+
+All sparc opcodes are 32 bits, except for the `set' instruction (really a
+macro), which is 64 bits. It is handled as a special case.
+
+The match component is a mask saying which bits must match a particular
+opcode in order for an instruction to be an instance of that opcode.
+
+The args component is a string containing one character for each operand of the
+instruction.
+
+Kinds of operands:
+ # Number used by optimizer. It is ignored.
+ 1 rs1 register.
+ 2 rs2 register.
+ d rd register.
+ e frs1 floating point register.
+ v frs1 floating point register (double/even).
+ V frs1 floating point register (quad/multiple of 4).
+ f frs2 floating point register.
+ B frs2 floating point register (double/even).
+ R frs2 floating point register (quad/multiple of 4).
+ g frsd floating point register.
+ H frsd floating point register (double/even).
+ J frsd floating point register (quad/multiple of 4).
+ b crs1 coprocessor register
+ c crs2 coprocessor register
+ D crsd coprocessor register
+ m alternate space register (asr) in rd
+ M alternate space register (asr) in rs1
+ h 22 high bits.
+ X 5 bit unsigned immediate
+ Y 6 bit unsigned immediate
+ K MEMBAR mask (7 bits). (v9)
+ j 10 bit Immediate. (v9)
+ I 11 bit Immediate. (v9)
+ i 13 bit Immediate.
+ n 22 bit immediate.
+ k 2+14 bit PC relative immediate. (v9)
+ G 19 bit PC relative immediate. (v9)
+ l 22 bit PC relative immediate.
+ L 30 bit PC relative immediate.
+ a Annul. The annul bit is set.
+ A Alternate address space. Stored as 8 bits.
+ C Coprocessor state register.
+ F floating point state register.
+ p Processor state register.
+ N Branch predict clear ",pn" (v9)
+ T Branch predict set ",pt" (v9)
+ z %icc. (v9)
+ Z %xcc. (v9)
+ q Floating point queue.
+ r Single register that is both rs1 and rd.
+ O Single register that is both rs2 and rd.
+ Q Coprocessor queue.
+ S Special case.
+ t Trap base register.
+ w Window invalid mask register.
+ y Y register.
+ u sparclet coprocessor registers in rd position
+ U sparclet coprocessor registers in rs1 position
+ E %ccr. (v9)
+ s %fprs. (v9)
+ P %pc. (v9)
+ W %tick. (v9)
+ o %asi. (v9)
+ 6 %fcc0. (v9)
+ 7 %fcc1. (v9)
+ 8 %fcc2. (v9)
+ 9 %fcc3. (v9)
+ ! Privileged Register in rd (v9)
+ ? Privileged Register in rs1 (v9)
+ * Prefetch function constant. (v9)
+ x OPF field (v9 impdep).
+ 0 32/64 bit immediate for set or setx (v9) insns
+ _ Ancillary state register in rd (v9a)
+ / Ancillary state register in rs1 (v9a)
+
+The following chars are unused: (note: ,[] are used as punctuation)
+[345]
+
+*/
+
+#define OP2(x) (((x)&0x7) << 22) /* op2 field of format2 insns */
+#define OP3(x) (((x)&0x3f) << 19) /* op3 field of format3 insns */
+#define OP(x) ((unsigned)((x)&0x3) << 30) /* op field of all insns */
+#define OPF(x) (((x)&0x1ff) << 5) /* opf field of float insns */
+#define OPF_LOW5(x) OPF((x)&0x1f) /* v9 */
+#define F3F(x, y, z) (OP(x) | OP3(y) | OPF(z)) /* format3 float insns */
+#define F3I(x) (((x)&0x1) << 13) /* immediate field of format 3 insns */
+#define F2(x, y) (OP(x) | OP2(y)) /* format 2 insns */
+#define F3(x, y, z) (OP(x) | OP3(y) | F3I(z)) /* format3 insns */
+#define F1(x) (OP(x))
+#define DISP30(x) ((x)&0x3fffffff)
+#define ASI(x) (((x)&0xff) << 5) /* asi field of format3 insns */
+#define RS2(x) ((x)&0x1f) /* rs2 field */
+#define SIMM13(x) ((x)&0x1fff) /* simm13 field */
+#define RD(x) (((x)&0x1f) << 25) /* destination register field */
+#define RS1(x) (((x)&0x1f) << 14) /* rs1 field */
+#define ASI_RS2(x) (SIMM13(x))
+#define MEMBAR(x) ((x)&0x7f)
+#define SLCPOP(x) (((x)&0x7f) << 6) /* sparclet cpop */
+
+#define ANNUL (1<<29)
+#define BPRED (1<<19) /* v9 */
+#define IMMED F3I(1)
+#define RD_G0 RD(~0)
+#define RS1_G0 RS1(~0)
+#define RS2_G0 RS2(~0)
+
+extern const struct sparc_opcode sparc_opcodes[];
+extern const int sparc_num_opcodes;
+
+extern int sparc_encode_asi PARAMS ((const char *));
+extern const char *sparc_decode_asi PARAMS ((int));
+extern int sparc_encode_membar PARAMS ((const char *));
+extern const char *sparc_decode_membar PARAMS ((int));
+extern int sparc_encode_prefetch PARAMS ((const char *));
+extern const char *sparc_decode_prefetch PARAMS ((int));
+extern int sparc_encode_sparclet_cpreg PARAMS ((const char *));
+extern const char *sparc_decode_sparclet_cpreg PARAMS ((int));
+
+/*
+ * Local Variables:
+ * fill-column: 131
+ * comment-column: 0
+ * End:
+ */
+
+/* end of sparc.h */
diff --git a/include/opcode/tahoe.h b/include/opcode/tahoe.h
new file mode 100644
index 0000000..b5cee24
--- /dev/null
+++ b/include/opcode/tahoe.h
@@ -0,0 +1,213 @@
+/*
+ * Ported by the State University of New York at Buffalo by the Distributed
+ * Computer Systems Lab, Department of Computer Science, 1991.
+ */
+
+#ifndef tahoe_opcodeT
+#define tahoe_opcodeT int
+#endif /* no tahoe_opcodeT */
+
+struct vot_wot /* tahoe opcode table: wot to do with this */
+ /* particular opcode */
+{
+ char * args; /* how to compile said opcode */
+ tahoe_opcodeT code; /* op-code (may be > 8 bits!) */
+};
+
+struct vot /* tahoe opcode text */
+{
+ char * name; /* opcode name: lowercase string [key] */
+ struct vot_wot detail; /* rest of opcode table [datum] */
+};
+
+#define vot_how args
+#define vot_code code
+#define vot_detail detail
+#define vot_name name
+
+static struct vot
+votstrs[] =
+{
+{ "halt", {"", 0x00 } },
+{ "sinf", {"", 0x05 } },
+{ "ldf", {"rl", 0x06 } },
+{ "ldd", {"rq", 0x07 } },
+{ "addb2", {"rbmb", 0x08 } },
+{ "movb", {"rbwb", 0x09 } },
+{ "addw2", {"rwmw", 0x0a } },
+{ "movw", {"rwww", 0x0b } },
+{ "addl2", {"rlml", 0x0c } },
+{ "movl", {"rlwl", 0x0d } },
+{ "bbs", {"rlvlbw", 0x0e } },
+{ "nop", {"", 0x10 } },
+{ "brb", {"bb", 0x11 } },
+{ "brw", {"bw", 0x13 } },
+{ "cosf", {"", 0x15 } },
+{ "lnf", {"rl", 0x16 } },
+{ "lnd", {"rq", 0x17 } },
+{ "addb3", {"rbrbwb", 0x18 } },
+{ "cmpb", {"rbwb", 0x19 } },
+{ "addw3", {"rwrwww", 0x1a } },
+{ "cmpw", {"rwww", 0x1b } },
+{ "addl3", {"rlrlwl", 0x1c } },
+{ "cmpl", {"rlwl", 0x1d } },
+{ "bbc", {"rlvlbw", 0x1e } },
+{ "rei", {"", 0x20 } },
+{ "bneq", {"bb", 0x21 } },
+{ "bnequ", {"bb", 0x21 } },
+{ "cvtwl", {"rwwl", 0x23 } },
+{ "stf", {"wl", 0x26 } },
+{ "std", {"wq", 0x27 } },
+{ "subb2", {"rbmb", 0x28 } },
+{ "mcomb", {"rbwb", 0x29 } },
+{ "subw2", {"rwmw", 0x2a } },
+{ "mcomw", {"rwww", 0x2b } },
+{ "subl2", {"rlml", 0x2c } },
+{ "mcoml", {"rlwl", 0x2d } },
+{ "emul", {"rlrlrlwq", 0x2e } },
+{ "aoblss", {"rlmlbw", 0x2f } },
+{ "bpt", {"", 0x30 } },
+{ "beql", {"bb", 0x31 } },
+{ "beqlu", {"bb", 0x31 } },
+{ "cvtwb", {"rwwb", 0x33 } },
+{ "logf", {"", 0x35 } },
+{ "cmpf", {"rl", 0x36 } },
+{ "cmpd", {"rq", 0x37 } },
+{ "subb3", {"rbrbwb", 0x38 } },
+{ "bitb", {"rbrb", 0x39 } },
+{ "subw3", {"rwrwww", 0x3a } },
+{ "bitw", {"rwrw", 0x3b } },
+{ "subl3", {"rlrlwl", 0x3c } },
+{ "bitl", {"rlrl", 0x3d } },
+{ "ediv", {"rlrqwlwl", 0x3e } },
+{ "aobleq", {"rlmlbw", 0x3f } },
+{ "ret", {"", 0x40 } },
+{ "bgtr", {"bb", 0x41 } },
+{ "sqrtf", {"", 0x45 } },
+{ "cmpf2", {"rl", 0x46 } },
+{ "cmpd2", {"rqrq", 0x47 } },
+{ "shll", {"rbrlwl", 0x48 } },
+{ "clrb", {"wb", 0x49 } },
+{ "shlq", {"rbrqwq", 0x4a } },
+{ "clrw", {"ww", 0x4b } },
+{ "mull2", {"rlml", 0x4c } },
+{ "clrl", {"wl", 0x4d } },
+{ "shal", {"rbrlwl", 0x4e } },
+{ "bleq", {"bb", 0x51 } },
+{ "expf", {"", 0x55 } },
+{ "tstf", {"", 0x56 } },
+{ "tstd", {"", 0x57 } },
+{ "shrl", {"rbrlwl", 0x58 } },
+{ "tstb", {"rb", 0x59 } },
+{ "shrq", {"rbrqwq", 0x5a } },
+{ "tstw", {"rw", 0x5b } },
+{ "mull3", {"rlrlwl", 0x5c } },
+{ "tstl", {"rl", 0x5d } },
+{ "shar", {"rbrlwl", 0x5e } },
+{ "bbssi", {"rlmlbw", 0x5f } },
+{ "ldpctx", {"", 0x60 } },
+{ "pushd", {"", 0x67 } },
+{ "incb", {"mb", 0x69 } },
+{ "incw", {"mw", 0x6b } },
+{ "divl2", {"rlml", 0x6c } },
+{ "incl", {"ml", 0x6d } },
+{ "cvtlb", {"rlwb", 0x6f } },
+{ "svpctx", {"", 0x70 } },
+{ "jmp", {"ab", 0x71 } },
+{ "cvlf", {"rl", 0x76 } },
+{ "cvld", {"rl", 0x77 } },
+{ "decb", {"mb", 0x79 } },
+{ "decw", {"mw", 0x7b } },
+{ "divl3", {"rlrlwl", 0x7c } },
+{ "decl", {"ml", 0x7d } },
+{ "cvtlw", {"rlww", 0x7f } },
+{ "bgeq", {"bb", 0x81 } },
+{ "movs2", {"abab", 0x82 } },
+{ "cvfl", {"wl", 0x86 } },
+{ "cvdl", {"wl", 0x87 } },
+{ "orb2", {"rbmb", 0x88 } },
+{ "cvtbl", {"rbwl", 0x89 } },
+{ "orw2", {"rwmw", 0x8a } },
+{ "bispsw", {"rw", 0x8b } },
+{ "orl2", {"rlml", 0x8c } },
+{ "adwc", {"rlml", 0x8d } },
+{ "adda", {"rlml", 0x8e } },
+{ "blss", {"bb", 0x91 } },
+{ "cmps2", {"abab", 0x92 } },
+{ "ldfd", {"rl", 0x97 } },
+{ "orb3", {"rbrbwb", 0x98 } },
+{ "cvtbw", {"rbww", 0x99 } },
+{ "orw3", {"rwrwww", 0x9a } },
+{ "bicpsw", {"rw", 0x9b } },
+{ "orl3", {"rlrlwl", 0x9c } },
+{ "sbwc", {"rlml", 0x9d } },
+{ "suba", {"rlml", 0x9e } },
+{ "bgtru", {"bb", 0xa1 } },
+{ "cvdf", {"", 0xa6 } },
+{ "andb2", {"rbmb", 0xa8 } },
+{ "movzbl", {"rbwl", 0xa9 } },
+{ "andw2", {"rwmw", 0xaa } },
+{ "loadr", {"rwal", 0xab } },
+{ "andl2", {"rlml", 0xac } },
+{ "mtpr", {"rlrl", 0xad } },
+{ "ffs", {"rlwl", 0xae } },
+{ "blequ", {"bb", 0xb1 } },
+{ "negf", {"", 0xb6 } },
+{ "negd", {"", 0xb7 } },
+{ "andb3", {"rbrbwb", 0xb8 } },
+{ "movzbw", {"rbww", 0xb9 } },
+{ "andw3", {"rwrwww", 0xba } },
+{ "storer", {"rwal", 0xbb } },
+{ "andl3", {"rlrlwl", 0xbc } },
+{ "mfpr", {"rlwl", 0xbd } },
+{ "ffc", {"rlwl", 0xbe } },
+{ "calls", {"rbab", 0xbf } },
+{ "prober", {"rbabrl", 0xc0 } },
+{ "bvc", {"bb", 0xc1 } },
+{ "movs3", {"ababrw", 0xc2 } },
+{ "movzwl", {"rwwl", 0xc3 } },
+{ "addf", {"rl", 0xc6 } },
+{ "addd", {"rq", 0xc7 } },
+{ "xorb2", {"rbmb", 0xc8 } },
+{ "movob", {"rbwb", 0xc9 } },
+{ "xorw2", {"rwmw", 0xca } },
+{ "movow", {"rwww", 0xcb } },
+{ "xorl2", {"rlml", 0xcc } },
+{ "movpsl", {"wl", 0xcd } },
+{ "kcall", {"rw", 0xcf } },
+{ "probew", {"rbabrl", 0xd0 } },
+{ "bvs", {"bb", 0xd1 } },
+{ "cmps3", {"ababrw", 0xd2 } },
+{ "subf", {"rq", 0xd6 } },
+{ "subd", {"rq", 0xd7 } },
+{ "xorb3", {"rbrbwb", 0xd8 } },
+{ "pushb", {"rb", 0xd9 } },
+{ "xorw3", {"rwrwww", 0xda } },
+{ "pushw", {"rw", 0xdb } },
+{ "xorl3", {"rlrlwl", 0xdc } },
+{ "pushl", {"rl", 0xdd } },
+{ "insque", {"abab", 0xe0 } },
+{ "bcs", {"bb", 0xe1 } },
+{ "bgequ", {"bb", 0xe1 } },
+{ "mulf", {"rq", 0xe6 } },
+{ "muld", {"rq", 0xe7 } },
+{ "mnegb", {"rbwb", 0xe8 } },
+{ "movab", {"abwl", 0xe9 } },
+{ "mnegw", {"rwww", 0xea } },
+{ "movaw", {"awwl", 0xeb } },
+{ "mnegl", {"rlwl", 0xec } },
+{ "moval", {"alwl", 0xed } },
+{ "remque", {"ab", 0xf0 } },
+{ "bcc", {"bb", 0xf1 } },
+{ "blssu", {"bb", 0xf1 } },
+{ "divf", {"rq", 0xf6 } },
+{ "divd", {"rq", 0xf7 } },
+{ "movblk", {"alalrw", 0xf8 } },
+{ "pushab", {"ab", 0xf9 } },
+{ "pushaw", {"aw", 0xfb } },
+{ "casel", {"rlrlrl", 0xfc } },
+{ "pushal", {"al", 0xfd } },
+{ "callf", {"rbab", 0xfe } },
+{ "" , "" } /* empty is end sentinel */
+
+};
diff --git a/include/opcode/tic30.h b/include/opcode/tic30.h
new file mode 100644
index 0000000..a700275
--- /dev/null
+++ b/include/opcode/tic30.h
@@ -0,0 +1,691 @@
+/* tic30.h -- Header file for TI TMS320C30 opcode table
+ Copyright 1998 Free Software Foundation, Inc.
+ Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
+
+/* FIXME: The opcode table should be in opcodes/tic30-opc.c, not in a
+ header file. */
+
+#ifndef _TMS320_H_
+#define _TMS320_H_
+
+struct _register
+{
+ char *name;
+ unsigned char opcode;
+ unsigned char regtype;
+};
+
+typedef struct _register reg;
+
+#define REG_Rn 0x01
+#define REG_ARn 0x02
+#define REG_DP 0x03
+#define REG_OTHER 0x04
+
+static const reg tic30_regtab[] = {
+ { "r0", 0x00, REG_Rn },
+ { "r1", 0x01, REG_Rn },
+ { "r2", 0x02, REG_Rn },
+ { "r3", 0x03, REG_Rn },
+ { "r4", 0x04, REG_Rn },
+ { "r5", 0x05, REG_Rn },
+ { "r6", 0x06, REG_Rn },
+ { "r7", 0x07, REG_Rn },
+ { "ar0",0x08, REG_ARn },
+ { "ar1",0x09, REG_ARn },
+ { "ar2",0x0A, REG_ARn },
+ { "ar3",0x0B, REG_ARn },
+ { "ar4",0x0C, REG_ARn },
+ { "ar5",0x0D, REG_ARn },
+ { "ar6",0x0E, REG_ARn },
+ { "ar7",0x0F, REG_ARn },
+ { "dp", 0x10, REG_DP },
+ { "ir0",0x11, REG_OTHER },
+ { "ir1",0x12, REG_OTHER },
+ { "bk", 0x13, REG_OTHER },
+ { "sp", 0x14, REG_OTHER },
+ { "st", 0x15, REG_OTHER },
+ { "ie", 0x16, REG_OTHER },
+ { "if", 0x17, REG_OTHER },
+ { "iof",0x18, REG_OTHER },
+ { "rs", 0x19, REG_OTHER },
+ { "re", 0x1A, REG_OTHER },
+ { "rc", 0x1B, REG_OTHER },
+ { "R0", 0x00, REG_Rn },
+ { "R1", 0x01, REG_Rn },
+ { "R2", 0x02, REG_Rn },
+ { "R3", 0x03, REG_Rn },
+ { "R4", 0x04, REG_Rn },
+ { "R5", 0x05, REG_Rn },
+ { "R6", 0x06, REG_Rn },
+ { "R7", 0x07, REG_Rn },
+ { "AR0",0x08, REG_ARn },
+ { "AR1",0x09, REG_ARn },
+ { "AR2",0x0A, REG_ARn },
+ { "AR3",0x0B, REG_ARn },
+ { "AR4",0x0C, REG_ARn },
+ { "AR5",0x0D, REG_ARn },
+ { "AR6",0x0E, REG_ARn },
+ { "AR7",0x0F, REG_ARn },
+ { "DP", 0x10, REG_DP },
+ { "IR0",0x11, REG_OTHER },
+ { "IR1",0x12, REG_OTHER },
+ { "BK", 0x13, REG_OTHER },
+ { "SP", 0x14, REG_OTHER },
+ { "ST", 0x15, REG_OTHER },
+ { "IE", 0x16, REG_OTHER },
+ { "IF", 0x17, REG_OTHER },
+ { "IOF",0x18, REG_OTHER },
+ { "RS", 0x19, REG_OTHER },
+ { "RE", 0x1A, REG_OTHER },
+ { "RC", 0x1B, REG_OTHER },
+ { "", 0, 0 }
+};
+
+static const reg *const tic30_regtab_end
+ = tic30_regtab + sizeof(tic30_regtab)/sizeof(tic30_regtab[0]);
+
+/* Indirect Addressing Modes Modification Fields */
+/* Indirect Addressing with Displacement */
+#define PreDisp_Add 0x00
+#define PreDisp_Sub 0x01
+#define PreDisp_Add_Mod 0x02
+#define PreDisp_Sub_Mod 0x03
+#define PostDisp_Add_Mod 0x04
+#define PostDisp_Sub_Mod 0x05
+#define PostDisp_Add_Circ 0x06
+#define PostDisp_Sub_Circ 0x07
+/* Indirect Addressing with Index Register IR0 */
+#define PreIR0_Add 0x08
+#define PreIR0_Sub 0x09
+#define PreIR0_Add_Mod 0x0A
+#define PreIR0_Sub_Mod 0x0B
+#define PostIR0_Add_Mod 0x0C
+#define PostIR0_Sub_Mod 0x0D
+#define PostIR0_Add_Circ 0x0E
+#define PostIR0_Sub_Circ 0x0F
+/* Indirect Addressing with Index Register IR1 */
+#define PreIR1_Add 0x10
+#define PreIR1_Sub 0x11
+#define PreIR1_Add_Mod 0x12
+#define PreIR1_Sub_Mod 0x13
+#define PostIR1_Add_Mod 0x14
+#define PostIR1_Sub_Mod 0x15
+#define PostIR1_Add_Circ 0x16
+#define PostIR1_Sub_Circ 0x17
+/* Indirect Addressing (Special Cases) */
+#define IndirectOnly 0x18
+#define PostIR0_Add_BitRev 0x19
+
+typedef struct {
+ char *syntax;
+ unsigned char modfield;
+ unsigned char displacement;
+} ind_addr_type;
+
+#define IMPLIED_DISP 0x01
+#define DISP_REQUIRED 0x02
+#define NO_DISP 0x03
+
+static const ind_addr_type tic30_indaddr_tab[] = {
+ { "*+ar", PreDisp_Add, IMPLIED_DISP },
+ { "*-ar", PreDisp_Sub, IMPLIED_DISP },
+ { "*++ar", PreDisp_Add_Mod, IMPLIED_DISP },
+ { "*--ar", PreDisp_Sub_Mod, IMPLIED_DISP },
+ { "*ar++", PostDisp_Add_Mod, IMPLIED_DISP },
+ { "*ar--", PostDisp_Sub_Mod, IMPLIED_DISP },
+ { "*ar++%", PostDisp_Add_Circ, IMPLIED_DISP },
+ { "*ar--%", PostDisp_Sub_Circ, IMPLIED_DISP },
+ { "*+ar()", PreDisp_Add, DISP_REQUIRED },
+ { "*-ar()", PreDisp_Sub, DISP_REQUIRED },
+ { "*++ar()", PreDisp_Add_Mod, DISP_REQUIRED },
+ { "*--ar()", PreDisp_Sub_Mod, DISP_REQUIRED },
+ { "*ar++()", PostDisp_Add_Mod, DISP_REQUIRED },
+ { "*ar--()", PostDisp_Sub_Mod, DISP_REQUIRED },
+ { "*ar++()%", PostDisp_Add_Circ, DISP_REQUIRED },
+ { "*ar--()%", PostDisp_Sub_Circ, DISP_REQUIRED },
+ { "*+ar(ir0)", PreIR0_Add, NO_DISP },
+ { "*-ar(ir0)", PreIR0_Sub, NO_DISP },
+ { "*++ar(ir0)", PreIR0_Add_Mod, NO_DISP },
+ { "*--ar(ir0)", PreIR0_Sub_Mod, NO_DISP },
+ { "*ar++(ir0)", PostIR0_Add_Mod, NO_DISP },
+ { "*ar--(ir0)", PostIR0_Sub_Mod, NO_DISP },
+ { "*ar++(ir0)%",PostIR0_Add_Circ, NO_DISP },
+ { "*ar--(ir0)%",PostIR0_Sub_Circ, NO_DISP },
+ { "*+ar(ir1)", PreIR1_Add, NO_DISP },
+ { "*-ar(ir1)", PreIR1_Sub, NO_DISP },
+ { "*++ar(ir1)", PreIR1_Add_Mod, NO_DISP },
+ { "*--ar(ir1)", PreIR1_Sub_Mod, NO_DISP },
+ { "*ar++(ir1)", PostIR1_Add_Mod, NO_DISP },
+ { "*ar--(ir1)", PostIR1_Sub_Mod, NO_DISP },
+ { "*ar++(ir1)%",PostIR1_Add_Circ, NO_DISP },
+ { "*ar--(ir1)%",PostIR1_Sub_Circ, NO_DISP },
+ { "*ar", IndirectOnly, NO_DISP },
+ { "*ar++(ir0)b",PostIR0_Add_BitRev, NO_DISP },
+ { "", 0,0 }
+};
+
+static const ind_addr_type *const tic30_indaddrtab_end
+ = tic30_indaddr_tab + sizeof(tic30_indaddr_tab)/sizeof(tic30_indaddr_tab[0]);
+
+/* Possible operand types */
+/* Register types */
+#define Rn 0x0001
+#define ARn 0x0002
+#define DPReg 0x0004
+#define OtherReg 0x0008
+/* Addressing mode types */
+#define Direct 0x0010
+#define Indirect 0x0020
+#define Imm16 0x0040
+#define Disp 0x0080
+#define Imm24 0x0100
+#define Abs24 0x0200
+/* 3 operand addressing mode types */
+#define op3T1 0x0400
+#define op3T2 0x0800
+/* Interrupt vector */
+#define IVector 0x1000
+/* Not required */
+#define NotReq 0x2000
+
+#define GAddr1 Rn | Direct | Indirect | Imm16
+#define GAddr2 GAddr1 | AllReg
+#define TAddr1 op3T1 | Rn | Indirect
+#define TAddr2 op3T2 | Rn | Indirect
+#define Reg Rn | ARn
+#define AllReg Reg | DPReg | OtherReg
+
+typedef struct _template
+{
+ char *name;
+ unsigned int operands; /* how many operands */
+ unsigned int base_opcode; /* base_opcode is the fundamental opcode byte */
+ /* the bits in opcode_modifier are used to generate the final opcode from
+ the base_opcode. These bits also are used to detect alternate forms of
+ the same instruction */
+ unsigned int opcode_modifier;
+
+ /* opcode_modifier bits: */
+#define AddressMode 0x00600000
+#define PCRel 0x02000000
+#define StackOp 0x001F0000
+#define Rotate StackOp
+
+ /* operand_types[i] describes the type of operand i. This is made
+ by OR'ing together all of the possible type masks. (e.g.
+ 'operand_types[i] = Reg|Imm' specifies that operand i can be
+ either a register or an immediate operand */
+ unsigned int operand_types[3];
+ /* This defines the number type of an immediate argument to an instruction. */
+ int imm_arg_type;
+#define Imm_None 0
+#define Imm_Float 1
+#define Imm_SInt 2
+#define Imm_UInt 3
+}
+template;
+
+static const template tic30_optab[] = {
+ { "absf" ,2,0x00000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "absi" ,2,0x00800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "addc" ,2,0x01000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "addc3" ,3,0x20000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "addf" ,2,0x01800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "addf3" ,3,0x20800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None },
+ { "addi" ,2,0x02000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "addi3" ,3,0x21000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "and" ,2,0x02800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "and3" ,3,0x21800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "andn" ,2,0x03000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "andn3" ,3,0x22000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "ash" ,2,0x03800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ash3" ,3,0x22800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "b" ,1,0x68000000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bu" ,1,0x68000000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "blo" ,1,0x68010000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bls" ,1,0x68020000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bhi" ,1,0x68030000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bhs" ,1,0x68040000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "beq" ,1,0x68050000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bne" ,1,0x68060000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "blt" ,1,0x68070000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "ble" ,1,0x68080000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bgt" ,1,0x68090000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bge" ,1,0x680A0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bz" ,1,0x68050000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnz" ,1,0x68060000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bp" ,1,0x68090000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bn" ,1,0x68070000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnn" ,1,0x680A0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnv" ,1,0x680C0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bv" ,1,0x680D0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnuf" ,1,0x680E0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "buf" ,1,0x680F0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnc" ,1,0x68040000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bc" ,1,0x68010000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnlv" ,1,0x68100000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "blv" ,1,0x68110000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnluf" ,1,0x68120000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bluf" ,1,0x68130000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bzuf" ,1,0x68140000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bd" ,1,0x68200000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bud" ,1,0x68200000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "blod" ,1,0x68210000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "blsd" ,1,0x68220000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bhid" ,1,0x68230000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bhsd" ,1,0x68240000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "beqd" ,1,0x68250000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bned" ,1,0x68260000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bltd" ,1,0x68270000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bled" ,1,0x68280000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bgtd" ,1,0x68290000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bged" ,1,0x682A0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bzd" ,1,0x68250000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnzd" ,1,0x68260000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bpd" ,1,0x68290000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnd" ,1,0x68270000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnnd" ,1,0x682A0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnvd" ,1,0x682C0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bvd" ,1,0x682D0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnufd" ,1,0x682E0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bufd" ,1,0x682F0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bncd" ,1,0x68240000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bcd" ,1,0x68210000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnlvd" ,1,0x68300000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "blvd" ,1,0x68310000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bnlufd" ,1,0x68320000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "blufd" ,1,0x68330000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "bzufd" ,1,0x68340000,PCRel, { AllReg|Disp, 0, 0 }, Imm_None },
+ { "br" ,1,0x60000000,0, { Imm24, 0, 0 }, Imm_UInt },
+ { "brd" ,1,0x61000000,0, { Imm24, 0, 0 }, Imm_UInt },
+ { "call" ,1,0x62000000,0, { Imm24, 0, 0 }, Imm_UInt },
+ { "callu" ,1,0x70000000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "calllo" ,1,0x70010000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callls" ,1,0x70020000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callhi" ,1,0x70030000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callhs" ,1,0x70040000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "calleq" ,1,0x70050000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callne" ,1,0x70060000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "calllt" ,1,0x70070000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callle" ,1,0x70080000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callgt" ,1,0x70090000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callge" ,1,0x700A0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callz" ,1,0x70050000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callnz" ,1,0x70060000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callp" ,1,0x70090000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "calln" ,1,0x70070000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callnn" ,1,0x700A0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callnv" ,1,0x700C0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callv" ,1,0x700D0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callnuf",1,0x700E0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "calluf" ,1,0x700F0000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callnc" ,1,0x70040000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callc" ,1,0x70010000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callnlv",1,0x70100000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "calllv" ,1,0x70110000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callnluf",1,0x70120000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callluf",1,0x70130000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "callzuf",1,0x70140000,PCRel, { AllReg|Disp, 0, 0 }, Imm_UInt },
+ { "cmpf" ,2,0x04000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "cmpf3" ,2,0x23000000,AddressMode, { TAddr1, TAddr2, 0 }, Imm_None },
+ { "cmpi" ,2,0x04800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "cmpi3" ,2,0x23800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, 0 }, Imm_None },
+ { "db" ,2,0x6C000000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbu" ,2,0x6C000000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dblo" ,2,0x6C010000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbls" ,2,0x6C020000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbhi" ,2,0x6C030000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbhs" ,2,0x6C040000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbeq" ,2,0x6C050000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbne" ,2,0x6C060000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dblt" ,2,0x6C070000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dble" ,2,0x6C080000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbgt" ,2,0x6C090000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbge" ,2,0x6C0A0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbz" ,2,0x6C050000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnz" ,2,0x6C060000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbp" ,2,0x6C090000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbn" ,2,0x6C070000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnn" ,2,0x6C0A0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnv" ,2,0x6C0C0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbv" ,2,0x6C0D0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnuf" ,2,0x6C0E0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbuf" ,2,0x6C0F0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnc" ,2,0x6C040000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbc" ,2,0x6C010000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnlv" ,2,0x6C100000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dblv" ,2,0x6C110000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnluf" ,2,0x6C120000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbluf" ,2,0x6C130000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbzuf" ,2,0x6C140000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbd" ,2,0x6C200000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbud" ,2,0x6C200000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dblod" ,2,0x6C210000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dblsd" ,2,0x6C220000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbhid" ,2,0x6C230000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbhsd" ,2,0x6C240000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbeqd" ,2,0x6C250000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbned" ,2,0x6C260000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbltd" ,2,0x6C270000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbled" ,2,0x6C280000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbgtd" ,2,0x6C290000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbged" ,2,0x6C2A0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbzd" ,2,0x6C250000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnzd" ,2,0x6C260000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbpd" ,2,0x6C290000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnd" ,2,0x6C270000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnnd" ,2,0x6C2A0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnvd" ,2,0x6C2C0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbvd" ,2,0x6C2D0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnufd" ,2,0x6C2E0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbufd" ,2,0x6C2F0000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbncd" ,2,0x6C240000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbcd" ,2,0x6C210000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnlvd" ,2,0x6C300000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dblvd" ,2,0x6C310000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbnlufd",2,0x6C320000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dblufd" ,2,0x6C330000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "dbzufd" ,2,0x6C340000,PCRel, { ARn, AllReg|Disp, 0 }, Imm_None },
+ { "fix" ,2,0x05000000,AddressMode, { GAddr1, AllReg, 0 }, Imm_Float },
+ { "float" ,2,0x05800000,AddressMode, { GAddr2, Rn, 0 }, Imm_SInt },
+ { "iack" ,1,0x1B000000,AddressMode, { Direct|Indirect, 0, 0 }, Imm_None },
+ { "idle" ,0,0x06000000,0, { 0, 0, 0 }, Imm_None },
+ { "idle2" ,0,0x06000001,0, { 0, 0, 0 }, Imm_None }, /* LC31 Only */
+ { "lde" ,2,0x06800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldf" ,2,0x07000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfu" ,2,0x40000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldflo" ,2,0x40800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfls" ,2,0x41000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfhi" ,2,0x41800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfhs" ,2,0x42000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfeq" ,2,0x42800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfne" ,2,0x43000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldflt" ,2,0x43800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfle" ,2,0x44000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfgt" ,2,0x44800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfge" ,2,0x45000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfz" ,2,0x42800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfnz" ,2,0x43000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfp" ,2,0x44800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfn" ,2,0x43800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfnn" ,2,0x45000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfnv" ,2,0x46000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfv" ,2,0x46800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfnuf" ,2,0x47000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfuf" ,2,0x47800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfnc" ,2,0x42000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfc" ,2,0x40800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfnlv" ,2,0x48000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldflv" ,2,0x48800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfnluf",2,0x49000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfluf" ,2,0x49800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfzuf" ,2,0x4A000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldfi" ,2,0x07800000,AddressMode, { Direct|Indirect, Rn, 0 }, Imm_None },
+ { "ldi" ,2,0x08000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldiu" ,2,0x50000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldilo" ,2,0x50800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldils" ,2,0x51000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldihi" ,2,0x51800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldihs" ,2,0x52000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldieq" ,2,0x52800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldine" ,2,0x53000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldilt" ,2,0x53800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldile" ,2,0x54000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldigt" ,2,0x54800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldige" ,2,0x55000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldiz" ,2,0x52800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldinz" ,2,0x53000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldip" ,2,0x54800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldin" ,2,0x53800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldinn" ,2,0x55000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldinv" ,2,0x56000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldiv" ,2,0x56800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldinuf" ,2,0x57000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldiuf" ,2,0x57800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldinc" ,2,0x52000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldic" ,2,0x50800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldinlv" ,2,0x58000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldilv" ,2,0x58800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldinluf",2,0x59000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldiluf" ,2,0x59800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldizuf" ,2,0x5A000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "ldii" ,2,0x08800000,AddressMode, { Direct|Indirect, AllReg, 0 }, Imm_None },
+ { "ldm" ,2,0x09000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "ldp" ,2,0x08700000,0, { Abs24|Direct, DPReg|NotReq, 0 }, Imm_UInt },
+ { "lopower",0,0x10800001,0, { 0, 0, 0 }, Imm_None }, /* LC31 Only */
+ { "lsh" ,2,0x09800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "lsh3" ,3,0x24000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "maxspeed",0,0x10800000,0, { 0, 0, 0 }, Imm_None }, /* LC31 Only */
+ { "mpyf" ,2,0x0A000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "mpyf3" ,3,0x24800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None },
+ { "mpyi" ,2,0x0A800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "mpyi3" ,3,0x25000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "negb" ,2,0x0B000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "negf" ,2,0x0B800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "negi" ,2,0x0C000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "nop" ,1,0x0C800000,AddressMode, { AllReg|Indirect|NotReq, 0, 0 }, Imm_None },
+ { "norm" ,2,0x0D000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, /*Check another source*/
+ { "not" ,2,0x0D800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "or" ,2,0x10000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "or3" ,3,0x25800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "pop" ,1,0x0E200000,StackOp, { AllReg, 0, 0 }, Imm_None },
+ { "popf" ,1,0x0EA00000,StackOp, { Rn, 0, 0 }, Imm_None },
+ { "push" ,1,0x0F200000,StackOp, { AllReg, 0, 0 }, Imm_None },
+ { "pushf" ,1,0x0FA00000,StackOp, { Rn, 0, 0 }, Imm_None },
+ { "reti" ,0,0x78000000,0, { 0, 0, 0 }, Imm_None },
+ { "retiu" ,0,0x78000000,0, { 0, 0, 0 }, Imm_None },
+ { "retilo" ,0,0x78010000,0, { 0, 0, 0 }, Imm_None },
+ { "retils" ,0,0x78020000,0, { 0, 0, 0 }, Imm_None },
+ { "retihi" ,0,0x78030000,0, { 0, 0, 0 }, Imm_None },
+ { "retihs" ,0,0x78040000,0, { 0, 0, 0 }, Imm_None },
+ { "retieq" ,0,0x78050000,0, { 0, 0, 0 }, Imm_None },
+ { "retine" ,0,0x78060000,0, { 0, 0, 0 }, Imm_None },
+ { "retilt" ,0,0x78070000,0, { 0, 0, 0 }, Imm_None },
+ { "retile" ,0,0x78080000,0, { 0, 0, 0 }, Imm_None },
+ { "retigt" ,0,0x78090000,0, { 0, 0, 0 }, Imm_None },
+ { "retige" ,0,0x780A0000,0, { 0, 0, 0 }, Imm_None },
+ { "retiz" ,0,0x78050000,0, { 0, 0, 0 }, Imm_None },
+ { "retinz" ,0,0x78060000,0, { 0, 0, 0 }, Imm_None },
+ { "retip" ,0,0x78090000,0, { 0, 0, 0 }, Imm_None },
+ { "retin" ,0,0x78070000,0, { 0, 0, 0 }, Imm_None },
+ { "retinn" ,0,0x780A0000,0, { 0, 0, 0 }, Imm_None },
+ { "retinv" ,0,0x780C0000,0, { 0, 0, 0 }, Imm_None },
+ { "retiv" ,0,0x780D0000,0, { 0, 0, 0 }, Imm_None },
+ { "retinuf",0,0x780E0000,0, { 0, 0, 0 }, Imm_None },
+ { "retiuf" ,0,0x780F0000,0, { 0, 0, 0 }, Imm_None },
+ { "retinc" ,0,0x78040000,0, { 0, 0, 0 }, Imm_None },
+ { "retic" ,0,0x78010000,0, { 0, 0, 0 }, Imm_None },
+ { "retinlv",0,0x78100000,0, { 0, 0, 0 }, Imm_None },
+ { "retilv" ,0,0x78110000,0, { 0, 0, 0 }, Imm_None },
+ { "retinluf",0,0x78120000,0, { 0, 0, 0 }, Imm_None },
+ { "retiluf",0,0x78130000,0, { 0, 0, 0 }, Imm_None },
+ { "retizuf",0,0x78140000,0, { 0, 0, 0 }, Imm_None },
+ { "rets" ,0,0x78800000,0, { 0, 0, 0 }, Imm_None },
+ { "retsu" ,0,0x78800000,0, { 0, 0, 0 }, Imm_None },
+ { "retslo" ,0,0x78810000,0, { 0, 0, 0 }, Imm_None },
+ { "retsls" ,0,0x78820000,0, { 0, 0, 0 }, Imm_None },
+ { "retshi" ,0,0x78830000,0, { 0, 0, 0 }, Imm_None },
+ { "retshs" ,0,0x78840000,0, { 0, 0, 0 }, Imm_None },
+ { "retseq" ,0,0x78850000,0, { 0, 0, 0 }, Imm_None },
+ { "retsne" ,0,0x78860000,0, { 0, 0, 0 }, Imm_None },
+ { "retslt" ,0,0x78870000,0, { 0, 0, 0 }, Imm_None },
+ { "retsle" ,0,0x78880000,0, { 0, 0, 0 }, Imm_None },
+ { "retsgt" ,0,0x78890000,0, { 0, 0, 0 }, Imm_None },
+ { "retsge" ,0,0x788A0000,0, { 0, 0, 0 }, Imm_None },
+ { "retsz" ,0,0x78850000,0, { 0, 0, 0 }, Imm_None },
+ { "retsnz" ,0,0x78860000,0, { 0, 0, 0 }, Imm_None },
+ { "retsp" ,0,0x78890000,0, { 0, 0, 0 }, Imm_None },
+ { "retsn" ,0,0x78870000,0, { 0, 0, 0 }, Imm_None },
+ { "retsnn" ,0,0x788A0000,0, { 0, 0, 0 }, Imm_None },
+ { "retsnv" ,0,0x788C0000,0, { 0, 0, 0 }, Imm_None },
+ { "retsv" ,0,0x788D0000,0, { 0, 0, 0 }, Imm_None },
+ { "retsnuf",0,0x788E0000,0, { 0, 0, 0 }, Imm_None },
+ { "retsuf" ,0,0x788F0000,0, { 0, 0, 0 }, Imm_None },
+ { "retsnc" ,0,0x78840000,0, { 0, 0, 0 }, Imm_None },
+ { "retsc" ,0,0x78810000,0, { 0, 0, 0 }, Imm_None },
+ { "retsnlv",0,0x78900000,0, { 0, 0, 0 }, Imm_None },
+ { "retslv" ,0,0x78910000,0, { 0, 0, 0 }, Imm_None },
+ { "retsnluf",0,0x78920000,0, { 0, 0, 0 }, Imm_None },
+ { "retsluf",0,0x78930000,0, { 0, 0, 0 }, Imm_None },
+ { "retszuf",0,0x78940000,0, { 0, 0, 0 }, Imm_None },
+ { "rnd" ,2,0x11000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "rol" ,1,0x11E00001,Rotate, { AllReg, 0, 0 }, Imm_None },
+ { "rolc" ,1,0x12600001,Rotate, { AllReg, 0, 0 }, Imm_None },
+ { "ror" ,1,0x12E0FFFF,Rotate, { AllReg, 0, 0 }, Imm_None },
+ { "rorc" ,1,0x1360FFFF,Rotate, { AllReg, 0, 0 }, Imm_None },
+ { "rptb" ,1,0x64000000,0, { Imm24, 0, 0 }, Imm_UInt },
+ { "rpts" ,1,0x139B0000,AddressMode, { GAddr2, 0, 0 }, Imm_UInt },
+ { "sigi" ,0,0x16000000,0, { 0, 0, 0 }, Imm_None },
+ { "stf" ,2,0x14000000,AddressMode, { Rn, Direct|Indirect, 0 }, Imm_Float },
+ { "stfi" ,2,0x14800000,AddressMode, { Rn, Direct|Indirect, 0 }, Imm_Float },
+ { "sti" ,2,0x15000000,AddressMode, { AllReg, Direct|Indirect, 0 }, Imm_SInt },
+ { "stii" ,2,0x15800000,AddressMode, { AllReg, Direct|Indirect, 0 }, Imm_SInt },
+ { "subb" ,2,0x16800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "subb3" ,3,0x26000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "subc" ,2,0x17000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "subf" ,2,0x17800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "subf3" ,3,0x26800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None },
+ { "subi" ,2,0x18000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "subi3" ,3,0x27000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "subrb" ,2,0x18800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "subrf" ,2,0x19000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
+ { "subri" ,2,0x19800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
+ { "swi" ,0,0x66000000,0, { 0, 0, 0 }, Imm_None },
+ { "trap" ,1,0x74800020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapu" ,1,0x74800020,0, { IVector, 0, 0 }, Imm_None },
+ { "traplo" ,1,0x74810020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapls" ,1,0x74820020,0, { IVector, 0, 0 }, Imm_None },
+ { "traphi" ,1,0x74830020,0, { IVector, 0, 0 }, Imm_None },
+ { "traphs" ,1,0x74840020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapeq" ,1,0x74850020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapne" ,1,0x74860020,0, { IVector, 0, 0 }, Imm_None },
+ { "traplt" ,1,0x74870020,0, { IVector, 0, 0 }, Imm_None },
+ { "traple" ,1,0x74880020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapgt" ,1,0x74890020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapge" ,1,0x748A0020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapz" ,1,0x74850020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapnz" ,1,0x74860020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapp" ,1,0x74890020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapn" ,1,0x74870020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapnn" ,1,0x748A0020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapnv" ,1,0x748C0020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapv" ,1,0x748D0020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapnuf",1,0x748E0020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapuf" ,1,0x748F0020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapnc" ,1,0x74840020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapc" ,1,0x74810020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapnlv",1,0x74900020,0, { IVector, 0, 0 }, Imm_None },
+ { "traplv" ,1,0x74910020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapnluf",1,0x74920020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapluf",1,0x74930020,0, { IVector, 0, 0 }, Imm_None },
+ { "trapzuf",1,0x74940020,0, { IVector, 0, 0 }, Imm_None },
+ { "tstb" ,2,0x1A000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "tstb3" ,2,0x27800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, 0 }, Imm_None },
+ { "xor" ,2,0x1A800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
+ { "xor3" ,3,0x28000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
+ { "" ,0,0x00000000,0, { 0, 0, 0 }, 0 }
+};
+
+static const template *const tic30_optab_end =
+ tic30_optab + sizeof(tic30_optab)/sizeof(tic30_optab[0]);
+
+typedef struct {
+ char *name;
+ unsigned int operands_1;
+ unsigned int operands_2;
+ unsigned int base_opcode;
+ unsigned int operand_types[2][3];
+ /* Which operand fits into which part of the final opcode word. */
+ int oporder;
+} partemplate;
+
+/* oporder defines - not very descriptive. */
+#define OO_4op1 0
+#define OO_4op2 1
+#define OO_4op3 2
+#define OO_5op1 3
+#define OO_5op2 4
+#define OO_PField 5
+
+static const partemplate tic30_paroptab[] = {
+ { "q_absf_stf", 2,2,0xC8000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_absi_sti", 2,2,0xCA000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_addf3_stf", 3,2,0xCC000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
+ OO_5op1 },
+ { "q_addi3_sti", 3,2,0xCE000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
+ OO_5op1 },
+ { "q_and3_sti", 3,2,0xD0000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
+ OO_5op1 },
+ { "q_ash3_sti", 3,2,0xD2000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
+ OO_5op2 },
+ { "q_fix_sti", 2,2,0xD4000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_float_stf", 2,2,0xD6000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_ldf_ldf", 2,2,0xC4000000, { { Indirect, Rn, 0 }, { Indirect, Rn, 0 } },
+ OO_4op2 },
+ { "q_ldf_stf", 2,2,0xD8000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_ldi_ldi", 2,2,0xC6000000, { { Indirect, Rn, 0 }, { Indirect, Rn, 0 } },
+ OO_4op2 },
+ { "q_ldi_sti", 2,2,0xDA000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_lsh3_sti", 3,2,0xDC000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
+ OO_5op2 },
+ { "q_mpyf3_addf3",3,3,0x80000000, { { Rn | Indirect, Rn | Indirect, Rn },
+ { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
+ { "q_mpyf3_stf", 3,2,0xDE000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
+ OO_5op1 },
+ { "q_mpyf3_subf3",3,3,0x84000000, { { Rn | Indirect, Rn | Indirect, Rn },
+ { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
+ { "q_mpyi3_addi3",3,3,0x88000000, { { Rn | Indirect, Rn | Indirect, Rn },
+ { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
+ { "q_mpyi3_sti", 3,2,0xE0000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
+ OO_5op1 },
+ { "q_mpyi3_subi3",3,3,0x8C000000, { { Rn | Indirect, Rn | Indirect, Rn },
+ { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
+ { "q_negf_stf", 2,2,0xE2000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_negi_sti", 2,2,0xE4000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_not_sti", 2,2,0xE6000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
+ OO_4op1 },
+ { "q_or3_sti", 3,2,0xE8000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
+ OO_5op1 },
+ { "q_stf_stf", 2,2,0xC0000000, { { Rn, Indirect, 0 }, { Rn, Indirect, 0 } },
+ OO_4op3 },
+ { "q_sti_sti", 2,2,0xC2000000, { { Rn, Indirect, 0 }, { Rn, Indirect, 0 } },
+ OO_4op3 },
+ { "q_subf3_stf", 3,2,0xEA000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
+ OO_5op2 },
+ { "q_subi3_sti", 3,2,0xEC000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
+ OO_5op2 },
+ { "q_xor3_sti", 3,2,0xEE000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
+ OO_5op1 },
+ { "", 0,0,0x00000000, { { 0, 0, 0 }, { 0, 0, 0 } }, 0 }
+};
+
+static const partemplate *const tic30_paroptab_end =
+ tic30_paroptab + sizeof(tic30_paroptab)/sizeof(tic30_paroptab[0]);
+
+#endif
diff --git a/include/opcode/tic80.h b/include/opcode/tic80.h
new file mode 100644
index 0000000..b99bc30
--- /dev/null
+++ b/include/opcode/tic80.h
@@ -0,0 +1,277 @@
+/* tic80.h -- Header file for TI TMS320C80 (MV) opcode table
+ Copyright 1996, 1997, 1999 Free Software Foundation, Inc.
+ Written by Fred Fish (fnf@cygnus.com), Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TIC80_H
+#define TIC80_H
+
+/* The opcode table is an array of struct tic80_opcode. */
+
+struct tic80_opcode
+{
+ /* The opcode name. */
+
+ const char *name;
+
+ /* The opcode itself. Those bits which will be filled in with operands
+ are zeroes. */
+
+ unsigned long opcode;
+
+ /* The opcode mask. This is used by the disassembler. This is a mask
+ containing ones indicating those bits which must match the opcode
+ field, and zeroes indicating those bits which need not match (and are
+ presumably filled in by operands). */
+
+ unsigned long mask;
+
+ /* Special purpose flags for this opcode. */
+
+ unsigned char flags;
+
+ /* An array of operand codes. Each code is an index into the operand
+ table. They appear in the order which the operands must appear in
+ assembly code, and are terminated by a zero. FIXME: Adjust size to
+ match actual requirements when TIc80 support is complete */
+
+ unsigned char operands[8];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise in
+ the order in which the disassembler should consider instructions.
+ FIXME: This isn't currently true. */
+
+extern const struct tic80_opcode tic80_opcodes[];
+extern const int tic80_num_opcodes;
+
+
+/* The operands table is an array of struct tic80_operand. */
+
+struct tic80_operand
+{
+ /* The number of bits in the operand. */
+
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+
+ int shift;
+
+ /* Insertion function. This is used by the assembler. To insert an
+ operand value into an instruction, check this field.
+
+ If it is NULL, execute
+ i |= (op & ((1 << o->bits) - 1)) << o->shift;
+ (i is the instruction which we are filling in, o is a pointer to
+ this structure, and op is the opcode value; this assumes twos
+ complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction and the operand value. It will return the new value
+ of the instruction. If the ERRMSG argument is not NULL, then if
+ the operand value is illegal, *ERRMSG will be set to a warning
+ string (the operand will be inserted in any case). If the
+ operand value is legal, *ERRMSG will be unchanged (most operands
+ can accept any value). */
+
+ unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
+ const char **errmsg));
+
+ /* Extraction function. This is used by the disassembler. To
+ extract this operand type from an instruction, check this field.
+
+ If it is NULL, compute
+ op = ((i) >> o->shift) & ((1 << o->bits) - 1);
+ if ((o->flags & TIC80_OPERAND_SIGNED) != 0
+ && (op & (1 << (o->bits - 1))) != 0)
+ op -= 1 << o->bits;
+ (i is the instruction, o is a pointer to this structure, and op
+ is the result; this assumes twos complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction value. It will return the value of the operand. If
+ the INVALID argument is not NULL, *INVALID will be set to
+ non-zero if this operand type can not actually be extracted from
+ this operand (i.e., the instruction does not match). If the
+ operand is valid, *INVALID will not be changed. */
+
+ long (*extract) PARAMS ((unsigned long instruction, int *invalid));
+
+ /* One bit syntax flags. */
+
+ unsigned long flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the tic80_opcodes table. */
+
+extern const struct tic80_operand tic80_operands[];
+
+
+/* Values defined for the flags field of a struct tic80_operand.
+
+ Note that flags for all predefined symbols, such as the general purpose
+ registers (ex: r10), control registers (ex: FPST), condition codes (ex:
+ eq0.b), bit numbers (ex: gt.b), etc are large enough that they can be
+ or'd into an int where the lower bits contain the actual numeric value
+ that correponds to this predefined symbol. This way a single int can
+ contain both the value of the symbol and it's type.
+ */
+
+/* This operand must be an even register number. Floating point numbers
+ for example are stored in even/odd register pairs. */
+
+#define TIC80_OPERAND_EVEN (1 << 0)
+
+/* This operand must be an odd register number and must be one greater than
+ the register number of the previous operand. I.E. the second register in
+ an even/odd register pair. */
+
+#define TIC80_OPERAND_ODD (1 << 1)
+
+/* This operand takes signed values. */
+
+#define TIC80_OPERAND_SIGNED (1 << 2)
+
+/* This operand may be either a predefined constant name or a numeric value.
+ An example would be a condition code like "eq0.b" which has the numeric
+ value 0x2. */
+
+#define TIC80_OPERAND_NUM (1 << 3)
+
+/* This operand should be wrapped in parentheses rather than separated
+ from the previous one by a comma. This is used for various
+ instructions, like the load and store instructions, which want
+ their operands to look like "displacement(reg)" */
+
+#define TIC80_OPERAND_PARENS (1 << 4)
+
+/* This operand is a PC relative branch offset. The disassembler prints
+ these symbolically if possible. Note that the offsets are taken as word
+ offsets. */
+
+#define TIC80_OPERAND_PCREL (1 << 5)
+
+/* This flag is a hint to the disassembler for using hex as the prefered
+ printing format, even for small positive or negative immediate values.
+ Normally values in the range -999 to 999 are printed as signed decimal
+ values and other values are printed in hex. */
+
+#define TIC80_OPERAND_BITFIELD (1 << 6)
+
+/* This operand may have a ":m" modifier specified by bit 17 in a short
+ immediate form instruction. */
+
+#define TIC80_OPERAND_M_SI (1 << 7)
+
+/* This operand may have a ":m" modifier specified by bit 15 in a long
+ immediate or register form instruction. */
+
+#define TIC80_OPERAND_M_LI (1 << 8)
+
+/* This operand may have a ":s" modifier specified in bit 11 in a long
+ immediate or register form instruction. */
+
+#define TIC80_OPERAND_SCALED (1 << 9)
+
+/* This operand is a floating point value */
+
+#define TIC80_OPERAND_FLOAT (1 << 10)
+
+/* This operand is an byte offset from a base relocation. The lower
+ two bits of the final relocated address are ignored when the value is
+ written to the program counter. */
+
+#define TIC80_OPERAND_BASEREL (1 << 11)
+
+/* This operand is an "endmask" field for a shift instruction.
+ It is treated special in that it can have values of 0-32,
+ where 0 and 32 result in the same instruction. The assembler
+ must be able to accept both endmask values. This disassembler
+ has no way of knowing from the instruction which value was
+ given at assembly time, so it just uses '0'. */
+
+#define TIC80_OPERAND_ENDMASK (1 << 12)
+
+/* This operand is one of the 32 general purpose registers.
+ The disassembler prints these with a leading 'r'. */
+
+#define TIC80_OPERAND_GPR (1 << 27)
+
+/* This operand is a floating point accumulator register.
+ The disassembler prints these with a leading 'a'. */
+
+#define TIC80_OPERAND_FPA ( 1 << 28)
+
+/* This operand is a control register number, either numeric or
+ symbolic (like "EIF", "EPC", etc).
+ The disassembler prints these symbolically. */
+
+#define TIC80_OPERAND_CR (1 << 29)
+
+/* This operand is a condition code, either numeric or
+ symbolic (like "eq0.b", "ne0.w", etc).
+ The disassembler prints these symbolically. */
+
+#define TIC80_OPERAND_CC (1 << 30)
+
+/* This operand is a bit number, either numeric or
+ symbolic (like "eq.b", "or.f", etc).
+ The disassembler prints these symbolically.
+ Note that they appear in the instruction in 1's complement relative
+ to the values given in the manual. */
+
+#define TIC80_OPERAND_BITNUM (1 << 31)
+
+/* This mask is used to strip operand bits from an int that contains
+ both operand bits and a numeric value in the lsbs. */
+
+#define TIC80_OPERAND_MASK (TIC80_OPERAND_GPR | TIC80_OPERAND_FPA | TIC80_OPERAND_CR | TIC80_OPERAND_CC | TIC80_OPERAND_BITNUM)
+
+
+/* Flag bits for the struct tic80_opcode flags field. */
+
+#define TIC80_VECTOR 01 /* Is a vector instruction */
+#define TIC80_NO_R0_DEST 02 /* Register r0 cannot be a destination register */
+
+
+/* The opcodes library contains a table that allows translation from predefined
+ symbol names to numeric values, and vice versa. */
+
+/* Structure to hold information about predefined symbols. */
+
+struct predefined_symbol
+{
+ char *name; /* name to recognize */
+ int value;
+};
+
+#define PDS_NAME(pdsp) ((pdsp) -> name)
+#define PDS_VALUE(pdsp) ((pdsp) -> value)
+
+extern const struct predefined_symbol tic80_predefined_symbols[]; /* Translation array */
+extern const int tic80_num_predefined_symbols; /* How many members in the array */
+
+const char *tic80_value_to_symbol PARAMS ((int val, int class)); /* Translate value to symbolic name */
+int tic80_symbol_to_value PARAMS ((char *name, int class)); /* Translate symbolic name to value */
+
+const struct predefined_symbol *
+tic80_next_predefined_symbol PARAMS ((const struct predefined_symbol *));
+
+#endif /* TIC80_H */
diff --git a/include/opcode/v850.h b/include/opcode/v850.h
new file mode 100644
index 0000000..88916f1
--- /dev/null
+++ b/include/opcode/v850.h
@@ -0,0 +1,166 @@
+/* v850.h -- Header file for NEC V850 opcode table
+ Copyright 1996 Free Software Foundation, Inc.
+ Written by J.T. Conklin, Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef V850_H
+#define V850_H
+
+/* The opcode table is an array of struct v850_opcode. */
+
+struct v850_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* The opcode itself. Those bits which will be filled in with
+ operands are zeroes. */
+ unsigned long opcode;
+
+ /* The opcode mask. This is used by the disassembler. This is a
+ mask containing ones indicating those bits which must match the
+ opcode field, and zeroes indicating those bits which need not
+ match (and are presumably filled in by operands). */
+ unsigned long mask;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[8];
+
+ /* Which (if any) operand is a memory operand. */
+ unsigned int memop;
+
+ /* Target processor(s). A bit field of processors which support
+ this instruction. Note a bit field is used as some instructions
+ are available on multiple, different processor types, whereas
+ other instructions are only available on one specific type. */
+ unsigned int processors;
+};
+
+/* Values for the processors field in the v850_opcode structure. */
+#define PROCESSOR_V850 (1 << 0) /* Just the V850. */
+#define PROCESSOR_ALL -1 /* Any processor. */
+#define PROCESSOR_V850E (1 << 1) /* Just the V850E. */
+#define PROCESSOR_NOT_V850 (~ PROCESSOR_V850) /* Any processor except the V850. */
+#define PROCESSOR_V850EA (1 << 2) /* Just the V850EA. */
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct v850_opcode v850_opcodes[];
+extern const int v850_num_opcodes;
+
+
+/* The operands table is an array of struct v850_operand. */
+
+struct v850_operand
+{
+ /* The number of bits in the operand. */
+ /* If this value is -1 then the operand's bits are in a discontinous distribution in the instruction. */
+ int bits;
+
+ /* (bits >= 0): How far the operand is left shifted in the instruction. */
+ /* (bits == -1): Bit mask of the bits in the operand. */
+ int shift;
+
+ /* Insertion function. This is used by the assembler. To insert an
+ operand value into an instruction, check this field.
+
+ If it is NULL, execute
+ i |= (op & ((1 << o->bits) - 1)) << o->shift;
+ (i is the instruction which we are filling in, o is a pointer to
+ this structure, and op is the opcode value; this assumes twos
+ complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction and the operand value. It will return the new value
+ of the instruction. If the ERRMSG argument is not NULL, then if
+ the operand value is illegal, *ERRMSG will be set to a warning
+ string (the operand will be inserted in any case). If the
+ operand value is legal, *ERRMSG will be unchanged (most operands
+ can accept any value). */
+ unsigned long (* insert) PARAMS ((unsigned long instruction, long op,
+ const char ** errmsg));
+
+ /* Extraction function. This is used by the disassembler. To
+ extract this operand type from an instruction, check this field.
+
+ If it is NULL, compute
+ op = o->bits == -1 ? ((i) & o->shift) : ((i) >> o->shift) & ((1 << o->bits) - 1);
+ if (o->flags & V850_OPERAND_SIGNED)
+ op = (op << (32 - o->bits)) >> (32 - o->bits);
+ (i is the instruction, o is a pointer to this structure, and op
+ is the result; this assumes twos complement arithmetic).
+
+ If this field is not NULL, then simply call it with the
+ instruction value. It will return the value of the operand. If
+ the INVALID argument is not NULL, *INVALID will be set to
+ non-zero if this operand type can not actually be extracted from
+ this operand (i.e., the instruction does not match). If the
+ operand is valid, *INVALID will not be changed. */
+ unsigned long (* extract) PARAMS ((unsigned long instruction, int * invalid));
+
+ /* One bit syntax flags. */
+ int flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the v850_opcodes table. */
+
+extern const struct v850_operand v850_operands[];
+
+/* Values defined for the flags field of a struct v850_operand. */
+
+/* This operand names a general purpose register */
+#define V850_OPERAND_REG 0x01
+
+/* This operand names a system register */
+#define V850_OPERAND_SRG 0x02
+
+/* This operand names a condition code used in the setf instruction */
+#define V850_OPERAND_CC 0x04
+
+/* This operand takes signed values */
+#define V850_OPERAND_SIGNED 0x08
+
+/* This operand is the ep register. */
+#define V850_OPERAND_EP 0x10
+
+/* This operand is a PC displacement */
+#define V850_OPERAND_DISP 0x20
+
+/* This is a relaxable operand. Only used for D9->D22 branch relaxing
+ right now. We may need others in the future (or maybe handle them like
+ promoted operands on the mn10300?) */
+#define V850_OPERAND_RELAX 0x40
+
+/* The register specified must not be r0 */
+#define V850_NOT_R0 0x80
+
+/* CYGNUS LOCAL v850e */
+/* push/pop type instruction, V850E specific. */
+#define V850E_PUSH_POP 0x100
+
+/* 16 bit immediate follows instruction, V850E specific. */
+#define V850E_IMMEDIATE16 0x200
+
+/* 32 bit immediate follows instruction, V850E specific. */
+#define V850E_IMMEDIATE32 0x400
+
+#endif /* V850_H */
diff --git a/include/opcode/vax.h b/include/opcode/vax.h
new file mode 100644
index 0000000..f3afebd
--- /dev/null
+++ b/include/opcode/vax.h
@@ -0,0 +1,382 @@
+/* Vax opcde list.
+ Copyright (C) 1989, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB and GAS.
+
+GDB and GAS are free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GDB and GAS are distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GDB or GAS; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef vax_opcodeT
+#define vax_opcodeT int
+#endif /* no vax_opcodeT */
+
+struct vot_wot /* vax opcode table: wot to do with this */
+ /* particular opcode */
+{
+ const char *args; /* how to compile said opcode */
+ vax_opcodeT code; /* op-code (may be > 8 bits!) */
+};
+
+struct vot /* vax opcode text */
+{
+ const char *name; /* opcode name: lowercase string [key] */
+ struct vot_wot detail; /* rest of opcode table [datum] */
+};
+
+#define vot_how args
+#define vot_code code
+#define vot_detail detail
+#define vot_name name
+
+static const struct vot
+votstrs[] =
+{
+{ "halt", {"", 0x00 } },
+{ "nop", {"", 0x01 } },
+{ "rei", {"", 0x02 } },
+{ "bpt", {"", 0x03 } },
+{ "ret", {"", 0x04 } },
+{ "rsb", {"", 0x05 } },
+{ "ldpctx", {"", 0x06 } },
+{ "svpctx", {"", 0x07 } },
+{ "cvtps", {"rwabrwab", 0x08 } },
+{ "cvtsp", {"rwabrwab", 0x09 } },
+{ "index", {"rlrlrlrlrlwl", 0x0a } },
+{ "crc", {"abrlrwab", 0x0b } },
+{ "prober", {"rbrwab", 0x0c } },
+{ "probew", {"rbrwab", 0x0d } },
+{ "insque", {"abab", 0x0e } },
+{ "remque", {"abwl", 0x0f } },
+{ "bsbb", {"bb", 0x10 } },
+{ "brb", {"bb", 0x11 } },
+{ "bneq", {"bb", 0x12 } },
+{ "bnequ", {"bb", 0x12 } },
+{ "beql", {"bb", 0x13 } },
+{ "beqlu", {"bb", 0x13 } },
+{ "bgtr", {"bb", 0x14 } },
+{ "bleq", {"bb", 0x15 } },
+{ "jsb", {"ab", 0x16 } },
+{ "jmp", {"ab", 0x17 } },
+{ "bgeq", {"bb", 0x18 } },
+{ "blss", {"bb", 0x19 } },
+{ "bgtru", {"bb", 0x1a } },
+{ "blequ", {"bb", 0x1b } },
+{ "bvc", {"bb", 0x1c } },
+{ "bvs", {"bb", 0x1d } },
+{ "bcc", {"bb", 0x1e } },
+{ "bgequ", {"bb", 0x1e } },
+{ "blssu", {"bb", 0x1f } },
+{ "bcs", {"bb", 0x1f } },
+{ "addp4", {"rwabrwab", 0x20 } },
+{ "addp6", {"rwabrwabrwab", 0x21 } },
+{ "subp4", {"rwabrwab", 0x22 } },
+{ "subp6", {"rwabrwabrwab", 0x23 } },
+{ "cvtpt", {"rwababrwab", 0x24 } },
+{ "mulp", {"rwabrwabrwab", 0x25 } },
+{ "cvttp", {"rwababrwab", 0x26 } },
+{ "divp", {"rwabrwabrwab", 0x27 } },
+{ "movc3", {"rwabab", 0x28 } },
+{ "cmpc3", {"rwabab", 0x29 } },
+{ "scanc", {"rwababrb", 0x2a } },
+{ "spanc", {"rwababrb", 0x2b } },
+{ "movc5", {"rwabrbrwab", 0x2c } },
+{ "cmpc5", {"rwabrbrwab", 0x2d } },
+{ "movtc", {"rwabrbabrwab", 0x2e } },
+{ "movtuc", {"rwabrbabrwab", 0x2f } },
+{ "bsbw", {"bw", 0x30 } },
+{ "brw", {"bw", 0x31 } },
+{ "cvtwl", {"rwwl", 0x32 } },
+{ "cvtwb", {"rwwb", 0x33 } },
+{ "movp", {"rwabab", 0x34 } },
+{ "cmpp3", {"rwabab", 0x35 } },
+{ "cvtpl", {"rwabwl", 0x36 } },
+{ "cmpp4", {"rwabrwab", 0x37 } },
+{ "editpc", {"rwababab", 0x38 } },
+{ "matchc", {"rwabrwab", 0x39 } },
+{ "locc", {"rbrwab", 0x3a } },
+{ "skpc", {"rbrwab", 0x3b } },
+{ "movzwl", {"rwwl", 0x3c } },
+{ "acbw", {"rwrwmwbw", 0x3d } },
+{ "movaw", {"awwl", 0x3e } },
+{ "pushaw", {"aw", 0x3f } },
+{ "addf2", {"rfmf", 0x40 } },
+{ "addf3", {"rfrfwf", 0x41 } },
+{ "subf2", {"rfmf", 0x42 } },
+{ "subf3", {"rfrfwf", 0x43 } },
+{ "mulf2", {"rfmf", 0x44 } },
+{ "mulf3", {"rfrfwf", 0x45 } },
+{ "divf2", {"rfmf", 0x46 } },
+{ "divf3", {"rfrfwf", 0x47 } },
+{ "cvtfb", {"rfwb", 0x48 } },
+{ "cvtfw", {"rfww", 0x49 } },
+{ "cvtfl", {"rfwl", 0x4a } },
+{ "cvtrfl", {"rfwl", 0x4b } },
+{ "cvtbf", {"rbwf", 0x4c } },
+{ "cvtwf", {"rwwf", 0x4d } },
+{ "cvtlf", {"rlwf", 0x4e } },
+{ "acbf", {"rfrfmfbw", 0x4f } },
+{ "movf", {"rfwf", 0x50 } },
+{ "cmpf", {"rfrf", 0x51 } },
+{ "mnegf", {"rfwf", 0x52 } },
+{ "tstf", {"rf", 0x53 } },
+{ "emodf", {"rfrbrfwlwf", 0x54 } },
+{ "polyf", {"rfrwab", 0x55 } },
+{ "cvtfd", {"rfwd", 0x56 } },
+ /* opcode 57 is not defined yet */
+{ "adawi", {"rwmw", 0x58 } },
+ /* opcode 59 is not defined yet */
+ /* opcode 5a is not defined yet */
+ /* opcode 5b is not defined yet */
+{ "insqhi", {"abaq", 0x5c } },
+{ "insqti", {"abaq", 0x5d } },
+{ "remqhi", {"aqwl", 0x5e } },
+{ "remqti", {"aqwl", 0x5f } },
+{ "addd2", {"rdmd", 0x60 } },
+{ "addd3", {"rdrdwd", 0x61 } },
+{ "subd2", {"rdmd", 0x62 } },
+{ "subd3", {"rdrdwd", 0x63 } },
+{ "muld2", {"rdmd", 0x64 } },
+{ "muld3", {"rdrdwd", 0x65 } },
+{ "divd2", {"rdmd", 0x66 } },
+{ "divd3", {"rdrdwd", 0x67 } },
+{ "cvtdb", {"rdwb", 0x68 } },
+{ "cvtdw", {"rdww", 0x69 } },
+{ "cvtdl", {"rdwl", 0x6a } },
+{ "cvtrdl", {"rdwl", 0x6b } },
+{ "cvtbd", {"rbwd", 0x6c } },
+{ "cvtwd", {"rwwd", 0x6d } },
+{ "cvtld", {"rlwd", 0x6e } },
+{ "acbd", {"rdrdmdbw", 0x6f } },
+{ "movd", {"rdwd", 0x70 } },
+{ "cmpd", {"rdrd", 0x71 } },
+{ "mnegd", {"rdwd", 0x72 } },
+{ "tstd", {"rd", 0x73 } },
+{ "emodd", {"rdrbrdwlwd", 0x74 } },
+{ "polyd", {"rdrwab", 0x75 } },
+{ "cvtdf", {"rdwf", 0x76 } },
+ /* opcode 77 is not defined yet */
+{ "ashl", {"rbrlwl", 0x78 } },
+{ "ashq", {"rbrqwq", 0x79 } },
+{ "emul", {"rlrlrlwq", 0x7a } },
+{ "ediv", {"rlrqwlwl", 0x7b } },
+{ "clrd", {"wd", 0x7c } },
+{ "clrg", {"wg", 0x7c } },
+{ "clrq", {"wd", 0x7c } },
+{ "movq", {"rqwq", 0x7d } },
+{ "movaq", {"aqwl", 0x7e } },
+{ "movad", {"adwl", 0x7e } },
+{ "pushaq", {"aq", 0x7f } },
+{ "pushad", {"ad", 0x7f } },
+{ "addb2", {"rbmb", 0x80 } },
+{ "addb3", {"rbrbwb", 0x81 } },
+{ "subb2", {"rbmb", 0x82 } },
+{ "subb3", {"rbrbwb", 0x83 } },
+{ "mulb2", {"rbmb", 0x84 } },
+{ "mulb3", {"rbrbwb", 0x85 } },
+{ "divb2", {"rbmb", 0x86 } },
+{ "divb3", {"rbrbwb", 0x87 } },
+{ "bisb2", {"rbmb", 0x88 } },
+{ "bisb3", {"rbrbwb", 0x89 } },
+{ "bicb2", {"rbmb", 0x8a } },
+{ "bicb3", {"rbrbwb", 0x8b } },
+{ "xorb2", {"rbmb", 0x8c } },
+{ "xorb3", {"rbrbwb", 0x8d } },
+{ "mnegb", {"rbwb", 0x8e } },
+{ "caseb", {"rbrbrb", 0x8f } },
+{ "movb", {"rbwb", 0x90 } },
+{ "cmpb", {"rbrb", 0x91 } },
+{ "mcomb", {"rbwb", 0x92 } },
+{ "bitb", {"rbrb", 0x93 } },
+{ "clrb", {"wb", 0x94 } },
+{ "tstb", {"rb", 0x95 } },
+{ "incb", {"mb", 0x96 } },
+{ "decb", {"mb", 0x97 } },
+{ "cvtbl", {"rbwl", 0x98 } },
+{ "cvtbw", {"rbww", 0x99 } },
+{ "movzbl", {"rbwl", 0x9a } },
+{ "movzbw", {"rbww", 0x9b } },
+{ "rotl", {"rbrlwl", 0x9c } },
+{ "acbb", {"rbrbmbbw", 0x9d } },
+{ "movab", {"abwl", 0x9e } },
+{ "pushab", {"ab", 0x9f } },
+{ "addw2", {"rwmw", 0xa0 } },
+{ "addw3", {"rwrwww", 0xa1 } },
+{ "subw2", {"rwmw", 0xa2 } },
+{ "subw3", {"rwrwww", 0xa3 } },
+{ "mulw2", {"rwmw", 0xa4 } },
+{ "mulw3", {"rwrwww", 0xa5 } },
+{ "divw2", {"rwmw", 0xa6 } },
+{ "divw3", {"rwrwww", 0xa7 } },
+{ "bisw2", {"rwmw", 0xa8 } },
+{ "bisw3", {"rwrwww", 0xa9 } },
+{ "bicw2", {"rwmw", 0xaa } },
+{ "bicw3", {"rwrwww", 0xab } },
+{ "xorw2", {"rwmw", 0xac } },
+{ "xorw3", {"rwrwww", 0xad } },
+{ "mnegw", {"rwww", 0xae } },
+{ "casew", {"rwrwrw", 0xaf } },
+{ "movw", {"rwww", 0xb0 } },
+{ "cmpw", {"rwrw", 0xb1 } },
+{ "mcomw", {"rwww", 0xb2 } },
+{ "bitw", {"rwrw", 0xb3 } },
+{ "clrw", {"ww", 0xb4 } },
+{ "tstw", {"rw", 0xb5 } },
+{ "incw", {"mw", 0xb6 } },
+{ "decw", {"mw", 0xb7 } },
+{ "bispsw", {"rw", 0xb8 } },
+{ "bicpsw", {"rw", 0xb9 } },
+{ "popr", {"rw", 0xba } },
+{ "pushr", {"rw", 0xbb } },
+{ "chmk", {"rw", 0xbc } },
+{ "chme", {"rw", 0xbd } },
+{ "chms", {"rw", 0xbe } },
+{ "chmu", {"rw", 0xbf } },
+{ "addl2", {"rlml", 0xc0 } },
+{ "addl3", {"rlrlwl", 0xc1 } },
+{ "subl2", {"rlml", 0xc2 } },
+{ "subl3", {"rlrlwl", 0xc3 } },
+{ "mull2", {"rlml", 0xc4 } },
+{ "mull3", {"rlrlwl", 0xc5 } },
+{ "divl2", {"rlml", 0xc6 } },
+{ "divl3", {"rlrlwl", 0xc7 } },
+{ "bisl2", {"rlml", 0xc8 } },
+{ "bisl3", {"rlrlwl", 0xc9 } },
+{ "bicl2", {"rlml", 0xca } },
+{ "bicl3", {"rlrlwl", 0xcb } },
+{ "xorl2", {"rlml", 0xcc } },
+{ "xorl3", {"rlrlwl", 0xcd } },
+{ "mnegl", {"rlwl", 0xce } },
+{ "casel", {"rlrlrl", 0xcf } },
+{ "movl", {"rlwl", 0xd0 } },
+{ "cmpl", {"rlrl", 0xd1 } },
+{ "mcoml", {"rlwl", 0xd2 } },
+{ "bitl", {"rlrl", 0xd3 } },
+{ "clrf", {"wf", 0xd4 } },
+{ "clrl", {"wl", 0xd4 } },
+{ "tstl", {"rl", 0xd5 } },
+{ "incl", {"ml", 0xd6 } },
+{ "decl", {"ml", 0xd7 } },
+{ "adwc", {"rlml", 0xd8 } },
+{ "sbwc", {"rlml", 0xd9 } },
+{ "mtpr", {"rlrl", 0xda } },
+{ "mfpr", {"rlwl", 0xdb } },
+{ "movpsl", {"wl", 0xdc } },
+{ "pushl", {"rl", 0xdd } },
+{ "moval", {"alwl", 0xde } },
+{ "movaf", {"afwl", 0xde } },
+{ "pushal", {"al", 0xdf } },
+{ "pushaf", {"af", 0xdf } },
+{ "bbs", {"rlvbbb", 0xe0 } },
+{ "bbc", {"rlvbbb", 0xe1 } },
+{ "bbss", {"rlvbbb", 0xe2 } },
+{ "bbcs", {"rlvbbb", 0xe3 } },
+{ "bbsc", {"rlvbbb", 0xe4 } },
+{ "bbcc", {"rlvbbb", 0xe5 } },
+{ "bbssi", {"rlvbbb", 0xe6 } },
+{ "bbcci", {"rlvbbb", 0xe7 } },
+{ "blbs", {"rlbb", 0xe8 } },
+{ "blbc", {"rlbb", 0xe9 } },
+{ "ffs", {"rlrbvbwl", 0xea } },
+{ "ffc", {"rlrbvbwl", 0xeb } },
+{ "cmpv", {"rlrbvbrl", 0xec } },
+{ "cmpzv", {"rlrbvbrl", 0xed } },
+{ "extv", {"rlrbvbwl", 0xee } },
+{ "extzv", {"rlrbvbwl", 0xef } },
+{ "insv", {"rlrlrbvb", 0xf0 } },
+{ "acbl", {"rlrlmlbw", 0xf1 } },
+{ "aoblss", {"rlmlbb", 0xf2 } },
+{ "aobleq", {"rlmlbb", 0xf3 } },
+{ "sobgeq", {"mlbb", 0xf4 } },
+{ "sobgtr", {"mlbb", 0xf5 } },
+{ "cvtlb", {"rlwb", 0xf6 } },
+{ "cvtlw", {"rlww", 0xf7 } },
+{ "ashp", {"rbrwabrbrwab", 0xf8 } },
+{ "cvtlp", {"rlrwab", 0xf9 } },
+{ "callg", {"abab", 0xfa } },
+{ "calls", {"rlab", 0xfb } },
+{ "xfc", {"", 0xfc } },
+ /* undefined opcodes here */
+{ "cvtdh", {"rdwh", 0x32fd } },
+{ "cvtgf", {"rgwh", 0x33fd } },
+{ "addg2", {"rgmg", 0x40fd } },
+{ "addg3", {"rgrgwg", 0x41fd } },
+{ "subg2", {"rgmg", 0x42fd } },
+{ "subg3", {"rgrgwg", 0x43fd } },
+{ "mulg2", {"rgmg", 0x44fd } },
+{ "mulg3", {"rgrgwg", 0x45fd } },
+{ "divg2", {"rgmg", 0x46fd } },
+{ "divg3", {"rgrgwg", 0x47fd } },
+{ "cvtgb", {"rgwb", 0x48fd } },
+{ "cvtgw", {"rgww", 0x49fd } },
+{ "cvtgl", {"rgwl", 0x4afd } },
+{ "cvtrgl", {"rgwl", 0x4bfd } },
+{ "cvtbg", {"rbwg", 0x4cfd } },
+{ "cvtwg", {"rwwg", 0x4dfd } },
+{ "cvtlg", {"rlwg", 0x4efd } },
+{ "acbg", {"rgrgmgbw", 0x4ffd } },
+{ "movg", {"rgwg", 0x50fd } },
+{ "cmpg", {"rgrg", 0x51fd } },
+{ "mnegg", {"rgwg", 0x52fd } },
+{ "tstg", {"rg", 0x53fd } },
+{ "emodg", {"rgrwrgwlwg", 0x54fd } },
+{ "polyg", {"rgrwab", 0x55fd } },
+{ "cvtgh", {"rgwh", 0x56fd } },
+ /* undefined opcodes here */
+{ "addh2", {"rhmh", 0x60fd } },
+{ "addh3", {"rhrhwh", 0x61fd } },
+{ "subh2", {"rhmh", 0x62fd } },
+{ "subh3", {"rhrhwh", 0x63fd } },
+{ "mulh2", {"rhmh", 0x64fd } },
+{ "mulh3", {"rhrhwh", 0x65fd } },
+{ "divh2", {"rhmh", 0x66fd } },
+{ "divh3", {"rhrhwh", 0x67fd } },
+{ "cvthb", {"rhwb", 0x68fd } },
+{ "cvthw", {"rhww", 0x69fd } },
+{ "cvthl", {"rhwl", 0x6afd } },
+{ "cvtrhl", {"rhwl", 0x6bfd } },
+{ "cvtbh", {"rbwh", 0x6cfd } },
+{ "cvtwh", {"rwwh", 0x6dfd } },
+{ "cvtlh", {"rlwh", 0x6efd } },
+{ "acbh", {"rhrhmhbw", 0x6ffd } },
+{ "movh", {"rhwh", 0x70fd } },
+{ "cmph", {"rhrh", 0x71fd } },
+{ "mnegh", {"rhwh", 0x72fd } },
+{ "tsth", {"rh", 0x73fd } },
+{ "emodh", {"rhrwrhwlwh", 0x74fd } },
+{ "polyh", {"rhrwab", 0x75fd } },
+{ "cvthg", {"rhwg", 0x76fd } },
+ /* undefined opcodes here */
+{ "clrh", {"wh", 0x7cfd } },
+{ "clro", {"wo", 0x7cfd } },
+{ "movo", {"rowo", 0x7dfd } },
+{ "movah", {"ahwl", 0x7efd } },
+{ "movao", {"aowl", 0x7efd } },
+{ "pushah", {"ah", 0x7ffd } },
+{ "pushao", {"ao", 0x7ffd } },
+ /* undefined opcodes here */
+{ "cvtfh", {"rfwh", 0x98fd } },
+{ "cvtfg", {"rfwg", 0x99fd } },
+ /* undefined opcodes here */
+{ "cvthf", {"rhwf", 0xf6fd } },
+{ "cvthd", {"rhwd", 0xf7fd } },
+ /* undefined opcodes here */
+{ "bugl", {"rl", 0xfdff } },
+{ "bugw", {"rw", 0xfeff } },
+ /* undefined opcodes here */
+
+{ "", {"", 0} } /* empty is end sentinel */
+
+}; /* votstrs */
+
+/* end: vax.opcode.h */
diff --git a/include/os9k.h b/include/os9k.h
new file mode 100644
index 0000000..0f2eed2
--- /dev/null
+++ b/include/os9k.h
@@ -0,0 +1,169 @@
+#if !defined(_MODULE_H)
+#define _MODULE_H
+
+/* OS-9000 i386 module header definitions */
+#define _MPF386
+
+/* sizeof common header less parity field */
+#define N_M_PARITY (sizeof(mh_com)-sizeof(unisgned short))
+#define OLD_M_PARITY 46
+#define M_PARITY N_M_PARITY
+
+#ifdef _MPF68K
+#define MODSYNC 0x4afd /* module header sync code for 680x0 processors */
+#endif
+
+#ifdef _MPF386
+#define MODSYNC 0x4afc /* module header sync code for 80386 processors */
+#endif
+
+#define MODREV 1 /* module format revision 1 */
+#define CRCCON 0x800fe3 /* crc polynomial constant */
+
+/* Module access permission values */
+#define MP_OWNER_READ 0x0001
+#define MP_OWNER_WRITE 0x0002
+#define MP_OWNER_EXEC 0x0004
+#define MP_GROUP_READ 0x0010
+#define MP_GROUP_WRITE 0x0020
+#define MP_GROUP_EXEC 0x0040
+#define MP_WORLD_READ 0x0100
+#define MP_WORLD_WRITE 0x0200
+#define MP_WORLD_EXEC 0x0400
+#define MP_WORLD_ACCESS 0x0777
+#define MP_OWNER_MASK 0x000f
+#define MP_GROUP_MASK 0x00f0
+#define MP_WORLD_MASK 0x0f00
+#define MP_SYSTM_MASK 0xf000
+
+/* Module Type/Language values */
+#define MT_ANY 0
+#define MT_PROGRAM 0x0001
+#define MT_SUBROUT 0x0002
+#define MT_MULTI 0x0003
+#define MT_DATA 0x0004
+#define MT_TRAPLIB 0x000b
+#define MT_SYSTEM 0x000c
+#define MT_FILEMAN 0x000d
+#define MT_DEVDRVR 0x000e
+#define MT_DEVDESC 0x000f
+#define MT_MASK 0xff00
+
+#define ML_ANY 0
+#define ML_OBJECT 1
+#define ML_ICODE 2
+#define ML_PCODE 3
+#define ML_CCODE 4
+#define ML_CBLCODE 5
+#define ML_FRTNCODE 6
+#define ML_MASK 0x00ff
+
+#define mktypelang(type,lang) (((type)<<8)|(lang))
+
+/* Module Attribute values */
+#define MA_REENT 0x80
+#define MA_GHOST 0x40
+#define MA_SUPER 0x20
+#define MA_MASK 0xff00
+#define MR_MASK 0x00ff
+
+#define mkattrevs(attr, revs) (((attr)<<8)|(revs))
+
+#define m_user m_owner.grp_usr.usr
+#define m_group m_owner.grp_usr.grp
+#define m_group_user m_owner.group_user
+
+/* macro definitions for accessing module header fields */
+#define MODNAME(mod) ((u_char*)((u_char*)mod + ((Mh_com)mod)->m_name))
+#if 0
+/* Appears not to be used, and the u_int32 typedef is gone (because it
+ conflicted with a Mach header. */
+#define MODSIZE(mod) ((u_int32)((Mh_com)mod)->m_size)
+#endif /* 0 */
+#define MHCOM_BYTES_SIZE 80
+#define N_BADMAG(a) (((a).a_info) != MODSYNC)
+
+typedef struct mh_com {
+ /* sync bytes ($4afc). */
+ unsigned char m_sync[2];
+ unsigned char m_sysrev[2]; /* system revision check value */
+ unsigned char
+ m_size[4]; /* module size */
+ unsigned char
+ m_owner[4]; /* group/user id */
+ unsigned char
+ m_name[4]; /* offset to module name */
+ unsigned char
+ m_access[2], /* access permissions */
+ m_tylan[2], /* type/lang */
+ m_attrev[2], /* rev/attr */
+ m_edit[2]; /* edition */
+ unsigned char
+ m_needs[4], /* module hardware requirements flags. (reserved) */
+ m_usage[4], /* comment string offset */
+ m_symbol[4], /* symbol table offset */
+ m_exec[4], /* offset to execution entry point */
+ m_excpt[4], /* offset to exception entry point */
+ m_data[4], /* data storage requirement */
+ m_stack[4], /* stack size */
+ m_idata[4], /* offset to initialized data */
+ m_idref[4], /* offset to data reference lists */
+ m_init[4], /* initialization routine offset */
+ m_term[4]; /* termination routine offset */
+ unsigned char
+ m_ident[2]; /* ident code for ident program */
+ char
+ m_spare[8]; /* reserved bytes */
+ unsigned char
+ m_parity[2]; /* header parity */
+} mh_com,*Mh_com;
+
+/* Executable memory module */
+typedef mh_com *Mh_exec,mh_exec;
+
+/* Data memory module */
+typedef mh_com *Mh_data,mh_data;
+
+/* File manager memory module */
+typedef mh_com *Mh_fman,mh_fman;
+
+/* device driver module */
+typedef mh_com *Mh_drvr,mh_drvr;
+
+/* trap handler module */
+typedef mh_com mh_trap, *Mh_trap;
+
+/* Device descriptor module */
+typedef mh_com *Mh_dev,mh_dev;
+
+/* Configuration module */
+typedef mh_com *Mh_config, mh_config;
+
+#if 0
+
+#if !defined(_MODDIR_H)
+/* go get _os_fmod (and others) */
+#include <moddir.h>
+#endif
+
+error_code _os_crc(void *, u_int32, int *);
+error_code _os_datmod(char *, u_int32, u_int16 *, u_int16 *, u_int32, void **, mh_data **);
+error_code _os_get_moddir(void *, u_int32 *);
+error_code _os_initdata(mh_com *, void *);
+error_code _os_link(char **, mh_com **, void **, u_int16 *, u_int16 *);
+error_code _os_linkm(mh_com *, void **, u_int16 *, u_int16 *);
+error_code _os_load(char *, mh_com **, void **, u_int32, u_int16 *, u_int16 *, u_int32);
+error_code _os_mkmodule(char *, u_int32, u_int16 *, u_int16 *, u_int32, void **, mh_com **, u_int32);
+error_code _os_modaddr(void *, mh_com **);
+error_code _os_setcrc(mh_com *);
+error_code _os_slink(u_int32, char *, void **, void **, mh_com **);
+error_code _os_slinkm(u_int32, mh_com *, void **, void **);
+error_code _os_unlink(mh_com *);
+error_code _os_unload(char *, u_int32);
+error_code _os_tlink(u_int32, char *, void **, mh_trap **, void *, u_int32);
+error_code _os_tlinkm(u_int32, mh_com *, void **, void *, u_int32);
+error_code _os_iodel(mh_com *);
+error_code _os_vmodul(mh_com *, mh_com *, u_int32);
+#endif /* 0 */
+
+#endif
diff --git a/include/progress.h b/include/progress.h
new file mode 100644
index 0000000..f18318a
--- /dev/null
+++ b/include/progress.h
@@ -0,0 +1,37 @@
+/* Default definitions for progress macros.
+ Copyright (C) 1994 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The default definitions below are intended to be replaced by real
+ definitions, if building the tools for an interactive programming
+ environment. */
+
+#ifndef _PROGRESS_H
+#define _PROGRESS_H
+
+#ifndef START_PROGRESS
+#define START_PROGRESS(STR,N)
+#endif
+
+#ifndef PROGRESS
+#define PROGRESS(X)
+#endif
+
+#ifndef END_PROGRESS
+#define END_PROGRESS(STR)
+#endif
+
+#endif /* _PROGRESS_H */
diff --git a/include/regs/ChangeLog b/include/regs/ChangeLog
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/include/regs/ChangeLog
diff --git a/include/remote-sim.h b/include/remote-sim.h
new file mode 100644
index 0000000..a4480b4
--- /dev/null
+++ b/include/remote-sim.h
@@ -0,0 +1,321 @@
+/* This file defines the interface between the simulator and gdb.
+ Copyright (C) 1993, 1994, 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined (REMOTE_SIM_H)
+#define REMOTE_SIM_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* This file is used when building stand-alone simulators, so isolate this
+ file from gdb. */
+
+/* Pick up CORE_ADDR_TYPE if defined (from gdb), otherwise use same value as
+ gdb does (unsigned int - from defs.h). */
+
+#ifndef CORE_ADDR_TYPE
+typedef unsigned int SIM_ADDR;
+#else
+typedef CORE_ADDR_TYPE SIM_ADDR;
+#endif
+
+
+/* Semi-opaque type used as result of sim_open and passed back to all
+ other routines. "desc" is short for "descriptor".
+ It is up to each simulator to define `sim_state'. */
+
+typedef struct sim_state *SIM_DESC;
+
+
+/* Values for `kind' arg to sim_open. */
+
+typedef enum {
+ SIM_OPEN_STANDALONE, /* simulator used standalone (run.c) */
+ SIM_OPEN_DEBUG /* simulator used by debugger (gdb) */
+} SIM_OPEN_KIND;
+
+
+/* Return codes from various functions. */
+
+typedef enum {
+ SIM_RC_FAIL = 0,
+ SIM_RC_OK = 1,
+ SIM_RC_UNKNOWN_BREAKPOINT = 2,
+ SIM_RC_INSUFFICIENT_RESOURCES = 3,
+ SIM_RC_DUPLICATE_BREAKPOINT = 4
+} SIM_RC;
+
+
+/* The bfd struct, as an opaque type. */
+
+struct _bfd;
+
+
+/* Main simulator entry points. */
+
+
+/* Create a fully initialized simulator instance.
+
+ (This function is called when the simulator is selected from the
+ gdb command line.)
+
+ KIND specifies how the simulator shall be used. Currently there
+ are only two kinds: stand-alone and debug.
+
+ CALLBACK specifies a standard host callback (defined in callback.h).
+
+ ABFD, when non NULL, designates a target program. The program is
+ not loaded.
+
+ ARGV is a standard ARGV pointer such as that passed from the
+ command line. The syntax of the argument list is is assumed to be
+ ``SIM-PROG { SIM-OPTION } [ TARGET-PROGRAM { TARGET-OPTION } ]''.
+ The trailing TARGET-PROGRAM and args are only valid for a
+ stand-alone simulator.
+
+ On success, the result is a non NULL descriptor that shall be
+ passed to the other sim_foo functions. While the simulator
+ configuration can be parameterized by (in decreasing precedence)
+ ARGV's SIM-OPTION, ARGV's TARGET-PROGRAM and the ABFD argument, the
+ successful creation of the simulator shall not dependent on the
+ presence of any of these arguments/options.
+
+ Hardware simulator: The created simulator shall be sufficiently
+ initialized to handle, with out restrictions any client requests
+ (including memory reads/writes, register fetch/stores and a
+ resume).
+
+ Process simulator: that process is not created until a call to
+ sim_create_inferior. FIXME: What should the state of the simulator
+ be? */
+
+SIM_DESC sim_open PARAMS ((SIM_OPEN_KIND kind, struct host_callback_struct *callback, struct _bfd *abfd, char **argv));
+
+
+/* Destory a simulator instance.
+
+ QUITTING is non-zero if we cannot hang on errors.
+
+ This may involve freeing target memory and closing any open files
+ and mmap'd areas. You cannot assume sim_kill has already been
+ called. */
+
+void sim_close PARAMS ((SIM_DESC sd, int quitting));
+
+
+/* Load program PROG into the simulators memory.
+
+ If ABFD is non-NULL, the bfd for the file has already been opened.
+ The result is a return code indicating success.
+
+ Hardware simulator: Normally, each program section is written into
+ memory according to that sections LMA using physical (direct)
+ addressing. The exception being systems, such as PPC/CHRP, which
+ support more complicated program loaders. A call to this function
+ should not effect the state of the processor registers. Multiple
+ calls to this function are permitted and have an accumulative
+ effect.
+
+ Process simulator: Calls to this function may be ignored.
+
+ FIXME: Most hardware simulators load the image at the VMA using
+ virtual addressing.
+
+ FIXME: For some hardware targets, before a loaded program can be
+ executed, it requires the manipulation of VM registers and tables.
+ Such manipulation should probably (?) occure in
+ sim_create_inferior. */
+
+SIM_RC sim_load PARAMS ((SIM_DESC sd, char *prog, struct _bfd *abfd, int from_tty));
+
+
+/* Prepare to run the simulated program.
+
+ ABFD, if not NULL, provides initial processor state information.
+ ARGV and ENV, if non NULL, are NULL terminated lists of pointers.
+
+ Hardware simulator: This function shall initialize the processor
+ registers to a known value. The program counter and possibly stack
+ pointer shall be set using information obtained from ABFD (or
+ hardware reset defaults). ARGV and ENV, dependant on the target
+ ABI, may be written to memory.
+
+ Process simulator: After a call to this function, a new process
+ instance shall exist. The TEXT, DATA, BSS and stack regions shall
+ all be initialized, ARGV and ENV shall be written to process
+ address space (according to the applicable ABI) and the program
+ counter and stack pointer set accordingly. */
+
+SIM_RC sim_create_inferior PARAMS ((SIM_DESC sd, struct _bfd *abfd, char **argv, char **env));
+
+
+/* Fetch LENGTH bytes of the simulated program's memory. Start fetch
+ at virtual address MEM and store in BUF. Result is number of bytes
+ read, or zero if error. */
+
+int sim_read PARAMS ((SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length));
+
+
+/* Store LENGTH bytes from BUF into the simulated program's
+ memory. Store bytes starting at virtual address MEM. Result is
+ number of bytes write, or zero if error. */
+
+int sim_write PARAMS ((SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length));
+
+
+/* Fetch register REGNO storing its raw (target endian) value in the
+ LENGTH byte buffer BUF. Return the actual size of the register or
+ zero if REGNO is not applicable.
+
+ Legacy implementations ignore LENGTH and always return -1.
+
+ If LENGTH does not match the size of REGNO no data is transfered
+ (the actual register size is still returned). */
+
+int sim_fetch_register PARAMS ((SIM_DESC sd, int regno, unsigned char *buf, int length));
+
+
+/* Store register REGNO from the raw (target endian) value in BUF.
+ Return the actual size of the register or zero if REGNO is not
+ applicable.
+
+ Legacy implementations ignore LENGTH and always return -1.
+
+ If LENGTH does not match the size of REGNO no data is transfered
+ (the actual register size is still returned). */
+
+int sim_store_register PARAMS ((SIM_DESC sd, int regno, unsigned char *buf, int length));
+
+
+/* Print whatever statistics the simulator has collected.
+
+ VERBOSE is currently unused and must always be zero. */
+
+void sim_info PARAMS ((SIM_DESC sd, int verbose));
+
+
+/* Run (or resume) the simulated program. */
+
+void sim_resume PARAMS ((SIM_DESC sd, int step, int siggnal));
+
+
+/* Asynchronous request to stop the simulation.
+ A nonzero return indicates that the simulator is able to handle
+ the request */
+
+int sim_stop PARAMS ((SIM_DESC sd));
+
+
+/* Fetch the REASON why the program stopped.
+
+ SIM_EXITED: The program has terminated. SIGRC indicates the target
+ dependant exit status.
+
+ SIM_STOPPED: The program has stopped. SIGRC uses the host's signal
+ numbering as a way of identifying the reaon: program interrupted by
+ user via a sim_stop request (SIGINT); a breakpoint instruction
+ (SIGTRAP); a completed single step (SIGTRAP); an internal error
+ condition (SIGABRT); an illegal instruction (SIGILL); Access to an
+ undefined memory region (SIGSEGV); Mis-aligned memory access
+ (SIGBUS).
+
+ SIM_SIGNALLED: The program has stopped. The simulator has
+ encountered target code that requires the (HOST) signal SIGRC to be
+ delivered to the simulated program. Ex: `kill (getpid (),
+ TARGET_SIGxxx)'. Where TARGET_SIGxxx has been translated into a
+ host signal. FIXME: This is not always possible..
+
+ SIM_RUNNING, SIM_POLLING: The return of one of these values
+ indicates a problem internal to the simulator. */
+
+enum sim_stop { sim_running, sim_polling, sim_exited, sim_stopped, sim_signalled };
+
+void sim_stop_reason PARAMS ((SIM_DESC sd, enum sim_stop *reason, int *sigrc));
+
+
+/* Passthru for other commands that the simulator might support.
+ Simulators should be prepared to deal with any combination of NULL
+ or empty CMD. */
+
+void sim_do_command PARAMS ((SIM_DESC sd, char *cmd));
+
+/* Call these functions to set and clear breakpoints at ADDR. */
+
+SIM_RC sim_set_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
+SIM_RC sim_clear_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
+SIM_RC sim_clear_all_breakpoints PARAMS ((SIM_DESC sd));
+
+/* These functions are used to enable and disable breakpoints. */
+
+SIM_RC sim_enable_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
+SIM_RC sim_disable_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
+SIM_RC sim_enable_all_breakpoints PARAMS ((SIM_DESC sd));
+SIM_RC sim_disable_all_breakpoints PARAMS ((SIM_DESC sd));
+
+
+/* Provide simulator with a default (global) host_callback_struct.
+ THIS PROCEDURE IS DEPRECIATED.
+ GDB and NRUN do not use this interface.
+ This procedure does not take a SIM_DESC argument as it is
+ used before sim_open. */
+
+void sim_set_callbacks PARAMS ((struct host_callback_struct *));
+
+
+/* Set the size of the simulator memory array.
+ THIS PROCEDURE IS DEPRECIATED.
+ GDB and NRUN do not use this interface.
+ This procedure does not take a SIM_DESC argument as it is
+ used before sim_open. */
+
+void sim_size PARAMS ((int i));
+
+
+/* Run a simulation with tracing enabled.
+ THIS PROCEDURE IS DEPRECIATED.
+ GDB and NRUN do not use this interface.
+ This procedure does not take a SIM_DESC argument as it is
+ used before sim_open. */
+
+int sim_trace PARAMS ((SIM_DESC sd));
+
+
+/* Configure the size of the profile buffer.
+ THIS PROCEDURE IS DEPRECIATED.
+ GDB and NRUN do not use this interface.
+ This procedure does not take a SIM_DESC argument as it is
+ used before sim_open. */
+
+void sim_set_profile_size PARAMS ((int n));
+
+
+/* Kill the running program.
+ THIS PROCEDURE IS DEPRECIATED.
+ GDB and NRUN do not use this interface.
+ This procedure will be replaced as part of the introduction of
+ multi-cpu simulators. */
+
+void sim_kill PARAMS ((SIM_DESC sd));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !defined (REMOTE_SIM_H) */
diff --git a/include/splay-tree.h b/include/splay-tree.h
new file mode 100644
index 0000000..e828fe7
--- /dev/null
+++ b/include/splay-tree.h
@@ -0,0 +1,116 @@
+/* A splay-tree datatype.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+ Contributed by Mark Mitchell (mark@markmitchell.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* For an easily readable description of splay-trees, see:
+
+ Lewis, Harry R. and Denenberg, Larry. Data Structures and Their
+ Algorithms. Harper-Collins, Inc. 1991.
+
+ The major feature of splay trees is that all basic tree operations
+ are amortized O(log n) time for a tree with n nodes. */
+
+#ifndef _SPLAY_TREE_H
+#define _SPLAY_TREE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include <ansidecl.h>
+
+/* Use typedefs for the key and data types to facilitate changing
+ these types, if necessary. These types should be sufficiently wide
+ that any pointer or scalar can be cast to these types, and then
+ cast back, without loss of precision. */
+typedef unsigned long int splay_tree_key;
+typedef unsigned long int splay_tree_value;
+
+/* Forward declaration for a node in the tree. */
+typedef struct splay_tree_node *splay_tree_node;
+
+/* The type of a function which compares two splay-tree keys. The
+ function should return values as for qsort. */
+typedef int (*splay_tree_compare_fn) PARAMS((splay_tree_key, splay_tree_key));
+
+/* The type of a function used to deallocate any resources associated
+ with the key. */
+typedef void (*splay_tree_delete_key_fn) PARAMS((splay_tree_key));
+
+/* The type of a function used to deallocate any resources associated
+ with the value. */
+typedef void (*splay_tree_delete_value_fn) PARAMS((splay_tree_value));
+
+/* The type of a function used to iterate over the tree. */
+typedef int (*splay_tree_foreach_fn) PARAMS((splay_tree_node, void*));
+
+/* The nodes in the splay tree. */
+struct splay_tree_node
+{
+ /* The key. */
+ splay_tree_key key;
+
+ /* The value. */
+ splay_tree_value value;
+
+ /* The left and right children, respectively. */
+ splay_tree_node left;
+ splay_tree_node right;
+};
+
+/* The splay tree itself. */
+typedef struct splay_tree
+{
+ /* The root of the tree. */
+ splay_tree_node root;
+
+ /* The comparision function. */
+ splay_tree_compare_fn comp;
+
+ /* The deallocate-key function. NULL if no cleanup is necessary. */
+ splay_tree_delete_key_fn delete_key;
+
+ /* The deallocate-value function. NULL if no cleanup is necessary. */
+ splay_tree_delete_value_fn delete_value;
+} *splay_tree;
+
+extern splay_tree splay_tree_new PARAMS((splay_tree_compare_fn,
+ splay_tree_delete_key_fn,
+ splay_tree_delete_value_fn));
+extern void splay_tree_delete PARAMS((splay_tree));
+extern void splay_tree_insert PARAMS((splay_tree,
+ splay_tree_key,
+ splay_tree_value));
+extern splay_tree_node splay_tree_lookup
+ PARAMS((splay_tree,
+ splay_tree_key));
+extern int splay_tree_foreach PARAMS((splay_tree,
+ splay_tree_foreach_fn,
+ void*));
+extern int splay_tree_compare_ints PARAMS((splay_tree_key,
+ splay_tree_key));
+extern int splay_tree_compare_pointers PARAMS((splay_tree_key,
+ splay_tree_key));
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* _SPLAY_TREE_H */
diff --git a/include/symcat.h b/include/symcat.h
new file mode 100644
index 0000000..01efada
--- /dev/null
+++ b/include/symcat.h
@@ -0,0 +1,40 @@
+/* Symbol concatenation utilities.
+
+ Copyright (C) 1998, Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef SYM_CAT_H
+#define SYM_CAT_H
+
+#if defined (__STDC__) || defined (ALMOST_STDC)
+#define CONCAT2(a,b) a##b
+#define CONCAT3(a,b,c) a##b##c
+#define CONCAT4(a,b,c,d) a##b##c##d
+#define STRINGX(s) #s
+#else
+#define CONCAT2(a,b) a/**/b
+#define CONCAT3(a,b,c) a/**/b/**/c
+#define CONCAT4(a,b,c,d) a/**/b/**/c/**/d
+#define STRINGX(s) "?"
+#endif
+
+#define XCONCAT2(a,b) CONCAT2(a,b)
+#define XCONCAT3(a,b,c) CONCAT3(a,b,c)
+#define XCONCAT4(a,b,c,d) CONCAT4(a,b,c,d)
+
+#define XSTRING(s) STRINGX(s)
+
+#endif SYM_CAT_H
diff --git a/include/wait.h b/include/wait.h
new file mode 100644
index 0000000..fa3c9cc
--- /dev/null
+++ b/include/wait.h
@@ -0,0 +1,63 @@
+/* Define how to access the int that the wait system call stores.
+ This has been compatible in all Unix systems since time immemorial,
+ but various well-meaning people have defined various different
+ words for the same old bits in the same old int (sometimes claimed
+ to be a struct). We just know it's an int and we use these macros
+ to access the bits. */
+
+/* The following macros are defined equivalently to their definitions
+ in POSIX.1. We fail to define WNOHANG and WUNTRACED, which POSIX.1
+ <sys/wait.h> defines, since our code does not use waitpid(). We
+ also fail to declare wait() and waitpid(). */
+
+#ifndef WIFEXITED
+#define WIFEXITED(w) (((w)&0377) == 0)
+#endif
+
+#ifndef WIFSIGNALED
+#define WIFSIGNALED(w) (((w)&0377) != 0177 && ((w)&~0377) == 0)
+#endif
+
+#ifndef WIFSTOPPED
+#ifdef IBM6000
+
+/* Unfortunately, the above comment (about being compatible in all Unix
+ systems) is not quite correct for AIX, sigh. And AIX 3.2 can generate
+ status words like 0x57c (sigtrap received after load), and gdb would
+ choke on it. */
+
+#define WIFSTOPPED(w) ((w)&0x40)
+
+#else
+#define WIFSTOPPED(w) (((w)&0377) == 0177)
+#endif
+#endif
+
+#ifndef WEXITSTATUS
+#define WEXITSTATUS(w) (((w) >> 8) & 0377) /* same as WRETCODE */
+#endif
+
+#ifndef WTERMSIG
+#define WTERMSIG(w) ((w) & 0177)
+#endif
+
+#ifndef WSTOPSIG
+#define WSTOPSIG WEXITSTATUS
+#endif
+
+/* These are not defined in POSIX, but are used by our programs. */
+
+#define WAITTYPE int
+
+#ifndef WCOREDUMP
+#define WCOREDUMP(w) (((w)&0200) != 0)
+#endif
+
+#ifndef WSETEXIT
+#define WSETEXIT(w,status) ((w) = (0 | ((status) << 8)))
+#endif
+
+#ifndef WSETSTOP
+#define WSETSTOP(w,sig) ((w) = (0177 | ((sig) << 8)))
+#endif
+