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author | Christoph Müllner <christoph.muellner@vrull.eu> | 2022-06-28 17:42:58 +0200 |
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committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2022-09-22 18:06:09 +0200 |
commit | fb1737381d886c7c0a4e870af078c473ac463fce (patch) | |
tree | f3b4d2a86f1085607c18b2554e85749a2627538d /include | |
parent | aaf3f3f3bb38a59125ea34afa0ef7e0e14c2e916 (diff) | |
download | fsf-binutils-gdb-fb1737381d886c7c0a4e870af078c473ac463fce.zip fsf-binutils-gdb-fb1737381d886c7c0a4e870af078c473ac463fce.tar.gz fsf-binutils-gdb-fb1737381d886c7c0a4e870af078c473ac463fce.tar.bz2 |
RISC-V: Add generic support for vendor extensions
This patch introduces changes that allow the integration of vendor ISA
extensions:
* Define a list of vendor extensions (riscv_supported_vendor_x_ext)
where vendor extensions can be added
* Introduce a section with a table in the documentation where vendor
extensions can be added
To add a vendor extension that consists of instructions only,
the following things need to be done:
* Add the extension to the riscv_supported_vendor_x_ext list
* Add lookup entry in riscv_multi_subset_supports
* Documenting the extension in c-riscv.texti
* Add test cases for all instructions
* Add MATCH*/MASK* constants and DECLARE_INSN() for all instructions
* Add new instruction class to enum riscv_insn_class
* Define the instructions in riscv_opcodes
* Additional changes if necessary (depending on the instructions)
Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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