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| author | Alex Coplan <alex.coplan@arm.com> | 2020-09-08 14:13:45 +0100 |
|---|---|---|
| committer | Alex Coplan <alex.coplan@arm.com> | 2020-09-08 14:14:11 +0100 |
| commit | 95830c988a648e55042f4999f1f6a06e0879e533 (patch) | |
| tree | c2af09d241b50395a615952b976cf2e95029407c /include | |
| parent | 7ba115508aa02ffbb01a09613b5dffdd0c6563e3 (diff) | |
| download | fsf-binutils-gdb-95830c988a648e55042f4999f1f6a06e0879e533.zip fsf-binutils-gdb-95830c988a648e55042f4999f1f6a06e0879e533.tar.gz fsf-binutils-gdb-95830c988a648e55042f4999f1f6a06e0879e533.tar.bz2 | |
aarch64: Add base support for Armv8-R
This patch adds the basic infrastructure needed to support Armv8-R in
AArch64 binutils: new command-line flags, new feature bits, a new BFD
architecture, and support for differentiating between architecture
variants in the disassembler.
The new command-line options added by this patch are -march=armv8-r in
GAS and -m aarch64:armv8-r in objdump.
The disassembler support is necessary since Armv8-R AArch64 introduces a
system register (VSCTLR_EL2) which shares an encoding with a different
system register (TTBR0_EL2) in Armv8-A. This also allows us to use the
correct preferred disassembly for the new DFB alias introduced in
Armv8-R.
bfd/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* archures.c (bfd_mach_aarch64_8R): New.
* bfd-in2.h: Regenerate.
* cpu-aarch64.c (bfd_aarch64_arch_v8_r): New.
(bfd_aarch64_arch_ilp32): Update tail pointer.
gas/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* config/tc-aarch64.c (aarch64_archs): Add armv8-r.
* doc/c-aarch64.texi: Document -march=armv8-r.
include/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_V8_A): New.
(AARCH64_FEATURE_V8_R): New.
(AARCH64_ARCH_V8): Include new A-profile feature bit.
(AARCH64_ARCH_V8_R): New.
opcodes/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* aarch64-dis.c (arch_variant): New.
(determine_disassembling_preference): Disassemble according to
arch variant.
(select_aarch64_variant): New.
(print_insn_aarch64): Set feature set.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 7 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 8 |
2 files changed, 14 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 62d8822..10a3c7d 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,10 @@ +2020-09-08 Alex Coplan <alex.coplan@arm.com> + + * opcode/aarch64.h (AARCH64_FEATURE_V8_A): New. + (AARCH64_FEATURE_V8_R): New. + (AARCH64_ARCH_V8): Include new A-profile feature bit. + (AARCH64_ARCH_V8_R): New. + 2020-09-02 Alan Modra <amodra@gmail.com> * opcode/v850.h (struct v850_operand <insert>): Make param op an diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 5122ea8..85f4fb5 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -40,6 +40,7 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_V8 (1ULL << 0) /* All processors. */ #define AARCH64_FEATURE_V8_6 (1ULL << 1) /* ARMv8.6 processors. */ #define AARCH64_FEATURE_BFLOAT16 (1ULL << 2) /* Bfloat16 insns. */ +#define AARCH64_FEATURE_V8_A (1ULL << 3) /* Armv8-A processors. */ #define AARCH64_FEATURE_SVE2 (1ULL << 4) /* SVE2 instructions. */ #define AARCH64_FEATURE_V8_2 (1ULL << 5) /* ARMv8.2 processors. */ #define AARCH64_FEATURE_V8_3 (1ULL << 6) /* ARMv8.3 processors. */ @@ -48,6 +49,7 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_SVE2_SM4 (1ULL << 9) #define AARCH64_FEATURE_SVE2_SHA3 (1ULL << 10) #define AARCH64_FEATURE_V8_4 (1ULL << 11) /* ARMv8.4 processors. */ +#define AARCH64_FEATURE_V8_R (1ULL << 12) /* Armv8-R processors. */ #define AARCH64_FEATURE_FP (1ULL << 17) /* FP instructions. */ #define AARCH64_FEATURE_SIMD (1ULL << 18) /* SIMD instructions. */ #define AARCH64_FEATURE_CRC (1ULL << 19) /* CRC instructions. */ @@ -90,7 +92,8 @@ typedef uint32_t aarch64_insn; /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ - AARCH64_FEATURE_FP \ + AARCH64_FEATURE_V8_A \ + | AARCH64_FEATURE_FP \ | AARCH64_FEATURE_SIMD) #define AARCH64_ARCH_V8_1 AARCH64_FEATURE (AARCH64_ARCH_V8, \ AARCH64_FEATURE_CRC \ @@ -125,6 +128,9 @@ typedef uint32_t aarch64_insn; AARCH64_FEATURE_V8_6 \ | AARCH64_FEATURE_BFLOAT16 \ | AARCH64_FEATURE_I8MM) +#define AARCH64_ARCH_V8_R (AARCH64_FEATURE (AARCH64_ARCH_V8_4, \ + AARCH64_FEATURE_V8_R) \ + & ~(AARCH64_FEATURE_V8_A | AARCH64_FEATURE_LOR)) #define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) #define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */ |