RISC-V: Add support for arbitrary immediate encoding formats

This patch introduces support for arbitrary signed or unsigned immediate
encoding formats. The formats have the form "XsN@S" and "XuN@S" with N
being the number of bits and S the LSB position.

For example an immediate field of 5 bytes that encodes a signed value
and is stored in the bits 24-20 of the instruction word can use the
format specifier "Xs5@20".

Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

1 files changed, 17 insertions, 0 deletions

diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 6fdc9c9..faef28a 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -60,6 +60,7 @@ static const char * const riscv_pred_succ[16] =
 
 #define RV_X(x, s, n)  (((x) >> (s)) & ((1 << (n)) - 1))
 #define RV_IMM_SIGN(x) (-(((x) >> 31) & 1))
+#define RV_X_SIGNED(x, s, n) (RV_X(x, s, n) | ((-(RV_X(x, (s + n - 1), 1))) << (n)))
 
 #define EXTRACT_ITYPE_IMM(x) \
   (RV_X(x, 20, 12) | (RV_IMM_SIGN(x) << 12))
@@ -347,6 +348,22 @@ static const char * const riscv_pred_succ[16] =
 #define EXTRACT_OPERAND(FIELD, INSN) \
   EXTRACT_BITS ((INSN), OP_MASK_##FIELD, OP_SH_##FIELD)
 
+/* Extract an unsigned immediate operand on position s with n bits.  */
+#define EXTRACT_U_IMM(n, s, l) \
+  RV_X (l, s, n)
+
+/* Extract an signed immediate operand on position s with n bits.  */
+#define EXTRACT_S_IMM(n, s, l) \
+  RV_X_SIGNED (l, s, n)
+
+/* Validate that unsigned n-bit immediate is within bounds.  */
+#define VALIDATE_U_IMM(v, n) \
+  ((unsigned long) v < (1UL << n))
+
+/* Validate that signed n-bit immediate is within bounds.  */
+#define VALIDATE_S_IMM(v, n) \
+  (v < (long) (1UL << (n-1)) && v >= -(offsetT) (1UL << (n-1)))
+
 /* The maximal number of subset can be required.  */
 #define MAX_SUBSET_NUM 4