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authorRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:01 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:01 +0100
commit78addeae5315886ffcb86c8610c71a6f7fc13abd (patch)
treef299c70b98f4e4d840f951d6ce5677bc7dfd2abe /include
parent8d17c53b8dfc23b456e30c8f21d46dbcd55324ae (diff)
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aarch64: Add sme-i16i64 and sme-f64f64 aliases
Most extension flags are named after the associated architectural FEAT_* flags, but sme-i64 and sme-f64 were exceptions. This patch adds sme-i16i64 and sme-f64f64 aliases, but keeps the old names too for compatibility.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/aarch64.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 40b2fdb..d0a0b62 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -96,8 +96,8 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_F64MM (1ULL << 54)
#define AARCH64_FEATURE_FLAGM (1ULL << 55) /* v8.4 Flag Manipulation. */
#define AARCH64_FEATURE_V9 (1ULL << 56) /* Armv9.0-A processors. */
-#define AARCH64_FEATURE_SME_F64 (1ULL << 57) /* SME F64. */
-#define AARCH64_FEATURE_SME_I64 (1ULL << 58) /* SME I64. */
+#define AARCH64_FEATURE_SME_F64F64 (1ULL << 57) /* SME F64F64. */
+#define AARCH64_FEATURE_SME_I16I64 (1ULL << 58) /* SME I16I64. */
#define AARCH64_FEATURE_V8_8 (1ULL << 59) /* Armv8.8 processors. */
#define AARCH64_FEATURE_CSSC (1ULL << 60) /* Common Short Sequence Compression instructions. */