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authorClaudiu Zissulescu <claziss@synopsys.com>2017-02-06 11:26:13 +0100
committerClaudiu Zissulescu <claziss@synopsys.com>2017-02-06 11:26:13 +0100
commit6ec7c1ae19e9e1bf2edad5125941a2fd5fdfde0b (patch)
tree2618ac0c1711a72e5ad9151057af06ad140e9cd0 /include
parent20b477a75c00de06a92b9577fd74416699d2c37f (diff)
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[ARC] Provide an interface to decode ARC instructions.
gas/ 2017-02-06 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (parse_opcode_flags): Ignore implicit flags. include/ 2017-02-06 Claudiu Zissulescu <claziss@synopsys.com> Anton Kolesov <anton.kolesov@synopsys.com> * opcode/arc.h (insn_class_t): Add ENTER, LEAVE, POP, PUSH, BBIT0, BBIT1, BI, BIH, BRCC, EI, JLI, and SUB instruction classes. (flag_class_t): Add F_CLASS_WB, F_CLASS_ZZ, and F_CLASS_IMPLICIT flag classes. opcode/ 2017-02-06 Claudiu Zissulescu <claziss@synopsys.com> Anton Kolesov <anton.kolesov@synopsys.com> * arc-dis.c (arc_disassemble_info): New structure. (init_arc_disasm_info): New function. (find_format_from_table): Ignore implicit flags. (find_format): Update dissassembler private data. (print_flags): Likewise. (print_insn_arc): Likewise. (arc_opcode_to_insn_type): Consider the new added instruction classes. (arcAnalyzeInstr): Remove. (arc_insn_decode): New function. * arc-dis.h (arc_ldst_writeback_mode): New enum. (arc_ldst_data_size): Likewise. (arc_condition_code): Likewise. (arc_operand_kind): Likewise. (arc_insn_kind): New struct. (arc_instruction): Likewise. (arc_insn_decode): Declare function. (ARC_Debugger_OperandType): Deleted. (Flow): Likewise. (NullifyMode): Likewise. (allOperandsSize): Likewise. (arcDisState): Likewise. (arcAnalyzeInstr): Likewise. * arc-dis.c (arc_opcode_to_insn_type): Handle newly introduced insn_class_t enums. * arc-opc.c (F_SIZED): New define. (C_CC_EQ, C_CC_GE, C_CC_GT, C_CC_HI, C_CC_HS): Likewise. (C_CC_LE, C_CC_LO, C_CC_LS, C_CC_LT, C_CC_NE): Likewise. (C_CC_NE, C_AA_AB, C_AA_AW, C_ZZ_D, C_ZZ_H, C_ZZ_B): Likewise. (arc_flag_classes): Add F_CLASS_COND/F_CLASS_IMPLICIT flags. * opcodes/arc-tbl.h: Update instructions to include new F_CLASS_IMPLICIT flags. (bbit0, lp): Change class. (bbit1, bi, bih, br*, ei_s, jli_s): Likewsie
Diffstat (limited to 'include')
-rw-r--r--include/opcode/arc.h24
1 files changed, 23 insertions, 1 deletions
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index 859bb9f..f263fff 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -42,27 +42,40 @@ typedef enum
ACL,
ARITH,
AUXREG,
+ BBIT0,
+ BBIT1,
+ BI,
+ BIH,
BITOP,
BITSTREAM,
BMU,
BRANCH,
+ BRCC,
CONTROL,
DIVREM,
DPI,
DSP,
+ EI,
+ ENTER,
FLOAT,
INVALID,
+ JLI,
JUMP,
KERNEL,
+ LEAVE,
LOAD,
LOGICAL,
+ LOOP,
MEMORY,
MOVE,
MPY,
NET,
PROTOCOL_DECODE,
PMU,
+ POP,
+ PUSH,
STORE,
+ SUB,
XY
} insn_class_t;
@@ -111,7 +124,16 @@ typedef enum
F_CLASS_EXTEND = (1 << 2),
/* Condition code flag. */
- F_CLASS_COND = (1 << 3)
+ F_CLASS_COND = (1 << 3),
+
+ /* Write back mode. */
+ F_CLASS_WB = (1 << 4),
+
+ /* Data size. */
+ F_CLASS_ZZ = (1 << 5),
+
+ /* Implicit flag. */
+ F_CLASS_IMPLICIT = (1 << 6)
} flag_class_t;
/* The opcode table is an array of struct arc_opcode. */