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| author | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-11-15 13:48:59 +0000 |
|---|---|---|
| committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-01-09 10:16:40 +0000 |
| commit | 2ec6065a4f3fe95d287602cb9158a7ce1fbed2e9 (patch) | |
| tree | 6eafa4f4b744872bf4180b6a7109ccf57d9d9e85 /include | |
| parent | 7b08cc32165912395838e7bb995d880f623fe636 (diff) | |
| download | fsf-binutils-gdb-2ec6065a4f3fe95d287602cb9158a7ce1fbed2e9.zip fsf-binutils-gdb-2ec6065a4f3fe95d287602cb9158a7ce1fbed2e9.tar.gz fsf-binutils-gdb-2ec6065a4f3fe95d287602cb9158a7ce1fbed2e9.tar.bz2 | |
aarch64: Expand maximum number of operands from 5 to 6
Given the introduction of the new Armv9.4-a `sysp' insn using the
following syntax:
sysp #<op1>, <Cn>, <Cm>, #<op2>{, <Xt1>, <Xt2>}
and by extension the need to encode 6 assembly operands, extend
Binutils to handle instructions taking 6 operands, up from a previous
maximum of 5.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/aarch64.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 7b7b15a..554e4e1 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -1075,7 +1075,7 @@ enum err_type }; /* Maximum number of operands an instruction can have. */ -#define AARCH64_MAX_OPND_NUM 6 +#define AARCH64_MAX_OPND_NUM 7 /* Maximum number of qualifier sequences an instruction can have. */ #define AARCH64_MAX_QLF_SEQ_NUM 10 /* Operand qualifier typedef; optimized for the size. */ |