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authorMaciej W. Rozycki <macro@linux-mips.org>2011-10-24 14:21:41 +0000
committerMaciej W. Rozycki <macro@linux-mips.org>2011-10-24 14:21:41 +0000
commit26f85d7a30c095103c3f7a3b4d28ebfb5d490df1 (patch)
tree9aba9dafd5efffcfd570ad6180412a596bd30608 /include
parent72671e620113eb702de6b57381cc67e8ed75213e (diff)
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* mips.h: Fix a typo in description.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/mips.h2
2 files changed, 5 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 8f070a1..b0125ed 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * mips.h: Fix a typo in description.
+
2011-09-21 David S. Miller <davem@davemloft.net>
* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index e6703f8..a94860f 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1616,7 +1616,7 @@ extern const int bfd_mips16_num_opcodes;
"c" 10-bit higher breakpoint code (MICROMIPSOP_*_CODE)
"d" 5-bit destination register specifier (MICROMIPSOP_*_RD)
"h" 5-bit PREFX hint (MICROMIPSOP_*_PREFX)
- "i" 16 bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE)
+ "i" 16-bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE)
"j" 16-bit signed immediate (MICROMIPSOP_*_DELTA)
"k" 5-bit cache opcode in target register position (MICROMIPSOP_*_CACHE)
"n" register list for 32-bit LWM/SWM instruction (MICROMIPSOP_*_RT)