diff options
author | Fred Fish <fnf@specifix.com> | 2005-01-19 23:29:12 +0000 |
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committer | Fred Fish <fnf@specifix.com> | 2005-01-19 23:29:12 +0000 |
commit | dc9a9f39cc1454a6627d1a06e455cbef68979b18 (patch) | |
tree | 5afcff69be65e802f24cfba2054d93e66a22d365 /include/opcode | |
parent | b4f61ddf3aec45d33b3a4ee1637046e409993730 (diff) | |
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2005-01-19 Fred Fish <fnf@specifixinc.com>
* mips.h (struct mips_opcode): Add new pinfo2 member.
(INSN_ALIAS): New define for opcode table entries that are
specific instances of another entry, such as 'move' for an 'or'
with a zero operand.
(INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
(INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
Diffstat (limited to 'include/opcode')
-rw-r--r-- | include/opcode/ChangeLog | 9 | ||||
-rw-r--r-- | include/opcode/mips.h | 16 |
2 files changed, 21 insertions, 4 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 1927431..ae60f33 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,12 @@ +2005-01-19 Fred Fish <fnf@specifixinc.com> + + * mips.h (struct mips_opcode): Add new pinfo2 member. + (INSN_ALIAS): New define for opcode table entries that are + specific instances of another entry, such as 'move' for an 'or' + with a zero operand. + (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2. + (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4. + 2004-12-09 Ian Lance Taylor <ian@wasabisystems.com> * mips.h (CPU_RM9000): Define. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 8d7283e..cde6199 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -192,6 +192,8 @@ struct mips_opcode of bits describing the instruction, notably any relevant hazard information. */ unsigned long pinfo; + /* A collection of additional bits describing the instruction. */ + unsigned long pinfo2; /* A collection of bits describing the instruction sets of which this instruction or macro is a member. */ unsigned long membership; @@ -376,10 +378,16 @@ struct mips_opcode #define INSN_MULT 0x40000000 /* Instruction synchronize shared memory. */ #define INSN_SYNC 0x80000000 -/* Instruction reads MDMX accumulator. XXX FIXME: No bits left! */ -#define INSN_READ_MDMX_ACC 0 -/* Instruction writes MDMX accumulator. XXX FIXME: No bits left! */ -#define INSN_WRITE_MDMX_ACC 0 + +/* These are the bits which may be set in the pinfo2 field of an + instruction. */ + +/* Instruction is a simple alias (I.E. "move" for daddu/addu/or) */ +#define INSN_ALIAS 0x00000001 +/* Instruction reads MDMX accumulator. */ +#define INSN_READ_MDMX_ACC 0x00000002 +/* Instruction writes MDMX accumulator. */ +#define INSN_WRITE_MDMX_ACC 0x00000004 /* Instruction is actually a macro. It should be ignored by the disassembler, and requires special treatment by the assembler. */ |