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| author | Luis Machado <luis.machado@linaro.org> | 2021-11-11 17:22:50 -0300 |
|---|---|---|
| committer | Luis Machado <luis.machado@linaro.org> | 2021-11-15 16:00:01 -0300 |
| commit | 37989733d8a8fe6ea13a82ec22272255e0702938 (patch) | |
| tree | 8d32012d17f3e3cbfa4b15a88eaa0e2f145716ab /gdb | |
| parent | 345bd07cce33565f1cd66acabdaf387ca3a7ccb3 (diff) | |
| download | fsf-binutils-gdb-37989733d8a8fe6ea13a82ec22272255e0702938.zip fsf-binutils-gdb-37989733d8a8fe6ea13a82ec22272255e0702938.tar.gz fsf-binutils-gdb-37989733d8a8fe6ea13a82ec22272255e0702938.tar.bz2 | |
Extend the prologue analyzer to handle the bti instruction
Handle the BTI instruction in the prologue analyzer. The patch handles all
the variations of the BTI instruction.
Diffstat (limited to 'gdb')
| -rw-r--r-- | gdb/aarch64-tdep.c | 36 | ||||
| -rw-r--r-- | gdb/arch/aarch64-insn.h | 5 |
2 files changed, 41 insertions, 0 deletions
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 392110a..31d239b 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -516,6 +516,9 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch, /* Return addresses are not mangled. */ ra_state_val = 0; } + else if (IS_BTI (insn)) + /* We don't need to do anything special for a BTI instruction. */ + continue; else { aarch64_debug_printf ("prologue analysis gave up addr=%s" @@ -870,6 +873,39 @@ aarch64_analyze_prologue_test (void) SELF_CHECK (cache.saved_regs[regnum].is_value ()); } } + + /* Test a prologue with a BTI instruction. */ + { + static const uint32_t insns[] = { + 0xd503245f, /* bti */ + 0xa9bd7bfd, /* stp x29, x30, [sp, #-48]! */ + 0x910003fd, /* mov x29, sp */ + 0xf801c3f3, /* str x19, [sp, #28] */ + 0xb9401fa0, /* ldr x19, [x29, #28] */ + }; + instruction_reader_test reader (insns); + + trad_frame_reset_saved_regs (gdbarch, cache.saved_regs); + CORE_ADDR end = aarch64_analyze_prologue (gdbarch, 0, 128, &cache, + reader); + + SELF_CHECK (end == 4 * 4); + SELF_CHECK (cache.framereg == AARCH64_FP_REGNUM); + SELF_CHECK (cache.framesize == 48); + + for (int i = 0; i < AARCH64_X_REGISTER_COUNT; i++) + { + if (i == 19) + SELF_CHECK (cache.saved_regs[i].addr () == -20); + else if (i == AARCH64_FP_REGNUM) + SELF_CHECK (cache.saved_regs[i].addr () == -48); + else if (i == AARCH64_LR_REGNUM) + SELF_CHECK (cache.saved_regs[i].addr () == -40); + else + SELF_CHECK (cache.saved_regs[i].is_realreg () + && cache.saved_regs[i].realreg () == i); + } + } } } // namespace selftests #endif /* GDB_SELF_TEST */ diff --git a/gdb/arch/aarch64-insn.h b/gdb/arch/aarch64-insn.h index 6f9ec85..a05a607 100644 --- a/gdb/arch/aarch64-insn.h +++ b/gdb/arch/aarch64-insn.h @@ -42,6 +42,11 @@ extern bool aarch64_debug; #define sbits(obj,st,fn) \ ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st)))) +/* Prologue analyzer helper macros. */ + +/* Is the instruction "bti"? */ +#define IS_BTI(instruction) ((instruction & 0xffffff3f) == 0xd503241f) + /* List of opcodes that we need for building the jump pad and relocating an instruction. */ |