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| author | Ulrich Weigand <uweigand@de.ibm.com> | 2007-10-21 12:24:34 +0000 |
|---|---|---|
| committer | Ulrich Weigand <uweigand@de.ibm.com> | 2007-10-21 12:24:34 +0000 |
| commit | c641edccb51ab8d4e86edd22b7098cad30a4452f (patch) | |
| tree | 75a701cd84b14fa3a56760eb7e3f9ca498e91325 /gdb/testsuite | |
| parent | 430ebac964f04c38633f64eea383f07b118712ec (diff) | |
| download | fsf-binutils-gdb-c641edccb51ab8d4e86edd22b7098cad30a4452f.zip fsf-binutils-gdb-c641edccb51ab8d4e86edd22b7098cad30a4452f.tar.gz fsf-binutils-gdb-c641edccb51ab8d4e86edd22b7098cad30a4452f.tar.bz2 | |
* gdb.arch/altivec-regs.exp (decimal_vector): Adjust for output
format changes.
Diffstat (limited to 'gdb/testsuite')
| -rw-r--r-- | gdb/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gdb/testsuite/gdb.arch/altivec-regs.exp | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index e869baf..7f1a5e9 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2007-10-21 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * gdb.arch/altivec-regs.exp (decimal_vector): Adjust for output + format changes. + 2007-10-18 Michael Snyder <msnyder@specifix.com> * gdb.base/dbx.exp: Add missing "-re " operator. diff --git a/gdb/testsuite/gdb.arch/altivec-regs.exp b/gdb/testsuite/gdb.arch/altivec-regs.exp index 8b6e8c6..2e723e2 100644 --- a/gdb/testsuite/gdb.arch/altivec-regs.exp +++ b/gdb/testsuite/gdb.arch/altivec-regs.exp @@ -124,9 +124,9 @@ gdb_test "info reg vscr" "vscr.*0x1\t1" "info reg vscr" # the way gdb works. if {$endianness == "big"} { - set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = .0 '.0', 0 '.0', 0 '.0', 1 '.001', 0 '.0', 0 '.0', 0 '.0', 1 '.001', 0 '.0', 0 '.0', 0 '.0', 1 '.001', 0 '.0', 0 '.0', 0 '.0', 1 '.001'.." + set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = .0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1.." } else { - set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = .1 '.001', 0 '.0', 0 '.0', 0 '.0', 1 '.001', 0 '.0', 0 '.0', 0 '.0', 1 '.001', 0 '.0', 0 '.0', 0 '.0', 1 '.001', 0 '.0', 0 '.0'.." + set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = .1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0.." } for {set i 0} {$i < 32} {incr i 1} { |