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author | Daniel Jacobowitz <drow@false.org> | 2007-02-26 19:18:53 +0000 |
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committer | Daniel Jacobowitz <drow@false.org> | 2007-02-26 19:18:53 +0000 |
commit | ff6f572f8b0a1f60246f90683e51635744cb7d36 (patch) | |
tree | 767f7558e45be55165f29ab8de8da80163f9469e /gdb/testsuite/gdb.arch | |
parent | 45d3b878abeec9aba15bde906804909c480fbb6f (diff) | |
download | fsf-binutils-gdb-ff6f572f8b0a1f60246f90683e51635744cb7d36.zip fsf-binutils-gdb-ff6f572f8b0a1f60246f90683e51635744cb7d36.tar.gz fsf-binutils-gdb-ff6f572f8b0a1f60246f90683e51635744cb7d36.tar.bz2 |
* arm-tdep.c (arm_scan_prologue): Do not record FPA register saves
if there are no FPA registers.
(arm_dwarf_reg_to_regnum): New function.
(arm_register_type, arm_register_name): Return minimal values for
unsupported registers.
(arm_register_sim_regno): Handle iWMMXt registers.
(arm_gdbarch_init): Record missing FPA registers if indicated by
a target description. Recognize iWMMXt registers. Only register
"info float" for FPA. Use ARM_NUM_REGS. Register
arm_dwarf_reg_to_regnum.
* arm-tdep.h (enum gdb_regnum): Add ARM_NUM_REGS and iWMMXt
constants.
(struct gdbarch_tdep): Add have_fpa_registers.
* features/xscale-iwmmxt.xml: Update capitalization.
* regformats/arm-with-iwmmxt.dat: Regenerated.
* src/gdb/doc/gdb.texinfo (Standard Target Features): Mention
case insensitivity.
(ARM Features): Describe org.gnu.gdb.xscale.iwmmxt.
* gdb.arch/iwmmxt-regs.c, gdb.arch/iwmmxt-regs.exp: Update
register capitalization.
Diffstat (limited to 'gdb/testsuite/gdb.arch')
-rw-r--r-- | gdb/testsuite/gdb.arch/iwmmxt-regs.c | 88 | ||||
-rw-r--r-- | gdb/testsuite/gdb.arch/iwmmxt-regs.exp | 22 |
2 files changed, 55 insertions, 55 deletions
diff --git a/gdb/testsuite/gdb.arch/iwmmxt-regs.c b/gdb/testsuite/gdb.arch/iwmmxt-regs.c index 9c30570..534fd16 100644 --- a/gdb/testsuite/gdb.arch/iwmmxt-regs.c +++ b/gdb/testsuite/gdb.arch/iwmmxt-regs.c @@ -22,57 +22,57 @@ void read_regs (unsigned long long regs[16], unsigned long control_regs[6]) { - asm volatile ("wstrd wr0, %0" : "=m" (regs[0])); - asm volatile ("wstrd wr1, %0" : "=m" (regs[1])); - asm volatile ("wstrd wr2, %0" : "=m" (regs[2])); - asm volatile ("wstrd wr3, %0" : "=m" (regs[3])); - asm volatile ("wstrd wr4, %0" : "=m" (regs[4])); - asm volatile ("wstrd wr5, %0" : "=m" (regs[5])); - asm volatile ("wstrd wr6, %0" : "=m" (regs[6])); - asm volatile ("wstrd wr7, %0" : "=m" (regs[7])); - asm volatile ("wstrd wr8, %0" : "=m" (regs[8])); - asm volatile ("wstrd wr9, %0" : "=m" (regs[9])); - asm volatile ("wstrd wr10, %0" : "=m" (regs[10])); - asm volatile ("wstrd wr11, %0" : "=m" (regs[11])); - asm volatile ("wstrd wr12, %0" : "=m" (regs[12])); - asm volatile ("wstrd wr13, %0" : "=m" (regs[13])); - asm volatile ("wstrd wr14, %0" : "=m" (regs[14])); - asm volatile ("wstrd wr15, %0" : "=m" (regs[15])); + asm volatile ("wstrd wR0, %0" : "=m" (regs[0])); + asm volatile ("wstrd wR1, %0" : "=m" (regs[1])); + asm volatile ("wstrd wR2, %0" : "=m" (regs[2])); + asm volatile ("wstrd wR3, %0" : "=m" (regs[3])); + asm volatile ("wstrd wR4, %0" : "=m" (regs[4])); + asm volatile ("wstrd wR5, %0" : "=m" (regs[5])); + asm volatile ("wstrd wR6, %0" : "=m" (regs[6])); + asm volatile ("wstrd wR7, %0" : "=m" (regs[7])); + asm volatile ("wstrd wR8, %0" : "=m" (regs[8])); + asm volatile ("wstrd wR9, %0" : "=m" (regs[9])); + asm volatile ("wstrd wR10, %0" : "=m" (regs[10])); + asm volatile ("wstrd wR11, %0" : "=m" (regs[11])); + asm volatile ("wstrd wR12, %0" : "=m" (regs[12])); + asm volatile ("wstrd wR13, %0" : "=m" (regs[13])); + asm volatile ("wstrd wR14, %0" : "=m" (regs[14])); + asm volatile ("wstrd wR15, %0" : "=m" (regs[15])); - asm volatile ("wstrw wcssf, %0" : "=m" (control_regs[0])); - asm volatile ("wstrw wcasf, %0" : "=m" (control_regs[1])); - asm volatile ("wstrw wcgr0, %0" : "=m" (control_regs[2])); - asm volatile ("wstrw wcgr1, %0" : "=m" (control_regs[3])); - asm volatile ("wstrw wcgr2, %0" : "=m" (control_regs[4])); - asm volatile ("wstrw wcgr3, %0" : "=m" (control_regs[5])); + asm volatile ("wstrw wCSSF, %0" : "=m" (control_regs[0])); + asm volatile ("wstrw wCASF, %0" : "=m" (control_regs[1])); + asm volatile ("wstrw wCGR0, %0" : "=m" (control_regs[2])); + asm volatile ("wstrw wCGR1, %0" : "=m" (control_regs[3])); + asm volatile ("wstrw wCGR2, %0" : "=m" (control_regs[4])); + asm volatile ("wstrw wCGR3, %0" : "=m" (control_regs[5])); } void write_regs (unsigned long long regs[16], unsigned long control_regs[6]) { - asm volatile ("wldrd wr0, %0" : : "m" (regs[0])); - asm volatile ("wldrd wr1, %0" : : "m" (regs[1])); - asm volatile ("wldrd wr2, %0" : : "m" (regs[2])); - asm volatile ("wldrd wr3, %0" : : "m" (regs[3])); - asm volatile ("wldrd wr4, %0" : : "m" (regs[4])); - asm volatile ("wldrd wr5, %0" : : "m" (regs[5])); - asm volatile ("wldrd wr6, %0" : : "m" (regs[6])); - asm volatile ("wldrd wr7, %0" : : "m" (regs[7])); - asm volatile ("wldrd wr8, %0" : : "m" (regs[8])); - asm volatile ("wldrd wr9, %0" : : "m" (regs[9])); - asm volatile ("wldrd wr10, %0" : : "m" (regs[10])); - asm volatile ("wldrd wr11, %0" : : "m" (regs[11])); - asm volatile ("wldrd wr12, %0" : : "m" (regs[12])); - asm volatile ("wldrd wr13, %0" : : "m" (regs[13])); - asm volatile ("wldrd wr14, %0" : : "m" (regs[14])); - asm volatile ("wldrd wr15, %0" : : "m" (regs[15])); + asm volatile ("wldrd wR0, %0" : : "m" (regs[0])); + asm volatile ("wldrd wR1, %0" : : "m" (regs[1])); + asm volatile ("wldrd wR2, %0" : : "m" (regs[2])); + asm volatile ("wldrd wR3, %0" : : "m" (regs[3])); + asm volatile ("wldrd wR4, %0" : : "m" (regs[4])); + asm volatile ("wldrd wR5, %0" : : "m" (regs[5])); + asm volatile ("wldrd wR6, %0" : : "m" (regs[6])); + asm volatile ("wldrd wR7, %0" : : "m" (regs[7])); + asm volatile ("wldrd wR8, %0" : : "m" (regs[8])); + asm volatile ("wldrd wR9, %0" : : "m" (regs[9])); + asm volatile ("wldrd wR10, %0" : : "m" (regs[10])); + asm volatile ("wldrd wR11, %0" : : "m" (regs[11])); + asm volatile ("wldrd wR12, %0" : : "m" (regs[12])); + asm volatile ("wldrd wR13, %0" : : "m" (regs[13])); + asm volatile ("wldrd wR14, %0" : : "m" (regs[14])); + asm volatile ("wldrd wR15, %0" : : "m" (regs[15])); - asm volatile ("wldrw wcssf, %0" : : "m" (control_regs[0])); - asm volatile ("wldrw wcasf, %0" : : "m" (control_regs[1])); - asm volatile ("wldrw wcgr0, %0" : : "m" (control_regs[2])); - asm volatile ("wldrw wcgr1, %0" : : "m" (control_regs[3])); - asm volatile ("wldrw wcgr2, %0" : : "m" (control_regs[4])); - asm volatile ("wldrw wcgr3, %0" : : "m" (control_regs[5])); + asm volatile ("wldrw wCSSF, %0" : : "m" (control_regs[0])); + asm volatile ("wldrw wCASF, %0" : : "m" (control_regs[1])); + asm volatile ("wldrw wCGR0, %0" : : "m" (control_regs[2])); + asm volatile ("wldrw wCGR1, %0" : : "m" (control_regs[3])); + asm volatile ("wldrw wCGR2, %0" : : "m" (control_regs[4])); + asm volatile ("wldrw wCGR3, %0" : : "m" (control_regs[5])); } int diff --git a/gdb/testsuite/gdb.arch/iwmmxt-regs.exp b/gdb/testsuite/gdb.arch/iwmmxt-regs.exp index c040157..81db215 100644 --- a/gdb/testsuite/gdb.arch/iwmmxt-regs.exp +++ b/gdb/testsuite/gdb.arch/iwmmxt-regs.exp @@ -47,32 +47,32 @@ if ![runto_main] then { # Set all the registers to arbitrary values. for {set i 0} {$i < 16} {incr i 1} { - gdb_test "set \$wr$i.u64 = ((${i}LL << 32) | ${i})" "" "set reg wr$i" + gdb_test "set \$wR$i.u64 = ((${i}LL << 32) | ${i})" "" "set reg wR$i" } -gdb_test "set \$wcssf = 300" "" "set reg wcssf" -gdb_test "set \$wcasf = 200" "" "set reg wcasf" +gdb_test "set \$wCSSF = 300" "" "set reg wCSSF" +gdb_test "set \$wCASF = 200" "" "set reg wCASF" for {set i 0} {$i < 4} {incr i 1} { - gdb_test "set \$wcgr$i = 100 + $i" "" "set reg wcgr$i" + gdb_test "set \$wCGR$i = 100 + $i" "" "set reg wCGR$i" } # See if the sets stuck. gdb_test "next" ".*write_regs.*" "next over read_regs" for {set i 0} {$i < 16} {incr i 1} { - gdb_test "p \$wr$i.u64 == ((${i}LL << 32) | ${i})" "\\\$$decimal = 1" "test reg wr$i" + gdb_test "p \$wR$i.u64 == ((${i}LL << 32) | ${i})" "\\\$$decimal = 1" "test reg wR$i" } -# Don't test wcssf. -gdb_test "p \$wcasf" "\\\$$decimal = 200" "test reg wcasf" +# Don't test wCSSF. +gdb_test "p \$wCASF" "\\\$$decimal = 200" "test reg wCASF" for {set i 0} {$i < 4} {incr i 1} { - gdb_test "p \$wcgr$i == 100 + $i" "\\\$$decimal = 1" "test reg wcgr$i" + gdb_test "p \$wCGR$i == 100 + $i" "\\\$$decimal = 1" "test reg wCGR$i" } # Also verify the copies read by the target. for {set i 0} {$i < 16} {incr i 1} { - gdb_test "p regs\[$i\] == ((${i}LL << 32) | ${i})" "\\\$$decimal = 1" "test stored wr$i" + gdb_test "p regs\[$i\] == ((${i}LL << 32) | ${i})" "\\\$$decimal = 1" "test stored wR$i" } # Don't test wcssf. -gdb_test "p control_regs\[1\]" "\\\$$decimal = 200" "test stored wcasf" +gdb_test "p control_regs\[1\]" "\\\$$decimal = 200" "test stored wCASF" for {set i 0} {$i < 4} {incr i 1} { - gdb_test "p control_regs\[$i + 2\] == 100 + $i" "\\\$$decimal = 1" "test stored wcgr$i" + gdb_test "p control_regs\[$i + 2\] == 100 + $i" "\\\$$decimal = 1" "test stored wCGR$i" } |