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authorTom Tromey <tromey@adacore.com>2022-05-03 08:18:14 -0600
committerTom Tromey <tromey@adacore.com>2022-06-14 09:08:29 -0600
commite73434e38f55e21cc33457ce3b218fa7b4592fec (patch)
treee3e443b6bbd889dc8cc9ff321a946a09052dbdd4 /gdb/ravenscar-thread.h
parent2808125fbb5f9c55f52e863283b7f1c5f0ef1a65 (diff)
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Reimplement ravenscar registers using tables
Currently, the ravenscar-thread implementation for each architecture is written by hand. However, these are actually written by copy-paste. It seems better to switch to a table-driven approach. The previous code also fetched all registers whenever any register was requested. This is corrected in the new implementation.
Diffstat (limited to 'gdb/ravenscar-thread.h')
-rw-r--r--gdb/ravenscar-thread.h42
1 files changed, 39 insertions, 3 deletions
diff --git a/gdb/ravenscar-thread.h b/gdb/ravenscar-thread.h
index df75066..5d5661f 100644
--- a/gdb/ravenscar-thread.h
+++ b/gdb/ravenscar-thread.h
@@ -24,12 +24,48 @@
struct ravenscar_arch_ops
{
- virtual ~ravenscar_arch_ops ()
+ ravenscar_arch_ops (gdb::array_view<const int> offsets_,
+ int first_stack = -1,
+ int last_stack = -1)
+ : offsets (offsets_),
+ first_stack_register (first_stack),
+ last_stack_register (last_stack)
{
+ /* These must either both be -1 or both be valid. */
+ gdb_assert ((first_stack_register == -1) == (last_stack_register == -1));
+ /* They must also be ordered. */
+ gdb_assert (last_stack_register >= first_stack_register);
}
- virtual void fetch_registers (struct regcache *, int) = 0;
- virtual void store_registers (struct regcache *, int) = 0;
+ void fetch_registers (struct regcache *, int) const;
+ void store_registers (struct regcache *, int) const;
+
+private:
+
+ /* An array where the indices are register numbers and the contents
+ are offsets. The offsets are either in the thread descriptor or
+ the stack, depending on the other fields. An offset of -1 means
+ that the corresponding register is not stored. */
+ const gdb::array_view<const int> offsets;
+
+ /* If these are -1, then all registers for this architecture are
+ stored in the thread descriptor. Otherwise, these mark a range
+ of registers that are stored on the stack. */
+ const int first_stack_register;
+ const int last_stack_register;
+
+ /* Helper function to supply one register. */
+ void supply_one_register (struct regcache *regcache, int regnum,
+ CORE_ADDR descriptor,
+ CORE_ADDR stack_base) const;
+ /* Helper function to store one register. */
+ void store_one_register (struct regcache *regcache, int regnum,
+ CORE_ADDR descriptor,
+ CORE_ADDR stack_base) const;
+ /* Helper function to find stack address where registers are stored.
+ This must be called with the stack pointer already supplied in
+ the register cache. */
+ CORE_ADDR get_stack_base (struct regcache *) const;
};
#endif /* !defined (RAVENSCAR_THREAD_H) */