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| author | Christophe Lyon <christophe.lyon@arm.com> | 2022-04-01 10:22:28 +0100 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@arm.com> | 2022-04-27 15:18:18 +0100 |
| commit | ef273377587d440f4aa248265147d5e75f86a018 (patch) | |
| tree | 0f7a7056cb9954cdd0ecda587c5e03966971d5d0 /gdb/doc/gdb.texinfo | |
| parent | ae7e2f45aa4798be449f282bbf75ad41e73f055e (diff) | |
| download | fsf-binutils-gdb-ef273377587d440f4aa248265147d5e75f86a018.zip fsf-binutils-gdb-ef273377587d440f4aa248265147d5e75f86a018.tar.gz fsf-binutils-gdb-ef273377587d440f4aa248265147d5e75f86a018.tar.bz2 | |
gdb/arm: Extend arm_m_addr_is_magic to support FNC_RETURN, add unwind-secure-frames command
This patch makes use of the support for several stack pointers
introduced by the previous patch to switch between them as needed
during unwinding.
It introduces a new 'unwind-secure-frames' arm command to enable/disable
mode switching during unwinding. It is enabled by default.
It has been tested using an STM32L5 board (with cortex-m33) and the
sample applications shipped with the STM32Cube development
environment: GTZC_TZSC_MPCBB_TrustZone in
STM32CubeL5/Projects/NUCLEO-L552ZE-Q/Examples/GTZC.
The test consisted in setting breakpoints in various places and check
that the backtrace is correct: SecureFault_Callback (Non-secure mode),
__gnu_cmse_nonsecure_call (before and after the vpush instruction),
SecureFault_Handler (Secure mode).
This implies that we tested only some parts of this patch (only MSP*
were used), but remaining parts seem reasonable.
Signed-off-by: Torbjörn Svensson <torbjorn.svensson@st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@foss.st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@arm.com>
Diffstat (limited to 'gdb/doc/gdb.texinfo')
| -rw-r--r-- | gdb/doc/gdb.texinfo | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index c1e9b09..38ad2ac 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -25133,6 +25133,16 @@ of @samp{set arm fallback-mode}. @item show arm force-mode Show the current forced instruction mode. +@item set arm unwind-secure-frames +This command enables unwinding from Non-secure to Secure mode on +Cortex-M with Security extension. +This can trigger security exceptions when unwinding the exception +stack. +It is enabled by default. + +@item show arm unwind-secure-frames +Show whether unwinding from Non-secure to Secure mode is enabled. + @item set debug arm Toggle whether to display ARM-specific debugging messages from the ARM target support subsystem. |