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authorMichael Snyder <msnyder@vmware.com>2000-05-10 20:07:25 +0000
committerMichael Snyder <msnyder@vmware.com>2000-05-10 20:07:25 +0000
commit5af923b0f0e349765b08f4a92adc1030ce67ff2e (patch)
tree26cfced85a44350b34c8cb3e26d3a42263b349b9 /gdb/config
parentd2f75a6f4097075a61f4c6d47dd095d22245eed7 (diff)
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2000-05-10 Michael Snyder <msnyder@seadog.cygnus.com>
Make Sparc a Multi-Arch target. Discard PARAMS macro (require ANSI). * sparc-tdep.c: include arch-utils.h. (SPARC_HAS_FPU, FP_REGISTER_BYTES, FP_MAX_REG NUM, SPARC_INTREG_SIZE, DUMMY_REG_SAVE_OFFSET): provide multi-arch-compatible definitions. (GDB_TARGET_IS_SPARC64): make into a runtime test. (struct frame_extra_info): Define, use instead of the macro. (Many places): Use alloca instead of statically allocated buffers that depend on a multi-arch variable such as MAX_REGISTER_RAW_SIZE. (sparc_extract_struct_value_address): Accept a pointer arg instead of an array sized by REGISTER_BYTES. (examine_prologue): Accept a pointer to an array of CORE_ADDR, instead of the defunct struct frame_saved_regs. Recognize new Sparc64 store instructions as part of the prologue. Ignore the destination of a frame store when parsing the prologue (so long as it's on the stack). (sparc_push_dummy_frame): Fix incorrect buffer offset for PSTATE. (sparc_frame_find_saved_regs): Accept a ptr to an array of CORE_ADDR instead of the defunct struct frame_saved_regs. (supply_gregset): Discard unnecessary 'zerobuf': just send NULL to supply_register. Provide 4-byte offset to compensate for diff between size of the prgreg_t elements on a 64-bit host and size of the registers for a 32-bit target. Fill all inaccessible regs with zero so they won't keep being requested again and again. (fill_gregset): Handle 32/64 size difference between registers and prgreg_t. Handle as many new 64-bit regs as possible. (supply_fpregset, fill_fpregset): Attempt to handle 64-bit world. (sparc_push_arguments): Rename to sparc32_push_arguments. Copy arguments into registers as well as onto stack, so that the CALL_DUMMY (code pushed onto the target stack) is not required. (sparc_extract_return_value): Rename to sparc32_extract_return_value. (sparc_store_return_value): Use memset instead of bzero. Use write_register_gen instead of write_register_bytes. (sparclet_store_return_value): New function. (_initialize_sparc_tdep): Call register_gdbarch_init to activate the gdbarch multi-architecture system. (sp64_push_arguments): Rename to sparc64_push_arguments. Extend to store arguments in general registers as well as on stack. (sparc64_extract_return_value): Rename to sp64_extract_return_value. Use as a private function, to be called by the new external function sparc64_extract_return_value. (sparclet_extract_return_value): New function. (sparc32_stack_align, sparc64_stack_align, sparc32_register_name, sparc64_register_name, sparc_print_extra_frame_info, sparclite_register_name, sparclet_register_name, sparc_push_return_address, sparc64_use_struct_convention, sparc32_store_struct_return, sparc64_store_struct_return, sparc32_register_virtual_type, sparc64_register_virtual_type, sparc32_register_size, sparc64_register_size, sparc32_register_byte, sparc64_register_byte, sparc_gdbarch_skip_prologue, sparc_convert_to_virtual, sparc_convert_to_raw, sparc_frame_init_saved_regs, sparc_frame_address, sparc_gdbarch_fix_call_dummy, sparc_coerce_float_to_double, sparc_call_dummy_address, sparc_y_regnum, sparc_reg_struct_has_addr, sparc_intreg_size, sparc_return_value_on_stack): New functions supporting multi-arch. (sparc_gdbarch_init): New function; initialize multi-arch. (struct gdbarch_tdep): Define, use for private multi-arch data. * config/sparc/tm-sparc.h: Move definitions around, enclose with #ifdef GDB_MULTI_ARCH tests, provide some multi-arch alternate definitions. Add enums for register names, to help debugging gdb. This header file must work for non-multi-arch and for multi-arch. * config/sparc/tm-sp64.h: Add GDB_MULTI_ARCH configuration. Also add AT_ENTRY_POINT definitions for CALL_DUMMY, for non-multi-arch case. Define GDB_MULTI_ARCH. * config/sparc/tm-sparclet.h: Add GDB_MULTI_ARCH configuration. Do not define GDB_MULTI_ARCH (bfd does not correctly identify target). * config/sparc/tm-sparclite.h: Ditto. * config/sparc/tm-sun4sol2.h: Define GDB_MULTI_ARCH. * sparclet-rom.c (sparclet_regnames): Initialize explicitly, to avoid using deprecated REGISTER_NAMES macro. * Makefile.in: Let sparc-tdep.c depend on arch-utils.h.
Diffstat (limited to 'gdb/config')
-rw-r--r--gdb/config/sparc/tm-sp64.h226
-rw-r--r--gdb/config/sparc/tm-sparc.h687
-rw-r--r--gdb/config/sparc/tm-sparclet.h27
-rw-r--r--gdb/config/sparc/tm-sparclite.h29
-rw-r--r--gdb/config/sparc/tm-sun4sol2.h2
5 files changed, 658 insertions, 313 deletions
diff --git a/gdb/config/sparc/tm-sp64.h b/gdb/config/sparc/tm-sp64.h
index dbdf510..378212d 100644
--- a/gdb/config/sparc/tm-sp64.h
+++ b/gdb/config/sparc/tm-sp64.h
@@ -22,9 +22,13 @@
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-#define GDB_TARGET_IS_SPARC64
+#define GDB_MULTI_ARCH 2
-struct value;
+#ifndef GDB_TARGET_IS_SPARC64
+#define GDB_TARGET_IS_SPARC64 1
+#endif
+
+#include "sparc/tm-sparc.h"
/* Eeeew. Ok, we have to assume (for now) that the processor really is
in sparc64 mode. While this is the same instruction sequence as
@@ -70,6 +74,57 @@ struct value;
nop
*/
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
+#ifndef DO_CALL_DUMMY_ON_STACK
+
+/*
+ * These defines will suffice for the AT_ENTRY_POINT call dummy method.
+ */
+
+#undef CALL_DUMMY
+#define CALL_DUMMY {0}
+#undef CALL_DUMMY_LENGTH
+#define CALL_DUMMY_LENGTH 0
+#undef CALL_DUMMY_CALL_OFFSET
+#define CALL_DUMMY_CALL_OFFSET 0
+#undef CALL_DUMMY_START_OFFSET
+#define CALL_DUMMY_START_OFFSET 0
+#undef CALL_DUMMY_BREAKPOINT_OFFSET
+#define CALL_DUMMY_BREAKPOINT_OFFSET 0
+#undef CALL_DUMMY_BREAKPOINT_OFFSET_P
+#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
+#undef CALL_DUMMY_LOCATION
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#undef CALL_DUMMY_STACK_ADJUST
+#define CALL_DUMMY_STACK_ADJUST 128
+#undef SIZEOF_CALL_DUMMY_WORDS
+#define SIZEOF_CALL_DUMMY_WORDS 0
+#undef CALL_DUMMY_ADDRESS
+#define CALL_DUMMY_ADDRESS() entry_point_address()
+#undef FIX_CALL_DUMMY
+#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P)
+#undef PUSH_RETURN_ADDRESS
+#define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
+extern CORE_ADDR
+sparc_at_entry_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
+
+#undef STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ sparc_at_entry_store_struct_return (ADDR, SP)
+extern void
+sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
+
+
+#else
+/*
+ * Old call dummy method, with CALL_DUMMY on the stack.
+ */
+
+#undef CALL_DUMMY
#define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
@@ -86,17 +141,83 @@ struct value;
/* 128 is to reserve space to write the %i/%l registers that will be restored
when we resume. */
+#undef CALL_DUMMY_STACK_ADJUST
#define CALL_DUMMY_STACK_ADJUST 128
+/* Size of the call dummy in bytes. */
+#undef CALL_DUMMY_LENGTH
#define CALL_DUMMY_LENGTH 192
+/* Offset within CALL_DUMMY of the 'call' instruction. */
+#undef CALL_DUMMY_START_OFFSET
#define CALL_DUMMY_START_OFFSET 148
+/* Offset within CALL_DUMMY of the 'call' instruction. */
+#undef CALL_DUMMY_CALL_OFFSET
#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
+/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
+#undef CALL_DUMMY_BREAKPOINT_OFFSET
#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
-#include "sparc/tm-sparc.h"
+/* Let's GDB know that it can make a call_dummy breakpoint. */
+#undef CALL_DUMMY_BREAKPOINT_OFFSET_P
+#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
+
+/* Call dummy will be located on the stack. */
+#undef CALL_DUMMY_LOCATION
+#define CALL_DUMMY_LOCATION ON_STACK
+
+/* Insert the function address into the call dummy. */
+#undef FIX_CALL_DUMMY
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
+void sparc_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+ struct type * value_type, int using_gcc));
+
+
+/* The remainder of these will accept the default definition. */
+#undef SIZEOF_CALL_DUMMY_WORDS
+#undef PUSH_RETURN_ADDRESS
+#undef CALL_DUMMY_ADDRESS
+#undef STORE_STRUCT_RETURN
+
+#endif
+
+/* Does the specified function use the "struct returning" convention
+ or the "value returning" convention? The "value returning" convention
+ almost invariably returns the entire value in registers. The
+ "struct returning" convention often returns the entire value in
+ memory, and passes a pointer (out of or into the function) saying
+ where the value (is or should go).
+
+ Since this sometimes depends on whether it was compiled with GCC,
+ this is also an argument. This is used in call_function to build a
+ stack, and in value_being_returned to print return values.
+
+ On Sparc64, we only pass pointers to structs if they're larger then
+ 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
+ values go into %fp0-%fp3). */
+
+#undef USE_STRUCT_CONVENTION
+#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
+
+CORE_ADDR sparc64_push_arguments PARAMS ((int,
+ struct value **,
+ CORE_ADDR,
+ int,
+ CORE_ADDR));
+#undef PUSH_ARGUMENTS
+#define PUSH_ARGUMENTS(A,B,C,D,E) \
+ (sparc64_push_arguments ((A), (B), (C), (D), (E)))
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+/* FIXME: V9 uses %o0 for this. */
+
+#undef STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
/* Stack must be aligned on 128-bit boundaries when synthesizing
function calls. */
@@ -104,11 +225,6 @@ struct value;
#undef STACK_ALIGN
#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
-/* Number of machine registers. */
-
-#undef NUM_REGS
-#define NUM_REGS 125
-
/* Initializer for an array of names of registers.
There should be NUM_REGS strings in this initializer. */
/* Some of these registers are only accessible from priviledged mode.
@@ -148,6 +264,25 @@ struct value;
"icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
}
+#undef REG_STRUCT_HAS_ADDR
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
+
+extern CORE_ADDR sparc64_read_sp ();
+extern CORE_ADDR sparc64_read_fp ();
+extern void sparc64_write_sp PARAMS ((CORE_ADDR));
+extern void sparc64_write_fp PARAMS ((CORE_ADDR));
+
+#define TARGET_READ_SP() (sparc64_read_sp ())
+#define TARGET_READ_FP() (sparc64_read_fp ())
+#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
+#define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
+extern void
+sp64_extract_return_value PARAMS ((struct type *, char[], char *, int));
+
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
and correspond to the general registers of the machine,
@@ -155,7 +290,8 @@ struct value;
to be actual register numbers as far as the user is concerned
but do serve to get the desired values when passed to read_register. */
-#if 0 /* defined in tm-sparc.h, replicated for doc purposes */
+#if 0 /* defined in tm-sparc.h, replicated
+ for doc purposes */
#define G0_REGNUM 0 /* %g0 */
#define G1_REGNUM 1 /* %g1 */
#define O0_REGNUM 8 /* %o0 */
@@ -172,7 +308,7 @@ struct value;
#define FP0_REGNUM 32 /* Floating point register 0 */
#endif
-#define FP_MAX_REGNUM 80 /* 1 + last fp reg number */
+/*#define FP_MAX_REGNUM 80*/ /* 1 + last fp reg number */
/* #undef v8 misc. regs */
@@ -187,7 +323,8 @@ struct value;
/* v9 misc. and priv. regs */
-#define C0_REGNUM FP_MAX_REGNUM /* Start of control registers */
+#define C0_REGNUM 80 /* Start of control registers */
+
#define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
#define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
#define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
@@ -220,6 +357,11 @@ struct value;
#define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
#define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
+/* Number of machine registers. */
+
+#undef NUM_REGS
+#define NUM_REGS 125
+
/* Total amount of space needed to store our copies of the machine's
register state, the array `registers'.
Some of the registers aren't 64 bits, but it's a lot simpler just to assume
@@ -291,40 +433,12 @@ struct value;
#undef TARGET_LONG_LONG_BIT
#define TARGET_LONG_LONG_BIT 64
-/* Does the specified function use the "struct returning" convention
- or the "value returning" convention? The "value returning" convention
- almost invariably returns the entire value in registers. The
- "struct returning" convention often returns the entire value in
- memory, and passes a pointer (out of or into the function) saying
- where the value (is or should go).
-
- Since this sometimes depends on whether it was compiled with GCC,
- this is also an argument. This is used in call_function to build a
- stack, and in value_being_returned to print return values.
-
- On Sparc64, we only pass pointers to structs if they're larger then
- 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
- values go into %fp0-%fp3). */
-
-
-#undef USE_STRUCT_CONVENTION
-#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
-
-#undef REG_STRUCT_HAS_ADDR
-#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
-
-/* Store the address of the place in which to copy the structure the
- subroutine will return. This is called from call_function. */
-/* FIXME: V9 uses %o0 for this. */
-
-#undef STORE_STRUCT_RETURN
-#define STORE_STRUCT_RETURN(ADDR, SP) \
- { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
-
/* Return number of bytes at start of arglist that are not really args. */
#undef FRAME_ARGS_SKIP
#define FRAME_ARGS_SKIP 136
+
+#endif /* GDB_MULTI_ARCH */
/* Offsets into jmp_buf.
FIXME: This was borrowed from the v8 stuff and will probably have to change
@@ -342,36 +456,18 @@ struct value;
#define JB_O0 7
#define JB_WBCNT 8
-/* Figure out where the longjmp will land. We expect that we have just entered
- longjmp and haven't yet setup the stack frame, so the args are still in the
- output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
- extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
- This routine returns true on success */
+/* Figure out where the longjmp will land. We expect that we have
+ just entered longjmp and haven't yet setup the stack frame, so the
+ args are still in the output regs. %o0 (O0_REGNUM) points at the
+ jmp_buf structure from which we extract the pc (JB_PC) that we will
+ land at. The pc is copied into ADDR. This routine returns true on
+ success */
extern int
get_longjmp_target PARAMS ((CORE_ADDR *));
#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
-extern CORE_ADDR sparc64_read_sp ();
-extern CORE_ADDR sparc64_read_fp ();
-extern void sparc64_write_sp PARAMS ((CORE_ADDR));
-extern void sparc64_write_fp PARAMS ((CORE_ADDR));
-
-#define TARGET_READ_SP() (sparc64_read_sp ())
-#define TARGET_READ_FP() (sparc64_read_fp ())
-#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
-#define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
-
#undef TM_PRINT_INSN_MACH
#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
-CORE_ADDR sp64_push_arguments PARAMS ((int, struct value **, CORE_ADDR, unsigned char, CORE_ADDR));
-#undef PUSH_ARGUMENTS
-#define PUSH_ARGUMENTS(A,B,C,D,E) (sp64_push_arguments ((A), (B), (C), (D), (E)))
-
-#undef EXTRACT_RETURN_VALUE
-#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
- sparc64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
-extern void
-sparc64_extract_return_value PARAMS ((struct type *, char[], char *, int));
diff --git a/gdb/config/sparc/tm-sparc.h b/gdb/config/sparc/tm-sparc.h
index 29cf746..63148ce 100644
--- a/gdb/config/sparc/tm-sparc.h
+++ b/gdb/config/sparc/tm-sparc.h
@@ -21,103 +21,148 @@
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-struct frame_info;
struct type;
struct value;
+struct frame_info;
-#define TARGET_BYTE_ORDER BIG_ENDIAN
-
-/* Floating point is IEEE compatible. */
-#define IEEE_FLOAT (1)
-
-/* If an argument is declared "register", Sun cc will keep it in a register,
- never saving it onto the stack. So we better not believe the "p" symbol
- descriptor stab. */
-
-#define USE_REGISTER_NOT_ARG
-
-/* When passing a structure to a function, Sun cc passes the address
- not the structure itself. It (under SunOS4) creates two symbols,
- which we need to combine to a LOC_REGPARM. Gcc version two (as of
- 1.92) behaves like sun cc. REG_STRUCT_HAS_ADDR is smart enough to
- distinguish between Sun cc, gcc version 1 and gcc version 2. */
-
-#define REG_STRUCT_HAS_ADDR(gcc_p,type) (gcc_p != 1)
-
-/* Sun /bin/cc gets this right as of SunOS 4.1.x. We need to define
- BELIEVE_PCC_PROMOTION to get this right now that the code which
- detects gcc2_compiled. is broken. This loses for SunOS 4.0.x and
- earlier. */
+/*
+ * The following enums are purely for the convenience of the GDB
+ * developer, when debugging GDB.
+ */
-#define BELIEVE_PCC_PROMOTION 1
+enum { /* Sparc general registers, for all sparc versions. */
+ G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM,
+ G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM,
+ O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM,
+ O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
+ L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM,
+ L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM,
+ I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM,
+ I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
+ FP0_REGNUM /* Floating point register 0 */
+};
+
+enum { /* Sparc general registers, alternate names. */
+ R0_REGNUM, R1_REGNUM, R2_REGNUM, R3_REGNUM,
+ R4_REGNUM, R5_REGNUM, R6_REGNUM, R7_REGNUM,
+ R8_REGNUM, R9_REGNUM, R10_REGNUM, R11_REGNUM,
+ R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM,
+ R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM,
+ R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM,
+ R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM,
+ R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
+};
+
+enum { /* Sparc32 control registers. */
+ PS_REGNUM = 65, /* PC, NPC, and Y are omitted because */
+ WIM_REGNUM = 66, /* they have different values depending on */
+ TBR_REGNUM = 67, /* 32-bit / 64-bit mode. */
+ FPS_REGNUM = 70,
+ CPS_REGNUM = 71
+};
+
+/* v9 misc. and priv. regs */
+
+/* Note: specifying values explicitly for documentation purposes. */
+enum { /* Sparc64 control registers, excluding Y, PC, and NPC. */
+ CCR_REGNUM = 82, /* Condition Code Register (%xcc,%icc) */
+ FSR_REGNUM = 83, /* Floating Point State */
+ FPRS_REGNUM = 84, /* Floating Point Registers State */
+ ASI_REGNUM = 86, /* Alternate Space Identifier */
+ VER_REGNUM = 87, /* Version register */
+ TICK_REGNUM = 88, /* Tick register */
+ PIL_REGNUM = 89, /* Processor Interrupt Level */
+ PSTATE_REGNUM = 90, /* Processor State */
+ TSTATE_REGNUM = 91, /* Trap State */
+ TBA_REGNUM = 92, /* Trap Base Address */
+ TL_REGNUM = 93, /* Trap Level */
+ TT_REGNUM = 94, /* Trap Type */
+ TPC_REGNUM = 95, /* Trap pc */
+ TNPC_REGNUM = 96, /* Trap npc */
+ WSTATE_REGNUM = 97, /* Window State */
+ CWP_REGNUM = 98, /* Current Window Pointer */
+ CANSAVE_REGNUM = 99, /* Savable Windows */
+ CANRESTORE_REGNUM = 100, /* Restorable Windows */
+ CLEANWIN_REGNUM = 101, /* Clean Windows */
+ OTHERWIN_REGNUM = 102, /* Other Windows */
+ ASR16_REGNUM = 103, /* Ancillary State Registers */
+ ASR17_REGNUM = 104,
+ ASR18_REGNUM = 105,
+ ASR19_REGNUM = 106,
+ ASR20_REGNUM = 107,
+ ASR21_REGNUM = 108,
+ ASR22_REGNUM = 109,
+ ASR23_REGNUM = 110,
+ ASR24_REGNUM = 111,
+ ASR25_REGNUM = 112,
+ ASR26_REGNUM = 113,
+ ASR27_REGNUM = 114,
+ ASR28_REGNUM = 115,
+ ASR29_REGNUM = 116,
+ ASR30_REGNUM = 117,
+ ASR31_REGNUM = 118,
+ ICC_REGNUM = 119, /* 32 bit condition codes */
+ XCC_REGNUM = 120, /* 64 bit condition codes */
+ FCC0_REGNUM = 121, /* fp cc reg 0 */
+ FCC1_REGNUM = 122, /* fp cc reg 1 */
+ FCC2_REGNUM = 123, /* fp cc reg 2 */
+ FCC3_REGNUM = 124 /* fp cc reg 3 */
+};
-/* For acc, there's no need to correct LBRAC entries by guessing how
- they should work. In fact, this is harmful because the LBRAC
- entries now all appear at the end of the function, not intermixed
- with the SLINE entries. n_opt_found detects acc for Solaris binaries;
- function_stab_type detects acc for SunOS4 binaries.
+/*
+ * Make sparc target multi-archable: April 2000
+ */
- For binary from SunOS4 /bin/cc, need to correct LBRAC's.
+#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
+
+/* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
+#undef GDB_TARGET_IS_SPARC64
+#define GDB_TARGET_IS_SPARC64 \
+ (sparc_intreg_size () == 8)
+#undef TARGET_ELF64
+#define TARGET_ELF64 \
+ (sparc_intreg_size () == 8)
+extern int sparc_intreg_size (void);
+#else
+
+/* Non-multi-arch: if it isn't defined, define it to zero. */
+#ifndef GDB_TARGET_IS_SPARC64
+#define GDB_TARGET_IS_SPARC64 0
+#endif
+#ifndef TARGET_ELF64
+#define TARGET_ELF64 0
+#endif
+#endif
- For gcc, like acc, don't correct. */
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH
+ */
-#define SUN_FIXED_LBRAC_BUG \
- (n_opt_found \
- || function_stab_type == N_STSYM \
- || function_stab_type == N_GSYM \
- || processing_gcc_compilation)
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
-/* Do variables in the debug stabs occur after the N_LBRAC or before it?
- acc: after, gcc: before, SunOS4 /bin/cc: before. */
+#define REGISTER_NAMES \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
+ "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
+ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
+ "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
+ \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
+ \
+ "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" \
+}
-#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
- (!(gcc_p) \
- && (n_opt_found \
- || function_stab_type == N_STSYM \
- || function_stab_type == N_GSYM))
+#define TARGET_BYTE_ORDER BIG_ENDIAN
/* Offset from address of function to start of its code.
Zero on most machines. */
#define FUNCTION_START_OFFSET 0
-/* Advance PC across any function entry prologue instructions
- to reach some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances
- the PC past some of the prologue, but stops as soon as it
- knows that the function has a frame. Its result is equal
- to its input PC if the function is frameless, unequal otherwise. */
-
-#define SKIP_PROLOGUE(pc) (sparc_skip_prologue (pc, 0))
-#define SKIP_PROLOGUE_FRAMELESS_P(pc) (sparc_skip_prologue (pc, 1))
-extern CORE_ADDR sparc_skip_prologue PARAMS ((CORE_ADDR, int));
-
-/* Immediately after a function call, return the saved pc.
- Can't go through the frames for this because on some machines
- the new frame is not set up until the new function executes
- some instructions. */
-
-/* On the Sun 4 under SunOS, the compile will leave a fake insn which
- encodes the structure size being returned. If we detect such
- a fake insn, step past it. */
-
-#define PC_ADJUST(pc) sparc_pc_adjust(pc)
-extern CORE_ADDR sparc_pc_adjust PARAMS ((CORE_ADDR));
-
-#define SAVED_PC_AFTER_CALL(frame) PC_ADJUST (read_register (RP_REGNUM))
-
-/* Stack grows downward. */
-
-#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
-
-/* Stack must be aligned on 64-bit boundaries when synthesizing
- function calls. */
-
-#define STACK_ALIGN(ADDR) (((ADDR) + 7) & -8)
-
-/* Sequence of bytes for breakpoint instruction (ta 1). */
-
-#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
-
/* Amount PC must be decremented by after a breakpoint.
This is often the number of bytes in BREAKPOINT
but not always. */
@@ -134,91 +179,48 @@ extern CORE_ADDR sparc_pc_adjust PARAMS ((CORE_ADDR));
#define NUM_REGS 72
-/* Initializer for an array of names of registers.
- There should be NUM_REGS strings in this initializer. */
-
-#define REGISTER_NAMES \
-{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
- "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
- "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
- "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
- \
- "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
- "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
- "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
- "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
- \
- "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" }
-
-/* Register numbers of various important registers.
- Note that some of these values are "real" register numbers,
- and correspond to the general registers of the machine,
- and some are "phony" register numbers which are too large
- to be actual register numbers as far as the user is concerned
- but do serve to get the desired values when passed to read_register. */
-
-#define G0_REGNUM 0 /* %g0 */
-#define G1_REGNUM 1 /* %g1 */
-#define O0_REGNUM 8 /* %o0 */
#define SP_REGNUM 14 /* Contains address of top of stack, \
which is also the bottom of the frame. */
-#define RP_REGNUM 15 /* Contains return address value, *before* \
- any windows get switched. */
-#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
-#define L0_REGNUM 16 /* First local reg that's saved on stack frame
- rather than in machine registers */
-#define I0_REGNUM 24 /* %i0 */
#define FP_REGNUM 30 /* Contains address of executing stack frame */
-#define I7_REGNUM 31 /* Last local reg saved on stack frame */
+
#define FP0_REGNUM 32 /* Floating point register 0 */
+
#define Y_REGNUM 64 /* Temp register for multiplication, etc. */
-#define PS_REGNUM 65 /* Contains processor status */
-#define PS_FLAG_CARRY 0x100000 /* Carry bit in PS */
-#define WIM_REGNUM 66 /* Window Invalid Mask (not really supported) */
-#define TBR_REGNUM 67 /* Trap Base Register (not really supported) */
+
#define PC_REGNUM 68 /* Contains program counter */
+
#define NPC_REGNUM 69 /* Contains next PC */
-#define FPS_REGNUM 70 /* Floating point status register */
-#define CPS_REGNUM 71 /* Coprocessor status register */
+
/* Total amount of space needed to store our copies of the machine's
register state, the array `registers'. On the sparc, `registers'
contains the ins and locals, even though they are saved on the
stack rather than with the other registers, and this causes hair
- and confusion in places like pop_frame. It might be
- better to remove the ins and locals from `registers', make sure
- that get_saved_register can get them from the stack (even in the
+ and confusion in places like pop_frame. It might be better to
+ remove the ins and locals from `registers', make sure that
+ get_saved_register can get them from the stack (even in the
innermost frame), and make this the way to access them. For the
- frame pointer we would do that via TARGET_READ_FP. On the other hand,
- that is likely to be confusing or worse for flat frames. */
+ frame pointer we would do that via TARGET_READ_FP. On the other
+ hand, that is likely to be confusing or worse for flat frames. */
#define REGISTER_BYTES (32*4+32*4+8*4)
/* Index within `registers' of the first byte of the space for
register N. */
-/* ?? */
-#define REGISTER_BYTE(N) ((N)*4)
-/* We need to override GET_SAVED_REGISTER so that we can deal with the way
- outs change into ins in different frames. HAVE_REGISTER_WINDOWS can't
- deal with this case and also handle flat frames at the same time. */
-
-struct frame_info;
-void sparc_get_saved_register PARAMS ((char *raw_buffer, int *optimized, CORE_ADDR * addrp, struct frame_info * frame, int regnum, enum lval_type * lvalp));
-#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
- sparc_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
+#define REGISTER_BYTE(N) ((N)*4)
-/* Number of bytes of storage in the actual machine representation
- for register N. */
+/* Number of bytes of storage in the actual machine representation for
+ register N. */
-/* On the SPARC, all regs are 4 bytes. */
+/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8). */
#define REGISTER_RAW_SIZE(N) (4)
/* Number of bytes of storage in the program's representation
for register N. */
-/* On the SPARC, all regs are 4 bytes. */
+/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8). */
#define REGISTER_VIRTUAL_SIZE(N) (4)
@@ -234,36 +236,40 @@ void sparc_get_saved_register PARAMS ((char *raw_buffer, int *optimized, CORE_AD
of data in register N. */
#define REGISTER_VIRTUAL_TYPE(N) \
- ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
- builtin_type_int)
+ ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
+ builtin_type_int)
-/* Writing to %g0 is a noop (not an error or exception or anything like
- that, however). */
+/* Sun /bin/cc gets this right as of SunOS 4.1.x. We need to define
+ BELIEVE_PCC_PROMOTION to get this right now that the code which
+ detects gcc2_compiled. is broken. This loses for SunOS 4.0.x and
+ earlier. */
-#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
+#define BELIEVE_PCC_PROMOTION 1
-/* Store the address of the place in which to copy the structure the
- subroutine will return. This is called from call_function_by_hand.
- The ultimate mystery is, tho, what is the value "16"? */
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances
+ the PC past some of the prologue, but stops as soon as it
+ knows that the function has a frame. Its result is equal
+ to its input PC if the function is frameless, unequal otherwise. */
-#define STORE_STRUCT_RETURN(ADDR, SP) \
- { char val[4]; \
- store_unsigned_integer (val, 4, (ADDR)); \
- write_memory ((SP)+(16*4), val, 4); }
+#define SKIP_PROLOGUE(PC) sparc_skip_prologue (PC, 0)
-/* Extract from an array REGBUF containing the (raw) register state
- a function return value of type TYPE, and copy that, in virtual format,
- into VALBUF. */
+/* Immediately after a function call, return the saved pc.
+ Can't go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
-#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
- sparc_extract_return_value(TYPE, REGBUF, VALBUF)
-extern void
-sparc_extract_return_value PARAMS ((struct type *, char[], char *));
+#define SAVED_PC_AFTER_CALL(FRAME) PC_ADJUST (read_register (RP_REGNUM))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(LHS,RHS) ((LHS) < (RHS))
+
+/* Write into appropriate registers a function return value of type
+ TYPE, given in virtual format. */
-/* Write into appropriate registers a function return value
- of type TYPE, given in virtual format. */
-#define STORE_RETURN_VALUE(TYPE,VALBUF) \
- sparc_store_return_value(TYPE, VALBUF)
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+ sparc_store_return_value (TYPE, VALBUF)
extern void sparc_store_return_value PARAMS ((struct type *, char *));
/* Extract from an array REGBUF containing the (raw) register state
@@ -271,11 +277,146 @@ extern void sparc_store_return_value PARAMS ((struct type *, char *));
as a CORE_ADDR (or an expression that can be used as one). */
#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
- (sparc_extract_struct_value_address (REGBUF))
+ sparc_extract_struct_value_address (REGBUF)
extern CORE_ADDR
- sparc_extract_struct_value_address PARAMS ((char[REGISTER_BYTES]));
-
+sparc_extract_struct_value_address PARAMS ((char *));
+
+/* If the current gcc for for this target does not produce correct
+ debugging information for float parameters, both prototyped and
+ unprototyped, then define this macro. This forces gdb to always
+ assume that floats are passed as doubles and then converted in the
+ callee. */
+
+#define COERCE_FLOAT_TO_DOUBLE(FORMAL, ACTUAL) (1)
+
+/* Stack must be aligned on 64-bit boundaries when synthesizing
+ function calls (128-bit for sparc64). */
+
+#define STACK_ALIGN(ADDR) sparc32_stack_align (ADDR)
+extern CORE_ADDR sparc32_stack_align (CORE_ADDR addr);
+
+/* Floating point is IEEE compatible. */
+#define IEEE_FLOAT (1)
+
+/* The Sparc returns long doubles on the stack. */
+
+#define RETURN_VALUE_ON_STACK(TYPE) \
+ (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
+ && TYPE_LENGTH(TYPE) > 8)
+
+/* When passing a structure to a function, Sun cc passes the address
+ not the structure itself. It (under SunOS4) creates two symbols,
+ which we need to combine to a LOC_REGPARM. Gcc version two (as of
+ 1.92) behaves like sun cc. REG_STRUCT_HAS_ADDR is smart enough to
+ distinguish between Sun cc, gcc version 1 and gcc version 2. */
+
+#define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) \
+ sparc_reg_struct_has_addr (GCC_P, TYPE)
+extern int sparc_reg_struct_has_addr (int, struct type *);
+
+#endif /* GDB_MULTI_ARCH */
+
+#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
+/*
+ * The following defines should ONLY appear for MULTI_ARCH.
+ */
+
+/* Multi-arch the nPC and Y registers. */
+#define Y_REGNUM (sparc_y_regnum ())
+extern int sparc_npc_regnum (void);
+extern int sparc_y_regnum (void);
+
+#endif /* GDB_MULTI_ARCH */
+
+/* On the Sun 4 under SunOS, the compile will leave a fake insn which
+ encodes the structure size being returned. If we detect such
+ a fake insn, step past it. */
+
+#define PC_ADJUST(PC) sparc_pc_adjust (PC)
+extern CORE_ADDR sparc_pc_adjust PARAMS ((CORE_ADDR));
+
+/* Advance PC across any function entry prologue instructions to reach
+ some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances the PC past
+ some of the prologue, but stops as soon as it knows that the
+ function has a frame. Its result is equal to its input PC if the
+ function is frameless, unequal otherwise. */
+
+#define SKIP_PROLOGUE_FRAMELESS_P(PC) sparc_skip_prologue (PC, 1)
+extern CORE_ADDR sparc_skip_prologue PARAMS ((CORE_ADDR, int));
+
+/* If an argument is declared "register", Sun cc will keep it in a register,
+ never saving it onto the stack. So we better not believe the "p" symbol
+ descriptor stab. */
+
+#define USE_REGISTER_NOT_ARG
+
+/* For acc, there's no need to correct LBRAC entries by guessing how
+ they should work. In fact, this is harmful because the LBRAC
+ entries now all appear at the end of the function, not intermixed
+ with the SLINE entries. n_opt_found detects acc for Solaris binaries;
+ function_stab_type detects acc for SunOS4 binaries.
+
+ For binary from SunOS4 /bin/cc, need to correct LBRAC's.
+
+ For gcc, like acc, don't correct. */
+
+#define SUN_FIXED_LBRAC_BUG \
+ (n_opt_found \
+ || function_stab_type == N_STSYM \
+ || function_stab_type == N_GSYM \
+ || processing_gcc_compilation)
+
+/* Do variables in the debug stabs occur after the N_LBRAC or before it?
+ acc: after, gcc: before, SunOS4 /bin/cc: before. */
+
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
+ (!(gcc_p) \
+ && (n_opt_found \
+ || function_stab_type == N_STSYM \
+ || function_stab_type == N_GSYM))
+
+/* Sequence of bytes for breakpoint instruction (ta 1). */
+
+#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define G0_REGNUM 0 /* %g0 */
+#define G1_REGNUM 1 /* %g1 */
+#define O0_REGNUM 8 /* %o0 */
+#define RP_REGNUM 15 /* Contains return address value, *before* \
+ any windows get switched. */
+#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
+#define L0_REGNUM 16 /* First local reg that's saved on stack frame
+ rather than in machine registers */
+#define I0_REGNUM 24 /* %i0 */
+#define I7_REGNUM 31 /* Last local reg saved on stack frame */
+#define PS_REGNUM 65 /* Contains processor status */
+#define PS_FLAG_CARRY 0x100000 /* Carry bit in PS */
+#define WIM_REGNUM 66 /* Window Invalid Mask (not really supported) */
+#define TBR_REGNUM 67 /* Trap Base Register (not really supported) */
+#define FPS_REGNUM 70 /* Floating point status register */
+#define CPS_REGNUM 71 /* Coprocessor status register */
+
+/* Writing to %g0 is a noop (not an error or exception or anything like
+ that, however). */
+
+#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
+
+/*
+ * FRAME_CHAIN and FRAME_INFO definitions, collected here for convenience.
+ */
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
/* Describe the pointer in each stack frame to the previous stack frame
(its caller). */
@@ -310,64 +451,56 @@ extern CORE_ADDR
GCC 2.6 and later can generate ``flat register window'' code that
makes frames by explicitly saving those registers that need to be
- saved. %i7 is used as the frame pointer, and the frame is laid out so
- that flat and non-flat calls can be intermixed freely within a
- program. Unfortunately for GDB, this means it must detect and record
- the flatness of frames.
+ saved. %i7 is used as the frame pointer, and the frame is laid out
+ so that flat and non-flat calls can be intermixed freely within a
+ program. Unfortunately for GDB, this means it must detect and
+ record the flatness of frames.
Since the prologue in a flat frame also tells us where fp and pc
have been stashed (the frame is of variable size, so their location
is not fixed), it's convenient to record them in the frame info. */
-#define EXTRA_FRAME_INFO \
- CORE_ADDR bottom; \
- int in_prologue; \
- int flat; \
+#define EXTRA_FRAME_INFO \
+ CORE_ADDR bottom; \
+ int in_prologue; \
+ int flat; \
/* Following fields only relevant for flat frames. */ \
- CORE_ADDR pc_addr; \
- CORE_ADDR fp_addr; \
+ CORE_ADDR pc_addr; \
+ CORE_ADDR fp_addr; \
/* Add this to ->frame to get the value of the stack pointer at the */ \
/* time of the register saves. */ \
int sp_offset;
-#define FRAME_INIT_SAVED_REGS(fp) /*no-op */
+/* We need to override GET_SAVED_REGISTER so that we can deal with the way
+ outs change into ins in different frames. HAVE_REGISTER_WINDOWS can't
+ deal with this case and also handle flat frames at the same time. */
-#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) \
- sparc_init_extra_frame_info (fromleaf, fci)
-extern void sparc_init_extra_frame_info PARAMS ((int, struct frame_info *));
+void sparc_get_saved_register PARAMS ((char *raw_buffer,
+ int *optimized,
+ CORE_ADDR * addrp,
+ struct frame_info * frame,
+ int regnum,
+ enum lval_type * lvalp));
-#define PRINT_EXTRA_FRAME_INFO(fi) \
- { \
- if ((fi) && (fi)->flat) \
- printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n", \
- paddr_nz ((fi)->pc_addr), paddr_nz ((fi)->fp_addr)); \
- }
+#define GET_SAVED_REGISTER(RAW_BUFFER, OPTIMIZED, ADDRP, FRAME, REGNUM, LVAL) \
+ sparc_get_saved_register (RAW_BUFFER, OPTIMIZED, ADDRP, \
+ FRAME, REGNUM, LVAL)
-#define FRAME_CHAIN(thisframe) (sparc_frame_chain (thisframe))
-extern CORE_ADDR sparc_frame_chain PARAMS ((struct frame_info *));
+#define FRAME_INIT_SAVED_REGS(FP) /*no-op */
-/* INIT_EXTRA_FRAME_INFO needs the PC to detect flat frames. */
-
-#define INIT_FRAME_PC(fromleaf, prev) /* nothing */
-#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
- (prev)->pc = ((fromleaf) ? SAVED_PC_AFTER_CALL ((prev)->next) : \
- (prev)->next ? FRAME_SAVED_PC ((prev)->next) : read_pc ());
+#define INIT_EXTRA_FRAME_INFO(FROMLEAF, FCI) \
+ sparc_init_extra_frame_info (FROMLEAF, FCI)
+extern void sparc_init_extra_frame_info PARAMS ((int, struct frame_info *));
-/* Define other aspects of the stack frame. */
+#define FRAME_CHAIN(THISFRAME) (sparc_frame_chain (THISFRAME))
+extern CORE_ADDR sparc_frame_chain PARAMS ((struct frame_info *));
/* A macro that tells us whether the function invocation represented
by FI does not have a frame on the stack associated with it. If it
does not, FRAMELESS is set to 1, else 0. */
-#define FRAMELESS_FUNCTION_INVOCATION(FI) \
- (frameless_look_for_prologue(FI))
-/* The location of I0 w.r.t SP. This is actually dependent on how the system's
- window overflow/underflow routines are written. Most vendors save the L regs
- followed by the I regs (at the higher address). Some vendors get it wrong.
- */
-
-#define FRAME_SAVED_L0 0
-#define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (L0_REGNUM))
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+ frameless_look_for_prologue (FI)
/* Where is the PC for a specific frame */
@@ -375,23 +508,46 @@ extern CORE_ADDR sparc_frame_chain PARAMS ((struct frame_info *));
extern CORE_ADDR sparc_frame_saved_pc PARAMS ((struct frame_info *));
/* If the argument is on the stack, it will be here. */
-#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_ARGS_ADDRESS(FI) ((FI)->frame)
-#define FRAME_STRUCT_ARGS_ADDRESS(fi) ((fi)->frame)
-
-#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_LOCALS_ADDRESS(FI) ((FI)->frame)
/* Set VAL to the number of args passed to frame described by FI.
Can set VAL to -1, meaning no way to tell. */
/* We can't tell how many args there are
now that the C compiler delays popping them. */
-#define FRAME_NUM_ARGS(fi) (-1)
+#define FRAME_NUM_ARGS(FI) (-1)
/* Return number of bytes at start of arglist that are not really args. */
#define FRAME_ARGS_SKIP 68
-
+
+#endif /* GDB_MULTI_ARCH */
+
+#define PRINT_EXTRA_FRAME_INFO(FI) \
+ sparc_print_extra_frame_info (FI)
+extern void sparc_print_extra_frame_info (struct frame_info *);
+
+/* INIT_EXTRA_FRAME_INFO needs the PC to detect flat frames. */
+
+#define INIT_FRAME_PC(FROMLEAF, PREV) /* nothing */
+#define INIT_FRAME_PC_FIRST(FROMLEAF, PREV) \
+ (PREV)->pc = ((FROMLEAF) ? SAVED_PC_AFTER_CALL ((PREV)->next) : \
+ (PREV)->next ? FRAME_SAVED_PC ((PREV)->next) : read_pc ());
+
+/* Define other aspects of the stack frame. */
+
+/* The location of I0 w.r.t SP. This is actually dependent on how the
+ system's window overflow/underflow routines are written. Most
+ vendors save the L regs followed by the I regs (at the higher
+ address). Some vendors get it wrong. */
+
+#define FRAME_SAVED_L0 0
+#define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (L0_REGNUM))
+
+#define FRAME_STRUCT_ARGS_ADDRESS(FI) ((FI)->frame)
+
/* Things needed for making the inferior call functions. */
/*
* First of all, let me give my opinion of what the DUMMY_FRAME
@@ -455,20 +611,13 @@ extern CORE_ADDR sparc_frame_saved_pc PARAMS ((struct frame_info *));
* CALL_DUMMY, as directed by call_function).
*/
-/* Push an empty stack frame, to record the current PC, etc. */
-
-#define PUSH_DUMMY_FRAME sparc_push_dummy_frame ()
-#define POP_FRAME sparc_pop_frame ()
-
-void sparc_push_dummy_frame PARAMS ((void)), sparc_pop_frame PARAMS ((void));
-
#ifndef CALL_DUMMY
/* This sequence of words is the instructions
- 0: bc 10 00 01 mov %g1, %fp
- 4: 9d e3 80 00 save %sp, %g0, %sp
- 8: bc 10 00 02 mov %g2, %fp
- c: be 10 00 03 mov %g3, %i7
+ 00: bc 10 00 01 mov %g1, %fp
+ 04: 9d e3 80 00 save %sp, %g0, %sp
+ 08: bc 10 00 02 mov %g2, %fp
+ 0c: be 10 00 03 mov %g3, %i7
10: da 03 a0 58 ld [ %sp + 0x58 ], %o5
14: d8 03 a0 54 ld [ %sp + 0x54 ], %o4
18: d6 03 a0 50 ld [ %sp + 0x50 ], %o3
@@ -485,7 +634,12 @@ void sparc_push_dummy_frame PARAMS ((void)), sparc_pop_frame PARAMS ((void));
* this is a multiple of 8 (not only 4) bytes.
* the `call' insn is a relative, not an absolute call.
* the `nop' at the end is needed to keep the trap from
- clobbering things (if NPC pointed to garbage instead).
+ clobbering things (if NPC pointed to garbage instead).
+ */
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
*/
#define CALL_DUMMY { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003, \
@@ -506,26 +660,86 @@ void sparc_push_dummy_frame PARAMS ((void)), sparc_pop_frame PARAMS ((void));
#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + 0x24)
-/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
+/* Offset within CALL_DUMMY of the 'ta 1' trap instruction. */
#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 0x30)
#define CALL_DUMMY_STACK_ADJUST 68
-#endif
+/* Call dummy method (eg. on stack, at entry point, etc.) */
+
+#define CALL_DUMMY_LOCATION ON_STACK
+
+/* Method for detecting dummy frames. */
+
+#define PC_IN_CALL_DUMMY(PC, SP, FRAME_ADDRESS) \
+ pc_in_call_dummy_on_stack (PC, SP, FRAME_ADDRESS)
+
+#endif /* GDB_MULTI_ARCH */
+
+#endif /* CALL_DUMMY */
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
/* Insert the specified number of args and function address
into a call sequence of the above form stored at DUMMYNAME. */
-#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
- sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
+#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P) \
+ sparc_fix_call_dummy (DUMMYNAME, PC, FUN, TYPE, GCC_P)
void sparc_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun,
struct type * value_type, int using_gcc));
-/* The Sparc returns long doubles on the stack. */
+/* Arguments smaller than an int must be promoted to ints when
+ synthesizing function calls. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME sparc_push_dummy_frame ()
+#define POP_FRAME sparc_pop_frame ()
+
+void sparc_push_dummy_frame PARAMS ((void));
+void sparc_pop_frame PARAMS ((void));
+
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ sparc32_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+extern CORE_ADDR
+sparc32_push_arguments PARAMS ((int,
+ struct value **,
+ CORE_ADDR,
+ int,
+ CORE_ADDR));
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function_by_hand.
+ The ultimate mystery is, tho, what is the value "16"? */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { char val[4]; \
+ store_unsigned_integer (val, 4, (ADDR)); \
+ write_memory ((SP)+(16*4), val, 4); }
+
+/* Default definition of USE_STRUCT_CONVENTION. */
+
+#ifndef USE_STRUCT_CONVENTION
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) \
+ generic_use_struct_convention (GCC_P, TYPE)
+#endif
+
+/* Extract from an array REGBUF containing the (raw) register state a
+ function return value of type TYPE, and copy that, in virtual
+ format, into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+ sparc32_extract_return_value (TYPE, REGBUF, VALBUF)
+extern void
+sparc32_extract_return_value PARAMS ((struct type *, char[], char *));
+
+#endif /* GDB_MULTI_ARCH */
-#define RETURN_VALUE_ON_STACK(TYPE) \
- (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
- && TYPE_LENGTH(TYPE) > 8)
/* Sparc has no reliable single step ptrace call */
@@ -548,7 +762,6 @@ extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
sparc_print_register_hook (regno)
extern void sparc_print_register_hook PARAMS ((int regno));
-
/* Optimization for storing registers to the inferior. The hook
DO_DEFERRED_STORES
actually executes any deferred stores. It is called any time
@@ -564,21 +777,7 @@ extern int deferred_stores;
#define CLEAR_DEFERRED_STORES \
deferred_stores = 0;
-/* If the current gcc for for this target does not produce correct debugging
- information for float parameters, both prototyped and unprototyped, then
- define this macro. This forces gdb to always assume that floats are
- passed as doubles and then converted in the callee. */
-
-#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1)
-
/* Select the sparc disassembler */
#define TM_PRINT_INSN_MACH bfd_mach_sparc
-/* Arguments smaller than an int must promoted to ints when synthesizing
- function calls. */
-
-#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
- (sparc_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
-extern CORE_ADDR
- sparc_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
diff --git a/gdb/config/sparc/tm-sparclet.h b/gdb/config/sparc/tm-sparclet.h
index 2cec512..3684f74 100644
--- a/gdb/config/sparc/tm-sparclet.h
+++ b/gdb/config/sparc/tm-sparclet.h
@@ -18,9 +18,25 @@
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+#define TARGET_SPARCLET 1 /* Still needed for non-multi-arch case */
+
#include "sparc/tm-sparc.h"
-#define TARGET_SPARCLET 1
+/* Note: we are not defining GDB_MULTI_ARCH for the sparclet target
+ at this time, because we have not figured out how to detect the
+ sparclet target from the bfd structure. */
+
+/* Sparclet regs, for debugging purposes. */
+
+enum {
+ CCSR_REGNUM = 72,
+ CCPR_REGNUM = 73,
+ CCCRCR_REGNUM = 74,
+ CCOR_REGNUM = 75,
+ CCOBR_REGNUM = 76,
+ CCIBR_REGNUM = 77,
+ CCIR_REGNUM = 78
+};
/* Select the sparclet disassembler. Slightly different instruction set from
the V8 sparc. */
@@ -38,6 +54,11 @@
#define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
#define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91}
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
#undef NUM_REGS /* formerly "72" */
/* WIN FP CPU CCP ASR AWR APSR */
#define NUM_REGS (32 + 32 + 8 + 8 + 8/*+ 32 + 1*/)
@@ -80,7 +101,7 @@
/* Remove FP dependant code which was defined in tm-sparc.h */
#undef FP0_REGNUM /* Floating point register 0 */
-#undef FPS_REGNUM /* Floating point status register */
+#undef FPS_REGNUM /* Floating point status register */
#undef CPS_REGNUM /* Coprocessor status register */
/* sparclet register numbers */
@@ -103,6 +124,8 @@
TYPE_LENGTH (TYPE)); \
}
+#endif /* GDB_MULTI_ARCH */
+
#undef PRINT_REGISTER_HOOK
#define PRINT_REGISTER_HOOK(regno)
diff --git a/gdb/config/sparc/tm-sparclite.h b/gdb/config/sparc/tm-sparclite.h
index 2e63418..1ccb370 100644
--- a/gdb/config/sparc/tm-sparclite.h
+++ b/gdb/config/sparc/tm-sparclite.h
@@ -18,10 +18,27 @@
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-#define TARGET_SPARCLITE 1
+#define TARGET_SPARCLITE 1 /* Still needed for non-multi-arch case */
#include "sparc/tm-sparc.h"
+/* Note: we are not defining GDB_MULTI_ARCH for the sparclet target
+ at this time, because we have not figured out how to detect the
+ sparclet target from the bfd structure. */
+
+/* Sparclite regs, for debugging purposes */
+
+enum {
+ DIA1_REGNUM = 72, /* debug instr address register 1 */
+ DIA2_REGNUM = 73, /* debug instr address register 2 */
+ DDA1_REGNUM = 74, /* debug data address register 1 */
+ DDA2_REGNUM = 75, /* debug data address register 2 */
+ DDV1_REGNUM = 76, /* debug data value register 1 */
+ DDV2_REGNUM = 77, /* debug data value register 2 */
+ DCR_REGNUM = 78, /* debug control register */
+ DSR_REGNUM = 79 /* debug status regsiter */
+};
+
/* overrides of tm-sparc.h */
#undef TARGET_BYTE_ORDER
@@ -39,7 +56,13 @@
#define DECR_PC_AFTER_HW_BREAK 4
-#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
+#undef FRAME_CHAIN_VALID
+#define FRAME_CHAIN_VALID(FP,FI) func_frame_chain_valid (FP, FI)
#undef NUM_REGS
#define NUM_REGS 80
@@ -71,6 +94,8 @@
#define DCR_REGNUM 78 /* debug control register */
#define DSR_REGNUM 79 /* debug status regsiter */
+#endif /* GDB_MULTI_ARCH */
+
#define TARGET_HW_BREAK_LIMIT 2
#define TARGET_HW_WATCH_LIMIT 2
diff --git a/gdb/config/sparc/tm-sun4sol2.h b/gdb/config/sparc/tm-sun4sol2.h
index a432d61..dc487d4 100644
--- a/gdb/config/sparc/tm-sun4sol2.h
+++ b/gdb/config/sparc/tm-sun4sol2.h
@@ -19,6 +19,8 @@
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+/*#define GDB_MULTI_ARCH 2*/
+
#include "sparc/tm-sparc.h"
#include "tm-sysv4.h"