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authorYao Qi <yao.qi@linaro.org>2016-01-13 16:15:31 +0000
committerYao Qi <yao.qi@linaro.org>2016-01-13 16:15:31 +0000
commit4e7b8beaa3b7b9ac8577b10afa9d58bb9d453b08 (patch)
treec4c4049c6893a84579583a0c4e8b4a4e00b70257 /gdb/arch
parent663f6d42f47265d2deaa86c8a976e658fb13f820 (diff)
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Read instruction with byte_order_for_code
When reading instruction, we should use byte_order_for_code instead of byte_order. gdb: 2016-01-13 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (arm_get_next_pcs_raw): Use byte_order_for_code to read instruction.
Diffstat (limited to 'gdb/arch')
-rw-r--r--gdb/arch/arm-get-next-pcs.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/gdb/arch/arm-get-next-pcs.c b/gdb/arch/arm-get-next-pcs.c
index aba45e3..137df1d 100644
--- a/gdb/arch/arm-get-next-pcs.c
+++ b/gdb/arch/arm-get-next-pcs.c
@@ -644,6 +644,7 @@ static VEC (CORE_ADDR) *
arm_get_next_pcs_raw (struct arm_get_next_pcs *self, CORE_ADDR pc)
{
int byte_order = self->byte_order;
+ int byte_order_for_code = self->byte_order_for_code;
unsigned long pc_val;
unsigned long this_instr = 0;
unsigned long status;
@@ -652,7 +653,7 @@ arm_get_next_pcs_raw (struct arm_get_next_pcs *self, CORE_ADDR pc)
VEC (CORE_ADDR) *next_pcs = NULL;
pc_val = (unsigned long) pc;
- this_instr = self->ops->read_mem_uint (pc, 4, byte_order);
+ this_instr = self->ops->read_mem_uint (pc, 4, byte_order_for_code);
status = regcache_raw_get_unsigned (regcache, ARM_PS_REGNUM);
nextpc = (CORE_ADDR) (pc_val + 4); /* Default case */