Remove i860, i960, bout and aout-adobe targets

Plus remove a few leftovers from the 29k support. include/ * aout/adobe.h: Delete. * aout/reloc.h: Delete. * coff/i860.h: Delete. * coff/i960.h: Delete. * elf/i860.h: Delete. * elf/i960.h: Delete. * opcode/i860.h: Delete. * opcode/i960.h: Delete. * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values. * aout/ar.h (ARMAGB): Remove. * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr, union internal_auxent): Remove i960 support. bfd/ * aout-adobe.c: Delete. * bout.c: Delete. * coff-i860.c: Delete. * coff-i960.c: Delete. * cpu-i860.c: Delete. * cpu-i960.c: Delete. * elf32-i860.c: Delete. * elf32-i960.c: Delete. * hosts/i860mach3.h: Delete. * Makefile.am: Remove i860, i960, bout, and adobe support. * archures.c: Remove i860 and i960 support. * coffcode.h: Likewise. * reloc.c: Likewise. * aoutx.h: Comment updates. * archive.c: Remove BOUT and i960 support. * bfd.c: Remove BOUT support. * coffswap.h: Remove i960 support. * config.bfd: Remove i860, i960 and adobe targets. * configure.ac: Remove adode, bout, i860, i960, icoff targets. * targets.c: Likewise. * ieee.c: Remove i960 support. * mach-o.c: Remove i860 support. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * po/SRC-POTFILES.in: Regenerate. opcodes/ * opcodes/i860-dis.c: Delete. * opcodes/i960-dis.c: Delete. * Makefile.am: Remove i860 and i960 support. * configure.ac: Likewise. * disassemble.c: Likewise. * disassemble.h: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate. binutils/ * ieee.c: Remove i960 support. * od-macho.c: Remove i860 support. * readelf.c: Remove i860 and i960 support. * testsuite/binutils-all/objcopy.exp: Likewise. * testsuite/binutils-all/objdump.exp: Likewise. * testsuite/lib/binutils-common.exp: Likewise. gas/ * config/aout_gnu.h: Delete. * config/tc-i860.c: Delete. * config/tc-i860.h: Delete. * config/tc-i960.c: Delete. * config/tc-i960.h: Delete. * doc/c-i860.texi: Delete. * doc/c-i960.texi: Delete. * testsuite/gas/i860/README.i860: Delete. * testsuite/gas/i860/bitwise.d: Delete. * testsuite/gas/i860/bitwise.s: Delete. * testsuite/gas/i860/branch.d: Delete. * testsuite/gas/i860/branch.s: Delete. * testsuite/gas/i860/bte.d: Delete. * testsuite/gas/i860/bte.s: Delete. * testsuite/gas/i860/dir-align01.d: Delete. * testsuite/gas/i860/dir-align01.s: Delete. * testsuite/gas/i860/dir-intel01.d: Delete. * testsuite/gas/i860/dir-intel01.s: Delete. * testsuite/gas/i860/dir-intel02.d: Delete. * testsuite/gas/i860/dir-intel02.s: Delete. * testsuite/gas/i860/dir-intel03-err.l: Delete. * testsuite/gas/i860/dir-intel03-err.s: Delete. * testsuite/gas/i860/dual01.d: Delete. * testsuite/gas/i860/dual01.s: Delete. * testsuite/gas/i860/dual02-err.l: Delete. * testsuite/gas/i860/dual02-err.s: Delete. * testsuite/gas/i860/dual03.d: Delete. * testsuite/gas/i860/dual03.s: Delete. * testsuite/gas/i860/fldst01.d: Delete. * testsuite/gas/i860/fldst01.s: Delete. * testsuite/gas/i860/fldst02.d: Delete. * testsuite/gas/i860/fldst02.s: Delete. * testsuite/gas/i860/fldst03.d: Delete. * testsuite/gas/i860/fldst03.s: Delete. * testsuite/gas/i860/fldst04.d: Delete. * testsuite/gas/i860/fldst04.s: Delete. * testsuite/gas/i860/fldst05.d: Delete. * testsuite/gas/i860/fldst05.s: Delete. * testsuite/gas/i860/fldst06.d: Delete. * testsuite/gas/i860/fldst06.s: Delete. * testsuite/gas/i860/fldst07.d: Delete. * testsuite/gas/i860/fldst07.s: Delete. * testsuite/gas/i860/fldst08.d: Delete. * testsuite/gas/i860/fldst08.s: Delete. * testsuite/gas/i860/float01.d: Delete. * testsuite/gas/i860/float01.s: Delete. * testsuite/gas/i860/float02.d: Delete. * testsuite/gas/i860/float02.s: Delete. * testsuite/gas/i860/float03.d: Delete. * testsuite/gas/i860/float03.s: Delete. * testsuite/gas/i860/float04.d: Delete. * testsuite/gas/i860/float04.s: Delete. * testsuite/gas/i860/form.d: Delete. * testsuite/gas/i860/form.s: Delete. * testsuite/gas/i860/i860.exp: Delete. * testsuite/gas/i860/iarith.d: Delete. * testsuite/gas/i860/iarith.s: Delete. * testsuite/gas/i860/ldst01.d: Delete. * testsuite/gas/i860/ldst01.s: Delete. * testsuite/gas/i860/ldst02.d: Delete. * testsuite/gas/i860/ldst02.s: Delete. * testsuite/gas/i860/ldst03.d: Delete. * testsuite/gas/i860/ldst03.s: Delete. * testsuite/gas/i860/ldst04.d: Delete. * testsuite/gas/i860/ldst04.s: Delete. * testsuite/gas/i860/ldst05.d: Delete. * testsuite/gas/i860/ldst05.s: Delete. * testsuite/gas/i860/ldst06.d: Delete. * testsuite/gas/i860/ldst06.s: Delete. * testsuite/gas/i860/pfam.d: Delete. * testsuite/gas/i860/pfam.s: Delete. * testsuite/gas/i860/pfmam.d: Delete. * testsuite/gas/i860/pfmam.s: Delete. * testsuite/gas/i860/pfmsm.d: Delete. * testsuite/gas/i860/pfmsm.s: Delete. * testsuite/gas/i860/pfsm.d: Delete. * testsuite/gas/i860/pfsm.s: Delete. * testsuite/gas/i860/pseudo-ops01.d: Delete. * testsuite/gas/i860/pseudo-ops01.s: Delete. * testsuite/gas/i860/regress01.d: Delete. * testsuite/gas/i860/regress01.s: Delete. * testsuite/gas/i860/shift.d: Delete. * testsuite/gas/i860/shift.s: Delete. * testsuite/gas/i860/simd.d: Delete. * testsuite/gas/i860/simd.s: Delete. * testsuite/gas/i860/system.d: Delete. * testsuite/gas/i860/system.s: Delete. * testsuite/gas/i860/xp.d: Delete. * testsuite/gas/i860/xp.s: Delete. * Makefile.am: Remove i860 and i960 support. * configure.tgt: Likewise. * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * testsuite/gas/all/gas.exp * config/obj-coff.h: Remove i960 support. * doc/internals.texi: Likewise. * expr.c: Likewise. * read.c: Likewise. * write.c: Likewise. * write.h: Likewise. * testsuite/gas/lns/lns.exp: Likewise. * testsuite/gas/symver/symver.exp: Likewise. * config/tc-m68k.c: Remove BOUT support. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sparc.c: Likewise. * symbols.c: Likewise. * doc/h8.texi: Likewise. * configure.ac: Remove BOUT and i860 support. * doc/as.texinfo: Remove BOUT, i860 and i960 support * Makefile.in: Regenerate. * config.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. ld/ * emulparams/coff_i860.sh: Delete. * emulparams/elf32_i860.sh: Delete. * emulparams/elf32_i960.sh: Delete. * emulparams/gld960.sh: Delete. * emulparams/gld960coff.sh: Delete. * emulparams/lnk960.sh: Delete. * emultempl/gld960.em: Delete. * emultempl/gld960c.em: Delete. * emultempl/lnk960.em: Delete. * scripttempl/i860coff.sc: Delete. * scripttempl/i960.sc: Delete. * ld.texinfo: Remove i960 support. * Makefile.am: Remove i860 and i960 support. * configure.tgt: Likewise. * testsuite/ld-discard/extern.d: Likewise. * testsuite/ld-discard/start.d: Likewise. * testsuite/ld-discard/static.d: Likewise. * testsuite/ld-elf/compressed1d.d: Likewise. * testsuite/ld-elf/group1.d: Likewise. * testsuite/ld-elf/group3b.d: Likewise. * testsuite/ld-elf/group8a.d: Likewise. * testsuite/ld-elf/group8b.d: Likewise. * testsuite/ld-elf/group9a.d: Likewise. * testsuite/ld-elf/group9b.d: Likewise. * testsuite/ld-elf/linkonce2.d: Likewise. * testsuite/ld-elf/merge.d: Likewise. * testsuite/ld-elf/merge2.d: Likewise. * testsuite/ld-elf/merge3.d: Likewise. * testsuite/ld-elf/orphan-10.d: Likewise. * testsuite/ld-elf/orphan-11.d: Likewise. * testsuite/ld-elf/orphan-12.d: Likewise. * testsuite/ld-elf/orphan-9.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/orphan.d: Likewise. * testsuite/ld-elf/orphan3.d: Likewise. * testsuite/ld-elf/pr12851.d: Likewise. * testsuite/ld-elf/pr12975.d: Likewise. * testsuite/ld-elf/pr13177.d: Likewise. * testsuite/ld-elf/pr13195.d: Likewise. * testsuite/ld-elf/pr17550a.d: Likewise. * testsuite/ld-elf/pr17550b.d: Likewise. * testsuite/ld-elf/pr17550c.d: Likewise. * testsuite/ld-elf/pr17550d.d: Likewise. * testsuite/ld-elf/pr17615.d: Likewise. * testsuite/ld-elf/pr20528a.d: Likewise. * testsuite/ld-elf/pr20528b.d: Likewise. * testsuite/ld-elf/pr21562a.d: Likewise. * testsuite/ld-elf/pr21562b.d: Likewise. * testsuite/ld-elf/pr21562c.d: Likewise. * testsuite/ld-elf/pr21562d.d: Likewise. * testsuite/ld-elf/pr21562i.d: Likewise. * testsuite/ld-elf/pr21562j.d: Likewise. * testsuite/ld-elf/pr21562k.d: Likewise. * testsuite/ld-elf/pr21562l.d: Likewise. * testsuite/ld-elf/pr21562m.d: Likewise. * testsuite/ld-elf/pr21562n.d: Likewise. * testsuite/ld-elf/pr22677.d: Likewise. * testsuite/ld-elf/pr22836-1a.d: Likewise. * testsuite/ld-elf/pr22836-1b.d: Likewise. * testsuite/ld-elf/pr349.d: Likewise. * testsuite/ld-elf/sec-to-seg.exp: Likewise. * testsuite/ld-elf/sec64k.exp: Likewise. * testsuite/ld-elf/warn1.d: Likewise. * testsuite/ld-elf/warn2.d: Likewise. * testsuite/ld-elf/warn3.d: Likewise. * testsuite/lib/ld-lib.exp: Likewise. * Makefile.in: Regenerate. * po/BLD-POTFILES.in: Regenerate.
author: Alan Modra <amodra@gmail.com> 2018-04-11 18:46:05 +0930
committer: Alan Modra <amodra@gmail.com> 2018-04-11 21:49:30 +0930
commit: a8eb42a8b7d48ff6bd12ac83b0e31967b4f5abf1 (patch)
tree: 60b19da93f47532605aea14cc4cec88b442c43f6 /gas
parent: c43b2c546be1fead208b816b59c8bdcdf9562571 (diff)
download: fsf-binutils-gdb-a8eb42a8b7d48ff6bd12ac83b0e31967b4f5abf1.zip
fsf-binutils-gdb-a8eb42a8b7d48ff6bd12ac83b0e31967b4f5abf1.tar.gz
fsf-binutils-gdb-a8eb42a8b7d48ff6bd12ac83b0e31967b4f5abf1.tar.bz2
116 files changed, 149 insertions, 11782 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index f7dc5e5..894ad7d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,121 @@
+2018-04-11  Alan Modra  <amodra@gmail.com>
+
+	* config/aout_gnu.h: Delete.
+	* config/tc-i860.c: Delete.
+	* config/tc-i860.h: Delete.
+	* config/tc-i960.c: Delete.
+	* config/tc-i960.h: Delete.
+	* doc/c-i860.texi: Delete.
+	* doc/c-i960.texi: Delete.
+	* testsuite/gas/i860/README.i860: Delete.
+	* testsuite/gas/i860/bitwise.d: Delete.
+	* testsuite/gas/i860/bitwise.s: Delete.
+	* testsuite/gas/i860/branch.d: Delete.
+	* testsuite/gas/i860/branch.s: Delete.
+	* testsuite/gas/i860/bte.d: Delete.
+	* testsuite/gas/i860/bte.s: Delete.
+	* testsuite/gas/i860/dir-align01.d: Delete.
+	* testsuite/gas/i860/dir-align01.s: Delete.
+	* testsuite/gas/i860/dir-intel01.d: Delete.
+	* testsuite/gas/i860/dir-intel01.s: Delete.
+	* testsuite/gas/i860/dir-intel02.d: Delete.
+	* testsuite/gas/i860/dir-intel02.s: Delete.
+	* testsuite/gas/i860/dir-intel03-err.l: Delete.
+	* testsuite/gas/i860/dir-intel03-err.s: Delete.
+	* testsuite/gas/i860/dual01.d: Delete.
+	* testsuite/gas/i860/dual01.s: Delete.
+	* testsuite/gas/i860/dual02-err.l: Delete.
+	* testsuite/gas/i860/dual02-err.s: Delete.
+	* testsuite/gas/i860/dual03.d: Delete.
+	* testsuite/gas/i860/dual03.s: Delete.
+	* testsuite/gas/i860/fldst01.d: Delete.
+	* testsuite/gas/i860/fldst01.s: Delete.
+	* testsuite/gas/i860/fldst02.d: Delete.
+	* testsuite/gas/i860/fldst02.s: Delete.
+	* testsuite/gas/i860/fldst03.d: Delete.
+	* testsuite/gas/i860/fldst03.s: Delete.
+	* testsuite/gas/i860/fldst04.d: Delete.
+	* testsuite/gas/i860/fldst04.s: Delete.
+	* testsuite/gas/i860/fldst05.d: Delete.
+	* testsuite/gas/i860/fldst05.s: Delete.
+	* testsuite/gas/i860/fldst06.d: Delete.
+	* testsuite/gas/i860/fldst06.s: Delete.
+	* testsuite/gas/i860/fldst07.d: Delete.
+	* testsuite/gas/i860/fldst07.s: Delete.
+	* testsuite/gas/i860/fldst08.d: Delete.
+	* testsuite/gas/i860/fldst08.s: Delete.
+	* testsuite/gas/i860/float01.d: Delete.
+	* testsuite/gas/i860/float01.s: Delete.
+	* testsuite/gas/i860/float02.d: Delete.
+	* testsuite/gas/i860/float02.s: Delete.
+	* testsuite/gas/i860/float03.d: Delete.
+	* testsuite/gas/i860/float03.s: Delete.
+	* testsuite/gas/i860/float04.d: Delete.
+	* testsuite/gas/i860/float04.s: Delete.
+	* testsuite/gas/i860/form.d: Delete.
+	* testsuite/gas/i860/form.s: Delete.
+	* testsuite/gas/i860/i860.exp: Delete.
+	* testsuite/gas/i860/iarith.d: Delete.
+	* testsuite/gas/i860/iarith.s: Delete.
+	* testsuite/gas/i860/ldst01.d: Delete.
+	* testsuite/gas/i860/ldst01.s: Delete.
+	* testsuite/gas/i860/ldst02.d: Delete.
+	* testsuite/gas/i860/ldst02.s: Delete.
+	* testsuite/gas/i860/ldst03.d: Delete.
+	* testsuite/gas/i860/ldst03.s: Delete.
+	* testsuite/gas/i860/ldst04.d: Delete.
+	* testsuite/gas/i860/ldst04.s: Delete.
+	* testsuite/gas/i860/ldst05.d: Delete.
+	* testsuite/gas/i860/ldst05.s: Delete.
+	* testsuite/gas/i860/ldst06.d: Delete.
+	* testsuite/gas/i860/ldst06.s: Delete.
+	* testsuite/gas/i860/pfam.d: Delete.
+	* testsuite/gas/i860/pfam.s: Delete.
+	* testsuite/gas/i860/pfmam.d: Delete.
+	* testsuite/gas/i860/pfmam.s: Delete.
+	* testsuite/gas/i860/pfmsm.d: Delete.
+	* testsuite/gas/i860/pfmsm.s: Delete.
+	* testsuite/gas/i860/pfsm.d: Delete.
+	* testsuite/gas/i860/pfsm.s: Delete.
+	* testsuite/gas/i860/pseudo-ops01.d: Delete.
+	* testsuite/gas/i860/pseudo-ops01.s: Delete.
+	* testsuite/gas/i860/regress01.d: Delete.
+	* testsuite/gas/i860/regress01.s: Delete.
+	* testsuite/gas/i860/shift.d: Delete.
+	* testsuite/gas/i860/shift.s: Delete.
+	* testsuite/gas/i860/simd.d: Delete.
+	* testsuite/gas/i860/simd.s: Delete.
+	* testsuite/gas/i860/system.d: Delete.
+	* testsuite/gas/i860/system.s: Delete.
+	* testsuite/gas/i860/xp.d: Delete.
+	* testsuite/gas/i860/xp.s: Delete.
+	* Makefile.am: Remove i860 and i960 support.
+	* configure.tgt: Likewise.
+	* doc/Makefile.am: Likewise.
+	* doc/all.texi: Likewise.
+	* testsuite/gas/all/gas.exp
+	* config/obj-coff.h: Remove i960 support.
+	* doc/internals.texi: Likewise.
+	* expr.c: Likewise.
+	* read.c: Likewise.
+	* write.c: Likewise.
+	* write.h: Likewise.
+	* testsuite/gas/lns/lns.exp: Likewise.
+	* testsuite/gas/symver/symver.exp: Likewise.
+	* config/tc-m68k.c: Remove BOUT support.
+	* config/tc-score.c: Likewise.
+	* config/tc-score7.c: Likewise.
+	* config/tc-sparc.c: Likewise.
+	* symbols.c: Likewise.
+	* doc/h8.texi: Likewise.
+	* configure.ac: Remove BOUT and i860 support.
+	* doc/as.texinfo: Remove BOUT, i860 and i960 support
+	* Makefile.in: Regenerate.
+	* config.in: Regenerate.
+	* configure: Regenerate.
+	* doc/Makefile.in: Regenerate.
+	* po/POTFILES.in: Regenerate.
+
 2018-04-05  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR gas/22318
diff --git a/gas/Makefile.am b/gas/Makefile.am
index 5aa68f3..3b0dd03 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -150,8 +150,6 @@ TARGET_CPU_CFILES = \
 	config/tc-ia64.c \
 	config/tc-i370.c \
 	config/tc-i386.c \
-	config/tc-i860.c \
-	config/tc-i960.c \
 	config/tc-ip2k.c \
 	config/tc-iq2000.c \
 	config/tc-lm32.c \
@@ -227,8 +225,6 @@ TARGET_CPU_HFILES = \
 	config/tc-ia64.h \
 	config/tc-i370.h \
 	config/tc-i386.h \
-	config/tc-i860.h \
-	config/tc-i960.h \
 	config/tc-ip2k.h \
 	config/tc-iq2000.h \
 	config/tc-lm32.h \
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 51e96e5..8968b1e 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -446,8 +446,6 @@ TARGET_CPU_CFILES = \
 	config/tc-ia64.c \
 	config/tc-i370.c \
 	config/tc-i386.c \
-	config/tc-i860.c \
-	config/tc-i960.c \
 	config/tc-ip2k.c \
 	config/tc-iq2000.c \
 	config/tc-lm32.c \
@@ -523,8 +521,6 @@ TARGET_CPU_HFILES = \
 	config/tc-ia64.h \
 	config/tc-i370.h \
 	config/tc-i386.h \
-	config/tc-i860.h \
-	config/tc-i960.h \
 	config/tc-ip2k.h \
 	config/tc-iq2000.h \
 	config/tc-lm32.h \
@@ -882,8 +878,6 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-hppa.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-i370.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-i386.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-i860.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-i960.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ia64.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ip2k.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-iq2000.Po@am__quote@
@@ -1255,34 +1249,6 @@ tc-i386.obj: config/tc-i386.c
 @AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
 @am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-i386.obj `if test -f 'config/tc-i386.c'; then $(CYGPATH_W) 'config/tc-i386.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-i386.c'; fi`
 
-tc-i860.o: config/tc-i860.c
-@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-i860.o -MD -MP -MF $(DEPDIR)/tc-i860.Tpo -c -o tc-i860.o `test -f 'config/tc-i860.c' || echo '$(srcdir)/'`config/tc-i860.c
-@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-i860.Tpo $(DEPDIR)/tc-i860.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-i860.c' object='tc-i860.o' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-i860.o `test -f 'config/tc-i860.c' || echo '$(srcdir)/'`config/tc-i860.c
-
-tc-i860.obj: config/tc-i860.c
-@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-i860.obj -MD -MP -MF $(DEPDIR)/tc-i860.Tpo -c -o tc-i860.obj `if test -f 'config/tc-i860.c'; then $(CYGPATH_W) 'config/tc-i860.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-i860.c'; fi`
-@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-i860.Tpo $(DEPDIR)/tc-i860.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-i860.c' object='tc-i860.obj' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-i860.obj `if test -f 'config/tc-i860.c'; then $(CYGPATH_W) 'config/tc-i860.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-i860.c'; fi`
-
-tc-i960.o: config/tc-i960.c
-@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-i960.o -MD -MP -MF $(DEPDIR)/tc-i960.Tpo -c -o tc-i960.o `test -f 'config/tc-i960.c' || echo '$(srcdir)/'`config/tc-i960.c
-@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-i960.Tpo $(DEPDIR)/tc-i960.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-i960.c' object='tc-i960.o' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-i960.o `test -f 'config/tc-i960.c' || echo '$(srcdir)/'`config/tc-i960.c
-
-tc-i960.obj: config/tc-i960.c
-@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-i960.obj -MD -MP -MF $(DEPDIR)/tc-i960.Tpo -c -o tc-i960.obj `if test -f 'config/tc-i960.c'; then $(CYGPATH_W) 'config/tc-i960.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-i960.c'; fi`
-@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-i960.Tpo $(DEPDIR)/tc-i960.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-i960.c' object='tc-i960.obj' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-i960.obj `if test -f 'config/tc-i960.c'; then $(CYGPATH_W) 'config/tc-i960.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-i960.c'; fi`
-
 tc-ip2k.o: config/tc-ip2k.c
 @am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-ip2k.o -MD -MP -MF $(DEPDIR)/tc-ip2k.Tpo -c -o tc-ip2k.o `test -f 'config/tc-ip2k.c' || echo '$(srcdir)/'`config/tc-ip2k.c
 @am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-ip2k.Tpo $(DEPDIR)/tc-ip2k.Po
diff --git a/gas/config.in b/gas/config.in
index 0855179..76c7c17 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -238,9 +238,6 @@
 /* a.out support? */
 #undef OBJ_MAYBE_AOUT
 
-/* b.out support? */
-#undef OBJ_MAYBE_BOUT
-
 /* COFF support? */
 #undef OBJ_MAYBE_COFF
 
diff --git a/gas/config/aout_gnu.h b/gas/config/aout_gnu.h
deleted file mode 100644
index f404d1e..0000000
--- a/gas/config/aout_gnu.h
+++ /dev/null
@@ -1,451 +0,0 @@
-/* This file is aout_gnu.h
-
-   Copyright (C) 1987-2018 Free Software Foundation, Inc.
-
-   This file is part of GAS, the GNU Assembler.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   GAS is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GAS; see the file COPYING.  If not, write to
-   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
-   Boston, MA 02110-1301, USA.  */
-
-#ifndef __A_OUT_GNU_H__
-#define __A_OUT_GNU_H__
-
-/* There are two main flavours of a.out, one which uses the standard
-   relocations, and one which uses extended relocations.
-
-   Today, the extended reloc uses are
-   TC_SPARC
-
-   each must define the enum reloc_type
-
-*/
-
-#if defined(TC_SPARC)
-enum reloc_type
-  {
-    RELOC_8, RELOC_16, RELOC_32,/* simple relocations */
-    RELOC_DISP8, RELOC_DISP16, RELOC_DISP32,	/* pc-rel displacement */
-    RELOC_WDISP30, RELOC_WDISP22,
-    RELOC_HI22, RELOC_22,
-    RELOC_13, RELOC_LO10,
-    RELOC_SFA_BASE, RELOC_SFA_OFF13,
-    RELOC_BASE10, RELOC_BASE13, RELOC_BASE22,	/* P.I.C. (base-relative) */
-    RELOC_PC10, RELOC_PC22,	/* for some sort of pc-rel P.I.C. (?) */
-    RELOC_JMP_TBL,		/* P.I.C. jump table */
-    RELOC_SEGOFF16,		/* reputedly for shared libraries somehow */
-    RELOC_GLOB_DAT, RELOC_JMP_SLOT, RELOC_RELATIVE,
-    RELOC_10, RELOC_11,
-    RELOC_WDISP2_14,
-    RELOC_WDISP19,
-    RELOC_HHI22,
-    RELOC_HLO10,
-
-    /* 29K relocation types */
-    RELOC_JUMPTARG, RELOC_CONST, RELOC_CONSTH,
-
-    RELOC_WDISP14, RELOC_WDISP21,
-
-    NO_RELOC
-  };
-
-#define USE_EXTENDED_RELOC 1
-#else
-#define USE_EXTENDED_RELOC 0
-#endif /* TC_SPARC */
-
-#define __GNU_EXEC_MACROS__
-
-#ifndef __STRUCT_EXEC_OVERRIDE__
-
-/* This is the layout on disk of a Unix V7, Berkeley, SunOS, Vax Ultrix
-   "struct exec".  Don't assume that on this machine, the "struct exec"
-   will lay out the same sizes or alignments.  */
-
-struct exec_bytes
-  {
-    unsigned char a_info[4];
-    unsigned char a_text[4];
-    unsigned char a_data[4];
-    unsigned char a_bss[4];
-    unsigned char a_syms[4];
-    unsigned char a_entry[4];
-    unsigned char a_trsize[4];
-    unsigned char a_drsize[4];
-  };
-
-/* How big the "struct exec" is on disk */
-#define	EXEC_BYTES_SIZE	(8 * 4)
-
-/* This is the layout in memory of a "struct exec" while we process it.  */
-
-struct exec
-{
-  unsigned long a_info;		/* Use macros N_MAGIC, etc for access */
-  unsigned a_text;		/* length of text, in bytes */
-  unsigned a_data;		/* length of data, in bytes */
-  unsigned a_bss;		/* length of uninitialized data area for file, in bytes */
-  unsigned a_syms;		/* length of symbol table data in file, in bytes */
-  unsigned a_entry;		/* start address */
-  unsigned a_trsize;		/* length of relocation info for text, in bytes */
-  unsigned a_drsize;		/* length of relocation info for data, in bytes */
-};
-
-#endif /* __STRUCT_EXEC_OVERRIDE__ */
-
-/* these go in the N_MACHTYPE field */
-/* These symbols could be defined by code from Suns...punt 'em */
-#undef M_UNKNOWN
-#undef M_68010
-#undef M_68020
-#undef M_SPARC
-enum machine_type
-  {
-    M_UNKNOWN = 0,
-    M_68010 = 1,
-    M_68020 = 2,
-    M_SPARC = 3,
-    /* skip a bunch so we don't run into any of sun's numbers */
-    M_386 = 100,
-    M_29K = 101,
-    M_RS6000 = 102,		/* IBM RS/6000 */
-    M_VAX4K_NETBSD = 150,
-    /* HP/BSD formats */
-    M_HP200 = 200,		/* hp200 (68010) BSD binary */
-    M_HP300 = 300,		/* hp300 (68020+68881) BSD binary */
-    M_HPUX23 = 0x020C		/* hp200/300 HPUX binary */
-  };
-
-#define N_MAGIC(execp) ((execp)->a_info & 0xffff)
-#define N_MACHTYPE(execp) ((enum machine_type)(((execp)->a_info >> 16) & 0xff))
-#define N_FLAGS(execp) (((execp)->a_info >> 24) & 0xff)
-#define N_SET_INFO(execp, magic, type, flags) \
-    ((execp)->a_info = ((magic) & 0xffff) \
-     | (((int)(type) & 0xff) << 16) \
-     | (((flags) & 0xff) << 24))
-#define N_SET_MAGIC(execp, magic) \
-    ((execp)->a_info = (((execp)->a_info & 0xffff0000) | ((magic) & 0xffff)))
-
-#define N_SET_MACHTYPE(execp, machtype) \
-    ((execp)->a_info = \
-     ((execp)->a_info & 0xff00ffff) | ((((int) (machtype)) & 0xff) << 16))
-
-#define N_SET_FLAGS(execp, flags) \
-    ((execp)->a_info = \
-     ((execp)->a_info & 0x00ffffff) | (((flags) & 0xff) << 24))
-
-/* Code indicating object file or impure executable.  */
-#ifndef OMAGIC
-#define OMAGIC 0407
-#endif
-/* Code indicating pure executable.  */
-#define NMAGIC 0410
-/* Code indicating demand-paged executable.  */
-#define ZMAGIC 0413
-
-/* Virtual Address of text segment from the a.out file.  For OMAGIC,
-   (almost always "unlinked .o's" these days), should be zero.
-   For linked files, should reflect reality if we know it.  */
-
-#ifndef N_TXTADDR
-#define N_TXTADDR(x)	(N_MAGIC(x)==OMAGIC? 0 : TEXT_START_ADDR)
-#endif
-
-#ifndef N_BADMAG
-#define N_BADMAG(x)	  (N_MAGIC(x) != OMAGIC		\
-			   && N_MAGIC(x) != NMAGIC		\
-			   && N_MAGIC(x) != ZMAGIC)
-#endif
-
-/* By default, segment size is constant.  But on some machines, it can
-   be a function of the a.out header (e.g. machine type).  */
-#ifndef	N_SEGSIZE
-#define	N_SEGSIZE(x)	SEGMENT_SIZE
-#endif
-
-/* This complexity is for encapsulated COFF support */
-#ifndef _N_HDROFF
-#define _N_HDROFF(x)	(N_SEGSIZE(x) - sizeof (struct exec))
-#endif
-
-#ifndef N_TXTOFF
-#define N_TXTOFF(x)	(N_MAGIC(x) == ZMAGIC ?	\
-			 _N_HDROFF((x)) + sizeof (struct exec) :	\
-			 sizeof (struct exec))
-#endif
-
-#ifndef N_DATOFF
-#define N_DATOFF(x)	( N_TXTOFF(x) + (x)->a_text )
-#endif
-
-#ifndef N_TRELOFF
-#define N_TRELOFF(x)	( N_DATOFF(x) + (x)->a_data )
-#endif
-
-#ifndef N_DRELOFF
-#define N_DRELOFF(x)	( N_TRELOFF(x) + (x)->a_trsize )
-#endif
-
-#ifndef N_SYMOFF
-#define N_SYMOFF(x)	( N_DRELOFF(x) + (x)->a_drsize )
-#endif
-
-#ifndef N_STROFF
-#define N_STROFF(x)	( N_SYMOFF(x) + (x)->a_syms )
-#endif
-
-/* Address of text segment in memory after it is loaded.  */
-#ifndef N_TXTADDR
-#define	N_TXTADDR(x)	0
-#endif
-
-#ifndef N_DATADDR
-#define N_DATADDR(x) \
-    (N_MAGIC(x)==OMAGIC? (N_TXTADDR(x)+(x)->a_text) \
-     :  (N_SEGSIZE(x) + ((N_TXTADDR(x)+(x)->a_text-1) & ~(N_SEGSIZE(x)-1))))
-#endif
-
-/* Address of bss segment in memory after it is loaded.  */
-#define N_BSSADDR(x) (N_DATADDR(x) + (x)->a_data)
-
-struct nlist
-  {
-    union
-      {
-	char *n_name;
-	struct nlist *n_next;
-	long n_strx;
-      }
-    n_un;
-    unsigned char n_type;
-    char n_other;
-    short n_desc;
-    unsigned long n_value;
-  };
-
-#define N_UNDF 0
-#define N_ABS 2
-#define N_TEXT 4
-#define N_DATA 6
-#define N_BSS 8
-#define	N_COMM	0x12		/* common (visible in shared lib commons) */
-#define N_FN 0x1F		/* File name of a .o file */
-
-/* Note: N_EXT can only usefully be OR-ed with N_UNDF, N_ABS, N_TEXT,
-   N_DATA, or N_BSS.  When the low-order bit of other types is set,
-   (e.g. N_WARNING versus N_FN), they are two different types.  */
-#define N_EXT 1
-#define N_TYPE 036
-#define N_STAB 0340
-
-/* The following type indicates the definition of a symbol as being
-   an indirect reference to another symbol.  The other symbol
-   appears as an undefined reference, immediately following this symbol.
-
-   Indirection is asymmetrical.  The other symbol's value will be used
-   to satisfy requests for the indirect symbol, but not vice versa.
-   If the other symbol does not have a definition, libraries will
-   be searched to find a definition.  */
-
-#define N_INDR 0xa
-
-/* The following symbols refer to set elements.
-   All the N_SET[ATDB] symbols with the same name form one set.
-   Space is allocated for the set in the text section, and each set
-   element's value is stored into one word of the space.
-   The first word of the space is the length of the set (number of elements).
-
-   The address of the set is made into an N_SETV symbol
-   whose name is the same as the name of the set.
-   This symbol acts like a N_DATA global symbol
-   in that it can satisfy undefined external references.  */
-
-/* These appear as input to LD, in a .o file.  */
-#define	N_SETA	0x14		/* Absolute set element symbol */
-#define	N_SETT	0x16		/* Text set element symbol */
-#define	N_SETD	0x18		/* Data set element symbol */
-#define	N_SETB	0x1A		/* Bss set element symbol */
-
-/* This is output from LD.  */
-#define N_SETV	0x1C		/* Pointer to set vector in data area.  */
-
-/* Warning symbol. The text gives a warning message, the next symbol
-   in the table will be undefined. When the symbol is referenced, the
-   message is printed.  */
-
-#define	N_WARNING 0x1e
-
-/* Weak symbols.  These are a GNU extension to the a.out format.  The
-   semantics are those of ELF weak symbols.  Weak symbols are always
-   externally visible.  The N_WEAK? values are squeezed into the
-   available slots.  The value of a N_WEAKU symbol is 0.  The values
-   of the other types are the definitions.  */
-#define N_WEAKU	0x0d		/* Weak undefined symbol.  */
-#define N_WEAKA 0x0e		/* Weak absolute symbol.  */
-#define N_WEAKT 0x0f		/* Weak text symbol.  */
-#define N_WEAKD 0x10		/* Weak data symbol.  */
-#define N_WEAKB 0x11		/* Weak bss symbol.  */
-
-/* This structure describes a single relocation to be performed.
-   The text-relocation section of the file is a vector of these structures,
-   all of which apply to the text section.
-   Likewise, the data-relocation section applies to the data section.  */
-
-/* The following enum and struct were borrowed from SunOS's
-   /usr/include/sun4/a.out.h  and extended to handle
-   other machines.  It is currently used on SPARC.
-
-   reloc_ext_bytes is how it looks on disk.  reloc_info_extended is
-   how we might process it on a native host.  */
-#if USE_EXTENDED_RELOC
-
-struct reloc_ext_bytes
-  {
-    unsigned char r_address[4];
-    unsigned char r_index[3];
-    unsigned char r_bits[1];
-    unsigned char r_addend[4];
-  };
-
-#define	RELOC_EXT_BITS_EXTERN_BIG	0x80
-#define	RELOC_EXT_BITS_EXTERN_LITTLE	0x01
-
-#define	RELOC_EXT_BITS_TYPE_BIG		0x1F
-#define	RELOC_EXT_BITS_TYPE_SH_BIG	0
-#define	RELOC_EXT_BITS_TYPE_LITTLE	0xF8
-#define	RELOC_EXT_BITS_TYPE_SH_LITTLE	3
-
-#define	RELOC_EXT_SIZE	12	/* Bytes per relocation entry */
-
-struct reloc_info_extended
-{
-  unsigned long r_address;
-  unsigned int r_index:24;
-# define	r_symbolnum  r_index
-  unsigned r_extern:1;
-  unsigned:2;
-  /*  RS/6000 compiler does not support enum bitfield
-	    enum reloc_type r_type:5; */
-  enum reloc_type r_type;
-  long int r_addend;
-};
-
-#else
-
-/* The standard, old-fashioned, Berkeley compatible relocation struct */
-
-#ifdef TC_I860
-/* NOTE: three bits max, see struct reloc_info_i860.r_type */
-enum i860_reloc_type
-  {
-    NO_RELOC = 0, BRADDR, LOW0, LOW1, LOW2, LOW3, LOW4, SPLIT0, SPLIT1, SPLIT2, RELOC_32,
-  };
-
-typedef enum i860_reloc_type reloc_type;
-
-/* NOTE: two bits max, see reloc_info_i860.r_type */
-enum highlow_type
-  {
-    NO_SPEC = 0, PAIR, HIGH, HIGHADJ,
-  };
-
-struct reloc_info_i860
-{
-  unsigned long r_address;
-  /*
-	 * Using bit fields here is a bad idea because the order is not portable. :-(
-	 */
-  unsigned int r_symbolnum:24;
-  unsigned int r_pcrel:1;
-  unsigned int r_extern:1;
-  /* combining the two field simplifies the argument passing in "new_fix()" */
-  /* and is compatible with the existing Sparc #ifdef's */
-  /* r_type:  highlow_type - bits 5,4; reloc_type - bits 3-0 */
-  unsigned int r_type:6;
-  long r_addend;
-};
-
-#endif /* TC_I860 */
-
-struct reloc_std_bytes
-  {
-    unsigned char r_address[4];
-    unsigned char r_index[3];
-    unsigned char r_bits[1];
-  };
-
-#define	RELOC_STD_BITS_PCREL_BIG	0x80
-#define	RELOC_STD_BITS_PCREL_LITTLE	0x01
-
-#define	RELOC_STD_BITS_LENGTH_BIG	0x60
-#define	RELOC_STD_BITS_LENGTH_SH_BIG	5	/* To shift to units place */
-#define	RELOC_STD_BITS_LENGTH_LITTLE	0x06
-#define	RELOC_STD_BITS_LENGTH_SH_LITTLE	1
-
-#define	RELOC_STD_BITS_EXTERN_BIG	0x10
-#define	RELOC_STD_BITS_EXTERN_LITTLE	0x08
-
-#define	RELOC_STD_BITS_BASEREL_BIG	0x08
-#define	RELOC_STD_BITS_BASEREL_LITTLE	0x08
-
-#define	RELOC_STD_BITS_JMPTABLE_BIG	0x04
-#define	RELOC_STD_BITS_JMPTABLE_LITTLE	0x04
-
-#define	RELOC_STD_BITS_RELATIVE_BIG	0x02
-#define	RELOC_STD_BITS_RELATIVE_LITTLE	0x02
-
-#define	RELOC_STD_SIZE	8	/* Bytes per relocation entry */
-
-#endif /* USE_EXTENDED_RELOC */
-
-#ifndef CUSTOM_RELOC_FORMAT
-struct relocation_info
-{
-  /* Address (within segment) to be relocated.  */
-  int r_address;
-  /* The meaning of r_symbolnum depends on r_extern.  */
-  unsigned int r_symbolnum:24;
-  /* Nonzero means value is a pc-relative offset
-	   and it should be relocated for changes in its own address
-	   as well as for changes in the symbol or section specified.  */
-  unsigned int r_pcrel:1;
-  /* Length (as exponent of 2) of the field to be relocated.
-	   Thus, a value of 2 indicates 1<<2 bytes.  */
-  unsigned int r_length:2;
-  /* 1 => relocate with value of symbol.
-	   r_symbolnum is the index of the symbol
-	   in file's the symbol table.
-	   0 => relocate with the address of a segment.
-	   r_symbolnum is N_TEXT, N_DATA, N_BSS or N_ABS
-	   (the N_EXT bit may be set also, but signifies nothing).  */
-  unsigned int r_extern:1;
-  /* The next three bits are for SunOS shared libraries, and seem to
-	   be undocumented.  */
-#ifdef TC_NS32K
-  unsigned int r_bsr:1;
-  unsigned int r_disp:2;
-#else
-  unsigned int r_baserel:1;	/* Linkage table relative */
-  unsigned int r_jmptable:1;	/* pc-relative to jump table */
-  unsigned int r_relative:1;	/* "relative relocation" */
-#endif /* TC_NS32K */
-  /* unused */
-  unsigned int r_pad:1;		/* Padding -- set to zero */
-};
-
-#endif /* CUSTOM_RELOC_FORMAT */
-
-#endif /* __A_OUT_GNU_H__ */
-
-/* end of aout_gnu.h */
diff --git a/gas/config/obj-coff.h b/gas/config/obj-coff.h
index 7c4fff5..ee28ab4 100644
--- a/gas/config/obj-coff.h
+++ b/gas/config/obj-coff.h
@@ -75,11 +75,6 @@
 #endif
 #endif
 
-#ifdef TC_I960
-#include "coff/i960.h"
-#define TARGET_FORMAT "coff-Intel-little"
-#endif
-
 #ifdef TC_Z80
 #include "coff/z80.h"
 #define TARGET_FORMAT "coff-z80"
@@ -168,11 +163,6 @@
 
 /* Alter the field names, for now, until we've fixed up the other
    references to use the new name.  */
-#ifdef TC_I960
-#define TC_SYMFIELD_TYPE	symbolS *
-#define sy_tc			bal
-#endif
-
 #define OBJ_SYMFIELD_TYPE	unsigned long
 #define sy_obj			sy_obj_flags
 
@@ -224,17 +214,7 @@
 
 /* Internal use only definitions. SF_ stands for symbol flags.
 
-   These values can be assigned to sy_symbol.ost_flags field of a symbolS.
-
-   You'll break i960 if you shift the SYSPROC bits anywhere else.  for
-   more on the balname/callname hack, see tc-i960.h.  b.out is done
-   differently.  */
-
-#define SF_I960_MASK	0x000001ff	/* Bits 0-8 are used by the i960 port.  */
-#define SF_SYSPROC	0x0000003f	/* bits 0-5 are used to store the sysproc number.  */
-#define SF_IS_SYSPROC	0x00000040	/* bit 6 marks symbols that are sysprocs.  */
-#define SF_BALNAME	0x00000080	/* bit 7 marks BALNAME symbols.  */
-#define SF_CALLNAME	0x00000100	/* bit 8 marks CALLNAME symbols.  */
+   These values can be assigned to sy_symbol.ost_flags field of a symbolS.  */
 
 #define SF_NORMAL_MASK	0x0000ffff	/* bits 12-15 are general purpose.  */
 
@@ -269,11 +249,6 @@
 #define SF_GET_TAGGED(s)	(SF_GET (s) & SF_TAGGED)
 #define SF_GET_TAG(s)		(SF_GET (s) & SF_TAG)
 #define SF_GET_GET_SEGMENT(s)	(SF_GET (s) & SF_GET_SEGMENT)
-#define SF_GET_I960(s)		(SF_GET (s) & SF_I960_MASK)	/* Used by i960.  */
-#define SF_GET_BALNAME(s)	(SF_GET (s) & SF_BALNAME)	/* Used by i960.  */
-#define SF_GET_CALLNAME(s)	(SF_GET (s) & SF_CALLNAME)	/* Used by i960.  */
-#define SF_GET_IS_SYSPROC(s)	(SF_GET (s) & SF_IS_SYSPROC)	/* Used by i960.  */
-#define SF_GET_SYSPROC(s)	(SF_GET (s) & SF_SYSPROC)	/* Used by i960.  */
 
 /* Modifiers.  */
 #define SF_SET(s,v)		(SF_GET (s) = (v))
@@ -290,11 +265,6 @@
 #define SF_SET_TAGGED(s)	(SF_GET (s) |= SF_TAGGED)
 #define SF_SET_TAG(s)		(SF_GET (s) |= SF_TAG)
 #define SF_SET_GET_SEGMENT(s)	(SF_GET (s) |= SF_GET_SEGMENT)
-#define SF_SET_I960(s,v)	(SF_GET (s) |= ((v) & SF_I960_MASK))	/* Used by i960.  */
-#define SF_SET_BALNAME(s)	(SF_GET (s) |= SF_BALNAME)		/* Used by i960.  */
-#define SF_SET_CALLNAME(s)	(SF_GET (s) |= SF_CALLNAME)		/* Used by i960.  */
-#define SF_SET_IS_SYSPROC(s)	(SF_GET (s) |= SF_IS_SYSPROC)		/* Used by i960.  */
-#define SF_SET_SYSPROC(s,v)	(SF_GET (s) |= ((v) & SF_SYSPROC))	/* Used by i960.  */
 
 
 /*  Line number handling.  */
@@ -330,12 +300,6 @@ extern symbolS *coff_last_function;
 
 /* Sanity check.  */
 
-#ifdef TC_I960
-#ifndef C_LEAFSTAT
-hey ! Where is the C_LEAFSTAT definition ? i960 - coff support is depending on it.
-#endif /* no C_LEAFSTAT */
-#endif /* TC_I960 */
-
 extern const pseudo_typeS coff_pseudo_table[];
 
 #ifndef obj_pop_insert
diff --git a/gas/config/tc-i860.c b/gas/config/tc-i860.c
deleted file mode 100644
index 5872678..0000000
--- a/gas/config/tc-i860.c
+++ /dev/null
@@ -1,1491 +0,0 @@
-/* tc-i860.c -- Assembler for the Intel i860 architecture.
-   Copyright (C) 1989-2018 Free Software Foundation, Inc.
-
-   Brought back from the dead and completely reworked
-   by Jason Eckhardt <jle@cygnus.com>.
-
-   This file is part of GAS, the GNU Assembler.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   GAS is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License along
-   with GAS; see the file COPYING.  If not, write to the Free Software
-   Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
-
-#include "as.h"
-#include "safe-ctype.h"
-#include "subsegs.h"
-#include "opcode/i860.h"
-#include "elf/i860.h"
-
-
-/* The opcode hash table.  */
-static struct hash_control *op_hash = NULL;
-
-/* These characters always start a comment.  */
-const char comment_chars[] = "#!/";
-
-/* These characters start a comment at the beginning of a line.  */
-const char line_comment_chars[] = "#/";
-
-const char line_separator_chars[] = ";";
-
-/* Characters that can be used to separate the mantissa from the exponent
-   in floating point numbers.  */
-const char EXP_CHARS[] = "eE";
-
-/* Characters that indicate this number is a floating point constant.
-   As in 0f12.456 or 0d1.2345e12.  */
-const char FLT_CHARS[] = "rRsSfFdDxXpP";
-
-/* Register prefix (depends on syntax).  */
-static char reg_prefix;
-
-#define MAX_FIXUPS 2
-
-struct i860_it
-{
-  const char *error;
-  unsigned long opcode;
-  enum expand_type expand;
-  struct i860_fi
-  {
-    expressionS exp;
-    bfd_reloc_code_real_type reloc;
-    int pcrel;
-    valueT fup;
-  } fi[MAX_FIXUPS];
-} the_insn;
-
-/* The current fixup count.  */
-static int fc;
-
-static char *expr_end;
-
-/* Indicates error if a pseudo operation was expanded after a branch.  */
-static char last_expand;
-
-/* If true, then warn if any pseudo operations were expanded.  */
-static int target_warn_expand = 0;
-
-/* If true, then XP support is enabled.  */
-static int target_xp = 0;
-
-/* If true, then Intel syntax is enabled (default to AT&T/SVR4 syntax).  */
-static int target_intel_syntax = 0;
-
-
-/* Prototypes.  */
-static void i860_process_insn (char *);
-static void s_dual (int);
-static void s_enddual (int);
-static void s_atmp (int);
-static void s_align_wrapper (int);
-static int i860_get_expression (char *);
-static bfd_reloc_code_real_type obtain_reloc_for_imm16 (fixS *, long *);
-#ifdef DEBUG_I860
-static void print_insn (struct i860_it *);
-#endif
-
-const pseudo_typeS md_pseudo_table[] =
-{
-  {"align",   s_align_wrapper, 0},
-  {"dual",    s_dual,          0},
-  {"enddual", s_enddual,       0},
-  {"atmp",    s_atmp,          0},
-  {NULL,      0,               0},
-};
-
-/* Dual-instruction mode handling.  */
-enum dual
-{
-  DUAL_OFF = 0, DUAL_ON, DUAL_DDOT, DUAL_ONDDOT,
-};
-static enum dual dual_mode = DUAL_OFF;
-
-/* Handle ".dual" directive.  */
-static void
-s_dual (int ignore ATTRIBUTE_UNUSED)
-{
-  if (target_intel_syntax)
-    dual_mode = DUAL_ON;
-  else
-    as_bad (_("Directive .dual available only with -mintel-syntax option"));
-}
-
-/* Handle ".enddual" directive.  */
-static void
-s_enddual (int ignore ATTRIBUTE_UNUSED)
-{
-  if (target_intel_syntax)
-    dual_mode = DUAL_OFF;
-  else
-    as_bad (_("Directive .enddual available only with -mintel-syntax option"));
-}
-
-/* Temporary register used when expanding assembler pseudo operations.  */
-static int atmp = 31;
-
-static void
-s_atmp (int ignore ATTRIBUTE_UNUSED)
-{
-  int temp;
-
-  if (! target_intel_syntax)
-    {
-      as_bad (_("Directive .atmp available only with -mintel-syntax option"));
-      demand_empty_rest_of_line ();
-      return;
-    }
-
-  if (strncmp (input_line_pointer, "sp", 2) == 0)
-    {
-      input_line_pointer += 2;
-      atmp = 2;
-    }
-  else if (strncmp (input_line_pointer, "fp", 2) == 0)
-    {
-      input_line_pointer += 2;
-      atmp = 3;
-    }
-  else if (strncmp (input_line_pointer, "r", 1) == 0)
-    {
-      input_line_pointer += 1;
-      temp = get_absolute_expression ();
-      if (temp >= 0 && temp <= 31)
-	atmp = temp;
-      else
-	as_bad (_("Unknown temporary pseudo register"));
-    }
-  else
-    {
-      as_bad (_("Unknown temporary pseudo register"));
-    }
-  demand_empty_rest_of_line ();
-}
-
-/* Handle ".align" directive depending on syntax mode.
-   AT&T/SVR4 syntax uses the standard align directive.  However,
-   the Intel syntax additionally allows keywords for the alignment
-   parameter: ".align type", where type is one of {.short, .long,
-   .quad, .single, .double} representing alignments of 2, 4,
-   16, 4, and 8, respectively.  */
-static void
-s_align_wrapper (int arg)
-{
-  char *parm = input_line_pointer;
-
-  if (target_intel_syntax)
-    {
-      /* Replace a keyword with the equivalent integer so the
-         standard align routine can parse the directive.  */
-      if (strncmp (parm, ".short", 6) == 0)
-        strncpy (parm, "     2", 6);
-      else if (strncmp (parm, ".long", 5) == 0)
-        strncpy (parm, "    4", 5);
-      else if (strncmp (parm, ".quad", 5) == 0)
-        strncpy (parm, "   16", 5);
-      else if (strncmp (parm, ".single", 7) == 0)
-        strncpy (parm, "      4", 7);
-      else if (strncmp (parm, ".double", 7) == 0)
-        strncpy (parm, "      8", 7);
-
-      while (*input_line_pointer == ' ')
-        ++input_line_pointer;
-    }
-
-  s_align_bytes (arg);
-}
-
-/* This function is called once, at assembler startup time.  It should
-   set up all the tables and data structures that the MD part of the
-   assembler will need.  */
-void
-md_begin (void)
-{
-  const char *retval = NULL;
-  int lose = 0;
-  unsigned int i = 0;
-
-  op_hash = hash_new ();
-
-  while (i860_opcodes[i].name != NULL)
-    {
-      const char *name = i860_opcodes[i].name;
-      retval = hash_insert (op_hash, name, (void *) &i860_opcodes[i]);
-      if (retval != NULL)
-	{
-	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
-		   i860_opcodes[i].name, retval);
-	  lose = 1;
-	}
-      do
-	{
-	  if (i860_opcodes[i].match & i860_opcodes[i].lose)
-	    {
-	      fprintf (stderr,
-		       _("internal error: losing opcode: `%s' \"%s\"\n"),
-		       i860_opcodes[i].name, i860_opcodes[i].args);
-	      lose = 1;
-	    }
-	  ++i;
-	}
-      while (i860_opcodes[i].name != NULL
-	     && strcmp (i860_opcodes[i].name, name) == 0);
-    }
-
-  if (lose)
-    as_fatal (_("Defective assembler.  No assembly attempted."));
-
-  /* Set the register prefix for either Intel or AT&T/SVR4 syntax.  */
-  reg_prefix = target_intel_syntax ? 0 : '%';
-}
-
-/* This is the core of the machine-dependent assembler.  STR points to a
-   machine dependent instruction.  This function emits the frags/bytes
-   it assembles to.  */
-void
-md_assemble (char *str)
-{
-  char *destp;
-  int num_opcodes = 1;
-  int i;
-  struct i860_it pseudo[3];
-
-  gas_assert (str);
-  fc = 0;
-
-  /* Assemble the instruction.  */
-  i860_process_insn (str);
-
-  /* Check for expandable flag to produce pseudo-instructions.  This
-     is an undesirable feature that should be avoided.  */
-  if (the_insn.expand != 0 && the_insn.expand != XP_ONLY
-      && ! (the_insn.fi[0].fup & (OP_SEL_HA | OP_SEL_H | OP_SEL_L | OP_SEL_GOT
-			    | OP_SEL_GOTOFF | OP_SEL_PLT)))
-    {
-      for (i = 0; i < 3; i++)
-	pseudo[i] = the_insn;
-
-      fc = 1;
-      switch (the_insn.expand)
-	{
-
-	case E_DELAY:
-	  num_opcodes = 1;
-	  break;
-
-	case E_MOV:
-	  if (the_insn.fi[0].exp.X_add_symbol == NULL
-	      && the_insn.fi[0].exp.X_op_symbol == NULL
-	      && (the_insn.fi[0].exp.X_add_number < (1 << 15)
-		  && the_insn.fi[0].exp.X_add_number >= -(1 << 15)))
-	    break;
-
-	  /* Emit "or l%const,r0,ireg_dest".  */
-	  pseudo[0].opcode = (the_insn.opcode & 0x001f0000) | 0xe4000000;
-	  pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
-
-	  /* Emit "orh h%const,ireg_dest,ireg_dest".  */
-	  pseudo[1].opcode = (the_insn.opcode & 0x03ffffff) | 0xec000000
-			      | ((the_insn.opcode & 0x001f0000) << 5);
-	  pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
-
-	  num_opcodes = 2;
-	  break;
-
-	case E_ADDR:
-	  if (the_insn.fi[0].exp.X_add_symbol == NULL
-	      && the_insn.fi[0].exp.X_op_symbol == NULL
-	      && (the_insn.fi[0].exp.X_add_number < (1 << 15)
-		  && the_insn.fi[0].exp.X_add_number >= -(1 << 15)))
-	    break;
-
-	  /* Emit "orh ha%addr_expr,ireg_src2,r31".  */
-	  pseudo[0].opcode = 0xec000000 | (the_insn.opcode & 0x03e00000)
-			     | (atmp << 16);
-	  pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_HA);
-
-	  /* Emit "l%addr_expr(r31),ireg_dest".  We pick up the fixup
-	     information from the original instruction.   */
-	  pseudo[1].opcode = (the_insn.opcode & ~0x03e00000) | (atmp << 21);
-	  pseudo[1].fi[0].fup = the_insn.fi[0].fup | OP_SEL_L;
-
-	  num_opcodes = 2;
-	  break;
-
-	case E_U32:
-	  if (the_insn.fi[0].exp.X_add_symbol == NULL
-	      && the_insn.fi[0].exp.X_op_symbol == NULL
-	      && (the_insn.fi[0].exp.X_add_number < (1 << 16)
-		  && the_insn.fi[0].exp.X_add_number >= 0))
-	    break;
-
-	  /* Emit "$(opcode)h h%const,ireg_src2,r31".  */
-	  pseudo[0].opcode = (the_insn.opcode & 0xf3e0ffff) | 0x0c000000
-			      | (atmp << 16);
-	  pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
-
-	  /* Emit "$(opcode) l%const,r31,ireg_dest".  */
-	  pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000
-			      | (atmp << 21);
-	  pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
-
-	  num_opcodes = 2;
-	  break;
-
-	case E_AND:
-	  if (the_insn.fi[0].exp.X_add_symbol == NULL
-	      && the_insn.fi[0].exp.X_op_symbol == NULL
-	      && (the_insn.fi[0].exp.X_add_number < (1 << 16)
-		  && the_insn.fi[0].exp.X_add_number >= 0))
-	    break;
-
-	  /* Emit "andnot h%const,ireg_src2,r31".  */
-	  pseudo[0].opcode = (the_insn.opcode & 0x03e0ffff) | 0xd4000000
-			      | (atmp << 16);
-	  pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
-	  pseudo[0].fi[0].exp.X_add_number =
-            -1 - the_insn.fi[0].exp.X_add_number;
-
-	  /* Emit "andnot l%const,r31,ireg_dest".  */
-	  pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000
-			      | (atmp << 21);
-	  pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
-	  pseudo[1].fi[0].exp.X_add_number =
-            -1 - the_insn.fi[0].exp.X_add_number;
-
-	  num_opcodes = 2;
-	  break;
-
-	case E_S32:
-	  if (the_insn.fi[0].exp.X_add_symbol == NULL
-	      && the_insn.fi[0].exp.X_op_symbol == NULL
-	      && (the_insn.fi[0].exp.X_add_number < (1 << 15)
-		  && the_insn.fi[0].exp.X_add_number >= -(1 << 15)))
-	    break;
-
-	  /* Emit "orh h%const,r0,r31".  */
-	  pseudo[0].opcode = 0xec000000 | (atmp << 16);
-	  pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
-
-	  /* Emit "or l%const,r31,r31".  */
-	  pseudo[1].opcode = 0xe4000000 | (atmp << 21) | (atmp << 16);
-	  pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
-
-	  /* Emit "r31,ireg_src2,ireg_dest".  */
-	  pseudo[2].opcode = (the_insn.opcode & ~0x0400ffff) | (atmp << 11);
-	  pseudo[2].fi[0].fup = OP_IMM_S16;
-
-	  num_opcodes = 3;
-	  break;
-
-	default:
-	  as_fatal (_("failed sanity check."));
-	}
-
-      the_insn = pseudo[0];
-
-      /* Warn if an opcode is expanded after a delayed branch.  */
-      if (num_opcodes > 1 && last_expand == 1)
-	as_warn (_("Expanded opcode after delayed branch: `%s'"), str);
-
-      /* Warn if an opcode is expanded in dual mode.  */
-      if (num_opcodes > 1 && dual_mode != DUAL_OFF)
-	as_warn (_("Expanded opcode in dual mode: `%s'"), str);
-
-      /* Notify if any expansions happen.  */
-      if (target_warn_expand && num_opcodes > 1)
-	as_warn (_("An instruction was expanded (%s)"), str);
-    }
-
-  dwarf2_emit_insn (0);
-  i = 0;
-  do
-    {
-      int tmp;
-
-      /* Output the opcode.  Note that the i860 always reads instructions
-	 as little-endian data.  */
-      destp = frag_more (4);
-      number_to_chars_littleendian (destp, the_insn.opcode, 4);
-
-      /* Check for expanded opcode after branch or in dual mode.  */
-      last_expand = the_insn.fi[0].pcrel;
-
-      /* Output the symbol-dependent stuff.  Only btne and bte will ever
-         loop more than once here, since only they (possibly) have more
-         than one fixup.  */
-      for (tmp = 0; tmp < fc; tmp++)
-        {
-          if (the_insn.fi[tmp].fup != OP_NONE)
-	    {
-	      fixS *fix;
-	      fix = fix_new_exp (frag_now,
-			         destp - frag_now->fr_literal,
-			         4,
-			         &the_insn.fi[tmp].exp,
-			         the_insn.fi[tmp].pcrel,
-			         the_insn.fi[tmp].reloc);
-
-	     /* Despite the odd name, this is a scratch field.  We use
-	        it to encode operand type information.  */
-	     fix->fx_addnumber = the_insn.fi[tmp].fup;
-	   }
-        }
-      the_insn = pseudo[++i];
-    }
-  while (--num_opcodes > 0);
-
-}
-
-/* Assemble the instruction pointed to by STR.  */
-static void
-i860_process_insn (char *str)
-{
-  char *s;
-  const char *args;
-  char c;
-  struct i860_opcode *insn;
-  char *args_start;
-  unsigned long opcode;
-  unsigned int mask;
-  int match = 0;
-  int comma = 0;
-
-#if 1 /* For compiler warnings.  */
-  args = 0;
-  insn = 0;
-  args_start = 0;
-  opcode = 0;
-#endif
-
-  for (s = str; ISLOWER (*s) || *s == '.' || *s == '3'
-       || *s == '2' || *s == '1'; ++s)
-    ;
-
-  switch (*s)
-    {
-    case '\0':
-      break;
-
-    case ',':
-      comma = 1;
-
-      /*FALLTHROUGH*/
-
-    case ' ':
-      *s++ = '\0';
-      break;
-
-    default:
-      as_fatal (_("Unknown opcode: `%s'"), str);
-    }
-
-  /* Check for dual mode ("d.") opcode prefix.  */
-  if (strncmp (str, "d.", 2) == 0)
-    {
-      if (dual_mode == DUAL_ON)
-	dual_mode = DUAL_ONDDOT;
-      else
-	dual_mode = DUAL_DDOT;
-      str += 2;
-    }
-
-  if ((insn = (struct i860_opcode *) hash_find (op_hash, str)) == NULL)
-    {
-      if (dual_mode == DUAL_DDOT || dual_mode == DUAL_ONDDOT)
-	str -= 2;
-      as_bad (_("Unknown opcode: `%s'"), str);
-      return;
-    }
-
-  if (comma)
-    *--s = ',';
-
-  args_start = s;
-  for (;;)
-    {
-      int t;
-      opcode = insn->match;
-      memset (&the_insn, '\0', sizeof (the_insn));
-      fc = 0;
-      for (t = 0; t < MAX_FIXUPS; t++)
-        {
-          the_insn.fi[t].reloc = BFD_RELOC_NONE;
-          the_insn.fi[t].pcrel = 0;
-          the_insn.fi[t].fup = OP_NONE;
-        }
-
-      /* Build the opcode, checking as we go that the operands match.  */
-      for (args = insn->args; ; ++args)
-	{
-          if (fc > MAX_FIXUPS)
-            abort ();
-
-	  switch (*args)
-	    {
-
-	    /* End of args.  */
-	    case '\0':
-	      if (*s == '\0')
-		match = 1;
-	      break;
-
-	    /* These must match exactly.  */
-	    case '+':
-	    case '(':
-	    case ')':
-	    case ',':
-	    case ' ':
-	      if (*s++ == *args)
-		continue;
-	      break;
-
-	    /* Must be at least one digit.  */
-	    case '#':
-	      if (ISDIGIT (*s++))
-		{
-		  while (ISDIGIT (*s))
-		    ++s;
-		  continue;
-		}
-	      break;
-
-	    /* Next operand must be a register.  */
-	    case '1':
-	    case '2':
-	    case 'd':
-	      /* Check for register prefix if necessary.  */
-	      if (reg_prefix && *s != reg_prefix)
-		goto error;
-	      else if (reg_prefix)
-		s++;
-
-	      switch (*s)
-		{
-		/* Frame pointer.  */
-		case 'f':
-		  s++;
-		  if (*s++ == 'p')
-		    {
-		      mask = 0x3;
-		      break;
-		    }
-		  goto error;
-
-		/* Stack pointer.  */
-		case 's':
-		  s++;
-		  if (*s++ == 'p')
-		    {
-		      mask = 0x2;
-		      break;
-		    }
-		  goto error;
-
-		/* Any register r0..r31.  */
-		case 'r':
-		  s++;
-		  if (!ISDIGIT (c = *s++))
-		    {
-		      goto error;
-		    }
-		  if (ISDIGIT (*s))
-		    {
-		      if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
-			goto error;
-		    }
-		  else
-		    c -= '0';
-		  mask = c;
-		  break;
-
-		/* Not this opcode.  */
-		default:
-		  goto error;
-		}
-
-	      /* Obtained the register, now place it in the opcode.  */
-	      switch (*args)
-		{
-		case '1':
-		  opcode |= mask << 11;
-		  continue;
-
-		case '2':
-		  opcode |= mask << 21;
-		  continue;
-
-		case 'd':
-		  opcode |= mask << 16;
-		  continue;
-
-		}
-	      break;
-
-	    /* Next operand is a floating point register.  */
-	    case 'e':
-	    case 'f':
-	    case 'g':
-	      /* Check for register prefix if necessary.  */
-	      if (reg_prefix && *s != reg_prefix)
-		goto error;
-	      else if (reg_prefix)
-		s++;
-
-	      if (*s++ == 'f' && ISDIGIT (*s))
-		{
-		  mask = *s++;
-		  if (ISDIGIT (*s))
-		    {
-		      mask = 10 * (mask - '0') + (*s++ - '0');
-		      if (mask >= 32)
-			{
-			  break;
-			}
-		    }
-		  else
-		    mask -= '0';
-
-		  switch (*args)
-		    {
-
-		    case 'e':
-		      opcode |= mask << 11;
-		      continue;
-
-		    case 'f':
-		      opcode |= mask << 21;
-		      continue;
-
-		    case 'g':
-		      opcode |= mask << 16;
-		      if ((opcode & (1 << 10)) && mask != 0
-			  && (mask == ((opcode >> 11) & 0x1f)))
-			as_warn (_("Pipelined instruction: fsrc1 = fdest"));
-		      continue;
-		    }
-		}
-	      break;
-
-	    /* Next operand must be a control register.  */
-	    case 'c':
-	      /* Check for register prefix if necessary.  */
-	      if (reg_prefix && *s != reg_prefix)
-		goto error;
-	      else if (reg_prefix)
-		s++;
-
-	      if (strncmp (s, "fir", 3) == 0)
-		{
-		  opcode |= 0x0 << 21;
-		  s += 3;
-		  continue;
-		}
-	      if (strncmp (s, "psr", 3) == 0)
-		{
-		  opcode |= 0x1 << 21;
-		  s += 3;
-		  continue;
-		}
-	      if (strncmp (s, "dirbase", 7) == 0)
-		{
-		  opcode |= 0x2 << 21;
-		  s += 7;
-		  continue;
-		}
-	      if (strncmp (s, "db", 2) == 0)
-		{
-		  opcode |= 0x3 << 21;
-		  s += 2;
-		  continue;
-		}
-	      if (strncmp (s, "fsr", 3) == 0)
-		{
-		  opcode |= 0x4 << 21;
-		  s += 3;
-		  continue;
-		}
-	      if (strncmp (s, "epsr", 4) == 0)
-		{
-		  opcode |= 0x5 << 21;
-		  s += 4;
-		  continue;
-		}
-	      /* The remaining control registers are XP only.  */
-	      if (target_xp && strncmp (s, "bear", 4) == 0)
-		{
-		  opcode |= 0x6 << 21;
-		  s += 4;
-		  continue;
-		}
-	      if (target_xp && strncmp (s, "ccr", 3) == 0)
-		{
-		  opcode |= 0x7 << 21;
-		  s += 3;
-		  continue;
-		}
-	      if (target_xp && strncmp (s, "p0", 2) == 0)
-		{
-		  opcode |= 0x8 << 21;
-		  s += 2;
-		  continue;
-		}
-	      if (target_xp && strncmp (s, "p1", 2) == 0)
-		{
-		  opcode |= 0x9 << 21;
-		  s += 2;
-		  continue;
-		}
-	      if (target_xp && strncmp (s, "p2", 2) == 0)
-		{
-		  opcode |= 0xa << 21;
-		  s += 2;
-		  continue;
-		}
-	      if (target_xp && strncmp (s, "p3", 2) == 0)
-		{
-		  opcode |= 0xb << 21;
-		  s += 2;
-		  continue;
-		}
-	      break;
-
-	    /* 5-bit immediate in src1.  */
-	    case '5':
-	      if (! i860_get_expression (s))
-		{
-		  s = expr_end;
-		  the_insn.fi[fc].fup |= OP_IMM_U5;
-		  fc++;
-		  continue;
-		}
-	      break;
-
-	    /* 26-bit immediate, relative branch (lbroff).  */
-	    case 'l':
-	      the_insn.fi[fc].pcrel = 1;
-	      the_insn.fi[fc].fup |= OP_IMM_BR26;
-	      goto immediate;
-
-	    /* 16-bit split immediate, relative branch (sbroff).  */
-	    case 'r':
-	      the_insn.fi[fc].pcrel = 1;
-	      the_insn.fi[fc].fup |= OP_IMM_BR16;
-	      goto immediate;
-
-	    /* 16-bit split immediate.  */
-	    case 's':
-	      the_insn.fi[fc].fup |= OP_IMM_SPLIT16;
-	      goto immediate;
-
-	    /* 16-bit split immediate, byte aligned (st.b).  */
-	    case 'S':
-	      the_insn.fi[fc].fup |= OP_IMM_SPLIT16;
-	      goto immediate;
-
-	    /* 16-bit split immediate, half-word aligned (st.s).  */
-	    case 'T':
-	      the_insn.fi[fc].fup |= (OP_IMM_SPLIT16 | OP_ENCODE1 | OP_ALIGN2);
-	      goto immediate;
-
-	    /* 16-bit split immediate, word aligned (st.l).  */
-	    case 'U':
-	      the_insn.fi[fc].fup |= (OP_IMM_SPLIT16 | OP_ENCODE1 | OP_ALIGN4);
-	      goto immediate;
-
-	    /* 16-bit immediate.  */
-	    case 'i':
-	      the_insn.fi[fc].fup |= OP_IMM_S16;
-	      goto immediate;
-
-	    /* 16-bit immediate, byte aligned (ld.b).  */
-	    case 'I':
-	      the_insn.fi[fc].fup |= OP_IMM_S16;
-	      goto immediate;
-
-	    /* 16-bit immediate, half-word aligned (ld.s).  */
-	    case 'J':
-	      the_insn.fi[fc].fup |= (OP_IMM_S16 | OP_ENCODE1 | OP_ALIGN2);
-	      goto immediate;
-
-	    /* 16-bit immediate, word aligned (ld.l, {p}fld.l, fst.l).  */
-	    case 'K':
-	      if (insn->name[0] == 'l')
-		the_insn.fi[fc].fup |= (OP_IMM_S16 | OP_ENCODE1 | OP_ALIGN4);
-	      else
-		the_insn.fi[fc].fup |= (OP_IMM_S16 | OP_ENCODE2 | OP_ALIGN4);
-	      goto immediate;
-
-	    /* 16-bit immediate, double-word aligned ({p}fld.d, fst.d).  */
-	    case 'L':
-	      the_insn.fi[fc].fup |= (OP_IMM_S16 | OP_ENCODE3 | OP_ALIGN8);
-	      goto immediate;
-
-	    /* 16-bit immediate, quad-word aligned (fld.q, fst.q).  */
-	    case 'M':
-	      the_insn.fi[fc].fup |= (OP_IMM_S16 | OP_ENCODE3 | OP_ALIGN16);
-
-	      /*FALLTHROUGH*/
-
-	      /* Handle the immediate for either the Intel syntax or
-		 SVR4 syntax. The Intel syntax is "ha%immediate"
-		 whereas SVR4 syntax is "[immediate]@ha".  */
-	    immediate:
-	      if (target_intel_syntax == 0)
-		{
-		  /* AT&T/SVR4 syntax.  */
-	          if (*s == ' ')
-		    s++;
-
-	          /* Note that if i860_get_expression() fails, we will still
-	  	     have created U entries in the symbol table for the
-		     'symbols' in the input string.  Try not to create U
-		     symbols for registers, etc.  */
-	          if (! i860_get_expression (s))
-		    s = expr_end;
-	          else
-		    goto error;
-
-	          if (strncmp (s, "@ha", 3) == 0)
-		    {
-		      the_insn.fi[fc].fup |= OP_SEL_HA;
-		      s += 3;
-		    }
-	          else if (strncmp (s, "@h", 2) == 0)
-		    {
-		      the_insn.fi[fc].fup |= OP_SEL_H;
-		      s += 2;
-		    }
-	          else if (strncmp (s, "@l", 2) == 0)
-		    {
-		      the_insn.fi[fc].fup |= OP_SEL_L;
-		      s += 2;
-		    }
-	          else if (strncmp (s, "@gotoff", 7) == 0
-		           || strncmp (s, "@GOTOFF", 7) == 0)
-		    {
-		      as_bad (_("Assembler does not yet support PIC"));
-		      the_insn.fi[fc].fup |= OP_SEL_GOTOFF;
-		      s += 7;
-		    }
-	          else if (strncmp (s, "@got", 4) == 0
-		           || strncmp (s, "@GOT", 4) == 0)
-		    {
-		      as_bad (_("Assembler does not yet support PIC"));
-		      the_insn.fi[fc].fup |= OP_SEL_GOT;
-		      s += 4;
-		    }
-	          else if (strncmp (s, "@plt", 4) == 0
-		           || strncmp (s, "@PLT", 4) == 0)
-		    {
-		      as_bad (_("Assembler does not yet support PIC"));
-		      the_insn.fi[fc].fup |= OP_SEL_PLT;
-		      s += 4;
-		    }
-
-	          the_insn.expand = insn->expand;
-                  fc++;
-
-	          continue;
-		}
-	      else
-		{
-		  /* Intel syntax.  */
-	          if (*s == ' ')
-		    s++;
-	          if (strncmp (s, "ha%", 3) == 0)
-		    {
-		      the_insn.fi[fc].fup |= OP_SEL_HA;
-		      s += 3;
-		    }
-	          else if (strncmp (s, "h%", 2) == 0)
-		    {
-		      the_insn.fi[fc].fup |= OP_SEL_H;
-		      s += 2;
-		    }
-	          else if (strncmp (s, "l%", 2) == 0)
-		    {
-		      the_insn.fi[fc].fup |= OP_SEL_L;
-		      s += 2;
-		    }
-	          the_insn.expand = insn->expand;
-
-	          /* Note that if i860_get_expression() fails, we will still
-		     have created U entries in the symbol table for the
-		     'symbols' in the input string.  Try not to create U
-		     symbols for registers, etc.  */
-	          if (! i860_get_expression (s))
-		    s = expr_end;
-	          else
-		    goto error;
-
-                  fc++;
-	          continue;
-		}
-	      break;
-
-	    default:
-	      as_fatal (_("failed sanity check."));
-	    }
-	  break;
-	}
-    error:
-      if (match == 0)
-	{
-	  /* Args don't match.  */
-	  if (insn[1].name != NULL
-	      && ! strcmp (insn->name, insn[1].name))
-	    {
-	      ++insn;
-	      s = args_start;
-	      continue;
-	    }
-	  else
-	    {
-	      as_bad (_("Illegal operands for %s"), insn->name);
-	      return;
-	    }
-	}
-      break;
-    }
-
-  /* Set the dual bit on this instruction if necessary.  */
-  if (dual_mode != DUAL_OFF)
-    {
-      if ((opcode & 0xfc000000) == 0x48000000 || opcode == 0xb0000000)
-        {
-	  /* The instruction is a flop or a fnop, so set its dual bit
-	     (but check that it is 8-byte aligned).  */
-	  if (((frag_now->fr_address + frag_now_fix_octets ()) & 7) == 0)
-	    opcode |= (1 << 9);
-	  else
-            as_bad (_("'d.%s' must be 8-byte aligned"), insn->name);
-
-          if (dual_mode == DUAL_DDOT)
-	    dual_mode = DUAL_OFF;
-          else if (dual_mode == DUAL_ONDDOT)
-	    dual_mode = DUAL_ON;
-        }
-      else if (dual_mode == DUAL_DDOT || dual_mode == DUAL_ONDDOT)
-        as_bad (_("Prefix 'd.' invalid for instruction `%s'"), insn->name);
-    }
-
-  the_insn.opcode = opcode;
-
-  /* Only recognize XP instructions when the user has requested it.  */
-  if (insn->expand == XP_ONLY && ! target_xp)
-    as_bad (_("Unknown opcode: `%s'"), insn->name);
-}
-
-static int
-i860_get_expression (char *str)
-{
-  char *save_in;
-  segT seg;
-
-  save_in = input_line_pointer;
-  input_line_pointer = str;
-  seg = expression (&the_insn.fi[fc].exp);
-  if (seg != absolute_section
-      && seg != undefined_section
-      && ! SEG_NORMAL (seg))
-    {
-      the_insn.error = _("bad segment");
-      expr_end = input_line_pointer;
-      input_line_pointer = save_in;
-      return 1;
-    }
-  expr_end = input_line_pointer;
-  input_line_pointer = save_in;
-  return 0;
-}
-
-const char *
-md_atof (int type, char *litP, int *sizeP)
-{
-  return ieee_md_atof (type, litP, sizeP, TRUE);
-}
-
-/* Write out in current endian mode.  */
-void
-md_number_to_chars (char *buf, valueT val, int n)
-{
-  if (target_big_endian)
-    number_to_chars_bigendian (buf, val, n);
-  else
-    number_to_chars_littleendian (buf, val, n);
-}
-
-/* This should never be called for i860.  */
-int
-md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
-			       segT segtype ATTRIBUTE_UNUSED)
-{
-  as_fatal (_("relaxation not supported\n"));
-}
-
-#ifdef DEBUG_I860
-static void
-print_insn (struct i860_it *insn)
-{
-  if (insn->error)
-    fprintf (stderr, "ERROR: %s\n", insn->error);
-
-  fprintf (stderr, "opcode = 0x%08lx\t", insn->opcode);
-  fprintf (stderr, "expand = 0x%x\t", insn->expand);
-  fprintf (stderr, "reloc = %s\t\n",
-	   bfd_get_reloc_code_name (insn->reloc));
-  fprintf (stderr, "exp =  {\n");
-  fprintf (stderr, "\t\tX_add_symbol = %s\n",
-	   insn->exp.X_add_symbol ?
-	   (S_GET_NAME (insn->exp.X_add_symbol) ?
-	    S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0");
-  fprintf (stderr, "\t\tX_op_symbol = %s\n",
-	   insn->exp.X_op_symbol ?
-	   (S_GET_NAME (insn->exp.X_op_symbol) ?
-	    S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0");
-  fprintf (stderr, "\t\tX_add_number = %lx\n",
-	   insn->exp.X_add_number);
-  fprintf (stderr, "}\n");
-}
-#endif /* DEBUG_I860 */
-
-
-#ifdef OBJ_ELF
-const char *md_shortopts = "VQ:";
-#else
-const char *md_shortopts = "";
-#endif
-
-#define OPTION_EB		(OPTION_MD_BASE + 0)
-#define OPTION_EL		(OPTION_MD_BASE + 1)
-#define OPTION_WARN_EXPAND	(OPTION_MD_BASE + 2)
-#define OPTION_XP		(OPTION_MD_BASE + 3)
-#define OPTION_INTEL_SYNTAX	(OPTION_MD_BASE + 4)
-
-struct option md_longopts[] = {
-  { "EB",	    no_argument, NULL, OPTION_EB },
-  { "EL",	    no_argument, NULL, OPTION_EL },
-  { "mwarn-expand", no_argument, NULL, OPTION_WARN_EXPAND },
-  { "mxp",	    no_argument, NULL, OPTION_XP },
-  { "mintel-syntax",no_argument, NULL, OPTION_INTEL_SYNTAX },
-  { NULL,	    no_argument, NULL, 0 }
-};
-size_t md_longopts_size = sizeof (md_longopts);
-
-int
-md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
-{
-  switch (c)
-    {
-    case OPTION_EB:
-      target_big_endian = 1;
-      break;
-
-    case OPTION_EL:
-      target_big_endian = 0;
-      break;
-
-    case OPTION_WARN_EXPAND:
-      target_warn_expand = 1;
-      break;
-
-    case OPTION_XP:
-      target_xp = 1;
-      break;
-
-    case OPTION_INTEL_SYNTAX:
-      target_intel_syntax = 1;
-      break;
-
-#ifdef OBJ_ELF
-    /* SVR4 argument compatibility (-V): print version ID.  */
-    case 'V':
-      print_version_id ();
-      break;
-
-    /* SVR4 argument compatibility (-Qy, -Qn): controls whether
-       a .comment section should be emitted or not (ignored).  */
-    case 'Q':
-      break;
-#endif
-
-    default:
-      return 0;
-    }
-
-  return 1;
-}
-
-void
-md_show_usage (FILE *stream)
-{
-  fprintf (stream, _("\
-  -EL			  generate code for little endian mode (default)\n\
-  -EB			  generate code for big endian mode\n\
-  -mwarn-expand		  warn if pseudo operations are expanded\n\
-  -mxp			  enable i860XP support (disabled by default)\n\
-  -mintel-syntax	  enable Intel syntax (default to AT&T/SVR4)\n"));
-#ifdef OBJ_ELF
-  /* SVR4 compatibility flags.  */
-  fprintf (stream, _("\
-  -V			  print assembler version number\n\
-  -Qy, -Qn		  ignored\n"));
-#endif
-}
-
-
-/* We have no need to default values of symbols.  */
-symbolS *
-md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
-{
-  return 0;
-}
-
-/* The i860 denotes auto-increment with '++'.  */
-void
-md_operand (expressionS *exp)
-{
-  char *s;
-
-  for (s = input_line_pointer; *s; s++)
-    {
-      if (s[0] == '+' && s[1] == '+')
-	{
-	  input_line_pointer += 2;
-	  exp->X_op = O_register;
-	  break;
-	}
-    }
-}
-
-/* Round up a section size to the appropriate boundary.  */
-valueT
-md_section_align (segT segment ATTRIBUTE_UNUSED,
-		  valueT size ATTRIBUTE_UNUSED)
-{
-  /* Byte alignment is fine.  */
-  return size;
-}
-
-/* On the i860, a PC-relative offset is relative to the address of the
-   offset plus its size.  */
-long
-md_pcrel_from (fixS *fixP)
-{
-  return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
-}
-
-/* Determine the relocation needed for non PC-relative 16-bit immediates.
-   Also adjust the given immediate as necessary.  Finally, check that
-   all constraints (such as alignment) are satisfied.   */
-static bfd_reloc_code_real_type
-obtain_reloc_for_imm16 (fixS *fix, long *val)
-{
-  valueT fup = fix->fx_addnumber;
-  bfd_reloc_code_real_type reloc;
-
-  if (fix->fx_pcrel)
-    abort ();
-
-  /* Check alignment restrictions.  */
-  if ((fup & OP_ALIGN2) && (*val & 0x1))
-    as_bad_where (fix->fx_file, fix->fx_line,
-		  _("This immediate requires 0 MOD 2 alignment"));
-  else if ((fup & OP_ALIGN4) && (*val & 0x3))
-    as_bad_where (fix->fx_file, fix->fx_line,
-		  _("This immediate requires 0 MOD 4 alignment"));
-  else if ((fup & OP_ALIGN8) && (*val & 0x7))
-    as_bad_where (fix->fx_file, fix->fx_line,
-		  _("This immediate requires 0 MOD 8 alignment"));
-  else if ((fup & OP_ALIGN16) && (*val & 0xf))
-    as_bad_where (fix->fx_file, fix->fx_line,
-		  _("This immediate requires 0 MOD 16 alignment"));
-
-  if (fup & OP_SEL_HA)
-    {
-      *val = (*val >> 16) + (*val & 0x8000 ? 1 : 0);
-      reloc = BFD_RELOC_860_HIGHADJ;
-    }
-  else if (fup & OP_SEL_H)
-    {
-      *val >>= 16;
-      reloc = BFD_RELOC_860_HIGH;
-    }
-  else if (fup & OP_SEL_L)
-    {
-      int num_encode;
-      if (fup & OP_IMM_SPLIT16)
-	{
-	  if (fup & OP_ENCODE1)
-	    {
-	      num_encode = 1;
-	      reloc = BFD_RELOC_860_SPLIT1;
-	    }
-	  else if (fup & OP_ENCODE2)
-	    {
-	      num_encode = 2;
-	      reloc = BFD_RELOC_860_SPLIT2;
-	    }
-	  else
-	    {
-	      num_encode = 0;
-	      reloc = BFD_RELOC_860_SPLIT0;
-	    }
-	}
-      else
-	{
-	  if (fup & OP_ENCODE1)
-	    {
-	      num_encode = 1;
-	      reloc = BFD_RELOC_860_LOW1;
-	    }
-	  else if (fup & OP_ENCODE2)
-	    {
-	      num_encode = 2;
-	      reloc = BFD_RELOC_860_LOW2;
-	    }
-	  else if (fup & OP_ENCODE3)
-	    {
-	      num_encode = 3;
-	      reloc = BFD_RELOC_860_LOW3;
-	    }
-	  else
-	    {
-	      num_encode = 0;
-	      reloc = BFD_RELOC_860_LOW0;
-	    }
-	}
-
-      /* Preserve size encode bits.  */
-      *val &= ~((1 << num_encode) - 1);
-    }
-  else
-    {
-      /* No selector.  What reloc do we generate (???)?  */
-      reloc = BFD_RELOC_32;
-    }
-
-  return reloc;
-}
-
-/* Attempt to simplify or eliminate a fixup. To indicate that a fixup
-   has been eliminated, set fix->fx_done. If fix->fx_addsy is non-NULL,
-   we will have to generate a reloc entry.  */
-
-void
-md_apply_fix (fixS *fix, valueT *valP, segT seg ATTRIBUTE_UNUSED)
-{
-  char *buf;
-  long val = *valP;
-  unsigned long insn;
-  valueT fup;
-
-  buf = fix->fx_frag->fr_literal + fix->fx_where;
-
-  /* Recall that earlier we stored the opcode little-endian.  */
-  insn = bfd_getl32 (buf);
-
-  /* We stored a fix-up in this oddly-named scratch field.  */
-  fup = fix->fx_addnumber;
-
-  /* Determine the necessary relocations as well as inserting an
-     immediate into the instruction.   */
-  if (fup & OP_IMM_U5)
-    {
-      if (val & ~0x1f)
-	as_bad_where (fix->fx_file, fix->fx_line,
-		      _("5-bit immediate too large"));
-      if (fix->fx_addsy)
-	as_bad_where (fix->fx_file, fix->fx_line,
-		      _("5-bit field must be absolute"));
-
-      insn |= (val & 0x1f) << 11;
-      bfd_putl32 (insn, buf);
-      fix->fx_r_type = BFD_RELOC_NONE;
-      fix->fx_done = 1;
-    }
-  else if (fup & OP_IMM_S16)
-    {
-      fix->fx_r_type = obtain_reloc_for_imm16 (fix, &val);
-
-      /* Insert the immediate.  */
-      if (fix->fx_addsy)
-	fix->fx_done = 0;
-      else
-	{
-	  insn |= val & 0xffff;
-	  bfd_putl32 (insn, buf);
-	  fix->fx_r_type = BFD_RELOC_NONE;
-	  fix->fx_done = 1;
-	}
-    }
-  else if (fup & OP_IMM_U16)
-    abort ();
-
-  else if (fup & OP_IMM_SPLIT16)
-    {
-      fix->fx_r_type = obtain_reloc_for_imm16 (fix, &val);
-
-      /* Insert the immediate.  */
-      if (fix->fx_addsy)
-	fix->fx_done = 0;
-      else
-	{
-	  insn |= val & 0x7ff;
-	  insn |= (val & 0xf800) << 5;
-	  bfd_putl32 (insn, buf);
-	  fix->fx_r_type = BFD_RELOC_NONE;
-	  fix->fx_done = 1;
-	}
-    }
-  else if (fup & OP_IMM_BR16)
-    {
-      if (val & 0x3)
-	as_bad_where (fix->fx_file, fix->fx_line,
-		      _("A branch offset requires 0 MOD 4 alignment"));
-
-      val = val >> 2;
-
-      /* Insert the immediate.  */
-      if (fix->fx_addsy)
-	{
-	  fix->fx_done = 0;
-	  fix->fx_r_type = BFD_RELOC_860_PC16;
-	}
-      else
-	{
-	  insn |= (val & 0x7ff);
-	  insn |= ((val & 0xf800) << 5);
-	  bfd_putl32 (insn, buf);
-	  fix->fx_r_type = BFD_RELOC_NONE;
-	  fix->fx_done = 1;
-	}
-    }
-  else if (fup & OP_IMM_BR26)
-    {
-      if (val & 0x3)
-	as_bad_where (fix->fx_file, fix->fx_line,
-		      _("A branch offset requires 0 MOD 4 alignment"));
-
-      val >>= 2;
-
-      /* Insert the immediate.  */
-      if (fix->fx_addsy)
-	{
-	  fix->fx_r_type = BFD_RELOC_860_PC26;
-	  fix->fx_done = 0;
-	}
-      else
-	{
-	  insn |= (val & 0x3ffffff);
-	  bfd_putl32 (insn, buf);
-	  fix->fx_r_type = BFD_RELOC_NONE;
-	  fix->fx_done = 1;
-	}
-    }
-  else if (fup != OP_NONE)
-    {
-      as_bad_where (fix->fx_file, fix->fx_line,
-		    _("Unrecognized fix-up (0x%08lx)"), (unsigned long) fup);
-      abort ();
-    }
-  else
-    {
-      /* I believe only fix-ups such as ".long .ep.main-main+0xc8000000"
- 	 reach here (???).  */
-      if (fix->fx_addsy)
-	{
-	  fix->fx_r_type = BFD_RELOC_32;
-	  fix->fx_done = 0;
-	}
-      else
-	{
-	  insn |= (val & 0xffffffff);
-	  bfd_putl32 (insn, buf);
-	  fix->fx_r_type = BFD_RELOC_NONE;
-	  fix->fx_done = 1;
-	}
-    }
-}
-
-/* Generate a machine dependent reloc from a fixup.  */
-arelent*
-tc_gen_reloc (asection *section ATTRIBUTE_UNUSED,
-	      fixS *fixp)
-{
-  arelent *reloc;
-
-  reloc = XNEW (arelent);
-  reloc->sym_ptr_ptr = XNEW (asymbol *);
-  *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
-  reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
-  reloc->addend = fixp->fx_offset;
-  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
-
-  if (! reloc->howto)
-    {
-      as_bad_where (fixp->fx_file, fixp->fx_line,
-                    "Cannot represent %s relocation in object file",
-                    bfd_get_reloc_code_name (fixp->fx_r_type));
-    }
-  return reloc;
-}
-
-/* This is called from HANDLE_ALIGN in write.c.  Fill in the contents
-   of an rs_align_code fragment.  */
-
-void
-i860_handle_align (fragS *fragp)
-{
-  /* Instructions are always stored little-endian on the i860.  */
-  static const unsigned char le_nop[] = { 0x00, 0x00, 0x00, 0xA0 };
-
-  int bytes;
-  char *p;
-
-  if (fragp->fr_type != rs_align_code)
-    return;
-
-  bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
-  p = fragp->fr_literal + fragp->fr_fix;
-
-  /* Make sure we are on a 4-byte boundary, in case someone has been
-     putting data into a text section.  */
-  if (bytes & 3)
-    {
-      int fix = bytes & 3;
-      memset (p, 0, fix);
-      p += fix;
-      fragp->fr_fix += fix;
-    }
-
-  memcpy (p, le_nop, 4);
-  fragp->fr_var = 4;
-}
-
-/* This is called after a user-defined label is seen.  We check
-   if the label has a double colon (valid in Intel syntax mode only),
-   in which case it should be externalized.  */
-
-void
-i860_check_label (symbolS *labelsym)
-{
-  /* At this point, the current line pointer is sitting on the character
-     just after the first colon on the label.  */
-  if (target_intel_syntax && *input_line_pointer == ':')
-    {
-      S_SET_EXTERNAL (labelsym);
-      input_line_pointer++;
-    }
-}
diff --git a/gas/config/tc-i860.h b/gas/config/tc-i860.h
deleted file mode 100644
index a63f82f..0000000
--- a/gas/config/tc-i860.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/* tc-i860.h -- Header file for the i860.
-   Copyright (C) 1991-2018 Free Software Foundation, Inc.
-
-   Brought back from the dead and completely reworked
-   by Jason Eckhardt <jle@cygnus.com>.
-
-   This file is part of GAS, the GNU Assembler.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   GAS is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License along
-   with GAS; see the file COPYING.  If not, write to the Free Software
-   Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
-
-#ifndef TC_I860
-#define TC_I860 1
-
-enum i860_fix_info
-{
-  OP_NONE	 = 0x00000,
-  OP_IMM_U5	 = 0x00001,
-  OP_IMM_S16	 = 0x00002,
-  OP_IMM_U16	 = 0x00004,
-  OP_IMM_SPLIT16 = 0x00008,
-  OP_IMM_BR26	 = 0x00010,
-  OP_IMM_BR16	 = 0x00020,
-  OP_ENCODE1	 = 0x00040,
-  OP_ENCODE2	 = 0x00080,
-  OP_ENCODE3	 = 0x00100,
-  OP_SEL_HA	 = 0x00200,
-  OP_SEL_H	 = 0x00400,
-  OP_SEL_L	 = 0x00800,
-  OP_SEL_GOT	 = 0x01000,
-  OP_SEL_GOTOFF	 = 0x02000,
-  OP_SEL_PLT	 = 0x04000,
-  OP_ALIGN2	 = 0x08000,
-  OP_ALIGN4	 = 0x10000,
-  OP_ALIGN8	 = 0x20000,
-  OP_ALIGN16	 = 0x40000
-};
-
-/* Set the endianness we are using.  Default to little endian.  */
-#ifndef TARGET_BYTES_BIG_ENDIAN
-#define TARGET_BYTES_BIG_ENDIAN 0
-#endif
-
-/* Whether or not the target is big endian.  */
-extern int target_big_endian;
-
-/* BFD target architecture.  */
-#define TARGET_ARCH     bfd_arch_i860
-
-/* The target BFD format.  */
-#ifdef OBJ_ELF
-#define TARGET_FORMAT (target_big_endian ? "elf32-i860" : "elf32-i860-little")
-#else
-#error i860 GAS currently supports only the ELF object format
-#endif
-
-#define WORKING_DOT_WORD
-#define DIFF_EXPR_OK
-
-/* Permit temporary numeric labels.  */
-#define LOCAL_LABELS_FB		1
-#define LISTING_HEADER		"GAS for i860"
-
-#define md_convert_frag(b,s,f)  abort ()
-
-/* Values passed to md_apply_fix don't include the symbol value.  */
-#define MD_APPLY_SYM_VALUE(FIX) 0
-
-/* No shared lib support, so we don't need to ensure externally
-   visible symbols can be overridden.  */
-#define EXTERN_FORCE_RELOC 0
-
-/* Bits for post-processing of a user defined label to check if
-   it has a double colon (Intel syntax only).  */
-extern void i860_check_label (symbolS *labelsym);
-#define tc_check_label(ls)	i860_check_label (ls)
-
-/* Bits for filling in rs_align_code fragments with NOPs.  */
-extern void i860_handle_align (struct frag *);
-#define HANDLE_ALIGN(fragp) i860_handle_align (fragp)
-
-#define MAX_MEM_FOR_RS_ALIGN_CODE  (3 + 4 + 4)
-
-#endif /* TC_I860 */
diff --git a/gas/config/tc-i960.c b/gas/config/tc-i960.c
deleted file mode 100644
index e6f7504..0000000
--- a/gas/config/tc-i960.c
+++ /dev/null
@@ -1,2667 +0,0 @@
-/* tc-i960.c - All the i80960-specific stuff
-   Copyright (C) 1989-2018 Free Software Foundation, Inc.
-
-   This file is part of GAS.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   GAS is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GAS; see the file COPYING.  If not, write to the Free
-   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-   02110-1301, USA.  */
-
-/* See comment on md_parse_option for 80960-specific invocation options.  */
-
-/* There are 4 different lengths of (potentially) symbol-based displacements
-   in the 80960 instruction set, each of which could require address fix-ups
-   and (in the case of external symbols) emission of relocation directives:
-
-   32-bit (MEMB)
-        This is a standard length for the base assembler and requires no
-        special action.
-
-   13-bit (COBR)
-        This is a non-standard length, but the base assembler has a
-        hook for bit field address fixups: the fixS structure can
-        point to a descriptor of the field, in which case our
-        md_number_to_field() routine gets called to process it.
-
-        I made the hook a little cleaner by having fix_new() (in the base
-        assembler) return a pointer to the fixS in question.  And I made it a
-        little simpler by storing the field size (in this case 13) instead of
-        of a pointer to another structure:  80960 displacements are ALWAYS
-        stored in the low-order bits of a 4-byte word.
-
-        Since the target of a COBR cannot be external, no relocation
-        directives for this size displacement have to be generated.
-        But the base assembler had to be modified to issue error
-        messages if the symbol did turn out to be external.
-
-   24-bit (CTRL)
-        Fixups are handled as for the 13-bit case (except that 24 is stored
-        in the fixS).
-
-        The relocation directive generated is the same as that for the 32-bit
-        displacement, except that it's PC-relative (the 32-bit displacement
-        never is).   The i80960 version of the linker needs a mod to
-        distinguish and handle the 24-bit case.
-
-   12-bit (MEMA)
-        MEMA formats are always promoted to MEMB (32-bit) if the displacement
-        is based on a symbol, because it could be relocated at link time.
-        The only time we use the 12-bit format is if an absolute value of
-        less than 4096 is specified, in which case we need neither a fixup nor
-        a relocation directive.  */
-
-#include "as.h"
-
-#include "safe-ctype.h"
-
-#include "opcode/i960.h"
-
-#if defined (OBJ_AOUT) || defined (OBJ_BOUT)
-
-#define TC_S_IS_SYSPROC(s)	((1 <= S_GET_OTHER (s)) && (S_GET_OTHER (s) <= 32))
-#define TC_S_IS_BALNAME(s)	(S_GET_OTHER (s) == N_BALNAME)
-#define TC_S_IS_CALLNAME(s)	(S_GET_OTHER (s) == N_CALLNAME)
-#define TC_S_IS_BADPROC(s)	((S_GET_OTHER (s) != 0) && !TC_S_IS_CALLNAME (s) && !TC_S_IS_BALNAME (s) && !TC_S_IS_SYSPROC (s))
-
-#define TC_S_SET_SYSPROC(s, p)	(S_SET_OTHER ((s), (p) + 1))
-#define TC_S_GET_SYSPROC(s)	(S_GET_OTHER (s) - 1)
-
-#define TC_S_FORCE_TO_BALNAME(s)	(S_SET_OTHER ((s), N_BALNAME))
-#define TC_S_FORCE_TO_CALLNAME(s)	(S_SET_OTHER ((s), N_CALLNAME))
-#define TC_S_FORCE_TO_SYSPROC(s)	{;}
-
-#else /* ! OBJ_A/BOUT */
-#ifdef OBJ_COFF
-
-#define TC_S_IS_SYSPROC(s)	(S_GET_STORAGE_CLASS (s) == C_SCALL)
-#define TC_S_IS_BALNAME(s)	(SF_GET_BALNAME (s))
-#define TC_S_IS_CALLNAME(s)	(SF_GET_CALLNAME (s))
-#define TC_S_IS_BADPROC(s)	(TC_S_IS_SYSPROC (s) && TC_S_GET_SYSPROC (s) < 0 && 31 < TC_S_GET_SYSPROC (s))
-
-#define TC_S_SET_SYSPROC(s, p)	((s)->sy_symbol.ost_auxent[1].x_sc.x_stindx = (p))
-#define TC_S_GET_SYSPROC(s)	((s)->sy_symbol.ost_auxent[1].x_sc.x_stindx)
-
-#define TC_S_FORCE_TO_BALNAME(s)	(SF_SET_BALNAME (s))
-#define TC_S_FORCE_TO_CALLNAME(s)	(SF_SET_CALLNAME (s))
-#define TC_S_FORCE_TO_SYSPROC(s)	(S_SET_STORAGE_CLASS ((s), C_SCALL))
-
-#else /* ! OBJ_COFF */
-#ifdef OBJ_ELF
-#define TC_S_IS_SYSPROC(s)	0
-
-#define TC_S_IS_BALNAME(s)	0
-#define TC_S_IS_CALLNAME(s)	0
-#define TC_S_IS_BADPROC(s)	0
-
-#define TC_S_SET_SYSPROC(s, p)
-#define TC_S_GET_SYSPROC(s)     0
-
-#define TC_S_FORCE_TO_BALNAME(s)
-#define TC_S_FORCE_TO_CALLNAME(s)
-#define TC_S_FORCE_TO_SYSPROC(s)
-#else
- #error COFF, a.out, b.out, and ELF are the only supported formats.
-#endif /* ! OBJ_ELF */
-#endif /* ! OBJ_COFF */
-#endif /* ! OBJ_A/BOUT */
-
-extern char *input_line_pointer;
-
-/* Local i80960 routines.  */
-struct memS;
-struct regop;
-
-/* See md_parse_option() for meanings of these options.  */
-static char norelax;			/* True if -norelax switch seen.  */
-static char instrument_branches;	/* True if -b switch seen.  */
-
-/* Characters that always start a comment.
-   If the pre-processor is disabled, these aren't very useful.  */
-const char comment_chars[] = "#";
-
-/* Characters that only start a comment at the beginning of
-   a line.  If the line seems to have the form '# 123 filename'
-   .line and .file directives will appear in the pre-processed output.
-
-   Note that input_file.c hand checks for '#' at the beginning of the
-   first line of the input file.  This is because the compiler outputs
-   #NO_APP at the beginning of its output.  */
-
-/* Also note that comments started like this one will always work.  */
-
-const char line_comment_chars[]   = "#";
-const char line_separator_chars[] = ";";
-
-/* Chars that can be used to separate mant from exp in floating point nums.  */
-const char EXP_CHARS[] = "eE";
-
-/* Chars that mean this number is a floating point constant,
-   as in 0f12.456 or 0d1.2345e12.  */
-const char FLT_CHARS[] = "fFdDtT";
-
-/* Table used by base assembler to relax addresses based on varying length
-   instructions.  The fields are:
-     1) most positive reach of this state,
-     2) most negative reach of this state,
-     3) how many bytes this mode will add to the size of the current frag
-     4) which index into the table to try if we can't fit into this one.
-
-   For i80960, the only application is the (de-)optimization of cobr
-   instructions into separate compare and branch instructions when a 13-bit
-   displacement won't hack it.  */
-const relax_typeS md_relax_table[] =
-{
-  {0, 0, 0, 0},				/* State 0 => no more relaxation possible.  */
-  {4088, -4096, 0, 2},			/* State 1: conditional branch (cobr).  */
-  {0x800000 - 8, -0x800000, 4, 0},	/* State 2: compare (reg) & branch (ctrl).  */
-};
-
-/* These are the machine dependent pseudo-ops.
-
-   This table describes all the machine specific pseudo-ops the assembler
-   has to support.  The fields are:
-        pseudo-op name without dot
-        function to call to execute this pseudo-op
-        integer arg to pass to the function.  */
-#define S_LEAFPROC	1
-#define S_SYSPROC	2
-
-/* Macros to extract info from an 'expressionS' structure 'e'.  */
-#define adds(e)	e.X_add_symbol
-#define offs(e)	e.X_add_number
-
-/* Branch-prediction bits for CTRL/COBR format opcodes.  */
-#define BP_MASK		0x00000002	/* Mask for branch-prediction bit.  */
-#define BP_TAKEN	0x00000000	/* Value to OR in to predict branch.  */
-#define BP_NOT_TAKEN	0x00000002	/* Value to OR in to predict no branch.  */
-
-/* Some instruction opcodes that we need explicitly.  */
-#define BE	0x12000000
-#define BG	0x11000000
-#define BGE	0x13000000
-#define BL	0x14000000
-#define BLE	0x16000000
-#define BNE	0x15000000
-#define BNO	0x10000000
-#define BO	0x17000000
-#define CHKBIT	0x5a002700
-#define CMPI	0x5a002080
-#define CMPO	0x5a002000
-
-#define B	0x08000000
-#define BAL	0x0b000000
-#define CALL	0x09000000
-#define CALLS	0x66003800
-#define RET	0x0a000000
-
-/* These masks are used to build up a set of MEMB mode bits.  */
-#define	A_BIT		0x0400
-#define	I_BIT		0x0800
-#define MEMB_BIT	0x1000
-#define	D_BIT		0x2000
-
-/* Mask for the only mode bit in a MEMA instruction (if set, abase reg is
-   used).  */
-#define MEMA_ABASE	0x2000
-
-/* Info from which a MEMA or MEMB format instruction can be generated.  */
-typedef struct memS
-  {
-    /* (First) 32 bits of instruction.  */
-    long opcode;
-    /* 0-(none), 12- or, 32-bit displacement needed.  */
-    int disp;
-    /* The expression in the source instruction from which the
-       displacement should be determined.  */
-    char *e;
-  }
-memS;
-
-/* The two pieces of info we need to generate a register operand.  */
-struct regop
-  {
-    int mode;			/* 0 =>local/global/spec reg; 1=> literal or fp reg.  */
-    int special;		/* 0 =>not a sfr;  1=> is a sfr (not valid w/mode=0).  */
-    int n;			/* Register number or literal value.  */
-  };
-
-/* Number and assembler mnemonic for all registers that can appear in
-   operands.  */
-static const struct
-  {
-    const char *reg_name;
-    int reg_num;
-  }
-regnames[] =
-{
-  { "pfp", 0 },
-  { "sp", 1 },
-  { "rip", 2 },
-  { "r3", 3 },
-  { "r4", 4 },
-  { "r5", 5 },
-  { "r6", 6 },
-  { "r7", 7 },
-  { "r8", 8 },
-  { "r9", 9 },
-  { "r10", 10 },
-  { "r11", 11 },
-  { "r12", 12 },
-  { "r13", 13 },
-  { "r14", 14 },
-  { "r15", 15 },
-  { "g0", 16 },
-  { "g1", 17 },
-  { "g2", 18 },
-  { "g3", 19 },
-  { "g4", 20 },
-  { "g5", 21 },
-  { "g6", 22 },
-  { "g7", 23 },
-  { "g8", 24 },
-  { "g9", 25 },
-  { "g10", 26 },
-  { "g11", 27 },
-  { "g12", 28 },
-  { "g13", 29 },
-  { "g14", 30 },
-  { "fp", 31 },
-
-  /* Numbers for special-function registers are for assembler internal
-     use only: they are scaled back to range [0-31] for binary output.  */
-#define SF0	32
-
-  { "sf0", 32 },
-  { "sf1", 33 },
-  { "sf2", 34 },
-  { "sf3", 35 },
-  { "sf4", 36 },
-  { "sf5", 37 },
-  { "sf6", 38 },
-  { "sf7", 39 },
-  { "sf8", 40 },
-  { "sf9", 41 },
-  { "sf10", 42 },
-  { "sf11", 43 },
-  { "sf12", 44 },
-  { "sf13", 45 },
-  { "sf14", 46 },
-  { "sf15", 47 },
-  { "sf16", 48 },
-  { "sf17", 49 },
-  { "sf18", 50 },
-  { "sf19", 51 },
-  { "sf20", 52 },
-  { "sf21", 53 },
-  { "sf22", 54 },
-  { "sf23", 55 },
-  { "sf24", 56 },
-  { "sf25", 57 },
-  { "sf26", 58 },
-  { "sf27", 59 },
-  { "sf28", 60 },
-  { "sf29", 61 },
-  { "sf30", 62 },
-  { "sf31", 63 },
-
-  /* Numbers for floating point registers are for assembler internal
-     use only: they are scaled back to [0-3] for binary output.  */
-#define FP0	64
-
-  { "fp0", 64 },
-  { "fp1", 65 },
-  { "fp2", 66 },
-  { "fp3", 67 },
-
-  { NULL, 0 },				/* END OF LIST */
-};
-
-#define	IS_RG_REG(n)	((0 <= (n)) && ((n) < SF0))
-#define	IS_SF_REG(n)	((SF0 <= (n)) && ((n) < FP0))
-#define	IS_FP_REG(n)	((n) >= FP0)
-
-/* Number and assembler mnemonic for all registers that can appear as
-   'abase' (indirect addressing) registers.  */
-static const struct
-{
-  const char *areg_name;
-  int areg_num;
-}
-aregs[] =
-{
-  { "(pfp)", 0 },
-  { "(sp)", 1 },
-  { "(rip)", 2 },
-  { "(r3)", 3 },
-  { "(r4)", 4 },
-  { "(r5)", 5 },
-  { "(r6)", 6 },
-  { "(r7)", 7 },
-  { "(r8)", 8 },
-  { "(r9)", 9 },
-  { "(r10)", 10 },
-  { "(r11)", 11 },
-  { "(r12)", 12 },
-  { "(r13)", 13 },
-  { "(r14)", 14 },
-  { "(r15)", 15 },
-  { "(g0)", 16 },
-  { "(g1)", 17 },
-  { "(g2)", 18 },
-  { "(g3)", 19 },
-  { "(g4)", 20 },
-  { "(g5)", 21 },
-  { "(g6)", 22 },
-  { "(g7)", 23 },
-  { "(g8)", 24 },
-  { "(g9)", 25 },
-  { "(g10)", 26 },
-  { "(g11)", 27 },
-  { "(g12)", 28 },
-  { "(g13)", 29 },
-  { "(g14)", 30 },
-  { "(fp)", 31 },
-
-#define IPREL	32
-  /* For assembler internal use only: this number never appears in binary
-     output.  */
-  { "(ip)", IPREL },
-
-  { NULL, 0 },				/* END OF LIST */
-};
-
-/* Hash tables.  */
-static struct hash_control *op_hash;	/* Opcode mnemonics.  */
-static struct hash_control *reg_hash;	/* Register name hash table.  */
-static struct hash_control *areg_hash;	/* Abase register hash table.  */
-
-/* Architecture for which we are assembling.  */
-#define ARCH_ANY	0	/* Default: no architecture checking done.  */
-#define ARCH_KA		1
-#define ARCH_KB		2
-#define ARCH_MC		3
-#define ARCH_CA		4
-#define ARCH_JX		5
-#define ARCH_HX		6
-int architecture = ARCH_ANY;	/* Architecture requested on invocation line.  */
-int iclasses_seen;		/* OR of instruction classes (I_* constants)
-				      for which we've actually assembled
-				        instructions.  */
-
-/* BRANCH-PREDICTION INSTRUMENTATION
-
-        The following supports generation of branch-prediction instrumentation
-        (turned on by -b switch).  The instrumentation collects counts
-        of branches taken/not-taken for later input to a utility that will
-        set the branch prediction bits of the instructions in accordance with
-        the behavior observed.  (Note that the KX series does not have
-        branch-prediction.)
-
-        The instrumentation consists of:
-
-        (1) before and after each conditional branch, a call to an external
-            routine that increments and steps over an inline counter.  The
-            counter itself, initialized to 0, immediately follows the call
-            instruction.  For each branch, the counter following the branch
-            is the number of times the branch was not taken, and the difference
-            between the counters is the number of times it was taken.  An
-            example of an instrumented conditional branch:
-
-                                call    BR_CNT_FUNC
-                                .word   0
-                LBRANCH23:      be      label
-                                call    BR_CNT_FUNC
-                                .word   0
-
-        (2) a table of pointers to the instrumented branches, so that an
-            external postprocessing routine can locate all of the counters.
-            the table begins with a 2-word header: a pointer to the next in
-            a linked list of such tables (initialized to 0);  and a count
-            of the number of entries in the table (exclusive of the header.
-
-            Note that input source code is expected to already contain calls
-            an external routine that will link the branch local table into a
-            list of such tables.  */
-
-/* Number of branches instrumented so far.  Also used to generate
-   unique local labels for each instrumented branch.  */
-static int br_cnt;
-
-#define BR_LABEL_BASE	"LBRANCH"
-/* Basename of local labels on instrumented branches, to avoid
-   conflict with compiler- generated local labels.  */
-
-#define BR_CNT_FUNC	"__inc_branch"
-/* Name of the external routine that will increment (and step over) an
-   inline counter.  */
-
-#define BR_TAB_NAME	"__BRANCH_TABLE__"
-/* Name of the table of pointers to branches.  A local (i.e.,
-   non-external) symbol.  */
-
-static void ctrl_fmt (const char *, long, int);
-
-
-void
-md_begin (void)
-{
-  int i;			/* Loop counter.  */
-  const struct i960_opcode *oP;	/* Pointer into opcode table.  */
-  const char *retval;		/* Value returned by hash functions.  */
-
-  op_hash = hash_new ();
-  reg_hash = hash_new ();
-  areg_hash = hash_new ();
-
-  /* For some reason, the base assembler uses an empty string for "no
-     error message", instead of a NULL pointer.  */
-  retval = 0;
-
-  for (oP = i960_opcodes; oP->name && !retval; oP++)
-    retval = hash_insert (op_hash, oP->name, (void *) oP);
-
-  for (i = 0; regnames[i].reg_name && !retval; i++)
-    retval = hash_insert (reg_hash, regnames[i].reg_name,
-			  (char *) &regnames[i].reg_num);
-
-  for (i = 0; aregs[i].areg_name && !retval; i++)
-    retval = hash_insert (areg_hash, aregs[i].areg_name,
-			  (char *) &aregs[i].areg_num);
-
-  if (retval)
-    as_fatal (_("Hashing returned \"%s\"."), retval);
-}
-
-/* parse_expr:		parse an expression
-
-   Use base assembler's expression parser to parse an expression.
-   It, unfortunately, runs off a global which we have to save/restore
-   in order to make it work for us.
-
-   An empty expression string is treated as an absolute 0.
-
-   Sets O_illegal regardless of expression evaluation if entire input
-   string is not consumed in the evaluation -- tolerate no dangling junk!  */
-
-static void
-parse_expr (const char *textP,		/* Text of expression to be parsed.  */
-	    expressionS *expP)		/* Where to put the results of parsing.  */
-{
-  char *save_in;		/* Save global here.  */
-  symbolS *symP;
-
-  know (textP);
-
-  if (*textP == '\0')
-    {
-      /* Treat empty string as absolute 0.  */
-      expP->X_add_symbol = expP->X_op_symbol = NULL;
-      expP->X_add_number = 0;
-      expP->X_op = O_constant;
-    }
-  else
-    {
-      save_in = input_line_pointer;	/* Save global.  */
-      input_line_pointer = (char *) textP;	/* Make parser work for us.  */
-
-      (void) expression (expP);
-      if ((size_t) (input_line_pointer - textP) != strlen (textP))
-	/* Did not consume all of the input.  */
-	expP->X_op = O_illegal;
-
-      symP = expP->X_add_symbol;
-      if (symP && (hash_find (reg_hash, S_GET_NAME (symP))))
-	/* Register name in an expression.  */
-	/* FIXME: this isn't much of a check any more.  */
-	expP->X_op = O_illegal;
-
-      input_line_pointer = save_in;	/* Restore global.  */
-    }
-}
-
-/* emit:	output instruction binary
-
-   Output instruction binary, in target byte order, 4 bytes at a time.
-   Return pointer to where it was placed.  */
-
-static char *
-emit (long instr)		/* Word to be output, host byte order.  */
-{
-  char *toP;			/* Where to output it.  */
-
-  toP = frag_more (4);		/* Allocate storage.  */
-  md_number_to_chars (toP, instr, 4);	/* Convert to target byte order.  */
-  return toP;
-}
-
-/* get_cdisp:	handle displacement for a COBR or CTRL instruction.
-
-   Parse displacement for a COBR or CTRL instruction.
-
-   If successful, output the instruction opcode and set up for it,
-   depending on the arg 'var_frag', either:
-  	    o an address fixup to be done when all symbol values are known, or
-  	    o a varying length code fragment, with address fixup info.  This
-  		will be done for cobr instructions that may have to be relaxed
-  		in to compare/branch instructions (8 bytes) if the final
-  		address displacement is greater than 13 bits.  */
-
-static void
-get_cdisp (const char *dispP, /* Displacement as specified in source instruction.  */
-	   const char *ifmtP, /* "COBR" or "CTRL" (for use in error message).  */
-	   long instr,  /* Instruction needing the displacement.  */
-	   int numbits, /* # bits of displacement (13 for COBR, 24 for CTRL).  */
-	   int var_frag,/* 1 if varying length code fragment should be emitted;
-			   0 if an address fix should be emitted.  */
-	   int callj)	/* 1 if callj relocation should be done; else 0.  */
-{
-  expressionS e;		/* Parsed expression.  */
-  fixS *fixP;			/* Structure describing needed address fix.  */
-  char *outP;			/* Where instruction binary is output to.  */
-
-  fixP = NULL;
-
-  parse_expr (dispP, &e);
-  switch (e.X_op)
-    {
-    case O_illegal:
-      as_bad (_("expression syntax error"));
-      break;
-
-    case O_symbol:
-      if (S_GET_SEGMENT (e.X_add_symbol) == now_seg
-	  || S_GET_SEGMENT (e.X_add_symbol) == undefined_section)
-	{
-	  if (var_frag)
-	    {
-	      outP = frag_more (8);	/* Allocate worst-case storage.  */
-	      md_number_to_chars (outP, instr, 4);
-	      frag_variant (rs_machine_dependent, 4, 4, 1,
-			    adds (e), offs (e), outP);
-	    }
-	  else
-	    {
-	      /* Set up a new fix structure, so address can be updated
-	         when all symbol values are known.  */
-	      outP = emit (instr);
-	      fixP = fix_new (frag_now,
-			      outP - frag_now->fr_literal,
-			      4,
-			      adds (e),
-			      offs (e),
-			      1,
-			      NO_RELOC);
-
-	      fixP->fx_tcbit = callj;
-
-	      /* We want to modify a bit field when the address is
-	         known.  But we don't need all the garbage in the
-	         bit_fix structure.  So we're going to lie and store
-	         the number of bits affected instead of a pointer.  */
-	      fixP->fx_bit_fixP = (bit_fixS *) (size_t) numbits;
-	    }
-	}
-      else
-	as_bad (_("attempt to branch into different segment"));
-      break;
-
-    default:
-      as_bad (_("target of %s instruction must be a label"), ifmtP);
-      break;
-    }
-}
-
-static int
-md_chars_to_number (char * val,		/* Value in target byte order.  */
-		    int n)		/* Number of bytes in the input.  */
-{
-  int retval;
-
-  for (retval = 0; n--;)
-    {
-      retval <<= 8;
-      retval |= (unsigned char) val[n];
-    }
-  return retval;
-}
-
-/* mema_to_memb:	convert a MEMA-format opcode to a MEMB-format opcode.
-
-   There are 2 possible MEMA formats:
-  	- displacement only
-  	- displacement + abase
-
-   They are distinguished by the setting of the MEMA_ABASE bit.  */
-
-static void
-mema_to_memb (char * opcodeP)	/* Where to find the opcode, in target byte order.  */
-{
-  long opcode;			/* Opcode in host byte order.  */
-  long mode;			/* Mode bits for MEMB instruction.  */
-
-  opcode = md_chars_to_number (opcodeP, 4);
-  know (!(opcode & MEMB_BIT));
-
-  mode = MEMB_BIT | D_BIT;
-  if (opcode & MEMA_ABASE)
-    mode |= A_BIT;
-
-  opcode &= 0xffffc000;		/* Clear MEMA offset and mode bits.  */
-  opcode |= mode;		/* Set MEMB mode bits.  */
-
-  md_number_to_chars (opcodeP, opcode, 4);
-}
-
-/* targ_has_sfr:
-
-   Return TRUE iff the target architecture supports the specified
-   special-function register (sfr).  */
-
-static int
-targ_has_sfr (int n)		/* Number (0-31) of sfr.  */
-{
-  switch (architecture)
-    {
-    case ARCH_KA:
-    case ARCH_KB:
-    case ARCH_MC:
-    case ARCH_JX:
-      return 0;
-    case ARCH_HX:
-      return ((0 <= n) && (n <= 4));
-    case ARCH_CA:
-    default:
-      return ((0 <= n) && (n <= 2));
-    }
-}
-
-/* Look up a (suspected) register name in the register table and return the
-   associated register number (or -1 if not found).  */
-
-static int
-get_regnum (char *regname)	/* Suspected register name.  */
-{
-  int *rP;
-
-  rP = (int *) hash_find (reg_hash, regname);
-  return (rP == NULL) ? -1 : *rP;
-}
-
-/* syntax: Issue a syntax error.  */
-
-static void
-syntax (void)
-{
-  as_bad (_("syntax error"));
-}
-
-/* parse_regop: parse a register operand.
-
-   In case of illegal operand, issue a message and return some valid
-   information so instruction processing can continue.  */
-
-static void
-parse_regop (struct regop *regopP,	/* Where to put description of register operand.  */
-	     char *optext,		/* Text of operand.  */
-	     char opdesc)      		/* Descriptor byte:  what's legal for this operand.  */
-{
-  int n;			/* Register number.  */
-  expressionS e;		/* Parsed expression.  */
-
-  /* See if operand is a register.  */
-  n = get_regnum (optext);
-  if (n >= 0)
-    {
-      if (IS_RG_REG (n))
-	{
-	  /* Global or local register.  */
-	  if (!REG_ALIGN (opdesc, n))
-	    as_bad (_("unaligned register"));
-
-	  regopP->n = n;
-	  regopP->mode = 0;
-	  regopP->special = 0;
-	  return;
-	}
-      else if (IS_FP_REG (n) && FP_OK (opdesc))
-	{
-	  /* Floating point register, and it's allowed.  */
-	  regopP->n = n - FP0;
-	  regopP->mode = 1;
-	  regopP->special = 0;
-	  return;
-	}
-      else if (IS_SF_REG (n) && SFR_OK (opdesc))
-	{
-	  /* Special-function register, and it's allowed.  */
-	  regopP->n = n - SF0;
-	  regopP->mode = 0;
-	  regopP->special = 1;
-	  if (!targ_has_sfr (regopP->n))
-	    as_bad (_("no such sfr in this architecture"));
-
-	  return;
-	}
-    }
-  else if (LIT_OK (opdesc))
-    {
-      /* How about a literal?  */
-      regopP->mode = 1;
-      regopP->special = 0;
-      if (FP_OK (opdesc))
-	{
-	  /* Floating point literal acceptable.  */
-	  /* Skip over 0f, 0d, or 0e prefix.  */
-	  if ((optext[0] == '0')
-	      && (optext[1] >= 'd')
-	      && (optext[1] <= 'f'))
-	    optext += 2;
-
-	  if (!strcmp (optext, "0.0") || !strcmp (optext, "0"))
-	    {
-	      regopP->n = 0x10;
-	      return;
-	    }
-
-	  if (!strcmp (optext, "1.0") || !strcmp (optext, "1"))
-	    {
-	      regopP->n = 0x16;
-	      return;
-	    }
-	}
-      else
-	{
-	  /* Fixed point literal acceptable.  */
-	  parse_expr (optext, &e);
-	  if (e.X_op != O_constant
-	      || (offs (e) < 0) || (offs (e) > 31))
-	    {
-	      as_bad (_("illegal literal"));
-	      offs (e) = 0;
-	    }
-	  regopP->n = offs (e);
-	  return;
-	}
-    }
-
-  /* Nothing worked.  */
-  syntax ();
-  regopP->mode = 0;		/* Register r0 is always a good one.  */
-  regopP->n = 0;
-  regopP->special = 0;
-}
-
-/* get_ispec:	parse a memory operand for an index specification
-
-   Here, an "index specification" is taken to be anything surrounded
-   by square brackets and NOT followed by anything else.
-
-   If it's found, detach it from the input string, remove the surrounding
-   square brackets, and return a pointer to it.  Otherwise, return NULL.  */
-
-static char *
-get_ispec (char *textP)  /* Pointer to memory operand from source instruction, no white space.  */
-
-{
-  /* Points to start of index specification.  */
-  char *start;
-  /* Points to end of index specification.  */
-  char *end;
-
-  /* Find opening square bracket, if any.  */
-  start = strchr (textP, '[');
-
-  if (start != NULL)
-    {
-      /* Eliminate '[', detach from rest of operand.  */
-      *start++ = '\0';
-
-      end = strchr (start, ']');
-
-      if (end == NULL)
-	as_bad (_("unmatched '['"));
-      else
-	{
-	  /* Eliminate ']' and make sure it was the last thing
-	     in the string.  */
-	  *end = '\0';
-	  if (*(end + 1) != '\0')
-	    as_bad (_("garbage after index spec ignored"));
-	}
-    }
-  return start;
-}
-
-/* parse_memop:	parse a memory operand
-
-  	This routine is based on the observation that the 4 mode bits of the
-  	MEMB format, taken individually, have fairly consistent meaning:
-
-  		 M3 (bit 13): 1 if displacement is present (D_BIT)
-  		 M2 (bit 12): 1 for MEMB instructions (MEMB_BIT)
-  		 M1 (bit 11): 1 if index is present (I_BIT)
-  		 M0 (bit 10): 1 if abase is present (A_BIT)
-
-  	So we parse the memory operand and set bits in the mode as we find
-  	things.  Then at the end, if we go to MEMB format, we need only set
-  	the MEMB bit (M2) and our mode is built for us.
-
-  	Unfortunately, I said "fairly consistent".  The exceptions:
-
-  		 DBIA
-  		 0100	Would seem illegal, but means "abase-only".
-
-  		 0101	Would seem to mean "abase-only" -- it means IP-relative.
-  			Must be converted to 0100.
-
-  		 0110	Would seem to mean "index-only", but is reserved.
-  			We turn on the D bit and provide a 0 displacement.
-
-  	The other thing to observe is that we parse from the right, peeling
-  	things * off as we go:  first any index spec, then any abase, then
-  	the displacement.  */
-
-static void
-parse_memop (memS *memP,	/* Where to put the results.  */
-	     char *argP,	/* Text of the operand to be parsed.  */
-	     int optype)	/* MEM1, MEM2, MEM4, MEM8, MEM12, or MEM16.  */
-{
-  char *indexP;			/* Pointer to index specification with "[]" removed.  */
-  char *p;			/* Temp char pointer.  */
-  char iprel_flag;		/* True if this is an IP-relative operand.  */
-  int regnum;			/* Register number.  */
-  /* Scale factor: 1,2,4,8, or 16.  Later converted to internal format
-     (0,1,2,3,4 respectively).  */
-  int scale;
-  int mode;			/* MEMB mode bits.  */
-  int *intP;			/* Pointer to register number.  */
-
-  /* The following table contains the default scale factors for each
-     type of memory instruction.  It is accessed using (optype-MEM1)
-     as an index -- thus it assumes the 'optype' constants are
-     assigned consecutive values, in the order they appear in this
-     table.  */
-  static const int def_scale[] =
-  {
-    1,				/* MEM1 */
-    2,				/* MEM2 */
-    4,				/* MEM4 */
-    8,				/* MEM8 */
-    -1,				/* MEM12 -- no valid default */
-    16				/* MEM16 */
-  };
-
-  iprel_flag = mode = 0;
-
-  /* Any index present? */
-  indexP = get_ispec (argP);
-  if (indexP)
-    {
-      p = strchr (indexP, '*');
-      if (p == NULL)
-	{
-	  /* No explicit scale -- use default for this instruction
-	     type and assembler mode.  */
-	  if (flag_mri)
-	    scale = 1;
-	  else
-	    /* GNU960 compatibility */
-	    scale = def_scale[optype - MEM1];
-	}
-      else
-	{
-	  *p++ = '\0';		/* Eliminate '*' */
-
-	  /* Now indexP->a '\0'-terminated register name,
-	     and p->a scale factor.  */
-
-	  if (!strcmp (p, "16"))
-	    scale = 16;
-	  else if (strchr ("1248", *p) && (p[1] == '\0'))
-	    scale = *p - '0';
-	  else
-	    scale = -1;
-	}
-
-      regnum = get_regnum (indexP);	/* Get index reg. # */
-      if (!IS_RG_REG (regnum))
-	{
-	  as_bad (_("invalid index register"));
-	  return;
-	}
-
-      /* Convert scale to its binary encoding.  */
-      switch (scale)
-	{
-	case 1:
-	  scale = 0 << 7;
-	  break;
-	case 2:
-	  scale = 1 << 7;
-	  break;
-	case 4:
-	  scale = 2 << 7;
-	  break;
-	case 8:
-	  scale = 3 << 7;
-	  break;
-	case 16:
-	  scale = 4 << 7;
-	  break;
-	default:
-	  as_bad (_("invalid scale factor"));
-	  return;
-	};
-
-      memP->opcode |= scale | regnum;	/* Set index bits in opcode.  */
-      mode |= I_BIT;			/* Found a valid index spec.  */
-    }
-
-  /* Any abase (Register Indirect) specification present?  */
-  if ((p = strrchr (argP, '(')) != NULL)
-    {
-      /* "(" is there -- does it start a legal abase spec?  If not, it
-         could be part of a displacement expression.  */
-      intP = (int *) hash_find (areg_hash, p);
-      if (intP != NULL)
-	{
-	  /* Got an abase here.  */
-	  regnum = *intP;
-	  *p = '\0';		/* Discard register spec.  */
-	  if (regnum == IPREL)
-	    /* We have to special-case ip-rel mode.  */
-	    iprel_flag = 1;
-	  else
-	    {
-	      memP->opcode |= regnum << 14;
-	      mode |= A_BIT;
-	    }
-	}
-    }
-
-  /* Any expression present?  */
-  memP->e = argP;
-  if (*argP != '\0')
-    mode |= D_BIT;
-
-  /* Special-case ip-relative addressing.  */
-  if (iprel_flag)
-    {
-      if (mode & I_BIT)
-	syntax ();
-      else
-	{
-	  memP->opcode |= 5 << 10;	/* IP-relative mode.  */
-	  memP->disp = 32;
-	}
-      return;
-    }
-
-  /* Handle all other modes.  */
-  switch (mode)
-    {
-    case D_BIT | A_BIT:
-      /* Go with MEMA instruction format for now (grow to MEMB later
-         if 12 bits is not enough for the displacement).  MEMA format
-         has a single mode bit: set it to indicate that abase is
-         present.  */
-      memP->opcode |= MEMA_ABASE;
-      memP->disp = 12;
-      break;
-
-    case D_BIT:
-      /* Go with MEMA instruction format for now (grow to MEMB later
-         if 12 bits is not enough for the displacement).  */
-      memP->disp = 12;
-      break;
-
-    case A_BIT:
-      /* For some reason, the bit string for this mode is not
-         consistent: it should be 0 (exclusive of the MEMB bit), so we
-         set it "by hand" here.  */
-      memP->opcode |= MEMB_BIT;
-      break;
-
-    case A_BIT | I_BIT:
-      /* set MEMB bit in mode, and OR in mode bits.  */
-      memP->opcode |= mode | MEMB_BIT;
-      break;
-
-    case I_BIT:
-      /* Treat missing displacement as displacement of 0.  */
-      mode |= D_BIT;
-      /* Fall through.  */
-    case D_BIT | A_BIT | I_BIT:
-    case D_BIT | I_BIT:
-      /* Set MEMB bit in mode, and OR in mode bits.  */
-      memP->opcode |= mode | MEMB_BIT;
-      memP->disp = 32;
-      break;
-
-    default:
-      syntax ();
-      break;
-    }
-}
-
-/* Generate a MEMA- or MEMB-format instruction.  */
-
-static void
-mem_fmt (char *args[],		/* args[0]->opcode mnemonic, args[1-3]->operands.  */
-	 struct i960_opcode *oP,/* Pointer to description of instruction.  */
-	 int callx)		/* Is this a callx opcode.  */
-{
-  int i;			/* Loop counter.  */
-  struct regop regop;		/* Description of register operand.  */
-  char opdesc;			/* Operand descriptor byte.  */
-  memS instr;			/* Description of binary to be output.  */
-  char *outP;			/* Where the binary was output to.  */
-  expressionS exp;		/* Parsed expression.  */
-  /* ->description of deferred address fixup.  */
-  fixS *fixP;
-
-#ifdef OBJ_COFF
-  /* COFF support isn't in place yet for callx relaxing.  */
-  callx = 0;
-#endif
-
-  memset (&instr, '\0', sizeof (memS));
-  instr.opcode = oP->opcode;
-
-  /* Process operands.  */
-  for (i = 1; i <= oP->num_ops; i++)
-    {
-      opdesc = oP->operand[i - 1];
-
-      if (MEMOP (opdesc))
-	parse_memop (&instr, args[i], oP->format);
-      else
-	{
-	  parse_regop (&regop, args[i], opdesc);
-	  instr.opcode |= regop.n << 19;
-	}
-    }
-
-  /* Parse the displacement; this must be done before emitting the
-     opcode, in case it is an expression using `.'.  */
-  parse_expr (instr.e, &exp);
-
-  /* Output opcode.  */
-  outP = emit (instr.opcode);
-
-  if (instr.disp == 0)
-    return;
-
-  /* Process the displacement.  */
-  switch (exp.X_op)
-    {
-    case O_illegal:
-      as_bad (_("expression syntax error"));
-      break;
-
-    case O_constant:
-      if (instr.disp == 32)
-	(void) emit (offs (exp));	/* Output displacement.  */
-      else
-	{
-	  /* 12-bit displacement.  */
-	  if (offs (exp) & ~0xfff)
-	    {
-	      /* Won't fit in 12 bits: convert already-output
-	         instruction to MEMB format, output
-	         displacement.  */
-	      mema_to_memb (outP);
-	      (void) emit (offs (exp));
-	    }
-	  else
-	    {
-	      /* WILL fit in 12 bits:  OR into opcode and
-	         overwrite the binary we already put out.  */
-	      instr.opcode |= offs (exp);
-	      md_number_to_chars (outP, instr.opcode, 4);
-	    }
-	}
-      break;
-
-    default:
-      if (instr.disp == 12)
-	/* Displacement is dependent on a symbol, whose value
-	   may change at link time.  We HAVE to reserve 32 bits.
-	   Convert already-output opcode to MEMB format.  */
-	mema_to_memb (outP);
-
-      /* Output 0 displacement and set up address fixup for when
-         this symbol's value becomes known.  */
-      outP = emit ((long) 0);
-      fixP = fix_new_exp (frag_now,
-			  outP - frag_now->fr_literal,
-			  4, &exp, 0, NO_RELOC);
-      /* Steve's linker relaxing hack.  Mark this 32-bit relocation as
-         being in the instruction stream, specifically as part of a callx
-         instruction.  */
-      fixP->fx_bsr = callx;
-      break;
-    }
-}
-
-/* targ_has_iclass:
-
-   Return TRUE iff the target architecture supports the indicated
-   class of instructions.  */
-
-static int
-targ_has_iclass (int ic) /* Instruction class;  one of:
-			    I_BASE, I_CX, I_DEC, I_KX, I_FP, I_MIL, I_CASIM, I_CX2, I_HX, I_HX2.  */
-{
-  iclasses_seen |= ic;
-
-  switch (architecture)
-    {
-    case ARCH_KA:
-      return ic & (I_BASE | I_KX);
-    case ARCH_KB:
-      return ic & (I_BASE | I_KX | I_FP | I_DEC);
-    case ARCH_MC:
-      return ic & (I_BASE | I_KX | I_FP | I_DEC | I_MIL);
-    case ARCH_CA:
-      return ic & (I_BASE | I_CX | I_CX2 | I_CASIM);
-    case ARCH_JX:
-      return ic & (I_BASE | I_CX2 | I_JX);
-    case ARCH_HX:
-      return ic & (I_BASE | I_CX2 | I_JX | I_HX);
-    default:
-      if ((iclasses_seen & (I_KX | I_FP | I_DEC | I_MIL))
-	  && (iclasses_seen & (I_CX | I_CX2)))
-	{
-	  as_warn (_("architecture of opcode conflicts with that of earlier instruction(s)"));
-	  iclasses_seen &= ~ic;
-	}
-      return 1;
-    }
-}
-
-/* shift_ok:
-   Determine if a "shlo" instruction can be used to implement a "ldconst".
-   This means that some number X < 32 can be shifted left to produce the
-   constant of interest.
-
-   Return the shift count, or 0 if we can't do it.
-   Caller calculates X by shifting original constant right 'shift' places.  */
-
-static int
-shift_ok (int n)		/* The constant of interest.  */
-{
-  int shift;			/* The shift count.  */
-
-  if (n <= 0)
-    /* Can't do it for negative numbers.  */
-    return 0;
-
-  /* Shift 'n' right until a 1 is about to be lost.  */
-  for (shift = 0; (n & 1) == 0; shift++)
-    n >>= 1;
-
-  if (n >= 32)
-    return 0;
-
-  return shift;
-}
-
-/* parse_ldcont:
-   Parse and replace a 'ldconst' pseudo-instruction with an appropriate
-   i80960 instruction.
-
-   Assumes the input consists of:
-  		arg[0]	opcode mnemonic ('ldconst')
-  		arg[1]  first operand (constant)
-  		arg[2]	name of register to be loaded
-
-   Replaces opcode and/or operands as appropriate.
-
-   Returns the new number of arguments, or -1 on failure.  */
-
-static int
-parse_ldconst (char *arg[])	/* See above.  */
-{
-  int n;			/* Constant to be loaded.  */
-  int shift;			/* Shift count for "shlo" instruction.  */
-  static char buf[5];		/* Literal for first operand.  */
-  static char buf2[5];		/* Literal for second operand.  */
-  expressionS e;		/* Parsed expression.  */
-
-  arg[3] = NULL;		/* So we can tell at the end if it got used or not.  */
-
-  parse_expr (arg[1], &e);
-  switch (e.X_op)
-    {
-    default:
-      /* We're dependent on one or more symbols -- use "lda".  */
-      arg[0] = (char *) "lda";
-      break;
-
-    case O_constant:
-      /* Try the following mappings:
-              ldconst   0,<reg>  -> mov  0,<reg>
-              ldconst  31,<reg>  -> mov  31,<reg>
-              ldconst  32,<reg>  -> addo 1,31,<reg>
-              ldconst  62,<reg>  -> addo 31,31,<reg>
-              ldconst  64,<reg>  -> shlo 8,3,<reg>
-              ldconst  -1,<reg>  -> subo 1,0,<reg>
-              ldconst -31,<reg>  -> subo 31,0,<reg>
-
-         Anything else becomes:
-                lda xxx,<reg>.  */
-      n = offs (e);
-      if ((0 <= n) && (n <= 31))
-	arg[0] = (char *) "mov";
-      else if ((-31 <= n) && (n <= -1))
-	{
-	  arg[0] = (char *) "subo";
-	  arg[3] = arg[2];
-	  sprintf (buf, "%d", -n);
-	  arg[1] = buf;
-	  arg[2] = (char *) "0";
-	}
-      else if ((32 <= n) && (n <= 62))
-	{
-	  arg[0] = (char *) "addo";
-	  arg[3] = arg[2];
-	  arg[1] = (char *) "31";
-	  sprintf (buf, "%d", n - 31);
-	  arg[2] = buf;
-	}
-      else if ((shift = shift_ok (n)) != 0)
-	{
-	  arg[0] = (char *) "shlo";
-	  arg[3] = arg[2];
-	  sprintf (buf, "%d", shift);
-	  arg[1] = buf;
-	  sprintf (buf2, "%d", n >> shift);
-	  arg[2] = buf2;
-	}
-      else
-	arg[0] = (char *) "lda";
-      break;
-
-    case O_illegal:
-      as_bad (_("invalid constant"));
-      return -1;
-      break;
-    }
-  return (arg[3] == 0) ? 2 : 3;
-}
-
-/* reg_fmt:	generate a REG-format instruction.  */
-
-static void
-reg_fmt (char *args[],		/* args[0]->opcode mnemonic, args[1-3]->operands.  */
-	 struct i960_opcode *oP)/* Pointer to description of instruction.  */
-{
-  long instr;			/* Binary to be output.  */
-  struct regop regop;		/* Description of register operand.  */
-  int n_ops;			/* Number of operands.  */
-
-  instr = oP->opcode;
-  n_ops = oP->num_ops;
-
-  if (n_ops >= 1)
-    {
-      parse_regop (&regop, args[1], oP->operand[0]);
-
-      if ((n_ops == 1) && !(instr & M3))
-	{
-	  /* 1-operand instruction in which the dst field should
-	     be used (instead of src1).  */
-	  regop.n <<= 19;
-	  if (regop.special)
-	    regop.mode = regop.special;
-	  regop.mode <<= 13;
-	  regop.special = 0;
-	}
-      else
-	{
-	  /* regop.n goes in bit 0, needs no shifting.  */
-	  regop.mode <<= 11;
-	  regop.special <<= 5;
-	}
-      instr |= regop.n | regop.mode | regop.special;
-    }
-
-  if (n_ops >= 2)
-    {
-      parse_regop (&regop, args[2], oP->operand[1]);
-
-      if ((n_ops == 2) && !(instr & M3))
-	{
-	  /* 2-operand instruction in which the dst field should
-	     be used instead of src2).  */
-	  regop.n <<= 19;
-	  if (regop.special)
-	    regop.mode = regop.special;
-	  regop.mode <<= 13;
-	  regop.special = 0;
-	}
-      else
-	{
-	  regop.n <<= 14;
-	  regop.mode <<= 12;
-	  regop.special <<= 6;
-	}
-      instr |= regop.n | regop.mode | regop.special;
-    }
-  if (n_ops == 3)
-    {
-      parse_regop (&regop, args[3], oP->operand[2]);
-      if (regop.special)
-	regop.mode = regop.special;
-      instr |= (regop.n <<= 19) | (regop.mode <<= 13);
-    }
-  emit (instr);
-}
-
-/* get_args:	break individual arguments out of comma-separated list
-
-   Input assumptions:
-  	- all comments and labels have been removed
-  	- all strings of whitespace have been collapsed to a single blank.
-  	- all character constants ('x') have been replaced with decimal
-
-   Output:
-  	args[0] is untouched. args[1] points to first operand, etc. All args:
-  	- are NULL-terminated
-  	- contain no whitespace
-
-   Return value:
-   Number of operands (0,1,2, or 3) or -1 on error.  */
-
-static int
-get_args (char *p, 	/* Pointer to comma-separated operands; Mucked by us.  */
-	  char *args[]) /* Output arg: pointers to operands placed in args[1-3].
-			   Must accommodate 4 entries (args[0-3]).  */
-
-{
-  int n;		/* Number of operands.  */
-  char *to;
-
-  /* Skip lead white space.  */
-  while (*p == ' ')
-    p++;
-
-  if (*p == '\0')
-    return 0;
-
-  n = 1;
-  args[1] = p;
-
-  /* Squeeze blanks out by moving non-blanks toward start of string.
-     Isolate operands, whenever comma is found.  */
-  to = p;
-  while (*p != '\0')
-    {
-      if (*p == ' '
-	  && (! ISALNUM (p[1])
-	      || ! ISALNUM (p[-1])))
-	p++;
-      else if (*p == ',')
-	{
-	  /* Start of operand.  */
-	  if (n == 3)
-	    {
-	      as_bad (_("too many operands"));
-	      return -1;
-	    }
-	  *to++ = '\0';		/* Terminate argument.  */
-	  args[++n] = to;	/* Start next argument.  */
-	  p++;
-	}
-      else
-	*to++ = *p++;
-    }
-  *to = '\0';
-  return n;
-}
-
-/* i_scan:	perform lexical scan of ascii assembler instruction.
-
-   Input assumptions:
-  	- input string is an i80960 instruction (not a pseudo-op)
-  	- all comments and labels have been removed
-  	- all strings of whitespace have been collapsed to a single blank.
-
-   Output:
-  	args[0] points to opcode, other entries point to operands. All strings:
-  	- are NULL-terminated
-  	- contain no whitespace
-  	- have character constants ('x') replaced with a decimal number
-
-   Return value:
-     Number of operands (0,1,2, or 3) or -1 on error.  */
-
-static int
-i_scan (char *iP,     /* Pointer to ascii instruction;  Mucked by us.  */
-	char *args[]) /* Output arg: pointers to opcode and operands placed here.
-			 Must accommodate 4 entries.  */
-{
-  /* Isolate opcode.  */
-  if (*(iP) == ' ')
-    iP++;
-
-  args[0] = iP;
-  for (; *iP != ' '; iP++)
-    {
-      if (*iP == '\0')
-	{
-	  /* There are no operands.  */
-	  if (args[0] == iP)
-	    {
-	      /* We never moved: there was no opcode either!  */
-	      as_bad (_("missing opcode"));
-	      return -1;
-	    }
-	  return 0;
-	}
-    }
-  *iP++ = '\0';
-  return (get_args (iP, args));
-}
-
-static void
-brcnt_emit (void)
-{
-  /* Emit call to "increment" routine.  */
-  ctrl_fmt (BR_CNT_FUNC, CALL, 1);
-  /* Emit inline counter to be incremented.  */
-  emit (0);
-}
-
-static char *
-brlab_next (void)
-{
-  static char buf[20];
-
-  sprintf (buf, "%s%d", BR_LABEL_BASE, br_cnt++);
-  return buf;
-}
-
-static void
-ctrl_fmt (const char *targP,		/* Pointer to text of lone operand (if any).  */
-	  long opcode,		/* Template of instruction.  */
-	  int num_ops)		/* Number of operands.  */
-{
-  int instrument;		/* TRUE iff we should add instrumentation to track
-				   how often the branch is taken.  */
-
-  if (num_ops == 0)
-    emit (opcode);		/* Output opcode.  */
-  else
-    {
-      instrument = instrument_branches && (opcode != CALL)
-	&& (opcode != B) && (opcode != RET) && (opcode != BAL);
-
-      if (instrument)
-	{
-	  brcnt_emit ();
-	  colon (brlab_next ());
-	}
-
-      /* The operand MUST be an ip-relative displacement. Parse it
-         and set up address fix for the instruction we just output.  */
-      get_cdisp (targP, "CTRL", opcode, 24, 0, 0);
-
-      if (instrument)
-	brcnt_emit ();
-    }
-}
-
-static void
-cobr_fmt (/* arg[0]->opcode mnemonic, arg[1-3]->operands (ascii) */
-	  char *arg[],
-	  /* Opcode, with branch-prediction bits already set if necessary.  */
-	  long opcode,
-	  /* Pointer to description of instruction.  */
-	  struct i960_opcode *oP)
-{
-  long instr;			/* 32-bit instruction.  */
-  struct regop regop;		/* Description of register operand.  */
-  int n;			/* Number of operands.  */
-  int var_frag;			/* 1 if varying length code fragment should
-				     be emitted;  0 if an address fix
-				        should be emitted.  */
-
-  instr = opcode;
-  n = oP->num_ops;
-
-  if (n >= 1)
-    {
-      /* First operand (if any) of a COBR is always a register
-	 operand.  Parse it.  */
-      parse_regop (&regop, arg[1], oP->operand[0]);
-      instr |= (regop.n << 19) | (regop.mode << 13);
-    }
-
-  if (n >= 2)
-    {
-      /* Second operand (if any) of a COBR is always a register
-	 operand.  Parse it.  */
-      parse_regop (&regop, arg[2], oP->operand[1]);
-      instr |= (regop.n << 14) | regop.special;
-    }
-
-  if (n < 3)
-    emit (instr);
-  else
-    {
-      if (instrument_branches)
-	{
-	  brcnt_emit ();
-	  colon (brlab_next ());
-	}
-
-      /* A third operand to a COBR is always a displacement.  Parse
-         it; if it's relaxable (a cobr "j" directive, or any cobr
-         other than bbs/bbc when the "-norelax" option is not in use)
-         set up a variable code fragment; otherwise set up an address
-         fix.  */
-      var_frag = !norelax || (oP->format == COJ);	/* TRUE or FALSE */
-      get_cdisp (arg[3], "COBR", instr, 13, var_frag, 0);
-
-      if (instrument_branches)
-	brcnt_emit ();
-    }
-}
-
-/* Assumptions about the passed-in text:
-  	- all comments, labels removed
-  	- text is an instruction
-  	- all white space compressed to single blanks
-  	- all character constants have been replaced with decimal.  */
-
-void
-md_assemble (char *textP)
-{
-  /* Parsed instruction text, containing NO whitespace: arg[0]->opcode
-     mnemonic arg[1-3]->operands, with char constants replaced by
-     decimal numbers.  */
-  char *args[4];
-  /* Number of instruction operands.  */
-  int n_ops;
-  /* Pointer to instruction description.  */
-  struct i960_opcode *oP;
-  /* TRUE iff opcode mnemonic included branch-prediction suffix (".f"
-     or ".t").  */
-  int branch_predict;
-  /* Setting of branch-prediction bit(s) to be OR'd into instruction
-     opcode of CTRL/COBR format instructions.  */
-  long bp_bits;
-  /* Offset of last character in opcode mnemonic.  */
-  int n;
-  const char *bp_error_msg = _("branch prediction invalid on this opcode");
-
-  /* Parse instruction into opcode and operands.  */
-  memset (args, '\0', sizeof (args));
-
-  n_ops = i_scan (textP, args);
-
-  if (n_ops == -1)
-    return;			/* Error message already issued.  */
-
-  /* Do "macro substitution" (sort of) on 'ldconst' pseudo-instruction.  */
-  if (!strcmp (args[0], "ldconst"))
-    {
-      n_ops = parse_ldconst (args);
-      if (n_ops == -1)
-	return;
-    }
-
-  /* Check for branch-prediction suffix on opcode mnemonic, strip it off.  */
-  n = strlen (args[0]) - 1;
-  branch_predict = 0;
-  bp_bits = 0;
-
-  if (args[0][n - 1] == '.' && (args[0][n] == 't' || args[0][n] == 'f'))
-    {
-      /* We could check here to see if the target architecture
-	 supports branch prediction, but why bother?  The bit will
-	 just be ignored by processors that don't use it.  */
-      branch_predict = 1;
-      bp_bits = (args[0][n] == 't') ? BP_TAKEN : BP_NOT_TAKEN;
-      args[0][n - 1] = '\0';	/* Strip suffix from opcode mnemonic */
-    }
-
-  /* Look up opcode mnemonic in table and check number of operands.
-     Check that opcode is legal for the target architecture.  If all
-     looks good, assemble instruction.  */
-  oP = (struct i960_opcode *) hash_find (op_hash, args[0]);
-  if (!oP || !targ_has_iclass (oP->iclass))
-    as_bad (_("invalid opcode, \"%s\"."), args[0]);
-  else if (n_ops != oP->num_ops)
-    as_bad (_("improper number of operands.  Expecting %d, got %d"),
-	    oP->num_ops, n_ops);
-  else
-    {
-      switch (oP->format)
-	{
-	case FBRA:
-	case CTRL:
-	  ctrl_fmt (args[1], oP->opcode | bp_bits, oP->num_ops);
-	  if (oP->format == FBRA)
-	    /* Now generate a 'bno' to same arg */
-	    ctrl_fmt (args[1], BNO | bp_bits, 1);
-	  break;
-	case COBR:
-	case COJ:
-	  cobr_fmt (args, oP->opcode | bp_bits, oP);
-	  break;
-	case REG:
-	  if (branch_predict)
-	    as_warn ("%s", bp_error_msg);
-	  reg_fmt (args, oP);
-	  break;
-	case MEM1:
-	  if (args[0][0] == 'c' && args[0][1] == 'a')
-	    {
-	      if (branch_predict)
-		as_warn ("%s", bp_error_msg);
-	      mem_fmt (args, oP, 1);
-	      break;
-	    }
-	  /* Fall through.  */
-	case MEM2:
-	case MEM4:
-	case MEM8:
-	case MEM12:
-	case MEM16:
-	  if (branch_predict)
-	    as_warn ("%s", bp_error_msg);
-	  mem_fmt (args, oP, 0);
-	  break;
-	case CALLJ:
-	  if (branch_predict)
-	    as_warn ("%s", bp_error_msg);
-	  /* Output opcode & set up "fixup" (relocation); flag
-	     relocation as 'callj' type.  */
-	  know (oP->num_ops == 1);
-	  get_cdisp (args[1], "CTRL", oP->opcode, 24, 0, 1);
-	  break;
-	default:
-	  BAD_CASE (oP->format);
-	  break;
-	}
-    }
-}
-
-void
-md_number_to_chars (char *buf,
-		    valueT value,
-		    int n)
-{
-  number_to_chars_littleendian (buf, value, n);
-}
-
-const char *
-md_atof (int type, char *litP, int *sizeP)
-{
-  return ieee_md_atof (type, litP, sizeP, FALSE);
-}
-
-static void
-md_number_to_imm (char *buf, long val, int n)
-{
-  md_number_to_chars (buf, val, n);
-}
-
-static void
-md_number_to_field (char *instrP,		/* Pointer to instruction to be fixed.  */
-		    long val,			/* Address fixup value.  */
-		    bit_fixS *bfixP)		/* Description of bit field to be fixed up.  */
-{
-  int numbits;			/* Length of bit field to be fixed.  */
-  long instr;			/* 32-bit instruction to be fixed-up.  */
-  long sign;			/* 0 or -1, according to sign bit of 'val'.  */
-
-  /* Convert instruction back to host byte order.  */
-  instr = md_chars_to_number (instrP, 4);
-
-  /* Surprise! -- we stored the number of bits to be modified rather
-     than a pointer to a structure.  */
-  numbits = (int) (size_t) bfixP;
-  if (numbits == 1)
-    /* This is a no-op, stuck here by reloc_callj().  */
-    return;
-
-  know ((numbits == 13) || (numbits == 24));
-
-  /* Propagate sign bit of 'val' for the given number of bits.  Result
-     should be all 0 or all 1.  */
-  sign = val >> ((int) numbits - 1);
-  if (((val < 0) && (sign != -1))
-      || ((val > 0) && (sign != 0)))
-    as_bad (_("Fixup of %ld too large for field width of %d"),
-	    val, numbits);
-  else
-    {
-      /* Put bit field into instruction and write back in target
-         * byte order.  */
-      val &= ~(-(1 << (int) numbits));	/* Clear unused sign bits.  */
-      instr |= val;
-      md_number_to_chars (instrP, instr, 4);
-    }
-}
-
-
-/* md_parse_option
-  	Invocation line includes a switch not recognized by the base assembler.
-  	See if it's a processor-specific option.  For the 960, these are:
-
-  	-norelax:
-  		Conditional branch instructions that require displacements
-  		greater than 13 bits (or that have external targets) should
-  		generate errors.  The default is to replace each such
-  		instruction with the corresponding compare (or chkbit) and
-  		branch instructions.  Note that the Intel "j" cobr directives
-  		are ALWAYS "de-optimized" in this way when necessary,
-  		regardless of the setting of this option.
-
-  	-b:
-  		Add code to collect information about branches taken, for
-  		later optimization of branch prediction bits by a separate
-  		tool.  COBR and CNTL format instructions have branch
-  		prediction bits (in the CX architecture);  if "BR" represents
-  		an instruction in one of these classes, the following rep-
-  		resents the code generated by the assembler:
-
-  			call	<increment routine>
-  			.word	0	# pre-counter
-  		Label:  BR
-  			call	<increment routine>
-  			.word	0	# post-counter
-
-  		A table of all such "Labels" is also generated.
-
-  	-AKA, -AKB, -AKC, -ASA, -ASB, -AMC, -ACA:
-  		Select the 80960 architecture.  Instructions or features not
-  		supported by the selected architecture cause fatal errors.
-  		The default is to generate code for any instruction or feature
-  		that is supported by SOME version of the 960 (even if this
-  		means mixing architectures!).  */
-
-const char *md_shortopts = "A:b";
-struct option md_longopts[] =
-{
-#define OPTION_LINKRELAX (OPTION_MD_BASE)
-  {"linkrelax", no_argument, NULL, OPTION_LINKRELAX},
-  {"link-relax", no_argument, NULL, OPTION_LINKRELAX},
-#define OPTION_NORELAX (OPTION_MD_BASE + 1)
-  {"norelax", no_argument, NULL, OPTION_NORELAX},
-  {"no-relax", no_argument, NULL, OPTION_NORELAX},
-  {NULL, no_argument, NULL, 0}
-};
-size_t md_longopts_size = sizeof (md_longopts);
-
-struct tabentry
-{
-  const char *flag;
-  int arch;
-};
-static const struct tabentry arch_tab[] =
-{
-  {"KA", ARCH_KA},
-  {"KB", ARCH_KB},
-  {"SA", ARCH_KA},		/* Synonym for KA.  */
-  {"SB", ARCH_KB},		/* Synonym for KB.  */
-  {"KC", ARCH_MC},		/* Synonym for MC.  */
-  {"MC", ARCH_MC},
-  {"CA", ARCH_CA},
-  {"JX", ARCH_JX},
-  {"HX", ARCH_HX},
-  {NULL, 0}
-};
-
-int
-md_parse_option (int c, const char *arg)
-{
-  switch (c)
-    {
-    case OPTION_LINKRELAX:
-      linkrelax = 1;
-      flag_keep_locals = 1;
-      break;
-
-    case OPTION_NORELAX:
-      norelax = 1;
-      break;
-
-    case 'b':
-      instrument_branches = 1;
-      break;
-
-    case 'A':
-      {
-	const struct tabentry *tp;
-	const char *p = arg;
-
-	for (tp = arch_tab; tp->flag != NULL; tp++)
-	  if (!strcmp (p, tp->flag))
-	    break;
-
-	if (tp->flag == NULL)
-	  {
-	    as_bad (_("invalid architecture %s"), p);
-	    return 0;
-	  }
-	else
-	  architecture = tp->arch;
-      }
-      break;
-
-    default:
-      return 0;
-    }
-
-  return 1;
-}
-
-void
-md_show_usage (FILE *stream)
-{
-  int i;
-
-  fprintf (stream, _("I960 options:\n"));
-  for (i = 0; arch_tab[i].flag; i++)
-    fprintf (stream, "%s-A%s", i ? " | " : "", arch_tab[i].flag);
-  fprintf (stream, _("\n\
-			specify variant of 960 architecture\n\
--b			add code to collect statistics about branches taken\n\
--link-relax		preserve individual alignment directives so linker\n\
-			can do relaxing (b.out format only)\n\
--no-relax		don't alter compare-and-branch instructions for\n\
-			long displacements\n"));
-}
-
-/* relax_cobr:
-   Replace cobr instruction in a code fragment with equivalent branch and
-   compare instructions, so it can reach beyond a 13-bit displacement.
-   Set up an address fix/relocation for the new branch instruction.  */
-
-/* This "conditional jump" table maps cobr instructions into
-   equivalent compare and branch opcodes.  */
-
-static const
-struct
-{
-  long compare;
-  long branch;
-}
-
-coj[] =
-{				/* COBR OPCODE: */
-  { CHKBIT, BNO },		/*      0x30 - bbc */
-  { CMPO, BG },			/*      0x31 - cmpobg */
-  { CMPO, BE },			/*      0x32 - cmpobe */
-  { CMPO, BGE },		/*      0x33 - cmpobge */
-  { CMPO, BL },			/*      0x34 - cmpobl */
-  { CMPO, BNE },		/*      0x35 - cmpobne */
-  { CMPO, BLE },		/*      0x36 - cmpoble */
-  { CHKBIT, BO },		/*      0x37 - bbs */
-  { CMPI, BNO },		/*      0x38 - cmpibno */
-  { CMPI, BG },			/*      0x39 - cmpibg */
-  { CMPI, BE },			/*      0x3a - cmpibe */
-  { CMPI, BGE },		/*      0x3b - cmpibge */
-  { CMPI, BL },			/*      0x3c - cmpibl */
-  { CMPI, BNE },		/*      0x3d - cmpibne */
-  { CMPI, BLE },		/*      0x3e - cmpible */
-  { CMPI, BO },			/*      0x3f - cmpibo */
-};
-
-static void
-relax_cobr (fragS *fragP)	/* fragP->fr_opcode is assumed to point to
-				   the cobr instruction, which comes at the
-				   end of the code fragment.  */
-{
-  int opcode, src1, src2, m1, s2;
-  /* Bit fields from cobr instruction.  */
-  long bp_bits;			/* Branch prediction bits from cobr instruction.  */
-  long instr;			/* A single i960 instruction.  */
-  /* ->instruction to be replaced.  */
-  char *iP;
-  fixS *fixP;			/* Relocation that can be done at assembly time.  */
-
-  /* Pick up & parse cobr instruction.  */
-  iP = fragP->fr_opcode;
-  instr = md_chars_to_number (iP, 4);
-  opcode = ((instr >> 24) & 0xff) - 0x30;	/* "-0x30" for table index.  */
-  src1 = (instr >> 19) & 0x1f;
-  m1 = (instr >> 13) & 1;
-  s2 = instr & 1;
-  src2 = (instr >> 14) & 0x1f;
-  bp_bits = instr & BP_MASK;
-
-  /* Generate and output compare instruction.  */
-  instr = coj[opcode].compare
-    | src1 | (m1 << 11) | (s2 << 6) | (src2 << 14);
-  md_number_to_chars (iP, instr, 4);
-
-  /* Output branch instruction.  */
-  md_number_to_chars (iP + 4, coj[opcode].branch | bp_bits, 4);
-
-  /* Set up address fixup/relocation.  */
-  fixP = fix_new (fragP,
-		  iP + 4 - fragP->fr_literal,
-		  4,
-		  fragP->fr_symbol,
-		  fragP->fr_offset,
-		  1,
-		  NO_RELOC);
-
-  fixP->fx_bit_fixP = (bit_fixS *) 24;	/* Store size of bit field.  */
-
-  fragP->fr_fix += 4;
-  frag_wane (fragP);
-}
-
-/* md_convert_frag:
-
-   Called by base assembler after address relaxation is finished:  modify
-   variable fragments according to how much relaxation was done.
-
-   If the fragment substate is still 1, a 13-bit displacement was enough
-   to reach the symbol in question.  Set up an address fixup, but otherwise
-   leave the cobr instruction alone.
-
-   If the fragment substate is 2, a 13-bit displacement was not enough.
-   Replace the cobr with a two instructions (a compare and a branch).  */
-
-void
-md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
-		 segT sec ATTRIBUTE_UNUSED,
-		 fragS *fragP)
-{
-  /* Structure describing needed address fix.  */
-  fixS *fixP;
-
-  switch (fragP->fr_subtype)
-    {
-    case 1:
-      /* Leave single cobr instruction.  */
-      fixP = fix_new (fragP,
-		      fragP->fr_opcode - fragP->fr_literal,
-		      4,
-		      fragP->fr_symbol,
-		      fragP->fr_offset,
-		      1,
-		      NO_RELOC);
-
-      fixP->fx_bit_fixP = (bit_fixS *) 13;	/* Size of bit field.  */
-      break;
-    case 2:
-      /* Replace cobr with compare/branch instructions.  */
-      relax_cobr (fragP);
-      break;
-    default:
-      BAD_CASE (fragP->fr_subtype);
-      break;
-    }
-}
-
-/* md_estimate_size_before_relax:  How much does it look like *fragP will grow?
-
-   Called by base assembler just before address relaxation.
-   Return the amount by which the fragment will grow.
-
-   Any symbol that is now undefined will not become defined; cobr's
-   based on undefined symbols will have to be replaced with a compare
-   instruction and a branch instruction, and the code fragment will grow
-   by 4 bytes.  */
-
-int
-md_estimate_size_before_relax (fragS *fragP, segT segment_type)
-{
-  /* If symbol is undefined in this segment, go to "relaxed" state
-     (compare and branch instructions instead of cobr) right now.  */
-  if (S_GET_SEGMENT (fragP->fr_symbol) != segment_type)
-    {
-      relax_cobr (fragP);
-      return 4;
-    }
-
-  return md_relax_table[fragP->fr_subtype].rlx_length;
-}
-
-#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
-
-/* md_ri_to_chars:
-   This routine exists in order to overcome machine byte-order problems
-   when dealing with bit-field entries in the relocation_info struct.
-
-   But relocation info will be used on the host machine only (only
-   executable code is actually downloaded to the i80960).  Therefore,
-   we leave it in host byte order.  */
-
-static void
-md_ri_to_chars (char *where, struct relocation_info *ri)
-{
-  host_number_to_chars (where, ri->r_address, 4);
-  host_number_to_chars (where + 4, ri->r_index, 3);
-#if WORDS_BIGENDIAN
-  where[7] = (ri->r_pcrel << 7
-	      | ri->r_length << 5
-	      | ri->r_extern << 4
-	      | ri->r_bsr << 3
-	      | ri->r_disp << 2
-	      | ri->r_callj << 1
-	      | ri->nuthin << 0);
-#else
-  where[7] = (ri->r_pcrel << 0
-	      | ri->r_length << 1
-	      | ri->r_extern << 3
-	      | ri->r_bsr << 4
-	      | ri->r_disp << 5
-	      | ri->r_callj << 6
-	      | ri->nuthin << 7);
-#endif
-}
-
-#endif /* defined(OBJ_AOUT) | defined(OBJ_BOUT) */
-
-
-/* brtab_emit:	generate the fetch-prediction branch table.
-
-   See the comments above the declaration of 'br_cnt' for details on
-   branch-prediction instrumentation.
-
-   The code emitted here would be functionally equivalent to the following
-   example assembler source.
-
-  			.data
-  			.align	2
-  	   BR_TAB_NAME:
-  			.word	0		# link to next table
-  			.word	3		# length of table
-  			.word	LBRANCH0	# 1st entry in table proper
-  			.word	LBRANCH1
-  			.word	LBRANCH2  */
-
-void
-brtab_emit (void)
-{
-  int i;
-  char buf[20];
-  /* Where the binary was output to.  */
-  char *p;
-
-  if (!instrument_branches)
-    return;
-
-  subseg_set (data_section, 0);	/*      .data */
-  frag_align (2, 0, 0);		/*      .align 2 */
-  record_alignment (now_seg, 2);
-  colon (BR_TAB_NAME);		/* BR_TAB_NAME: */
-  emit (0);			/*      .word 0 #link to next table */
-  emit (br_cnt);		/*      .word n #length of table */
-
-  for (i = 0; i < br_cnt; i++)
-    {
-      sprintf (buf, "%s%d", BR_LABEL_BASE, i);
-      p = emit (0);
-      fix_new (frag_now,
-	       p - frag_now->fr_literal,
-	       4, symbol_find (buf), 0, 0, NO_RELOC);
-    }
-}
-
-/* s_leafproc:	process .leafproc pseudo-op
-
-  	.leafproc takes two arguments, the second one is optional:
-  		arg[1]: name of 'call' entry point to leaf procedure
-  		arg[2]: name of 'bal' entry point to leaf procedure
-
-  	If the two arguments are identical, or if the second one is missing,
-  	the first argument is taken to be the 'bal' entry point.
-
-  	If there are 2 distinct arguments, we must make sure that the 'bal'
-  	entry point immediately follows the 'call' entry point in the linked
-  	list of symbols.  */
-
-static void
-s_leafproc (int n_ops,		/* Number of operands.  */
-	    char *args[])	/* args[1]->1st operand, args[2]->2nd operand.  */
-{
-  symbolS *callP;		/* Pointer to leafproc 'call' entry point symbol.  */
-  symbolS *balP;		/* Pointer to leafproc 'bal' entry point symbol.  */
-
-  if ((n_ops != 1) && (n_ops != 2))
-    {
-      as_bad (_("should have 1 or 2 operands"));
-      return;
-    }
-
-  /* Find or create symbol for 'call' entry point.  */
-  callP = symbol_find_or_make (args[1]);
-
-  if (TC_S_IS_CALLNAME (callP))
-    as_warn (_("Redefining leafproc %s"), S_GET_NAME (callP));
-
-  /* If that was the only argument, use it as the 'bal' entry point.
-     Otherwise, mark it as the 'call' entry point and find or create
-     another symbol for the 'bal' entry point.  */
-  if ((n_ops == 1) || !strcmp (args[1], args[2]))
-    {
-      TC_S_FORCE_TO_BALNAME (callP);
-    }
-  else
-    {
-      TC_S_FORCE_TO_CALLNAME (callP);
-
-      balP = symbol_find_or_make (args[2]);
-      if (TC_S_IS_CALLNAME (balP))
-	as_warn (_("Redefining leafproc %s"), S_GET_NAME (balP));
-
-      TC_S_FORCE_TO_BALNAME (balP);
-
-#ifndef OBJ_ELF
-      tc_set_bal_of_call (callP, balP);
-#endif
-    }
-}
-
-/* s_sysproc: process .sysproc pseudo-op
-
-   .sysproc takes two arguments:
-     arg[1]: name of entry point to system procedure
-     arg[2]: 'entry_num' (index) of system procedure in the range
-     [0,31] inclusive.
-
-   For [ab].out, we store the 'entrynum' in the 'n_other' field of
-   the symbol.  Since that entry is normally 0, we bias 'entrynum'
-   by adding 1 to it.  It must be unbiased before it is used.  */
-
-static void
-s_sysproc (int n_ops,		/* Number of operands.  */
-	   char *args[])	/* args[1]->1st operand, args[2]->2nd operand.  */
-{
-  expressionS exp;
-  symbolS *symP;
-
-  if (n_ops != 2)
-    {
-      as_bad (_("should have two operands"));
-      return;
-    }
-
-  /* Parse "entry_num" argument and check it for validity.  */
-  parse_expr (args[2], &exp);
-  if (exp.X_op != O_constant
-      || (offs (exp) < 0)
-      || (offs (exp) > 31))
-    {
-      as_bad (_("'entry_num' must be absolute number in [0,31]"));
-      return;
-    }
-
-  /* Find/make symbol and stick entry number (biased by +1) into it.  */
-  symP = symbol_find_or_make (args[1]);
-
-  if (TC_S_IS_SYSPROC (symP))
-    as_warn (_("Redefining entrynum for sysproc %s"), S_GET_NAME (symP));
-
-  TC_S_SET_SYSPROC (symP, offs (exp));	/* Encode entry number.  */
-  TC_S_FORCE_TO_SYSPROC (symP);
-}
-
-/* parse_po:	parse machine-dependent pseudo-op
-
-   This is a top-level routine for machine-dependent pseudo-ops.  It slurps
-   up the rest of the input line, breaks out the individual arguments,
-   and dispatches them to the correct handler.  */
-
-static void
-parse_po (int po_num)	/* Pseudo-op number:  currently S_LEAFPROC or S_SYSPROC.  */
-{
-  /* Pointers operands, with no embedded whitespace.
-     arg[0] unused, arg[1-3]->operands.  */
-  char *args[4];
-  int n_ops;			/* Number of operands.  */
-  char *p;			/* Pointer to beginning of unparsed argument string.  */
-  char eol;			/* Character that indicated end of line.  */
-
-  extern char is_end_of_line[];
-
-  /* Advance input pointer to end of line.  */
-  p = input_line_pointer;
-  while (!is_end_of_line[(unsigned char) *input_line_pointer])
-    input_line_pointer++;
-
-  eol = *input_line_pointer;	/* Save end-of-line char.  */
-  *input_line_pointer = '\0';	/* Terminate argument list.  */
-
-  /* Parse out operands.  */
-  n_ops = get_args (p, args);
-  if (n_ops == -1)
-    return;
-
-  /* Dispatch to correct handler.  */
-  switch (po_num)
-    {
-    case S_SYSPROC:
-      s_sysproc (n_ops, args);
-      break;
-    case S_LEAFPROC:
-      s_leafproc (n_ops, args);
-      break;
-    default:
-      BAD_CASE (po_num);
-      break;
-    }
-
-  /* Restore eol, so line numbers get updated correctly.  Base
-     assembler assumes we leave input pointer pointing at char
-     following the eol.  */
-  *input_line_pointer++ = eol;
-}
-
-/* reloc_callj:	Relocate a 'callj' instruction
-
-  	This is a "non-(GNU)-standard" machine-dependent hook.  The base
-  	assembler calls it when it decides it can relocate an address at
-  	assembly time instead of emitting a relocation directive.
-
-  	Check to see if the relocation involves a 'callj' instruction to a:
-  	    sysproc:	Replace the default 'call' instruction with a 'calls'
-  	    leafproc:	Replace the default 'call' instruction with a 'bal'.
-  	    other proc:	Do nothing.
-
-  	See b.out.h for details on the 'n_other' field in a symbol structure.
-
-   IMPORTANT!:
-  	Assumes the caller has already figured out, in the case of a leafproc,
-  	to use the 'bal' entry point, and has substituted that symbol into the
-  	passed fixup structure.  */
-
-int
-reloc_callj (fixS *fixP)  /* Relocation that can be done at assembly time.  */
-{
-  /* Points to the binary for the instruction being relocated.  */
-  char *where;
-
-  if (!fixP->fx_tcbit)
-    /* This wasn't a callj instruction in the first place.  */
-    return 0;
-
-  where = fixP->fx_frag->fr_literal + fixP->fx_where;
-
-  if (TC_S_IS_SYSPROC (fixP->fx_addsy))
-    {
-      /* Symbol is a .sysproc: replace 'call' with 'calls'.  System
-         procedure number is (other-1).  */
-      md_number_to_chars (where, CALLS | TC_S_GET_SYSPROC (fixP->fx_addsy), 4);
-
-      /* Nothing else needs to be done for this instruction.  Make
-         sure 'md_number_to_field()' will perform a no-op.  */
-      fixP->fx_bit_fixP = (bit_fixS *) 1;
-    }
-  else if (TC_S_IS_CALLNAME (fixP->fx_addsy))
-    {
-      /* Should not happen: see block comment above.  */
-      as_fatal (_("Trying to 'bal' to %s"), S_GET_NAME (fixP->fx_addsy));
-    }
-  else if (TC_S_IS_BALNAME (fixP->fx_addsy))
-    {
-      /* Replace 'call' with 'bal'; both instructions have the same
-         format, so calling code should complete relocation as if
-         nothing happened here.  */
-      md_number_to_chars (where, BAL, 4);
-    }
-  else if (TC_S_IS_BADPROC (fixP->fx_addsy))
-    as_bad (_("Looks like a proc, but can't tell what kind.\n"));
-
-  /* Otherwise Symbol is neither a sysproc nor a leafproc.  */
-  return 0;
-}
-
-/* Handle the MRI .endian pseudo-op.  */
-
-static void
-s_endian (int ignore ATTRIBUTE_UNUSED)
-{
-  char *name;
-  char c;
-
-  c = get_symbol_name (&name);
-  if (strcasecmp (name, "little") == 0)
-    ;
-  else if (strcasecmp (name, "big") == 0)
-    as_bad (_("big endian mode is not supported"));
-  else
-    as_warn (_("ignoring unrecognized .endian type `%s'"), name);
-
-  (void) restore_line_pointer (c);
-
-  demand_empty_rest_of_line ();
-}
-
-/* We have no need to default values of symbols.  */
-
-symbolS *
-md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
-{
-  return 0;
-}
-
-/* Exactly what point is a PC-relative offset relative TO?
-   On the i960, they're relative to the address of the instruction,
-   which we have set up as the address of the fixup too.  */
-long
-md_pcrel_from (fixS *fixP)
-{
-  return fixP->fx_where + fixP->fx_frag->fr_address;
-}
-
-void
-md_apply_fix (fixS *fixP,
-	       valueT *valP,
-	       segT seg ATTRIBUTE_UNUSED)
-{
-  long val = *valP;
-  char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
-
-  if (!fixP->fx_bit_fixP)
-    {
-      md_number_to_imm (place, val, fixP->fx_size);
-    }
-  else if ((int) (size_t) fixP->fx_bit_fixP == 13
-	   && fixP->fx_addsy != NULL
-	   && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
-    {
-      /* This is a COBR instruction.  They have only a
-	 13-bit displacement and are only to be used
-	 for local branches: flag as error, don't generate
-	 relocation.  */
-      as_bad_where (fixP->fx_file, fixP->fx_line,
-		    _("can't use COBR format with external label"));
-      fixP->fx_addsy = NULL;
-    }
-  else
-    md_number_to_field (place, val, fixP->fx_bit_fixP);
-
-  if (fixP->fx_addsy == NULL)
-    fixP->fx_done = 1;
-}
-
-#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
-void
-tc_bout_fix_to_chars (char *where,
-		      fixS *fixP,
-		      relax_addressT segment_address_in_file)
-{
-  static const unsigned char nbytes_r_length[] = {42, 0, 1, 42, 2};
-  struct relocation_info ri;
-  symbolS *symbolP;
-
-  memset ((char *) &ri, '\0', sizeof (ri));
-  symbolP = fixP->fx_addsy;
-  know (symbolP != 0 || fixP->fx_r_type != NO_RELOC);
-  ri.r_bsr = fixP->fx_bsr;	/*SAC LD RELAX HACK */
-  /* These two 'cuz of NS32K */
-  ri.r_callj = fixP->fx_tcbit;
-  if (fixP->fx_bit_fixP)
-    ri.r_length = 2;
-  else
-    ri.r_length = nbytes_r_length[fixP->fx_size];
-  ri.r_pcrel = fixP->fx_pcrel;
-  ri.r_address = fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file;
-
-  if (fixP->fx_r_type != NO_RELOC)
-    {
-      switch (fixP->fx_r_type)
-	{
-	case rs_align:
-	  ri.r_index = -2;
-	  ri.r_pcrel = 1;
-	  ri.r_length = fixP->fx_size - 1;
-	  break;
-	case rs_org:
-	  ri.r_index = -2;
-	  ri.r_pcrel = 0;
-	  break;
-	case rs_fill:
-	  ri.r_index = -1;
-	  break;
-	default:
-	  abort ();
-	}
-      ri.r_extern = 0;
-    }
-  else if (linkrelax || !S_IS_DEFINED (symbolP) || fixP->fx_bsr)
-    {
-      ri.r_extern = 1;
-      ri.r_index = symbolP->sy_number;
-    }
-  else
-    {
-      ri.r_extern = 0;
-      ri.r_index = S_GET_TYPE (symbolP);
-    }
-
-  /* Output the relocation information in machine-dependent form.  */
-  md_ri_to_chars (where, &ri);
-}
-
-#endif /* OBJ_AOUT or OBJ_BOUT */
-
-/* Align an address by rounding it up to the specified boundary.  */
-
-valueT
-md_section_align (segT seg,
-		  valueT addr)		/* Address to be rounded up.  */
-{
-  int align;
-
-  align = bfd_get_section_alignment (stdoutput, seg);
-  return (addr + (1 << align) - 1) & -(1 << align);
-}
-
-extern int coff_flags;
-
-/* For aout or bout, the bal immediately follows the call.
-
-   For coff, we cheat and store a pointer to the bal symbol in the
-   second aux entry of the call.  */
-
-#undef OBJ_ABOUT
-#ifdef OBJ_AOUT
-#define OBJ_ABOUT
-#endif
-#ifdef OBJ_BOUT
-#define OBJ_ABOUT
-#endif
-
-void
-tc_set_bal_of_call (symbolS *callP ATTRIBUTE_UNUSED,
-		    symbolS *balP ATTRIBUTE_UNUSED)
-{
-  know (TC_S_IS_CALLNAME (callP));
-  know (TC_S_IS_BALNAME (balP));
-
-#ifdef OBJ_COFF
-
-  callP->sy_tc = balP;
-  S_SET_NUMBER_AUXILIARY (callP, 2);
-
-#else /* ! OBJ_COFF */
-#ifdef OBJ_ABOUT
-
-  /* If the 'bal' entry doesn't immediately follow the 'call'
-     symbol, unlink it from the symbol list and re-insert it.  */
-  if (symbol_next (callP) != balP)
-    {
-      symbol_remove (balP, &symbol_rootP, &symbol_lastP);
-      symbol_append (balP, callP, &symbol_rootP, &symbol_lastP);
-    }				/* if not in order */
-
-#else /* ! OBJ_ABOUT */
-  as_fatal ("Only supported for a.out, b.out, or COFF");
-#endif /* ! OBJ_ABOUT */
-#endif /* ! OBJ_COFF */
-}
-
-symbolS *
-tc_get_bal_of_call (symbolS *callP ATTRIBUTE_UNUSED)
-{
-  symbolS *retval;
-
-  know (TC_S_IS_CALLNAME (callP));
-
-#ifdef OBJ_COFF
-  retval = callP->sy_tc;
-#else
-#ifdef OBJ_ABOUT
-  retval = symbol_next (callP);
-#else
-  as_fatal ("Only supported for a.out, b.out, or COFF");
-#endif /* ! OBJ_ABOUT */
-#endif /* ! OBJ_COFF */
-
-  know (TC_S_IS_BALNAME (retval));
-  return retval;
-}
-
-#ifdef OBJ_COFF
-void
-tc_coff_symbol_emit_hook (symbolS *symbolP ATTRIBUTE_UNUSED)
-{
-  if (TC_S_IS_CALLNAME (symbolP))
-    {
-      symbolS *balP = tc_get_bal_of_call (symbolP);
-
-      symbolP->sy_symbol.ost_auxent[1].x_bal.x_balntry = S_GET_VALUE (balP);
-      if (S_GET_STORAGE_CLASS (symbolP) == C_EXT)
-	S_SET_STORAGE_CLASS (symbolP, C_LEAFEXT);
-      else
-	S_SET_STORAGE_CLASS (symbolP, C_LEAFSTAT);
-      S_SET_DATA_TYPE (symbolP, S_GET_DATA_TYPE (symbolP) | (DT_FCN << N_BTSHFT));
-      /* Fix up the bal symbol.  */
-      S_SET_STORAGE_CLASS (balP, C_LABEL);
-    }
-}
-#endif /* OBJ_COFF */
-
-void
-i960_handle_align (fragS *fragp ATTRIBUTE_UNUSED)
-{
-  if (!linkrelax)
-    return;
-
-#ifndef OBJ_BOUT
-  as_bad (_("option --link-relax is only supported in b.out format"));
-  linkrelax = 0;
-  return;
-#else
-
-  /* The text section "ends" with another alignment reloc, to which we
-     aren't adding padding.  */
-  if (fragp->fr_next == text_last_frag
-      || fragp->fr_next == data_last_frag)
-    return;
-
-  /* alignment directive */
-  fix_new (fragp, fragp->fr_fix, fragp->fr_offset, 0, 0, 0,
-	   (int) fragp->fr_type);
-#endif /* OBJ_BOUT */
-}
-
-int
-i960_validate_fix (fixS *fixP, segT this_segment_type ATTRIBUTE_UNUSED)
-{
-  if (fixP->fx_tcbit && TC_S_IS_CALLNAME (fixP->fx_addsy))
-    {
-      /* Relocation should be done via the associated 'bal'
-         entry point symbol.  */
-      if (!TC_S_IS_BALNAME (tc_get_bal_of_call (fixP->fx_addsy)))
-	{
-	  as_bad_where (fixP->fx_file, fixP->fx_line,
-			_("No 'bal' entry point for leafproc %s"),
-			S_GET_NAME (fixP->fx_addsy));
-	  return 0;
-	}
-      fixP->fx_addsy = tc_get_bal_of_call (fixP->fx_addsy);
-    }
-
-  return 1;
-}
-
-/* From cgen.c:  */
-
-static short
-tc_bfd_fix2rtype (fixS *fixP)
-{
-  if (fixP->fx_pcrel == 0 && fixP->fx_size == 4)
-    return BFD_RELOC_32;
-
-  if (fixP->fx_pcrel != 0 && fixP->fx_size == 4)
-    return BFD_RELOC_24_PCREL;
-
-  abort ();
-  return 0;
-}
-
-/* Translate internal representation of relocation info to BFD target
-   format.
-
-   FIXME: To what extent can we get all relevant targets to use this?  */
-
-arelent *
-tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixP)
-{
-  arelent * reloc;
-
-  reloc = XNEW (arelent);
-
-  /* HACK: Is this right?  */
-  fixP->fx_r_type = tc_bfd_fix2rtype (fixP);
-
-  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
-  if (reloc->howto == NULL)
-    {
-      as_bad_where (fixP->fx_file, fixP->fx_line,
-		    _("internal error: can't export reloc type %d (`%s')"),
-		    fixP->fx_r_type,
-		    bfd_get_reloc_code_name (fixP->fx_r_type));
-      return NULL;
-    }
-
-  gas_assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
-
-  reloc->sym_ptr_ptr = XNEW (asymbol *);
-  *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
-  reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
-  reloc->addend = fixP->fx_addnumber;
-
-  return reloc;
-}
-
-/* end from cgen.c */
-
-const pseudo_typeS md_pseudo_table[] =
-{
-  {"bss", s_lcomm, 1},
-  {"endian", s_endian, 0},
-  {"extended", float_cons, 't'},
-  {"leafproc", parse_po, S_LEAFPROC},
-  {"sysproc", parse_po, S_SYSPROC},
-
-  {"word", cons, 4},
-  {"quad", cons, 16},
-
-  {0, 0, 0}
-};
diff --git a/gas/config/tc-i960.h b/gas/config/tc-i960.h
deleted file mode 100644
index 9c71150..0000000
--- a/gas/config/tc-i960.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* tc-i960.h - Basic 80960 instruction formats.
-   Copyright (C) 1989-2018 Free Software Foundation, Inc.
-
-   This file is part of GAS, the GNU Assembler.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as
-   published by the Free Software Foundation; either version 3,
-   or (at your option) any later version.
-
-   GAS is distributed in the hope that it will be useful, but
-   WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GAS; see the file COPYING.  If not, write to the Free
-   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-   02110-1301, USA.  */
-
-#ifndef TC_I960
-#define TC_I960 1
-
-#ifdef OBJ_ELF
-#define TARGET_FORMAT "elf32-i960"
-#define TARGET_ARCH bfd_arch_i960
-#endif
-
-#define TARGET_BYTES_BIG_ENDIAN 0
-
-#define WORKING_DOT_WORD
-
-/*
- * The 'COJ' instructions are actually COBR instructions with the 'b' in
- * the mnemonic replaced by a 'j';  they are ALWAYS "de-optimized" if necessary:
- * if the displacement will not fit in 13 bits, the assembler will replace them
- * with the corresponding compare and branch instructions.
- *
- * All of the 'MEMn' instructions are the same format; the 'n' in the name
- * indicates the default index scale factor (the size of the datum operated on).
- *
- * The FBRA formats are not actually an instruction format.  They are the
- * "convenience directives" for branching on floating-point comparisons,
- * each of which generates 2 instructions (a 'bno' and one other branch).
- *
- * The CALLJ format is not actually an instruction format.  It indicates that
- * the instruction generated (a CTRL-format 'call') should have its relocation
- * specially flagged for link-time replacement with a 'bal' or 'calls' if
- * appropriate.
- */
-
-/* tailor gas */
-#define LOCAL_LABELS_FB 1
-#define BITFIELD_CONS_EXPRESSIONS
-
-/* tailor the coff format */
-#define COFF_MAGIC				I960ROMAGIC
-#define OBJ_COFF_MAX_AUXENTRIES			(2)
-
-/* MEANING OF 'n_other' in the symbol record.
- *
- * If non-zero, the 'n_other' fields indicates either a leaf procedure or
- * a system procedure, as follows:
- *
- *	1 <= n_other <= 32 :
- *		The symbol is the entry point to a system procedure.
- *		'n_value' is the address of the entry, as for any other
- *		procedure.  The system procedure number (which can be used in
- *		a 'calls' instruction) is (n_other-1).  These entries come from
- *		'.sysproc' directives.
- *
- *	n_other == N_CALLNAME
- *		the symbol is the 'call' entry point to a leaf procedure.
- *		The *next* symbol in the symbol table must be the corresponding
- *		'bal' entry point to the procedure (see following).  These
- *		entries come from '.leafproc' directives in which two different
- *		symbols are specified (the first one is represented here).
- *
- *
- *	n_other == N_BALNAME
- *		the symbol is the 'bal' entry point to a leaf procedure.
- *		These entries result from '.leafproc' directives in which only
- *		one symbol is specified, or in which the same symbol is
- *		specified twice.
- *
- * Note that an N_CALLNAME entry *must* have a corresponding N_BALNAME entry,
- * but not every N_BALNAME entry must have an N_CALLNAME entry.
- */
-#define	N_CALLNAME	((char)-1)
-#define	N_BALNAME	((char)-2)
-
-/* i960 uses a custom relocation record.  */
-
-/* let obj-aout.h know */
-#define CUSTOM_RELOC_FORMAT 1
-/* let aout_gnu.h know */
-#define N_RELOCATION_INFO_DECLARED 1
-struct relocation_info
-  {
-    int r_address;		/* File address of item to be relocated	*/
-    unsigned
-      r_index:24,		/* Index of symbol on which relocation is based*/
-      r_pcrel:1,		/* 1 => relocate PC-relative; else absolute
-				 *	On i960, pc-relative implies 24-bit
-				 *	address, absolute implies 32-bit.
-				 */
-      r_length:2,		/* Number of bytes to relocate:
-				 *	0 => 1 byte
-				 *	1 => 2 bytes
-				 *	2 => 4 bytes -- only value used for i960
-				 */
-      r_extern:1, r_bsr:1,	/* Something for the GNU NS32K assembler */
-      r_disp:1,			/* Something for the GNU NS32K assembler */
-      r_callj:1,		/* 1 if relocation target is an i960 'callj' */
-      nuthin:1;			/* Unused				*/
-  };
-
-/* No shared lib support, so we don't need to ensure externally
-   visible symbols can be overridden.  */
-#define EXTERN_FORCE_RELOC 0
-
-/* Makes no sense to use the difference of 2 arbitrary symbols
-   as the target of a call instruction.  */
-#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG)	\
-  (GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEG)	\
-   || (FIX)->fx_tcbit				\
-   || TC_FORCE_RELOCATION (FIX))
-
-/* reloc_callj() may replace a 'call' with a 'calls' or a
-   'bal', in which cases it modifies *fixP as appropriate.
-   In the case of a 'calls', no further work is required.  */
-extern int reloc_callj (struct fix *);
-
-#define TC_FORCE_RELOCATION_ABS(FIX)		\
-  (TC_FORCE_RELOCATION (FIX)			\
-   || reloc_callj (FIX))
-
-#define TC_FORCE_RELOCATION_LOCAL(FIX)		\
-  (GENERIC_FORCE_RELOCATION_LOCAL (FIX)		\
-   || reloc_callj (FIX))
-
-#ifdef OBJ_COFF
-
-/* We store the bal information in the sy_tc field.  */
-#define TC_SYMFIELD_TYPE symbolS *
-
-#endif
-
-extern int i960_validate_fix (struct fix *, segT);
-#define TC_VALIDATE_FIX(FIX,SEGTYPE,LABEL) \
-	if (!i960_validate_fix (FIX, SEGTYPE)) goto LABEL
-
-#define tc_fix_adjustable(FIX)		((FIX)->fx_bsr == 0)
-
-#ifndef OBJ_ELF
-/* Values passed to md_apply_fix sometimes include symbol values.  */
-#define MD_APPLY_SYM_VALUE(FIX) tc_fix_adjustable (FIX)
-#else
-/* Values passed to md_apply_fix don't include the symbol value.  */
-#define MD_APPLY_SYM_VALUE(FIX) 0
-#endif
-
-extern void brtab_emit (void);
-#define md_end()	brtab_emit ()
-
-extern void tc_set_bal_of_call (symbolS *, symbolS *);
-
-extern struct symbol *tc_get_bal_of_call (symbolS *);
-
-extern void i960_handle_align (struct frag *);
-#define HANDLE_ALIGN(FRAG)	i960_handle_align (FRAG)
-#define NO_RELOC -1
-
-#define md_operand(x)
-
-extern const struct relax_type md_relax_table[];
-#define TC_GENERIC_RELAX_TABLE md_relax_table
-
-#define LINKER_RELAXING_SHRINKS_ONLY
-
-#define TC_FIX_TYPE struct { unsigned bsr : 1; }
-#define fx_bsr tc_fix_data.bsr
-#define TC_INIT_FIX_DATA(F)	((F)->tc_fix_data.bsr = 0)
-
-#endif
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
index 13fb897..d73d154 100644
--- a/gas/config/tc-m68k.c
+++ b/gas/config/tc-m68k.c
@@ -5405,7 +5405,7 @@ md_estimate_size_before_relax (fragS *fragP, segT segment)
   return md_relax_table[fragP->fr_subtype].rlx_length;
 }
 
-#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+#if defined(OBJ_AOUT)
 /* the bit-field entries in the relocation_info struct plays hell
    with the byte-order problems of cross-assembly.  So as a hack,
    I added this mach. dependent ri twiddler.  Ugly, but it gets
@@ -5433,7 +5433,7 @@ md_ri_to_chars (char *the_bytes, struct reloc_info_generic *ri)
 
 #endif
 
-#endif /* OBJ_AOUT or OBJ_BOUT */
+#endif /* OBJ_AOUT */
 
 #ifndef WORKING_DOT_WORD
 int md_short_jump_size = 4;
diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c
index 146e86a..8b587c8 100644
--- a/gas/config/tc-score.c
+++ b/gas/config/tc-score.c
@@ -6217,8 +6217,7 @@ s3_s_score_lcomm (int bytes_p)
   *p = c;
 
   if (
-#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)	\
-     || defined (OBJ_BOUT) || defined (OBJ_MAYBE_BOUT))
+#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
 #ifdef BFD_ASSEMBLER
       (OUTPUT_FLAVOR != bfd_target_aout_flavour
        || (S_GET_OTHER (symbolP) == 0 && S_GET_DESC (symbolP) == 0)) &&
diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c
index 9cd6602..12271a3 100644
--- a/gas/config/tc-score7.c
+++ b/gas/config/tc-score7.c
@@ -6077,8 +6077,7 @@ s7_s_score_lcomm (int bytes_p)
   *p = c;
 
   if (
-#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT) \
-     || defined (OBJ_BOUT) || defined (OBJ_MAYBE_BOUT))
+#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
 #ifdef BFD_ASSEMBLER
        (OUTPUT_FLAVOR != bfd_target_aout_flavour
         || (S_GET_OTHER (symbolP) == 0 && S_GET_DESC (symbolP) == 0)) &&
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
index c21192a..1994452 100644
--- a/gas/config/tc-sparc.c
+++ b/gas/config/tc-sparc.c
@@ -365,10 +365,6 @@ sparc_target_format (void)
 #endif
 #endif
 
-#ifdef OBJ_BOUT
-  return "b.out.big";
-#endif
-
 #ifdef OBJ_COFF
 #ifdef TE_LYNX
   return "coff-sparc-lynx";
diff --git a/gas/configure b/gas/configure
index 0504104..a4393b5 100755
--- a/gas/configure
+++ b/gas/configure
@@ -11936,7 +11936,7 @@ case "${host}" in
 esac
 
 
-#We need this for the host.  BOUT header is in host order.
+#We need this for the host.
  { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5
 $as_echo_n "checking whether byte ordering is bigendian... " >&6; }
 if test "${ac_cv_c_bigendian+set}" = set; then :
@@ -12250,11 +12250,6 @@ $as_echo "#define STRICTCOFF 1" >>confdefs.h
 	fi
 	;;
 
-      i860-*-*)
-	{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: GAS support for ${generic_target} is preliminary and a work in progress" >&5
-$as_echo "$as_me: WARNING: GAS support for ${generic_target} is preliminary and a work in progress" >&2;}
-	;;
-
       microblaze*)
         ;;
 
@@ -12863,9 +12858,6 @@ if test `set . $formats ; shift ; echo $#` -gt 1 ; then
       aout)
 $as_echo "#define OBJ_MAYBE_AOUT 1" >>confdefs.h
    ;;
-      bout)
-$as_echo "#define OBJ_MAYBE_BOUT 1" >>confdefs.h
-   ;;
       coff)
 $as_echo "#define OBJ_MAYBE_COFF 1" >>confdefs.h
     ;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 3b0279a..2c4e3eb 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -141,7 +141,7 @@ case "${host}" in
 esac
 AC_SUBST(GDBINIT)
 
-#We need this for the host.  BOUT header is in host order.
+#We need this for the host.
 AC_C_BIGENDIAN
 
 te_file=generic
@@ -213,10 +213,6 @@ for this_target in $target $canon_targets ; do
 	fi
 	;;
 
-      i860-*-*)
-	AC_MSG_WARN(GAS support for ${generic_target} is preliminary and a work in progress)
-	;;
-
       microblaze*)
         ;;
 
@@ -737,7 +733,6 @@ if test `set . $formats ; shift ; echo $#` -gt 1 ; then
   for fmt in $formats ; do
     case $fmt in
       aout)	AC_DEFINE(OBJ_MAYBE_AOUT, 1,    [a.out support?])   ;;
-      bout)	AC_DEFINE(OBJ_MAYBE_BOUT, 1,    [b.out support?])   ;;
       coff)	AC_DEFINE(OBJ_MAYBE_COFF, 1,    [COFF support?])    ;;
       ecoff)	AC_DEFINE(OBJ_MAYBE_ECOFF, 1,   [ECOFF support?])   ;;
       elf)	AC_DEFINE(OBJ_MAYBE_ELF, 1,     [ELF support?])     ;;
diff --git a/gas/configure.tgt b/gas/configure.tgt
index 6455fbb..0f5626b 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -292,10 +292,6 @@ case ${generic_target} in
   i386-*-rdos*)				fmt=elf ;;
   i386-*-darwin*)			fmt=macho ;;
 
-  i860-*-*)				fmt=elf endian=little ;;
-
-  i960-*-elf*)				fmt=elf ;;
-
   ia16-*-elf*)				fmt=elf ;;
 
   ia64-*-elf*)				fmt=elf ;;
diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am
index 1faf805..aee70dd 100644
--- a/gas/doc/Makefile.am
+++ b/gas/doc/Makefile.am
@@ -60,8 +60,6 @@ CPU_DOCS = \
 	c-hppa.texi \
 	c-i370.texi \
 	c-i386.texi \
-	c-i860.texi \
-	c-i960.texi \
 	c-ip2k.texi \
 	c-lm32.texi \
 	c-m32c.texi \
diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in
index 5de99b3..8939093 100644
--- a/gas/doc/Makefile.in
+++ b/gas/doc/Makefile.in
@@ -335,8 +335,6 @@ CPU_DOCS = \
 	c-hppa.texi \
 	c-i370.texi \
 	c-i386.texi \
-	c-i860.texi \
-	c-i960.texi \
 	c-ip2k.texi \
 	c-lm32.texi \
 	c-m32c.texi \
diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index d3d3719..47d55df 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -39,8 +39,6 @@
 @set HPPA
 @set I370
 @set I80386
-@set I860
-@set I960
 @set IA64
 @set IP2K
 @set LM32
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 43286e9..dfd436f 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -32,7 +32,7 @@
 @set COFF-ELF
 @end ifset
 @ifset AOUT
-@set aout-bout
+@set aout
 @end ifset
 @ifset ARM/Thumb
 @set ARM
@@ -40,9 +40,6 @@
 @ifset Blackfin
 @set Blackfin
 @end ifset
-@ifset BOUT
-@set aout-bout
-@end ifset
 @ifset H8/300
 @set H8
 @end ifset
@@ -337,14 +334,6 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
    [@b{--32}|@b{--x32}|@b{--64}] [@b{-n}]
    [@b{-march}=@var{CPU}[+@var{EXTENSION}@dots{}]] [@b{-mtune}=@var{CPU}]
 @end ifset
-@ifset I960
-
-@emph{Target i960 options:}
-@c see md_parse_option in tc-i960.c
-   [@b{-ACA}|@b{-ACA_A}|@b{-ACB}|@b{-ACC}|@b{-AKA}|@b{-AKB}|
-    @b{-AKC}|@b{-AMC}]
-   [@b{-b}] [@b{-no-relax}]
-@end ifset
 @ifset IA64
 
 @emph{Target IA-64 options:}
@@ -1069,24 +1058,6 @@ an i386 processor.
 @end ifset
 
 @c man begin OPTIONS
-@ifset I960
-The following options are available when @value{AS} is configured for the
-Intel 80960 processor.
-
-@table @gcctabopt
-@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
-Specify which variant of the 960 architecture is the target.
-
-@item -b
-Add code to collect statistics about branches taken.
-
-@item -no-relax
-Do not alter compare-and-branch instructions for long displacements;
-error if necessary.
-
-@end table
-@end ifset
-
 @ifset IP2K
 The following options are available when @value{AS} is configured for the
 Ubicom IP2K series.
@@ -1995,10 +1966,6 @@ For the @value{TARGET} target, @command{@value{AS}} is configured to produce
 @value{OBJ-NAME} format object files.
 @end ifclear
 @c The following should exhaust all configs that set MULTI-OBJ, ideally
-@ifset I960
-On the @value{TARGET}, @command{@value{AS}} can be configured to produce either
-@code{b.out} or COFF format object files.
-@end ifset
 @ifset HPPA
 On the @value{TARGET}, @command{@value{AS}} can be configured to produce either
 SOM or ELF format object files.
@@ -2104,16 +2071,7 @@ is itself synthesized from other files.  @command{@value{AS}} understands the
 @kindex .o
 Every time you run @command{@value{AS}} it produces an output file, which is
 your assembly language program translated into numbers.  This file
-is the object file.  Its default name is
-@ifclear BOUT
-@code{a.out}.
-@end ifclear
-@ifset BOUT
-@ifset GENERIC
-@code{a.out}, or
-@end ifset
-@code{b.out} when @command{@value{AS}} is configured for the Intel 80960.
-@end ifset
+is the object file.  Its default name is @code{a.out}.
 You can give it another name by using the @option{-o} option.  Conventionally,
 object file names end with @file{.o}.  The default name is used for historical
 reasons: older assemblers were capable of assembling self-contained programs
@@ -2447,8 +2405,8 @@ displayed for a given single line of source input.  The default value is 4.
 @cindex MRI compatibility mode
 The @option{-M} or @option{--mri} option selects MRI compatibility mode.  This
 changes the syntax and pseudo-op handling of @command{@value{AS}} to make it
-compatible with the @code{ASM68K} or the @code{ASM960} (depending upon the
-configured target) assembler from Microtec Research.  The exact nature of the
+compatible with the @code{ASM68K} assembler from Microtec Research.
+The exact nature of the
 MRI syntax will not be documented here; see the MRI manuals for more
 information.  Note in particular that the handling of macros and macro
 arguments is somewhat different.  The purpose of this option is to permit
@@ -2545,30 +2503,6 @@ The m68k @code{OPT} @code{D} option is the default, unlike the MRI assembler.
 
 The m68k @code{XREF} pseudo-op is ignored.
 
-@item @code{.debug} pseudo-op
-
-The i960 @code{.debug} pseudo-op is not supported.
-
-@item @code{.extended} pseudo-op
-
-The i960 @code{.extended} pseudo-op is not supported.
-
-@item @code{.list} pseudo-op.
-
-The various options of the i960 @code{.list} pseudo-op are not supported.
-
-@item @code{.optimize} pseudo-op
-
-The i960 @code{.optimize} pseudo-op is not supported.
-
-@item @code{.output} pseudo-op
-
-The i960 @code{.output} pseudo-op is not supported.
-
-@item @code{.setreal} pseudo-op
-
-The i960 @code{.setreal} pseudo-op is not supported.
-
 @end itemize
 
 @node MD
@@ -2602,23 +2536,7 @@ disable this behaviour.
 @cindex naming object file
 @cindex object file name
 There is always one object file output when you run @command{@value{AS}}.  By
-default it has the name
-@ifset GENERIC
-@ifset I960
-@file{a.out} (or @file{b.out}, for Intel 960 targets only).
-@end ifset
-@ifclear I960
-@file{a.out}.
-@end ifclear
-@end ifset
-@ifclear GENERIC
-@ifset I960
-@file{b.out}.
-@end ifset
-@ifclear I960
-@file{a.out}.
-@end ifclear
-@end ifclear
+default it has the name @file{a.out}.
 You use this option (which takes exactly one filename) to give the
 object file a different name.
 
@@ -3153,9 +3071,6 @@ are floating point numbers, described below.
 * Bignums::                     Bignums
 * Flonums::                     Flonums
 @ifclear GENERIC
-@ifset I960
-* Bit Fields::                  Bit Fields
-@end ifset
 @end ifclear
 @end menu
 
@@ -3230,16 +3145,12 @@ A letter, to tell @command{@value{AS}} the rest of the number is a flonum.
 4.2 assembler seems to allow any of @samp{defghDEFGH}.)
 @end ignore
 
-On the H8/300, Renesas / SuperH SH,
-and AMD 29K architectures, the letter must be
+On the H8/300 and Renesas / SuperH SH architectures, the letter must be
 one of the letters @samp{DFPRSX} (in upper or lower case).
 
 On the ARC, the letter must be one of the letters @samp{DFRS}
 (in upper or lower case).
 
-On the Intel 960 architecture, the letter must be
-one of the letters @samp{DFT} (in upper or lower case).
-
 On the HPPA architecture, the letter must be @samp{E} (upper case only).
 @end ifset
 @ifclear GENERIC
@@ -3252,9 +3163,6 @@ One of the letters @samp{DFPRSX} (in upper or lower case).
 @ifset HPPA
 The letter @samp{E} (upper case only).
 @end ifset
-@ifset I960
-One of the letters @samp{DFT} (in upper or lower case).
-@end ifset
 @end ifclear
 
 @item
@@ -3290,41 +3198,6 @@ present.  The floating point number has the usual base-10 value.
 independently of any floating point hardware in the computer running
 @command{@value{AS}}.
 
-@ifclear GENERIC
-@ifset I960
-@c Bit fields are written as a general facility but are also controlled
-@c by a conditional-compilation flag---which is as of now (21mar91)
-@c turned on only by the i960 config of GAS.
-@node Bit Fields
-@subsubsection Bit Fields
-
-@cindex bit fields
-@cindex constants, bit field
-You can also define numeric constants as @dfn{bit fields}.
-Specify two numbers separated by a colon---
-@example
-@var{mask}:@var{value}
-@end example
-@noindent
-@command{@value{AS}} applies a bitwise @sc{and} between @var{mask} and
-@var{value}.
-
-The resulting number is then packed
-@ifset GENERIC
-@c this conditional paren in case bit fields turned on elsewhere than 960
-(in host-dependent byte order)
-@end ifset
-into a field whose width depends on which assembler directive has the
-bit-field as its argument.  Overflow (a result from the bitwise and
-requiring more binary digits to represent) is not an error; instead,
-more constants are generated, of the specified width, beginning with the
-least significant digits.@refill
-
-The directives @code{.byte}, @code{.hword}, @code{.int}, @code{.long},
-@code{.short}, and @code{.word} accept bit-field arguments.
-@end ifset
-@end ifclear
-
 @node Sections
 @chapter Sections and Relocation
 @cindex sections
@@ -3486,7 +3359,7 @@ use of @command{@value{AS}} and have no meaning except during assembly.
 @cindex sections, named
 @item named sections
 @end ifset
-@ifset aout-bout
+@ifset aout
 @cindex text section
 @cindex data section
 @itemx text section
@@ -3495,7 +3368,7 @@ use of @command{@value{AS}} and have no meaning except during assembly.
 These sections hold your program.  @command{@value{AS}} and @code{@value{LD}} treat them as
 separate but equal sections.  Anything you can say of one section is
 true of another.
-@c @ifset aout-bout
+@c @ifset aout
 When the program is running, however, it is
 customary for the text section to be unalterable.  The
 text section is often shared among processes: it contains
@@ -3615,7 +3488,7 @@ it in the expr section.
 
 @cindex numbered subsections
 @cindex grouping data
-@ifset aout-bout
+@ifset aout
 Assembled bytes
 @ifset COFF-ELF
 conventionally
@@ -3627,10 +3500,10 @@ You may have separate groups of
 data in named sections
 @end ifset
 @ifclear GENERIC
-@ifclear aout-bout
+@ifclear aout
 data in named sections
 @end ifclear
-@ifset aout-bout
+@ifset aout
 text or data
 @end ifset
 @end ifclear
@@ -3659,14 +3532,6 @@ On the H8/300 platform, each subsection is zero-padded to a word
 boundary (two bytes).
 The same is true on the Renesas SH.
 @end ifset
-@ifset I960
-@c FIXME section padding (alignment)?
-@c Rich Pixley says padding here depends on target obj code format; that
-@c doesn't seem particularly useful to say without further elaboration,
-@c so for now I say nothing about it.  If this is a generic BFD issue,
-@c these paragraphs might need to vanish from this manual, and be
-@c discussed in BFD chapter of binutils (or some such).
-@end ifset
 @end ifclear
 
 Subsections appear in your object file in numeric order, lowest numbered
@@ -3990,19 +3855,9 @@ would want.
 @menu
 * Symbol Value::                Value
 * Symbol Type::                 Type
-@ifset aout-bout
-@ifset GENERIC
+@ifset aout
 * a.out Symbols::               Symbol Attributes: @code{a.out}
 @end ifset
-@ifclear GENERIC
-@ifclear BOUT
-* a.out Symbols::               Symbol Attributes: @code{a.out}
-@end ifclear
-@ifset BOUT
-* a.out Symbols::               Symbol Attributes: @code{a.out}, @code{b.out}
-@end ifset
-@end ifclear
-@end ifset
 @ifset COFF
 * COFF Symbols::                Symbol Attributes for COFF
 @end ifset
@@ -4043,39 +3898,13 @@ information, any flag settings indicating that a symbol is external, and
 (optionally), other information for linkers and debuggers.  The exact
 format depends on the object-code output format in use.
 
-@ifset aout-bout
-@ifclear GENERIC
-@ifset BOUT
-@c The following avoids a "widow" subsection title.  @group would be
-@c better if it were available outside examples.
-@need 1000
-@node a.out Symbols
-@subsection Symbol Attributes: @code{a.out}, @code{b.out}
-
-@cindex @code{b.out} symbol attributes
-@cindex symbol attributes, @code{b.out}
-These symbol attributes appear only when @command{@value{AS}} is configured for
-one of the Berkeley-descended object output formats---@code{a.out} or
-@code{b.out}.
-
-@end ifset
-@ifclear BOUT
-@node a.out Symbols
-@subsection Symbol Attributes: @code{a.out}
-
-@cindex @code{a.out} symbol attributes
-@cindex symbol attributes, @code{a.out}
-
-@end ifclear
-@end ifclear
-@ifset GENERIC
+@ifset aout
 @node a.out Symbols
 @subsection Symbol Attributes: @code{a.out}
 
 @cindex @code{a.out} symbol attributes
 @cindex symbol attributes, @code{a.out}
 
-@end ifset
 @menu
 * Symbol Desc::                 Descriptor
 * Symbol Other::                Other
@@ -4410,7 +4239,7 @@ Some machine configurations provide additional directives.
 @ifset COFF
 * Def::                         @code{.def @var{name}}
 @end ifset
-@ifset aout-bout
+@ifset aout
 * Desc::                        @code{.desc @var{symbol}, @var{abs-expression}}
 @end ifset
 @ifset COFF
@@ -4594,10 +4423,6 @@ quit also.  One day @code{.abort} will not be supported.
 When producing COFF output, @command{@value{AS}} accepts this directive as a
 synonym for @samp{.abort}.
 
-@ifset BOUT
-When producing @code{b.out} output, @command{@value{AS}} accepts this directive,
-but ignores it.
-@end ifset
 @end ifset
 
 @node Align
@@ -4624,7 +4449,7 @@ required alignment; this can be useful if you want the alignment to be filled
 with no-op instructions when appropriate.
 
 The way the required alignment is specified varies from system to system.
-For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or1k,
+For the arc, hppa, i386 using ELF, iq2000, m68k, or1k,
 s390, sparc, tic4x, tic80 and xtensa, the first expression is the
 alignment request in bytes.  For example @samp{.align 8} advances
 the location counter until it is a multiple of 8.  If the location counter
@@ -5163,15 +4988,9 @@ The byte ordering is target dependent.
 @cindex debugging COFF symbols
 Begin defining debugging information for a symbol @var{name}; the
 definition extends until the @code{.endef} directive is encountered.
-@ifset BOUT
-
-This directive is only observed when @command{@value{AS}} is configured for COFF
-format output; when producing @code{b.out}, @samp{.def} is recognized,
-but ignored.
-@end ifset
 @end ifset
 
-@ifset aout-bout
+@ifset aout
 @node Desc
 @section @code{.desc @var{symbol}, @var{abs-expression}}
 
@@ -5199,12 +5018,6 @@ it, but produces no output, when configured for COFF.
 This directive is generated by compilers to include auxiliary debugging
 information in the symbol table.  It is only permitted inside
 @code{.def}/@code{.endef} pairs.
-@ifset BOUT
-
-@samp{.dim} is only meaningful when generating COFF format output; when
-@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
-ignores it.
-@end ifset
 @end ifset
 
 @node Double
@@ -5265,12 +5078,6 @@ process anything in the file past the @code{.end} directive.
 @cindex @code{endef} directive
 This directive flags the end of a symbol definition begun with
 @code{.def}.
-@ifset BOUT
-
-@samp{.endef} is only meaningful when generating COFF format output; if
-@command{@value{AS}} is configured to generate @code{b.out}, it accepts this
-directive but ignores it.
-@end ifset
 @end ifset
 
 @node Endfunc
@@ -5801,7 +5608,7 @@ assemblers, but ignores it.
 
 @cindex @code{line} directive
 @cindex logical line number
-@ifset aout-bout
+@ifset aout
 Change the logical line number.  @var{line-number} must be an absolute
 expression.  The next line has that logical line number.  Therefore any other
 statements on the current line (after a statement separator character) are
@@ -5886,12 +5693,6 @@ must be an absolute expression.  The next line has that logical
 line number, so any other statements on the current line (after a
 statement separator character @code{;}) are reported as on logical
 line number @var{line-number} @minus{} 1.
-@ifset BOUT
-
-This directive is accepted, but ignored, when @command{@value{AS}} is
-configured for @code{b.out}; its effect is only associated with COFF
-output format.
-@end ifset
 @end ifset
 
 @node Loc
@@ -6220,7 +6021,7 @@ instruction size limit is set to the maximum supported size.
 @node Octa
 @section @code{.octa @var{bignums}}
 
-@c FIXME: double size emitted for "octa" on i960, others?  Or warn?
+@c FIXME: double size emitted for "octa" on some?  Or warn?
 @cindex @code{octa} directive
 @cindex integer, 16-byte
 @cindex sixteen byte integer
@@ -6535,12 +6336,6 @@ Set the storage-class value for a symbol.  This directive may only be
 used inside a @code{.def}/@code{.endef} pair.  Storage class may flag
 whether a symbol is static or external, or it may record further
 symbolic debugging information.
-@ifset BOUT
-
-The @samp{.scl} directive is primarily associated with COFF output; when
-configured to generate @code{b.out} output format, @command{@value{AS}}
-accepts this directive but ignores it.
-@end ifset
 @end ifset
 
 @ifset COFF-ELF
@@ -6900,11 +6695,6 @@ For COFF targets, the @code{.size} directive is only permitted inside
 .size @var{expression}
 @end smallexample
 
-@ifset BOUT
-@samp{.size} is only meaningful when generating COFF format output; when
-@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
-ignores it.
-@end ifset
 @end ifset
 
 @ifset ELF
@@ -7172,12 +6962,6 @@ This directive is generated by compilers to include auxiliary debugging
 information in the symbol table.  It is only permitted inside
 @code{.def}/@code{.endef} pairs.  Tags are used to link structure
 definitions in the symbol table with instances of those structures.
-@ifset BOUT
-
-@samp{.tag} is only used when generating COFF format output; when
-@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
-ignores it.
-@end ifset
 @end ifset
 
 @node Text
@@ -7225,11 +7009,6 @@ For COFF targets, this directive is permitted only within
 This records the integer @var{int} as the type attribute of a symbol table
 entry.
 
-@ifset BOUT
-@samp{.type} is associated only with COFF format output; when
-@command{@value{AS}} is configured for @code{b.out} output, it accepts this
-directive but ignores it.
-@end ifset
 @end ifset
 
 @ifset ELF
@@ -7328,11 +7107,6 @@ symbolic debugging format.  @xref{Sleb128, ,@code{.sleb128}}.
 This directive, permitted only within @code{.def}/@code{.endef} pairs,
 records the address @var{addr} as the value attribute of a symbol table
 entry.
-@ifset BOUT
-
-@samp{.val} is used only for COFF output; when @command{@value{AS}} is
-configured for @code{b.out}, it accepts this directive but ignores it.
-@end ifset
 @end ifset
 
 @ifset ELF
@@ -7422,7 +7196,7 @@ The size of the number emitted, and its byte order,
 depend on what target computer the assembly is for.
 @end ifset
 
-@c on amd29k, i960, sparc the "special treatment to support compilers" doesn't
+@c on sparc the "special treatment to support compilers" doesn't
 @c happen---32-bit addressability, period; no long/short jumps.
 @ifset DIFF-TBL-KLUGE
 @cindex difference tables altered
@@ -7764,12 +7538,6 @@ subject, see the hardware manufacturer's manual.
 @ifset I80386
 * i386-Dependent::              Intel 80386 and AMD x86-64 Dependent Features
 @end ifset
-@ifset I860
-* i860-Dependent::              Intel 80860 Dependent Features
-@end ifset
-@ifset I960
-* i960-Dependent::              Intel 80960 Dependent Features
-@end ifset
 @ifset IA64
 * IA-64-Dependent::             Intel IA-64 Dependent Features
 @end ifset
@@ -7979,14 +7747,6 @@ family.
 @include c-i386.texi
 @end ifset
 
-@ifset I860
-@include c-i860.texi
-@end ifset
-
-@ifset I960
-@include c-i960.texi
-@end ifset
-
 @ifset IA64
 @include c-ia64.texi
 @end ifset
diff --git a/gas/doc/c-i860.texi b/gas/doc/c-i860.texi
deleted file mode 100644
index 6e6726b..0000000
--- a/gas/doc/c-i860.texi
+++ /dev/null
@@ -1,197 +0,0 @@
-@c Copyright (C) 2000-2018 Free Software Foundation, Inc.
-@c This is part of the GAS manual.
-@c For copying conditions, see the file as.texinfo.
-@ifset GENERIC
-@page
-@node i860-Dependent
-@chapter Intel i860 Dependent Features
-@end ifset
-@ifclear GENERIC
-@node Machine Dependencies
-@chapter Intel i860 Dependent Features
-@end ifclear
-
-@ignore
-@c FIXME: This is basically a stub for i860. There is tons more information
-that I will add later (jle@cygnus.com).
-@end ignore
-
-@cindex i860 support
-@menu
-* Notes-i860::                  i860 Notes
-* Options-i860::                i860 Command-line Options
-* Directives-i860::             i860 Machine Directives
-* Opcodes for i860::            i860 Opcodes
-* Syntax of i860::              i860 Syntax
-@end menu
-
-@node Notes-i860
-@section i860 Notes
-This is a fairly complete i860 assembler which is compatible with the
-UNIX System V/860 Release 4 assembler. However, it does not currently
-support SVR4 PIC (i.e., @code{@@GOT, @@GOTOFF, @@PLT}).
-
-Like the SVR4/860 assembler, the output object format is ELF32. Currently,
-this is the only supported object format. If there is sufficient interest,
-other formats such as COFF may be implemented.
-
-Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
-being the default.  One difference is that AT&T syntax requires the '%'
-prefix on register names while Intel syntax does not.  Another difference
-is in the specification of relocatable expressions.  The Intel syntax
-is @code{ha%expression} whereas the SVR4 syntax is @code{[expression]@@ha}
-(and similarly for the "l" and "h" selectors).
-@node Options-i860
-@section i860 Command-line Options
-@subsection SVR4 compatibility options
-@table @code
-@item -V
-Print assembler version.
-@item -Qy
-Ignored.
-@item -Qn
-Ignored.
-@end table
-@subsection Other options
-@table @code
-@item -EL
-Select little endian output (this is the default).
-@item -EB
-Select big endian output. Note that the i860 always reads instructions
-as little endian data, so this option only effects data and not
-instructions.
-@item -mwarn-expand
-Emit a warning message if any pseudo-instruction expansions occurred.
-For example, a @code{or} instruction with an immediate larger than 16-bits
-will be expanded into two instructions. This is a very undesirable feature to
-rely on, so this flag can help detect any code where it happens. One
-use of it, for instance, has been to find and eliminate any place
-where @code{gcc} may emit these pseudo-instructions.
-@item -mxp
-Enable support for the i860XP instructions and control registers.  By default,
-this option is disabled so that only the base instruction set (i.e., i860XR)
-is supported.
-@item -mintel-syntax
-The i860 assembler defaults to AT&T/SVR4 syntax.  This option enables the
-Intel syntax.
-@end table
-
-@node Directives-i860
-@section i860 Machine Directives
-
-@cindex machine directives, i860
-@cindex i860 machine directives
-
-@table @code
-@cindex @code{dual} directive, i860
-@item .dual
-Enter dual instruction mode. While this directive is supported, the
-preferred way to use dual instruction mode is to explicitly code
-the dual bit with the @code{d.} prefix.
-@end table
-
-@table @code
-@cindex @code{enddual} directive, i860
-@item .enddual
-Exit dual instruction mode. While this directive is supported, the
-preferred way to use dual instruction mode is to explicitly code
-the dual bit with the @code{d.} prefix.
-@end table
-
-@table @code
-@cindex @code{atmp} directive, i860
-@item .atmp
-Change the temporary register used when expanding pseudo operations. The
-default register is @code{r31}.
-@end table
-
-The @code{.dual}, @code{.enddual}, and @code{.atmp} directives are available only in the Intel syntax mode.
-
-Both syntaxes allow for the standard @code{.align} directive.  However,
-the Intel syntax additionally allows keywords for the alignment
-parameter: "@code{.align type}", where `type' is one of @code{.short}, @code{.long},
-@code{.quad}, @code{.single}, @code{.double} representing alignments of 2, 4,
-16, 4, and 8, respectively.
-
-@node Opcodes for i860
-@section i860 Opcodes
-
-@cindex opcodes, i860
-@cindex i860 opcodes
-All of the Intel i860XR and i860XP machine instructions are supported. Please see
-either @emph{i860 Microprocessor Programmer's Reference Manual} or @emph{i860 Microprocessor Architecture} for more information.
-@subsection Other instruction support (pseudo-instructions)
-For compatibility with some other i860 assemblers, a number of
-pseudo-instructions are supported. While these are supported, they are
-a very undesirable feature that should be avoided -- in particular, when
-they result in an expansion to multiple actual i860 instructions. Below
-are the pseudo-instructions that result in expansions.
-@itemize @bullet
-@item Load large immediate into general register:
-
-The pseudo-instruction @code{mov imm,%rn} (where the immediate does
-not fit within a signed 16-bit field) will be expanded into:
-@smallexample
-orh large_imm@@h,%r0,%rn
-or large_imm@@l,%rn,%rn
-@end smallexample
-@item Load/store with relocatable address expression:
-
-For example, the pseudo-instruction @code{ld.b addr_exp(%rx),%rn}
-will be expanded into:
-@smallexample
-orh addr_exp@@ha,%rx,%r31
-ld.l addr_exp@@l(%r31),%rn
-@end smallexample
-
-The analogous expansions apply to @code{ld.x, st.x, fld.x, pfld.x, fst.x}, and @code{pst.x} as well.
-@item Signed large immediate with add/subtract:
-
-If any of the arithmetic operations @code{adds, addu, subs, subu} are used
-with an immediate larger than 16-bits (signed), then they will be expanded.
-For instance, the pseudo-instruction @code{adds large_imm,%rx,%rn} expands to:
-@smallexample
-orh large_imm@@h,%r0,%r31
-or large_imm@@l,%r31,%r31
-adds %r31,%rx,%rn
-@end smallexample
-@item Unsigned large immediate with logical operations:
-
-Logical operations (@code{or, andnot, or, xor}) also result in expansions.
-The pseudo-instruction @code{or large_imm,%rx,%rn} results in:
-@smallexample
-orh large_imm@@h,%rx,%r31
-or large_imm@@l,%r31,%rn
-@end smallexample
-
-Similarly for the others, except for @code{and} which expands to:
-@smallexample
-andnot (-1 - large_imm)@@h,%rx,%r31
-andnot (-1 - large_imm)@@l,%r31,%rn
-@end smallexample
-@end itemize
-
-@node Syntax of i860
-@section i860 Syntax
-@menu
-* i860-Chars::                Special Characters
-@end menu
-
-@node i860-Chars
-@subsection Special Characters
-
-@cindex line comment character, i860
-@cindex i860 line comment character
-The presence of a @samp{#} appearing anywhere on a line indicates the
-start of a comment that extends to the end of that line.
-
-If a @samp{#} appears as the first character of a line then the whole
-line is treated as a comment, but in this case the line can also be a
-logical line number directive (@pxref{Comments}) or a preprocessor
-control command (@pxref{Preprocessing}).
-
-@cindex line separator, i860
-@cindex statement separator, i860
-@cindex i860 line separator
-The @samp{;} character can be used to separate statements on the same
-line.
diff --git a/gas/doc/c-i960.texi b/gas/doc/c-i960.texi
deleted file mode 100644
index 61ff13b..0000000
--- a/gas/doc/c-i960.texi
+++ /dev/null
@@ -1,324 +0,0 @@
-@c Copyright (C) 1991-2018 Free Software Foundation, Inc.
-@c This is part of the GAS manual.
-@c For copying conditions, see the file as.texinfo.
-@ifset GENERIC
-@page
-@node i960-Dependent
-@chapter Intel 80960 Dependent Features
-@end ifset
-@ifclear GENERIC
-@node Machine Dependencies
-@chapter Intel 80960 Dependent Features
-@end ifclear
-
-@cindex i960 support
-@menu
-* Options-i960::                i960 Command-line Options
-* Floating Point-i960::         Floating Point
-* Directives-i960::             i960 Machine Directives
-* Opcodes for i960::            i960 Opcodes
-* Syntax of i960::              i960 Syntax
-@end menu
-
-@c FIXME! Add Syntax sec with discussion of bitfields here, at least so
-@c long as they're not turned on for other machines than 960.
-
-@node Options-i960
-
-@section i960 Command-line Options
-
-@cindex i960 options
-@cindex options, i960
-@table @code
-
-@cindex i960 architecture options
-@cindex architecture options, i960
-@cindex @code{-A} options, i960
-@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
-Select the 80960 architecture.  Instructions or features not supported
-by the selected architecture cause fatal errors.
-
-@samp{-ACA} is equivalent to @samp{-ACA_A}; @samp{-AKC} is equivalent to
-@samp{-AMC}.  Synonyms are provided for compatibility with other tools.
-
-If you do not specify any of these options, @code{@value{AS}} generates code
-for any instruction or feature that is supported by @emph{some} version of the
-960 (even if this means mixing architectures!).  In principle,
-@code{@value{AS}} attempts to deduce the minimal sufficient processor type if
-none is specified; depending on the object code format, the processor type may
-be recorded in the object file.  If it is critical that the @code{@value{AS}}
-output match a specific architecture, specify that architecture explicitly.
-
-@cindex @code{-b} option, i960
-@cindex branch recording, i960
-@cindex i960 branch recording
-@item -b
-Add code to collect information about conditional branches taken, for
-later optimization using branch prediction bits.  (The conditional branch
-instructions have branch prediction bits in the CA, CB, and CC
-architectures.)  If @var{BR} represents a conditional branch instruction,
-the following represents the code generated by the assembler when
-@samp{-b} is specified:
-
-@smallexample
-        call    @var{increment routine}
-        .word   0       # pre-counter
-Label:  @var{BR}
-        call    @var{increment routine}
-        .word   0       # post-counter
-@end smallexample
-
-The counter following a branch records the number of times that branch
-was @emph{not} taken; the difference between the two counters is the
-number of times the branch @emph{was} taken.
-
-@cindex @code{gbr960}, i960 postprocessor
-@cindex branch statistics table, i960
-A table of every such @code{Label} is also generated, so that the
-external postprocessor @code{gbr960} (supplied by Intel) can locate all
-the counters.  This table is always labeled @samp{__BRANCH_TABLE__};
-this is a local symbol to permit collecting statistics for many separate
-object files.  The table is word aligned, and begins with a two-word
-header.  The first word, initialized to 0, is used in maintaining linked
-lists of branch tables.  The second word is a count of the number of
-entries in the table, which follow immediately: each is a word, pointing
-to one of the labels illustrated above.
-
-@c TEXI2ROFF-KILL
-@ifinfo
-@c END TEXI2ROFF-KILL
-@example
- +------------+------------+------------+ ... +------------+
- |            |            |            |     |            |
- |  *NEXT     |  COUNT: N  | *BRLAB 1   |     | *BRLAB N   |
- |            |            |            |     |            |
- +------------+------------+------------+ ... +------------+
-
-               __BRANCH_TABLE__ layout
-@end example
-@c TEXI2ROFF-KILL
-@end ifinfo
-@need 2000
-@tex
-\vskip 1pc
-\line{\leftskip=0pt\hskip\tableindent
-\boxit{2cm}{\tt *NEXT}\boxit{2cm}{\tt COUNT: \it N}\boxit{2cm}{\tt
-*BRLAB 1}\ibox{1cm}{\quad\dots}\boxit{2cm}{\tt *BRLAB \it N}\hfil}
-\centerline{\it {\tt \_\_BRANCH\_TABLE\_\_} layout}
-@end tex
-@c END TEXI2ROFF-KILL
-
-The first word of the header is used to locate multiple branch tables,
-since each object file may contain one. Normally the links are
-maintained with a call to an initialization routine, placed at the
-beginning of each function in the file.  The @sc{gnu} C compiler
-generates these calls automatically when you give it a @samp{-b} option.
-For further details, see the documentation of @samp{gbr960}.
-
-@cindex @code{-no-relax} option, i960
-@item -no-relax
-Normally, Compare-and-Branch instructions with targets that require
-displacements greater than 13 bits (or that have external targets) are
-replaced with the corresponding compare (or @samp{chkbit}) and branch
-instructions.  You can use the @samp{-no-relax} option to specify that
-@code{@value{AS}} should generate errors instead, if the target displacement
-is larger than 13 bits.
-
-This option does not affect the Compare-and-Jump instructions; the code
-emitted for them is @emph{always} adjusted when necessary (depending on
-displacement size), regardless of whether you use @samp{-no-relax}.
-@end table
-
-@node Floating Point-i960
-@section Floating Point
-
-@cindex floating point, i960 (@sc{ieee})
-@cindex i960 floating point (@sc{ieee})
-@code{@value{AS}} generates @sc{ieee} floating-point numbers for the directives
-@samp{.float}, @samp{.double}, @samp{.extended}, and @samp{.single}.
-
-@node Directives-i960
-@section i960 Machine Directives
-
-@cindex machine directives, i960
-@cindex i960 machine directives
-
-@table @code
-@cindex @code{bss} directive, i960
-@item .bss @var{symbol}, @var{length}, @var{align}
-Reserve @var{length} bytes in the bss section for a local @var{symbol},
-aligned to the power of two specified by @var{align}.  @var{length} and
-@var{align} must be positive absolute expressions.  This directive
-differs from @samp{.lcomm} only in that it permits you to specify
-an alignment.  @xref{Lcomm,,@code{.lcomm}}.
-@end table
-
-@table @code
-@cindex @code{extended} directive, i960
-@item .extended @var{flonums}
-@code{.extended} expects zero or more flonums, separated by commas; for
-each flonum, @samp{.extended} emits an @sc{ieee} extended-format (80-bit)
-floating-point number.
-
-@cindex @code{leafproc} directive, i960
-@item .leafproc @var{call-lab}, @var{bal-lab}
-You can use the @samp{.leafproc} directive in conjunction with the
-optimized @code{callj} instruction to enable faster calls of leaf
-procedures.  If a procedure is known to call no other procedures, you
-may define an entry point that skips procedure prolog code (and that does
-not depend on system-supplied saved context), and declare it as the
-@var{bal-lab} using @samp{.leafproc}.  If the procedure also has an
-entry point that goes through the normal prolog, you can specify that
-entry point as @var{call-lab}.
-
-A @samp{.leafproc} declaration is meant for use in conjunction with the
-optimized call instruction @samp{callj}; the directive records the data
-needed later to choose between converting the @samp{callj} into a
-@code{bal} or a @code{call}.
-
-@var{call-lab} is optional; if only one argument is present, or if the
-two arguments are identical, the single argument is assumed to be the
-@code{bal} entry point.
-
-@cindex @code{sysproc} directive, i960
-@item .sysproc @var{name}, @var{index}
-The @samp{.sysproc} directive defines a name for a system procedure.
-After you define it using @samp{.sysproc}, you can use @var{name} to
-refer to the system procedure identified by @var{index} when calling
-procedures with the optimized call instruction @samp{callj}.
-
-Both arguments are required; @var{index} must be between 0 and 31
-(inclusive).
-@end table
-
-@node Opcodes for i960
-@section i960 Opcodes
-
-@cindex opcodes, i960
-@cindex i960 opcodes
-All Intel 960 machine instructions are supported;
-@pxref{Options-i960,,i960 Command-line Options} for a discussion of
-selecting the instruction subset for a particular 960
-architecture.@refill
-
-Some opcodes are processed beyond simply emitting a single corresponding
-instruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump
-instructions with target displacements larger than 13 bits.
-
-@menu
-* callj-i960::                  @code{callj}
-* Compare-and-branch-i960::     Compare-and-Branch
-@end menu
-
-@node callj-i960
-@subsection @code{callj}
-
-@cindex @code{callj}, i960 pseudo-opcode
-@cindex i960 @code{callj} pseudo-opcode
-You can write @code{callj} to have the assembler or the linker determine
-the most appropriate form of subroutine call: @samp{call},
-@samp{bal}, or @samp{calls}.  If the assembly source contains
-enough information---a @samp{.leafproc} or @samp{.sysproc} directive
-defining the operand---then @code{@value{AS}} translates the
-@code{callj}; if not, it simply emits the @code{callj}, leaving it
-for the linker to resolve.
-
-@node Compare-and-branch-i960
-@subsection Compare-and-Branch
-
-@cindex i960 compare/branch instructions
-@cindex compare/branch instructions, i960
-The 960 architectures provide combined Compare-and-Branch instructions
-that permit you to store the branch target in the lower 13 bits of the
-instruction word itself.  However, if you specify a branch target far
-enough away that its address won't fit in 13 bits, the assembler can
-either issue an error, or convert your Compare-and-Branch instruction
-into separate instructions to do the compare and the branch.
-
-@cindex compare and jump expansions, i960
-@cindex i960 compare and jump expansions
-Whether @code{@value{AS}} gives an error or expands the instruction depends
-on two choices you can make: whether you use the @samp{-no-relax} option,
-and whether you use a ``Compare and Branch'' instruction or a ``Compare
-and Jump'' instruction.  The ``Jump'' instructions are @emph{always}
-expanded if necessary; the ``Branch'' instructions are expanded when
-necessary @emph{unless} you specify @code{-no-relax}---in which case
-@code{@value{AS}} gives an error instead.
-
-These are the Compare-and-Branch instructions, their ``Jump'' variants,
-and the instruction pairs they may expand into:
-
-@c TEXI2ROFF-KILL
-@ifinfo
-@c END TEXI2ROFF-KILL
-@example
-        Compare and
-     Branch      Jump       Expanded to
-     ------    ------       ------------
-        bbc                 chkbit; bno
-        bbs                 chkbit; bo
-     cmpibe    cmpije       cmpi; be
-     cmpibg    cmpijg       cmpi; bg
-    cmpibge   cmpijge       cmpi; bge
-     cmpibl    cmpijl       cmpi; bl
-    cmpible   cmpijle       cmpi; ble
-    cmpibno   cmpijno       cmpi; bno
-    cmpibne   cmpijne       cmpi; bne
-     cmpibo    cmpijo       cmpi; bo
-     cmpobe    cmpoje       cmpo; be
-     cmpobg    cmpojg       cmpo; bg
-    cmpobge   cmpojge       cmpo; bge
-     cmpobl    cmpojl       cmpo; bl
-    cmpoble   cmpojle       cmpo; ble
-    cmpobne   cmpojne       cmpo; bne
-@end example
-@c TEXI2ROFF-KILL
-@end ifinfo
-@tex
-\hskip\tableindent
-\halign{\hfil {\tt #}\quad&\hfil {\tt #}\qquad&{\tt #}\hfil\cr
-\omit{\hfil\it Compare and\hfil}\span\omit&\cr
-{\it Branch}&{\it Jump}&{\it Expanded to}\cr
-        bbc&                 & chkbit; bno\cr
-        bbs&                 & chkbit; bo\cr
-     cmpibe&    cmpije&       cmpi; be\cr
-     cmpibg&    cmpijg&       cmpi; bg\cr
-    cmpibge&   cmpijge&       cmpi; bge\cr
-     cmpibl&    cmpijl&       cmpi; bl\cr
-    cmpible&   cmpijle&       cmpi; ble\cr
-    cmpibno&   cmpijno&       cmpi; bno\cr
-    cmpibne&   cmpijne&       cmpi; bne\cr
-     cmpibo&    cmpijo&       cmpi; bo\cr
-     cmpobe&    cmpoje&       cmpo; be\cr
-     cmpobg&    cmpojg&       cmpo; bg\cr
-    cmpobge&   cmpojge&       cmpo; bge\cr
-     cmpobl&    cmpojl&       cmpo; bl\cr
-    cmpoble&   cmpojle&       cmpo; ble\cr
-    cmpobne&   cmpojne&       cmpo; bne\cr}
-@end tex
-@c END TEXI2ROFF-KILL
-
-@node Syntax of i960
-@section Syntax for the i960
-@menu
-* i960-Chars::                Special Characters
-@end menu
-
-@node i960-Chars
-@subsection Special Characters
-
-@cindex line comment character, i960
-@cindex i960 line comment character
-The presence of a @samp{#} on a line indicates the start of a comment
-that extends to the end of the current line.
-
-If a @samp{#} appears as the first character of a line, the whole line
-is treated as a comment, but in this case the line can also be a
-logical line number directive (@pxref{Comments}) or a
-preprocessor control command (@pxref{Preprocessing}).
-
-@cindex line separator, i960
-@cindex statement separator, i960
-@cindex i960 line separator
-The @samp{;} character can be used to separate statements on the same
-line.
diff --git a/gas/doc/h8.texi b/gas/doc/h8.texi
index 8a88d6b..6291c5d 100644
--- a/gas/doc/h8.texi
+++ b/gas/doc/h8.texi
@@ -7,7 +7,6 @@
 @clear INTERNALS
 @clear MULTI-OBJ
 @clear AOUT
-@clear BOUT
 @set COFF
 @clear ELF
 @set Renesas-all
diff --git a/gas/doc/internals.texi b/gas/doc/internals.texi
index 418c700..93352ec 100644
--- a/gas/doc/internals.texi
+++ b/gas/doc/internals.texi
@@ -1096,11 +1096,6 @@ You may define this macro to parse an expression used in a data allocation
 pseudo-op such as @code{.word}.  You can use this to recognize relocation
 directives that may appear in such directives.
 
-@item BITFIELD_CONS_EXPRESSION
-@cindex BITFIELD_CONS_EXPRESSION
-If you define this macro, GAS will recognize bitfield instructions in data
-allocation pseudo-ops, as used on the i960.
-
 @item REPEAT_CONS_EXPRESSION
 @cindex REPEAT_CONS_EXPRESSION
 If you define this macro, GAS will recognize repeat counts in data allocation
@@ -1753,12 +1748,6 @@ no-op instructions, it must be able to expand or shrink the section contents
 while still preserving intra-section references and meeting alignment
 requirements.
 
-For the i960 using b.out format, no expansion is done; instead, each
-@samp{.align} directive causes extra space to be allocated, enough that when
-the linker is relaxing a section and removing unneeded space, it can discard
-some or all of this extra padding and cause the following data to be correctly
-aligned.
-
 For the H8/300, I think the linker expands calls that can't reach, and doesn't
 worry about alignment issues; the cpu probably never needs any significant
 alignment beyond the instruction size.
diff --git a/gas/expr.c b/gas/expr.c
index 3e28af6..074e0b3 100644
--- a/gas/expr.c
+++ b/gas/expr.c
@@ -1302,48 +1302,6 @@ operand (expressionS *expressionP, enum expr_mode mode)
 	    }
 #endif
 
-#ifdef TC_I960
-	  /* The MRI i960 assembler permits
-	         lda sizeof code,g13
-	     FIXME: This should use md_parse_name.  */
-	  if (flag_mri
-	      && (strcasecmp (name, "sizeof") == 0
-		  || strcasecmp (name, "startof") == 0))
-	    {
-	      int start;
-	      char *buf;
-
-	      start = (name[1] == 't'
-		       || name[1] == 'T');
-
-	      *input_line_pointer = c;
-	      SKIP_WHITESPACE_AFTER_NAME ();
-
-	      c = get_symbol_name (& name);
-	      if (! *name)
-		{
-		  as_bad (_("expected symbol name"));
-		  expressionP->X_op = O_absent;
-		  (void) restore_line_pointer (c);
-		  ignore_rest_of_line ();
-		  break;
-		}
-
-	      buf = concat (start ? ".startof." : ".sizeof.", name,
-			    (char *) NULL);
-	      symbolP = symbol_make (buf);
-	      free (buf);
-
-	      expressionP->X_op = O_symbol;
-	      expressionP->X_add_symbol = symbolP;
-	      expressionP->X_add_number = 0;
-
-	      *input_line_pointer = c;
-	      SKIP_WHITESPACE_AFTER_NAME ();
-	      break;
-	    }
-#endif
-
 	  symbolP = symbol_find_or_make (name);
 
 	  /* If we have an absolute symbol or a reg, then we know its
diff --git a/gas/po/POTFILES.in b/gas/po/POTFILES.in
index 51bbb5b..f4fe666 100644
--- a/gas/po/POTFILES.in
+++ b/gas/po/POTFILES.in
@@ -76,10 +76,6 @@ config/tc-i370.c
 config/tc-i370.h
 config/tc-i386.c
 config/tc-i386.h
-config/tc-i860.c
-config/tc-i860.h
-config/tc-i960.c
-config/tc-i960.h
 config/tc-ia64.c
 config/tc-ia64.h
 config/tc-ip2k.c
diff --git a/gas/read.c b/gas/read.c
index ff78cae..1f211b6 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -2972,81 +2972,10 @@ s_mri_sect (char *type ATTRIBUTE_UNUSED)
   demand_empty_rest_of_line ();
 
 #else /* ! TC_M68K */
-#ifdef TC_I960
-
-  char *name;
-  char c;
-  segT seg;
-
-  SKIP_WHITESPACE ();
-
-  c = get_symbol_name (& name);
-
-  name = xstrdup (name);
-
-  c = restore_line_pointer (c);
-
-  seg = subseg_new (name, 0);
-
-  if (c != ',')
-    *type = 'C';
-  else
-    {
-      char *sectype;
-
-      ++input_line_pointer;
-      SKIP_WHITESPACE ();
-      c = get_symbol_name (& sectype);
-      if (*sectype == '\0')
-	*type = 'C';
-      else if (strcasecmp (sectype, "text") == 0)
-	*type = 'C';
-      else if (strcasecmp (sectype, "data") == 0)
-	*type = 'D';
-      else if (strcasecmp (sectype, "romdata") == 0)
-	*type = 'R';
-      else
-	as_warn (_("unrecognized section type `%s'"), sectype);
-      (void) restore_line_pointer (c);
-    }
-
-  if (*input_line_pointer == ',')
-    {
-      char *seccmd;
-
-      ++input_line_pointer;
-      SKIP_WHITESPACE ();
-      c = get_symbol_name (& seccmd);
-      if (strcasecmp (seccmd, "absolute") == 0)
-	{
-	  as_bad (_("absolute sections are not supported"));
-	  *input_line_pointer = c;
-	  ignore_rest_of_line ();
-	  return;
-	}
-      else if (strcasecmp (seccmd, "align") == 0)
-	{
-	  unsigned int align;
-
-	  (void) restore_line_pointer (c);
-	  align = get_absolute_expression ();
-	  record_alignment (seg, align);
-	}
-      else
-	{
-	  as_warn (_("unrecognized section command `%s'"), seccmd);
-	  (void) restore_line_pointer (c);
-	}
-    }
-
-  demand_empty_rest_of_line ();
-
-#else /* ! TC_I960 */
   /* The MRI assembler seems to use different forms of .sect for
      different targets.  */
   as_bad ("MRI mode not supported for this target");
   ignore_rest_of_line ();
-#endif /* ! TC_I960 */
 #endif /* ! TC_M68K */
 }
 
@@ -3978,7 +3907,6 @@ pseudo_set (symbolS *symbolP)
 /* Some targets need to parse the expression in various fancy ways.
    You can define TC_PARSE_CONS_EXPRESSION to do whatever you like
    (for example, the HPPA does this).  Otherwise, you can define
-   BITFIELD_CONS_EXPRESSIONS to permit bitfields to be specified, or
    REPEAT_CONS_EXPRESSIONS to permit repeat counts.  If none of these
    are defined, which is the normal case, then only simple expressions
    are permitted.  */
@@ -3989,12 +3917,6 @@ parse_mri_cons (expressionS *exp, unsigned int nbytes);
 #endif
 
 #ifndef TC_PARSE_CONS_EXPRESSION
-#ifdef BITFIELD_CONS_EXPRESSIONS
-#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) \
-  (parse_bitfield_cons (EXP, NBYTES), TC_PARSE_CONS_RETURN_NONE)
-static void
-parse_bitfield_cons (expressionS *exp, unsigned int nbytes);
-#endif
 #ifdef REPEAT_CONS_EXPRESSIONS
 #define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) \
   (parse_repeat_cons (EXP, NBYTES), TC_PARSE_CONS_RETURN_NONE)
@@ -4658,136 +4580,6 @@ emit_expr_fix (expressionS *exp, unsigned int nbytes, fragS *frag, char *p,
 #endif
 }
 
-#ifdef BITFIELD_CONS_EXPRESSIONS
-
-/* i960 assemblers, (eg, asm960), allow bitfields after ".byte" as
-   w:x,y:z, where w and y are bitwidths and x and y are values.  They
-   then pack them all together. We do a little better in that we allow
-   them in words, longs, etc. and we'll pack them in target byte order
-   for you.
-
-   The rules are: pack least significant bit first, if a field doesn't
-   entirely fit, put it in the next unit.  Overflowing the bitfield is
-   explicitly *not* even a warning.  The bitwidth should be considered
-   a "mask".
-
-   To use this function the tc-XXX.h file should define
-   BITFIELD_CONS_EXPRESSIONS.  */
-
-static void
-parse_bitfield_cons (expressionS *exp, unsigned int nbytes)
-{
-  unsigned int bits_available = BITS_PER_CHAR * nbytes;
-  char *hold = input_line_pointer;
-
-  (void) expression (exp);
-
-  if (*input_line_pointer == ':')
-    {
-      /* Bitfields.  */
-      long value = 0;
-
-      for (;;)
-	{
-	  unsigned long width;
-
-	  if (*input_line_pointer != ':')
-	    {
-	      input_line_pointer = hold;
-	      break;
-	    }			/* Next piece is not a bitfield.  */
-
-	  /* In the general case, we can't allow
-	     full expressions with symbol
-	     differences and such.  The relocation
-	     entries for symbols not defined in this
-	     assembly would require arbitrary field
-	     widths, positions, and masks which most
-	     of our current object formats don't
-	     support.
-
-	     In the specific case where a symbol
-	     *is* defined in this assembly, we
-	     *could* build fixups and track it, but
-	     this could lead to confusion for the
-	     backends.  I'm lazy. I'll take any
-	     SEG_ABSOLUTE. I think that means that
-	     you can use a previous .set or
-	     .equ type symbol.  xoxorich.  */
-
-	  if (exp->X_op == O_absent)
-	    {
-	      as_warn (_("using a bit field width of zero"));
-	      exp->X_add_number = 0;
-	      exp->X_op = O_constant;
-	    }			/* Implied zero width bitfield.  */
-
-	  if (exp->X_op != O_constant)
-	    {
-	      *input_line_pointer = '\0';
-	      as_bad (_("field width \"%s\" too complex for a bitfield"), hold);
-	      *input_line_pointer = ':';
-	      demand_empty_rest_of_line ();
-	      return;
-	    }			/* Too complex.  */
-
-	  if ((width = exp->X_add_number) > (BITS_PER_CHAR * nbytes))
-	    {
-	      as_warn (ngettext ("field width %lu too big to fit in %d byte:"
-				 " truncated to %d bits",
-				 "field width %lu too big to fit in %d bytes:"
-				 " truncated to %d bits",
-				 nbytes),
-		       width, nbytes, (BITS_PER_CHAR * nbytes));
-	      width = BITS_PER_CHAR * nbytes;
-	    }			/* Too big.  */
-
-	  if (width > bits_available)
-	    {
-	      /* FIXME-SOMEDAY: backing up and reparsing is wasteful.  */
-	      input_line_pointer = hold;
-	      exp->X_add_number = value;
-	      break;
-	    }			/* Won't fit.  */
-
-	  /* Skip ':'.  */
-	  hold = ++input_line_pointer;
-
-	  (void) expression (exp);
-	  if (exp->X_op != O_constant)
-	    {
-	      char cache = *input_line_pointer;
-
-	      *input_line_pointer = '\0';
-	      as_bad (_("field value \"%s\" too complex for a bitfield"), hold);
-	      *input_line_pointer = cache;
-	      demand_empty_rest_of_line ();
-	      return;
-	    }			/* Too complex.  */
-
-	  value |= ((~(-(1 << width)) & exp->X_add_number)
-		    << ((BITS_PER_CHAR * nbytes) - bits_available));
-
-	  if ((bits_available -= width) == 0
-	      || is_it_end_of_statement ()
-	      || *input_line_pointer != ',')
-	    {
-	      break;
-	    }			/* All the bitfields we're gonna get.  */
-
-	  hold = ++input_line_pointer;
-	  (void) expression (exp);
-	}
-
-      exp->X_add_number = value;
-      exp->X_op = O_constant;
-      exp->X_unsigned = 1;
-      exp->X_extrabit = 0;
-    }
-}
-
-#endif /* BITFIELD_CONS_EXPRESSIONS */
-
 /* Handle an MRI style string expression.  */
 
 #ifdef TC_M68K
diff --git a/gas/symbols.c b/gas/symbols.c
index d16e804..08a708b 100644
--- a/gas/symbols.c
+++ b/gas/symbols.c
@@ -407,8 +407,7 @@ colon (/* Just seen "x:" - rattle symbols & frags.  */
 		}
 	      else
 		{
-#if (!defined (OBJ_AOUT) && !defined (OBJ_MAYBE_AOUT) \
-     && !defined (OBJ_BOUT) && !defined (OBJ_MAYBE_BOUT))
+#if (!defined (OBJ_AOUT) && !defined (OBJ_MAYBE_AOUT))
 		  static const char *od_buf = "";
 #else
 		  char od_buf[100];
diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp
index d828d4d..0355a03 100644
--- a/gas/testsuite/gas/all/gas.exp
+++ b/gas/testsuite/gas/all/gas.exp
@@ -106,7 +106,7 @@ case $target_triplet in {
     default {
 	# Some targets don't manage to resolve BFD_RELOC_8 for constants.
 	setup_xfail "alpha*-*-*" "*c30*-*-*" "*c4x*-*-*" \
-	    "d\[13\]0v*-*-*" "i860-*-*" \
+	    "d\[13\]0v*-*-*" \
 	    "nds32*-*-*" "pdp11-*-*" "xtensa*-*-*"
 	run_dump_test forward
     }
@@ -335,8 +335,7 @@ if {   ([istarget *-*-coff*] && ![istarget arm*-*-coff] && ![istarget *c4x*-*-co
      || [istarget i*86-*-cygwin*] \
      || [istarget x86_64-*-mingw*] \
      || [istarget i*86-*-*nt] \
-     || [istarget i*86-*-interix*] \
-     || ([istarget i960-*-vxworks5.*] && ![istarget i960-*-vxworks5.0*]) } {
+     || [istarget i*86-*-interix*] } {
     run_dump_test cofftag
 }
 
@@ -413,10 +412,7 @@ if { ![istarget "powerpc*-*-*"] && ![istarget "rs6000*-*-*"] && ![istarget "s390
     run_dump_test byte
 }
 
-# .quad is 16 bytes on i960.
-if { ![istarget "i960-*-*"] } {
-    run_dump_test quad
-}
+run_dump_test quad
 
 # som doesn't use .data section.
 case $target_triplet in {
@@ -467,9 +463,6 @@ case $target_triplet in {
     { "mmix-*-*" } {
 	set nop_type 5
     }
-    { "i960-*-*" } {
-	set nop_type 4
-    }
     { "i370-*-*" } {
 	set nop_type 3
     }
diff --git a/gas/testsuite/gas/i860/README.i860 b/gas/testsuite/gas/i860/README.i860
deleted file mode 100644
index 47feaa4..0000000
--- a/gas/testsuite/gas/i860/README.i860
+++ /dev/null
@@ -1,39 +0,0 @@
-
-Testsuite for the i860 version of the GNU assembler
----------------------------------------------------
-
-This is a simple testsuite for the i860 assembler.  It currently
-consists mostly of testcases for checking that every instruction is
-parsed correctly and that correct object code is generated (these
-are called "blah.s").  The files called "blah-err.s" test for error
-conditions.
-
-The suite includes testcases for the base i860XR instruction set as well
-as the enhanced i860XP instructions and control registers.
-
-The expected results files were generated using the UNIX System V/i860
-Release 4 vendor assembler (/usr/ccs/bin/as -V reports version
-"Standard C Development Environment  (SCDE) 5.0 12/08/89").  This
-way GAS/i860 is tested against a known good assembler.
-
-TODO:
- - Relocation testing is basically non-existent.
- - pst.d (pixel store) is the only instruction with no testcase.
- - Some pseudo instructions need testcases (mov, all pfmov, etc.).
- - More tests for dual instruction mode: check that dual mode has a
-   proper pair (FLOP/core) of instructions, and other error conditions.
- - Most current testcases use the default AT&T/SVR4 syntax; a few simple
-   tests of the Intel syntax should be added to prevent bitrot (including
-   relocatable expression syntax, etc).  Test file dual03.s uses Intel
-   syntax lightly (i.e., register names without '%' prefix).
-
-Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help.
-
-Known testsuite failures:
-  - none.
-
-Copyright (C) 2012-2018 Free Software Foundation, Inc.
-
-Copying and distribution of this file, with or without modification,
-are permitted in any medium without royalty provided the copyright
-notice and this notice are preserved.
diff --git a/gas/testsuite/gas/i860/bitwise.d b/gas/testsuite/gas/i860/bitwise.d
deleted file mode 100644
index 59954a4..0000000
--- a/gas/testsuite/gas/i860/bitwise.d
+++ /dev/null
@@ -1,141 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 bitwise
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 22 c0 	and	%r0,%r1,%sp
-   4:	00 18 85 c0 	and	%fp,%r4,%r5
-   8:	00 30 e8 c0 	and	%r6,%r7,%r8
-   c:	00 48 4b c1 	and	%r9,%r10,%r11
-  10:	00 60 ae c1 	and	%r12,%r13,%r14
-  14:	00 78 11 c2 	and	%r15,%r16,%r17
-  18:	00 90 74 c2 	and	%r18,%r19,%r20
-  1c:	00 a8 d7 c2 	and	%r21,%r22,%r23
-  20:	00 c0 3a c3 	and	%r24,%r25,%r26
-  24:	00 d8 9d c3 	and	%r27,%r28,%r29
-  28:	00 f0 e0 c3 	and	%r30,%r31,%r0
-  2c:	00 00 22 d0 	andnot	%r0,%r1,%sp
-  30:	00 18 85 d0 	andnot	%fp,%r4,%r5
-  34:	00 30 e8 d0 	andnot	%r6,%r7,%r8
-  38:	00 48 4b d1 	andnot	%r9,%r10,%r11
-  3c:	00 60 ae d1 	andnot	%r12,%r13,%r14
-  40:	00 78 11 d2 	andnot	%r15,%r16,%r17
-  44:	00 90 74 d2 	andnot	%r18,%r19,%r20
-  48:	00 a8 d7 d2 	andnot	%r21,%r22,%r23
-  4c:	00 c0 3a d3 	andnot	%r24,%r25,%r26
-  50:	00 d8 9d d3 	andnot	%r27,%r28,%r29
-  54:	00 f0 e0 d3 	andnot	%r30,%r31,%r0
-  58:	00 00 22 e0 	or	%r0,%r1,%sp
-  5c:	00 18 85 e0 	or	%fp,%r4,%r5
-  60:	00 30 e8 e0 	or	%r6,%r7,%r8
-  64:	00 48 4b e1 	or	%r9,%r10,%r11
-  68:	00 60 ae e1 	or	%r12,%r13,%r14
-  6c:	00 78 11 e2 	or	%r15,%r16,%r17
-  70:	00 90 74 e2 	or	%r18,%r19,%r20
-  74:	00 a8 d7 e2 	or	%r21,%r22,%r23
-  78:	00 c0 3a e3 	or	%r24,%r25,%r26
-  7c:	00 d8 9d e3 	or	%r27,%r28,%r29
-  80:	00 f0 e0 e3 	or	%r30,%r31,%r0
-  84:	00 00 22 f0 	xor	%r0,%r1,%sp
-  88:	00 18 85 f0 	xor	%fp,%r4,%r5
-  8c:	00 30 e8 f0 	xor	%r6,%r7,%r8
-  90:	00 48 4b f1 	xor	%r9,%r10,%r11
-  94:	00 60 ae f1 	xor	%r12,%r13,%r14
-  98:	00 78 11 f2 	xor	%r15,%r16,%r17
-  9c:	00 90 74 f2 	xor	%r18,%r19,%r20
-  a0:	00 a8 d7 f2 	xor	%r21,%r22,%r23
-  a4:	00 c0 3a f3 	xor	%r24,%r25,%r26
-  a8:	00 d8 9d f3 	xor	%r27,%r28,%r29
-  ac:	00 f0 e0 f3 	xor	%r30,%r31,%r0
-  b0:	00 00 22 c4 	and	0x0000,%r1,%sp
-  b4:	00 20 85 c4 	and	0x2000,%r4,%r5
-  b8:	f5 13 e8 c4 	and	0x13f5,%r7,%r8
-  bc:	00 80 4b c5 	and	0x8000,%r10,%r11
-  c0:	e8 fd ae c5 	and	0xfde8,%r13,%r14
-  c4:	ff ff 11 c6 	and	0xffff,%r16,%r17
-  c8:	ff ff 74 c6 	and	0xffff,%r19,%r20
-  cc:	cd ab d7 c6 	and	0xabcd,%r22,%r23
-  d0:	34 12 3a c7 	and	0x1234,%r25,%r26
-  d4:	00 00 9d c7 	and	0x0000,%r28,%r29
-  d8:	03 00 e0 c7 	and	0x0003,%r31,%r0
-  dc:	01 00 22 cc 	andh	0x0001,%r1,%sp
-  e0:	01 20 85 cc 	andh	0x2001,%r4,%r5
-  e4:	f6 13 e8 cc 	andh	0x13f6,%r7,%r8
-  e8:	01 80 4b cd 	andh	0x8001,%r10,%r11
-  ec:	e9 fd ae cd 	andh	0xfde9,%r13,%r14
-  f0:	ff ff 11 ce 	andh	0xffff,%r16,%r17
-  f4:	ff ff 74 ce 	andh	0xffff,%r19,%r20
-  f8:	cd ab d7 ce 	andh	0xabcd,%r22,%r23
-  fc:	34 12 3a cf 	andh	0x1234,%r25,%r26
- 100:	00 00 9d cf 	andh	0x0000,%r28,%r29
- 104:	03 00 e0 cf 	andh	0x0003,%r31,%r0
- 108:	00 00 22 d4 	andnot	0x0000,%r1,%sp
- 10c:	00 20 85 d4 	andnot	0x2000,%r4,%r5
- 110:	f5 13 e8 d4 	andnot	0x13f5,%r7,%r8
- 114:	00 80 4b d5 	andnot	0x8000,%r10,%r11
- 118:	e8 fd ae d5 	andnot	0xfde8,%r13,%r14
- 11c:	ff ff 11 d6 	andnot	0xffff,%r16,%r17
- 120:	ff ff 74 d6 	andnot	0xffff,%r19,%r20
- 124:	cd ab d7 d6 	andnot	0xabcd,%r22,%r23
- 128:	34 12 3a d7 	andnot	0x1234,%r25,%r26
- 12c:	00 00 9d d7 	andnot	0x0000,%r28,%r29
- 130:	03 00 e0 d7 	andnot	0x0003,%r31,%r0
- 134:	01 00 22 dc 	andnoth	0x0001,%r1,%sp
- 138:	01 20 85 dc 	andnoth	0x2001,%r4,%r5
- 13c:	f6 13 e8 dc 	andnoth	0x13f6,%r7,%r8
- 140:	01 80 4b dd 	andnoth	0x8001,%r10,%r11
- 144:	e9 fd ae dd 	andnoth	0xfde9,%r13,%r14
- 148:	ff ff 11 de 	andnoth	0xffff,%r16,%r17
- 14c:	ff ff 74 de 	andnoth	0xffff,%r19,%r20
- 150:	cd ab d7 de 	andnoth	0xabcd,%r22,%r23
- 154:	34 12 3a df 	andnoth	0x1234,%r25,%r26
- 158:	00 00 9d df 	andnoth	0x0000,%r28,%r29
- 15c:	03 00 e0 df 	andnoth	0x0003,%r31,%r0
- 160:	00 00 22 e4 	or	0x0000,%r1,%sp
- 164:	01 00 85 e4 	or	0x0001,%r4,%r5
- 168:	02 00 e8 e4 	or	0x0002,%r7,%r8
- 16c:	03 00 4b e5 	or	0x0003,%r10,%r11
- 170:	e8 fd ae e5 	or	0xfde8,%r13,%r14
- 174:	ff ff 11 e6 	or	0xffff,%r16,%r17
- 178:	ff ff 74 e6 	or	0xffff,%r19,%r20
- 17c:	cd ab d7 e6 	or	0xabcd,%r22,%r23
- 180:	34 12 3a e7 	or	0x1234,%r25,%r26
- 184:	00 00 9d e7 	or	0x0000,%r28,%r29
- 188:	03 00 e0 e7 	or	0x0003,%r31,%r0
- 18c:	00 00 22 ec 	orh	0x0000,%r1,%sp
- 190:	01 00 85 ec 	orh	0x0001,%r4,%r5
- 194:	02 00 e8 ec 	orh	0x0002,%r7,%r8
- 198:	03 00 4b ed 	orh	0x0003,%r10,%r11
- 19c:	e8 fd ae ed 	orh	0xfde8,%r13,%r14
- 1a0:	ff ff 11 ee 	orh	0xffff,%r16,%r17
- 1a4:	ff ff 74 ee 	orh	0xffff,%r19,%r20
- 1a8:	cd ab d7 ee 	orh	0xabcd,%r22,%r23
- 1ac:	34 12 3a ef 	orh	0x1234,%r25,%r26
- 1b0:	00 00 9d ef 	orh	0x0000,%r28,%r29
- 1b4:	03 00 e0 ef 	orh	0x0003,%r31,%r0
- 1b8:	00 00 22 f4 	xor	0x0000,%r1,%sp
- 1bc:	01 00 85 f4 	xor	0x0001,%r4,%r5
- 1c0:	02 00 e8 f4 	xor	0x0002,%r7,%r8
- 1c4:	03 00 4b f5 	xor	0x0003,%r10,%r11
- 1c8:	e8 fd ae f5 	xor	0xfde8,%r13,%r14
- 1cc:	ff ff 11 f6 	xor	0xffff,%r16,%r17
- 1d0:	ff ff 74 f6 	xor	0xffff,%r19,%r20
- 1d4:	cd ab d7 f6 	xor	0xabcd,%r22,%r23
- 1d8:	34 12 3a f7 	xor	0x1234,%r25,%r26
- 1dc:	00 00 9d f7 	xor	0x0000,%r28,%r29
- 1e0:	03 00 e0 f7 	xor	0x0003,%r31,%r0
- 1e4:	00 00 22 fc 	xorh	0x0000,%r1,%sp
- 1e8:	01 00 85 fc 	xorh	0x0001,%r4,%r5
- 1ec:	02 00 e8 fc 	xorh	0x0002,%r7,%r8
- 1f0:	03 00 4b fd 	xorh	0x0003,%r10,%r11
- 1f4:	e8 fd ae fd 	xorh	0xfde8,%r13,%r14
- 1f8:	ff ff 11 fe 	xorh	0xffff,%r16,%r17
- 1fc:	ff ff 74 fe 	xorh	0xffff,%r19,%r20
- 200:	cd ab d7 fe 	xorh	0xabcd,%r22,%r23
- 204:	34 12 3a ff 	xorh	0x1234,%r25,%r26
- 208:	00 00 9d ff 	xorh	0x0000,%r28,%r29
- 20c:	03 00 e0 ff 	xorh	0x0003,%r31,%r0
diff --git a/gas/testsuite/gas/i860/bitwise.s b/gas/testsuite/gas/i860/bitwise.s
deleted file mode 100644
index 531c787..0000000
--- a/gas/testsuite/gas/i860/bitwise.s
+++ /dev/null
@@ -1,150 +0,0 @@
-# and, andh, andnot, andnoth, or, orh, xor, xorh 
-
-	.text
-
-	# Register forms (high variants do not have register forms).
-	and	%r0,%r1,%r2
-	and	%r3,%r4,%r5
-	and	%r6,%r7,%r8
-	and	%r9,%r10,%r11
-	and	%r12,%r13,%r14
-	and	%r15,%r16,%r17
-	and	%r18,%r19,%r20
-	and	%r21,%r22,%r23
-	and	%r24,%r25,%r26
-	and	%r27,%r28,%r29
-	and	%r30,%r31,%r0
-
-	andnot	%r0,%r1,%r2
-	andnot	%r3,%r4,%r5
-	andnot	%r6,%r7,%r8
-	andnot	%r9,%r10,%r11
-	andnot	%r12,%r13,%r14
-	andnot	%r15,%r16,%r17
-	andnot	%r18,%r19,%r20
-	andnot	%r21,%r22,%r23
-	andnot	%r24,%r25,%r26
-	andnot	%r27,%r28,%r29
-	andnot	%r30,%r31,%r0
-
-	or	%r0,%r1,%r2
-	or	%r3,%r4,%r5
-	or	%r6,%r7,%r8
-	or	%r9,%r10,%r11
-	or	%r12,%r13,%r14
-	or	%r15,%r16,%r17
-	or	%r18,%r19,%r20
-	or	%r21,%r22,%r23
-	or	%r24,%r25,%r26
-	or	%r27,%r28,%r29
-	or	%r30,%r31,%r0
-
-	xor	%r0,%r1,%r2
-	xor	%r3,%r4,%r5
-	xor	%r6,%r7,%r8
-	xor	%r9,%r10,%r11
-	xor	%r12,%r13,%r14
-	xor	%r15,%r16,%r17
-	xor	%r18,%r19,%r20
-	xor	%r21,%r22,%r23
-	xor	%r24,%r25,%r26
-	xor	%r27,%r28,%r29
-	xor	%r30,%r31,%r0
-
-	# Immediate forms (all)
-	and	0,%r1,%r2
-	and	8192,%r4,%r5
-	and	5109,%r7,%r8
-	and	32768,%r10,%r11
-	and	65000,%r13,%r14
-	and	65535,%r16,%r17
-	and	0xffff,%r19,%r20
-	and	0xabcd,%r22,%r23
-	and	0x1234,%r25,%r26
-	and	0x0,%r28,%r29
-	and	0x3,%r31,%r0
-
-	andh	1,%r1,%r2
-	andh	8193,%r4,%r5
-	andh	5110,%r7,%r8
-	andh	32769,%r10,%r11
-	andh	65001,%r13,%r14
-	andh	65535,%r16,%r17
-	andh	0xffff,%r19,%r20
-	andh	0xabcd,%r22,%r23
-	andh	0x1234,%r25,%r26
-	andh	0x0,%r28,%r29
-	andh	0x3,%r31,%r0
-
-	andnot	0,%r1,%r2
-	andnot	8192,%r4,%r5
-	andnot	5109,%r7,%r8
-	andnot	32768,%r10,%r11
-	andnot	65000,%r13,%r14
-	andnot	65535,%r16,%r17
-	andnot	0xffff,%r19,%r20
-	andnot	0xabcd,%r22,%r23
-	andnot	0x1234,%r25,%r26
-	andnot	0x0,%r28,%r29
-	andnot	0x3,%r31,%r0
-
-	andnoth	1,%r1,%r2
-	andnoth	8193,%r4,%r5
-	andnoth	5110,%r7,%r8
-	andnoth	32769,%r10,%r11
-	andnoth	65001,%r13,%r14
-	andnoth	65535,%r16,%r17
-	andnoth	0xffff,%r19,%r20
-	andnoth	0xabcd,%r22,%r23
-	andnoth	0x1234,%r25,%r26
-	andnoth	0x0,%r28,%r29
-	andnoth	0x3,%r31,%r0
-
-	or	0,%r1,%r2
-	or	1,%r4,%r5
-	or	2,%r7,%r8
-	or	3,%r10,%r11
-	or	65000,%r13,%r14
-	or	65535,%r16,%r17
-	or	0xffff,%r19,%r20
-	or	0xabcd,%r22,%r23
-	or	0x1234,%r25,%r26
-	or	0x0,%r28,%r29
-	or	0x3,%r31,%r0
-
-	orh	0,%r1,%r2
-	orh	1,%r4,%r5
-	orh	2,%r7,%r8
-	orh	3,%r10,%r11
-	orh	65000,%r13,%r14
-	orh	65535,%r16,%r17
-	orh	0xffff,%r19,%r20
-	orh	0xabcd,%r22,%r23
-	orh	0x1234,%r25,%r26
-	orh	0x0,%r28,%r29
-	orh	0x3,%r31,%r0
-
-	xor	0,%r1,%r2
-	xor	1,%r4,%r5
-	xor	2,%r7,%r8
-	xor	3,%r10,%r11
-	xor	65000,%r13,%r14
-	xor	65535,%r16,%r17
-	xor	0xffff,%r19,%r20
-	xor	0xabcd,%r22,%r23
-	xor	0x1234,%r25,%r26
-	xor	0x0,%r28,%r29
-	xor	0x3,%r31,%r0
-
-	xorh	0,%r1,%r2
-	xorh	1,%r4,%r5
-	xorh	2,%r7,%r8
-	xorh	3,%r10,%r11
-	xorh	65000,%r13,%r14
-	xorh	65535,%r16,%r17
-	xorh	0xffff,%r19,%r20
-	xorh	0xabcd,%r22,%r23
-	xorh	0x1234,%r25,%r26
-	xorh	0x0,%r28,%r29
-	xorh	0x3,%r31,%r0
-
diff --git a/gas/testsuite/gas/i860/branch.d b/gas/testsuite/gas/i860/branch.d
deleted file mode 100644
index eba23d6..0000000
--- a/gas/testsuite/gas/i860/branch.d
+++ /dev/null
@@ -1,81 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 branch
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-00000000 <.text>:
-   0:	3d 00 20 b4 	bla	%r0,%r1,0x000000f8	// 0xf8
-   4:	00 00 00 a0 	shl	%r0,%r0,%r0
-   8:	3d 28 e0 b7 	bla	%r5,%r31,0x00000100	// 0x100
-   c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  10:	39 b8 00 b6 	bla	%r23,%r16,0x000000f8	// 0xf8
-  14:	00 00 00 a0 	shl	%r0,%r0,%r0
-  18:	39 20 60 b6 	bla	%r4,%r19,0x00000100	// 0x100
-  1c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  20:	00 00 00 40 	bri	%r0
-  24:	00 00 00 a0 	shl	%r0,%r0,%r0
-  28:	00 08 00 40 	bri	%r1
-  2c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  30:	00 f8 00 40 	bri	%r31
-  34:	00 00 00 a0 	shl	%r0,%r0,%r0
-  38:	00 08 00 40 	bri	%r1
-  3c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  40:	00 60 00 40 	bri	%r12
-  44:	00 00 00 a0 	shl	%r0,%r0,%r0
-  48:	00 98 00 40 	bri	%r19
-  4c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  50:	02 00 00 4c 	calli	%r0
-  54:	00 00 00 a0 	shl	%r0,%r0,%r0
-  58:	02 08 00 4c 	calli	%r1
-  5c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  60:	02 f8 00 4c 	calli	%r31
-  64:	00 00 00 a0 	shl	%r0,%r0,%r0
-  68:	02 28 00 4c 	calli	%r5
-  6c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  70:	02 b0 00 4c 	calli	%r22
-  74:	00 00 00 a0 	shl	%r0,%r0,%r0
-  78:	02 48 00 4c 	calli	%r9
-  7c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  80:	1d 00 00 68 	br	0x000000f8	// 0xf8
-  84:	00 00 00 a0 	shl	%r0,%r0,%r0
-  88:	1d 00 00 68 	br	0x00000100	// 0x100
-  8c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  90:	00 00 00 68 	br	0x00000094	// 0x94
-			90: R_860_PC26	some_fake_extern
-  94:	00 00 00 a0 	shl	%r0,%r0,%r0
-  98:	17 00 00 6c 	call	0x000000f8	// 0xf8
-  9c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a0:	17 00 00 6c 	call	0x00000100	// 0x100
-  a4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a8:	00 00 00 6c 	call	0x000000ac	// 0xac
-			a8: R_860_PC26	some_fake_extern
-  ac:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b0:	02 00 00 70 	bc	0x000000bc	// 0xbc
-  b4:	10 00 00 70 	bc	0x000000f8	// 0xf8
-  b8:	00 00 00 70 	bc	0x000000bc	// 0xbc
-			b8: R_860_PC26	some_fake_extern
-  bc:	ff ff ff 77 	bc.t	0x000000bc	// 0xbc
-  c0:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c4:	0c 00 00 74 	bc.t	0x000000f8	// 0xf8
-  c8:	00 00 00 a0 	shl	%r0,%r0,%r0
-  cc:	00 00 00 74 	bc.t	0x000000d0	// 0xd0
-			cc: R_860_PC26	some_fake_extern
-  d0:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d4:	02 00 00 78 	bnc	0x000000e0	// 0xe0
-  d8:	07 00 00 78 	bnc	0x000000f8	// 0xf8
-  dc:	00 00 00 78 	bnc	0x000000e0	// 0xe0
-			dc: R_860_PC26	some_fake_extern
-  e0:	ff ff ff 7f 	bnc.t	0x000000e0	// 0xe0
-  e4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e8:	03 00 00 7c 	bnc.t	0x000000f8	// 0xf8
-  ec:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f0:	00 00 00 7c 	bnc.t	0x000000f4	// 0xf4
-			f0: R_860_PC26	some_fake_extern
-  f4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f8:	00 00 00 a0 	shl	%r0,%r0,%r0
-  fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 100:	00 00 00 a0 	shl	%r0,%r0,%r0
- 104:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/branch.s b/gas/testsuite/gas/i860/branch.s
deleted file mode 100644
index 3df2758..0000000
--- a/gas/testsuite/gas/i860/branch.s
+++ /dev/null
@@ -1,85 +0,0 @@
-# Branches and calls
-
-	.text
-
-	bla	%r0,%r1,.Lsome_label1
-	nop
-	bla	%r5,%r31,.Lsome_label2
-	nop
-	bla	%r23,%r16,.Lsome_label1
-	nop
-	bla	%r4,%r19,.Lsome_label2
-	nop
-
-	bri	%r0	
-	nop
-	bri	%r1	
-	nop
-	bri	%r31	
-	nop
-	bri	%r1	
-	nop
-	bri	%r12	
-	nop
-	bri	%r19	
-	nop
-
-	calli	%r0	
-	nop
-	calli	%r1	
-	nop
-	calli	%r31	
-	nop
-	calli	%r5	
-	nop
-	calli	%r22	
-	nop
-	calli	%r9	
-	nop
-
-	br	.Lsome_label1
-	nop
-	br	.Lsome_label2
-	nop
-	br	some_fake_extern
-	nop
-
-	call	.Lcall_me_now
-	nop
-	call	.Lcall_me_anytime
-	nop
-	call	some_fake_extern
-	nop
-
-	bc	.+12
-	bc	.Lsome_label1
-	bc	some_fake_extern
-
-	bc.t	.+0
-	nop
-	bc.t	.Lsome_label1
-	nop
-	bc.t	some_fake_extern
-	nop
-
-	bnc	.+12
-	bnc	.Lsome_label1
-	bnc	some_fake_extern
-
-	bnc.t	.+0
-	nop
-	bnc.t	.Lsome_label1
-	nop
-	bnc.t	some_fake_extern
-	nop
-
-
-.Lsome_label1:
-.Lcall_me_now:
-	nop
-	nop
-.Lsome_label2:
-.Lcall_me_anytime:
-	nop
-	nop
-
diff --git a/gas/testsuite/gas/i860/bte.d b/gas/testsuite/gas/i860/bte.d
deleted file mode 100644
index a8f4404..0000000
--- a/gas/testsuite/gas/i860/bte.d
+++ /dev/null
@@ -1,62 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 bte/btne
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <some_label-0xb8>:
-   0:	2d 00 e0 57 	btne	0,%r31,0x000000b8	// b8 <some_label>
-   4:	2c 08 a0 57 	btne	1,%r29,0x000000b8	// b8 <some_label>
-   8:	2b 10 60 57 	btne	2,%r27,0x000000b8	// b8 <some_label>
-   c:	2a 18 20 57 	btne	3,%r25,0x000000b8	// b8 <some_label>
-  10:	29 50 e0 56 	btne	10,%r23,0x000000b8	// b8 <some_label>
-  14:	28 58 a0 56 	btne	11,%r21,0x000000b8	// b8 <some_label>
-  18:	27 60 60 56 	btne	12,%r19,0x000000b8	// b8 <some_label>
-  1c:	26 e8 20 56 	btne	29,%r17,0x000000b8	// b8 <some_label>
-  20:	25 f0 00 56 	btne	30,%r16,0x000000b8	// b8 <some_label>
-  24:	24 f8 00 55 	btne	31,%r8,0x000000b8	// b8 <some_label>
-  28:	00 78 00 54 	btne	15,%r0,0x0000002c	// 2c <some_label-0x8c>
-			28: R_860_PC16	some_fake_extern
-  2c:	22 00 e0 5f 	bte	0,%r31,0x000000b8	// b8 <some_label>
-  30:	21 08 a0 5f 	bte	1,%r29,0x000000b8	// b8 <some_label>
-  34:	20 10 60 5f 	bte	2,%r27,0x000000b8	// b8 <some_label>
-  38:	1f 18 20 5f 	bte	3,%r25,0x000000b8	// b8 <some_label>
-  3c:	1e 50 e0 5e 	bte	10,%r23,0x000000b8	// b8 <some_label>
-  40:	1d 58 a0 5e 	bte	11,%r21,0x000000b8	// b8 <some_label>
-  44:	1c 60 60 5e 	bte	12,%r19,0x000000b8	// b8 <some_label>
-  48:	1b e8 20 5e 	bte	29,%r17,0x000000b8	// b8 <some_label>
-  4c:	1a f0 00 5e 	bte	30,%r16,0x000000b8	// b8 <some_label>
-  50:	19 f8 00 5d 	bte	31,%r8,0x000000b8	// b8 <some_label>
-  54:	00 78 00 5c 	bte	15,%r0,0x00000058	// 58 <some_label-0x60>
-			54: R_860_PC16	some_fake_extern
-  58:	17 00 e0 53 	btne	%r0,%r31,0x000000b8	// b8 <some_label>
-  5c:	16 08 a0 53 	btne	%r1,%r29,0x000000b8	// b8 <some_label>
-  60:	15 10 60 53 	btne	%sp,%r27,0x000000b8	// b8 <some_label>
-  64:	14 18 20 53 	btne	%fp,%r25,0x000000b8	// b8 <some_label>
-  68:	13 50 e0 52 	btne	%r10,%r23,0x000000b8	// b8 <some_label>
-  6c:	12 58 a0 52 	btne	%r11,%r21,0x000000b8	// b8 <some_label>
-  70:	11 60 60 52 	btne	%r12,%r19,0x000000b8	// b8 <some_label>
-  74:	10 e8 20 52 	btne	%r29,%r17,0x000000b8	// b8 <some_label>
-  78:	0f f0 00 52 	btne	%r30,%r16,0x000000b8	// b8 <some_label>
-  7c:	0e f8 00 51 	btne	%r31,%r8,0x000000b8	// b8 <some_label>
-  80:	00 78 00 50 	btne	%r15,%r0,0x00000084	// 84 <some_label-0x34>
-			80: R_860_PC16	some_fake_extern
-  84:	0c 00 e0 5b 	bte	%r0,%r31,0x000000b8	// b8 <some_label>
-  88:	0b 08 a0 5b 	bte	%r1,%r29,0x000000b8	// b8 <some_label>
-  8c:	0a 10 60 5b 	bte	%sp,%r27,0x000000b8	// b8 <some_label>
-  90:	09 18 20 5b 	bte	%fp,%r25,0x000000b8	// b8 <some_label>
-  94:	08 50 e0 5a 	bte	%r10,%r23,0x000000b8	// b8 <some_label>
-  98:	07 58 a0 5a 	bte	%r11,%r21,0x000000b8	// b8 <some_label>
-  9c:	06 60 60 5a 	bte	%r12,%r19,0x000000b8	// b8 <some_label>
-  a0:	05 e8 20 5a 	bte	%r29,%r17,0x000000b8	// b8 <some_label>
-  a4:	04 f0 00 5a 	bte	%r30,%r16,0x000000b8	// b8 <some_label>
-  a8:	03 f8 00 59 	bte	%r31,%r8,0x000000b8	// b8 <some_label>
-  ac:	00 78 00 58 	bte	%r15,%r0,0x000000b0	// b0 <some_label-0x8>
-			ac: R_860_PC16	some_fake_extern
-  b0:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b4:	00 00 00 a0 	shl	%r0,%r0,%r0
-
-000000b8 <some_label>:
-  b8:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/bte.s b/gas/testsuite/gas/i860/bte.s
deleted file mode 100644
index cc6e576..0000000
--- a/gas/testsuite/gas/i860/bte.s
+++ /dev/null
@@ -1,55 +0,0 @@
-# bte, btne
-	.text
-
-	btne	0,%r31,some_label
-	btne	1,%r29,some_label
-	btne	2,%r27,some_label
-	btne	3,%r25,some_label
-	btne	10,%r23,some_label
-	btne	11,%r21,some_label
-	btne	12,%r19,some_label
-	btne	29,%r17,some_label
-	btne	30,%r16,some_label
-	btne	31,%r8,some_label
-	btne	15,%r0,some_fake_extern
-
-	bte	0,%r31,some_label
-	bte	1,%r29,some_label
-	bte	2,%r27,some_label
-	bte	3,%r25,some_label
-	bte	10,%r23,some_label
-	bte	11,%r21,some_label
-	bte	12,%r19,some_label
-	bte	29,%r17,some_label
-	bte	30,%r16,some_label
-	bte	31,%r8,some_label
-	bte	15,%r0,some_fake_extern
-
-	btne	%r0,%r31,some_label
-	btne	%r1,%r29,some_label
-	btne	%r2,%r27,some_label
-	btne	%r3,%r25,some_label
-	btne	%r10,%r23,some_label
-	btne	%r11,%r21,some_label
-	btne	%r12,%r19,some_label
-	btne	%r29,%r17,some_label
-	btne	%r30,%r16,some_label
-	btne	%r31,%r8,some_label
-	btne	%r15,%r0,some_fake_extern
-
-	bte	%r0,%r31,some_label
-	bte	%r1,%r29,some_label
-	bte	%r2,%r27,some_label
-	bte	%r3,%r25,some_label
-	bte	%r10,%r23,some_label
-	bte	%r11,%r21,some_label
-	bte	%r12,%r19,some_label
-	bte	%r29,%r17,some_label
-	bte	%r30,%r16,some_label
-	bte	%r31,%r8,some_label
-	bte	%r15,%r0,some_fake_extern
-
-	nop
-	nop
-some_label:
-	nop	
diff --git a/gas/testsuite/gas/i860/dir-align01.d b/gas/testsuite/gas/i860/dir-align01.d
deleted file mode 100644
index bc4f677..0000000
--- a/gas/testsuite/gas/i860/dir-align01.d
+++ /dev/null
@@ -1,17 +0,0 @@
-#as:
-#objdump: -d
-#name: i860 dir-align01
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 20 a6 90 	adds	%r4,%r5,%r6
-   4:	00 00 00 a0 	shl	%r0,%r0,%r0
-   8:	00 00 00 a0 	shl	%r0,%r0,%r0
-   c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  10:	00 50 6c 91 	adds	%r10,%r11,%r12
-  14:	a1 b1 1a 4b 	fmlow.dd	%f22,%f24,%f26
-  18:	30 74 f0 49 	pfadd.ss	%f14,%f15,%f16
-  1c:	b0 8c 54 4a 	pfadd.sd	%f17,%f18,%f20
diff --git a/gas/testsuite/gas/i860/dir-align01.s b/gas/testsuite/gas/i860/dir-align01.s
deleted file mode 100644
index 595eb3f..0000000
--- a/gas/testsuite/gas/i860/dir-align01.s
+++ /dev/null
@@ -1,11 +0,0 @@
-# Test that .text section alignments use nops (0xA0000000) to fill
-# rather than 0.
-	.text
-	adds	%r4,%r5,%r6
-	.align 16
-	adds	%r10,%r11,%r12
-        fmlow.dd        %f22,%f24,%f26
-        pfadd.ss        %f14,%f15,%f16
-        pfadd.sd        %f17,%f18,%f20
-
-
diff --git a/gas/testsuite/gas/i860/dir-intel01.d b/gas/testsuite/gas/i860/dir-intel01.d
deleted file mode 100644
index 0951bf3..0000000
--- a/gas/testsuite/gas/i860/dir-intel01.d
+++ /dev/null
@@ -1,19 +0,0 @@
-#as: -mintel-syntax
-#objdump: -d
-#name: i860 dir-intel01
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 a0 	shl	%r0,%r0,%r0
-   4:	00 00 00 a0 	shl	%r0,%r0,%r0
-   8:	30 02 22 48 	d.fadd.ss	%f0,%f1,%f2
-   c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  10:	b0 12 64 48 	d.fadd.sd	%f2,%f3,%f4
-  14:	00 00 00 a0 	shl	%r0,%r0,%r0
-  18:	b0 33 0a 49 	d.fadd.dd	%f6,%f8,%f10
-  1c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  20:	00 00 00 a0 	shl	%r0,%r0,%r0
-  24:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/dir-intel01.s b/gas/testsuite/gas/i860/dir-intel01.s
deleted file mode 100644
index 21aa685..0000000
--- a/gas/testsuite/gas/i860/dir-intel01.s
+++ /dev/null
@@ -1,19 +0,0 @@
-// Intel assembler directives:
-// Test that the .dual and .enddual directives are recognized and
-// function (i.e., that the dual bits are set properly).
-
-	.text
-
-	nop
-	nop
-	.dual
-        fadd.ss       f0,f1,f2
-        nop
-        fadd.sd       f2,f3,f4
-        nop
-        fadd.dd       f6,f8,f10
-        nop
-	.enddual
-	nop
-	nop
-
diff --git a/gas/testsuite/gas/i860/dir-intel02.d b/gas/testsuite/gas/i860/dir-intel02.d
deleted file mode 100644
index f053967..0000000
--- a/gas/testsuite/gas/i860/dir-intel02.d
+++ /dev/null
@@ -1,15 +0,0 @@
-#as: -mintel-syntax
-#objdump: -d
-#name: i860 dir-intel02
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	34 12 1f ec 	orh	0x1234,%r0,%r31
-   4:	78 56 f8 e7 	or	0x5678,%r31,%r24
-   8:	00 c0 28 91 	adds	%r24,%r9,%r8
-   c:	f0 f0 05 ec 	orh	0xf0f0,%r0,%r5
-  10:	5a 5a b8 e4 	or	0x5a5a,%r5,%r24
-  14:	00 c0 28 91 	adds	%r24,%r9,%r8
diff --git a/gas/testsuite/gas/i860/dir-intel02.s b/gas/testsuite/gas/i860/dir-intel02.s
deleted file mode 100644
index a1a1613..0000000
--- a/gas/testsuite/gas/i860/dir-intel02.s
+++ /dev/null
@@ -1,13 +0,0 @@
-// Intel assembler directives:
-// Test that the .atmp directive is recognized and functions.
-
-	.text
-
-	.atmp r31
-	or	0x12345678,r0,r24
-	adds	r24,r9,r8
-
-	.atmp r5
-	or	0xf0f05a5a,r0,r24
-	adds	r24,r9,r8
-
diff --git a/gas/testsuite/gas/i860/dir-intel03-err.l b/gas/testsuite/gas/i860/dir-intel03-err.l
deleted file mode 100644
index b826128..0000000
--- a/gas/testsuite/gas/i860/dir-intel03-err.l
+++ /dev/null
@@ -1,5 +0,0 @@
-.*: Assembler messages:
-.*:8: Error: Directive .atmp available only with -mintel-syntax option
-.*:8: Error: junk at end of line, first unrecognized character is `r'
-.*:10: Error: Directive .dual available only with -mintel-syntax option
-.*:13: Error: Directive .enddual available only with -mintel-syntax option
diff --git a/gas/testsuite/gas/i860/dir-intel03-err.s b/gas/testsuite/gas/i860/dir-intel03-err.s
deleted file mode 100644
index b8b0790..0000000
--- a/gas/testsuite/gas/i860/dir-intel03-err.s
+++ /dev/null
@@ -1,14 +0,0 @@
-# Intel assembler directives:
-# The .dual, .enddual, and .atmp directives are valid only
-# in Intel syntax mode.  Check that we issue an error if in
-# AT&T/SVR4 mode.
-
-	.text
-
-	.atmp r31
-
-	.dual
-	fsub.ss	%f22,%f21,%f13
-	nop
-	.enddual
-
diff --git a/gas/testsuite/gas/i860/dual01.d b/gas/testsuite/gas/i860/dual01.d
deleted file mode 100644
index ee182e0..0000000
--- a/gas/testsuite/gas/i860/dual01.d
+++ /dev/null
@@ -1,21 +0,0 @@
-#as:
-#objdump: -d
-#name: i860 dual01
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 a0 	shl	%r0,%r0,%r0
-   4:	00 00 00 a0 	shl	%r0,%r0,%r0
-   8:	b0 47 4c 49 	d.pfadd.dd	%f8,%f10,%f12
-   c:	00 28 c6 90 	adds	%r5,%r6,%r6
-  10:	b0 47 4c 49 	d.pfadd.dd	%f8,%f10,%f12
-  14:	10 00 58 25 	fld.d	16\(%r10\),%f24
-  18:	00 02 00 b0 	d.shrd	%r0,%r0,%r0
-  1c:	08 00 48 25 	fld.d	8\(%r10\),%f8
-  20:	00 02 00 b0 	d.shrd	%r0,%r0,%r0
-  24:	00 00 50 25 	fld.d	0\(%r10\),%f16
-  28:	00 00 00 a0 	shl	%r0,%r0,%r0
-  2c:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/dual01.s b/gas/testsuite/gas/i860/dual01.s
deleted file mode 100644
index e7aa271..0000000
--- a/gas/testsuite/gas/i860/dual01.s
+++ /dev/null
@@ -1,17 +0,0 @@
-# Test fnop's dual bit (all other floating point operations have their dual
-# bit tested in their individual test files).
-
-	.text
-	.align 8
-	nop
-	nop
-        d.pfadd.dd      %f8,%f10,%f12
-        adds	%r5,%r6,%r6
-        d.pfadd.dd      %f8,%f10,%f12
-        fld.d   16(%r10),%f24
-        d.fnop
-        fld.d   8(%r10),%f8
-        d.fnop
-        fld.d   0(%r10),%f16
-	nop
-	nop
diff --git a/gas/testsuite/gas/i860/dual02-err.l b/gas/testsuite/gas/i860/dual02-err.l
deleted file mode 100644
index d43d73e..0000000
--- a/gas/testsuite/gas/i860/dual02-err.l
+++ /dev/null
@@ -1,2 +0,0 @@
-.*: Assembler messages:
-.*:7: Error: 'd\.fadd\.ss' must be 8-byte aligned
diff --git a/gas/testsuite/gas/i860/dual02-err.s b/gas/testsuite/gas/i860/dual02-err.s
deleted file mode 100644
index 05d1835..0000000
--- a/gas/testsuite/gas/i860/dual02-err.s
+++ /dev/null
@@ -1,9 +0,0 @@
-# Dual-mode pairs must be aligned on an 8-byte boundary.  This tests
-# that an error is reported if not properly aligned.
-
-	.text
-	.align 8
-	nop
-	d.fadd.ss	%f3,%f5,%f7
-	addu	%r4,%r5,%r6
-
diff --git a/gas/testsuite/gas/i860/dual03.d b/gas/testsuite/gas/i860/dual03.d
deleted file mode 100644
index 30c0130f..0000000
--- a/gas/testsuite/gas/i860/dual03.d
+++ /dev/null
@@ -1,53 +0,0 @@
-#as: -mintel-syntax
-#objdump: -d
-#name: i860 dual03
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <L1-0x20>:
-   0:	00 00 14 22 	fld.d	%r0\(%r16\),%f20
-   4:	fe ff 15 94 	adds	-2,%r0,%r21
-   8:	30 06 00 48 	d.pfadd.ss	%f0,%f0,%f0
-   c:	fa ff 31 96 	adds	-6,%r17,%r17
-  10:	30 06 00 48 	d.pfadd.ss	%f0,%f0,%f0
-  14:	02 a8 20 b6 	bla	%r21,%r17,0x00000020	// 20 <L1>
-  18:	30 06 00 48 	d.pfadd.ss	%f0,%f0,%f0
-  1c:	09 00 16 26 	fld.d	8\(%r16\)\+\+,%f22
-
-00000020 <L1>:
-  20:	30 a6 de 4b 	d.pfadd.ss	%f20,%f30,%f30
-  24:	06 a8 20 b6 	bla	%r21,%r17,0x00000040	// 40 <L2>
-  28:	30 ae ff 4b 	d.pfadd.ss	%f21,%f31,%f31
-  2c:	09 00 14 26 	fld.d	8\(%r16\)\+\+,%f20
-  30:	30 a6 de 4b 	d.pfadd.ss	%f20,%f30,%f30
-  34:	0a 00 00 68 	br	0x00000060	// 60 <S>
-  38:	30 ae ff 4b 	d.pfadd.ss	%f21,%f31,%f31
-  3c:	00 00 00 a0 	shl	%r0,%r0,%r0
-
-00000040 <L2>:
-  40:	30 b6 de 4b 	d.pfadd.ss	%f22,%f30,%f30
-  44:	f6 af 3f b6 	bla	%r21,%r17,0x00000020	// 20 <L1>
-  48:	30 be ff 4b 	d.pfadd.ss	%f23,%f31,%f31
-  4c:	09 00 16 26 	fld.d	8\(%r16\)\+\+,%f22
-  50:	30 a6 de 4b 	d.pfadd.ss	%f20,%f30,%f30
-  54:	00 00 00 a0 	shl	%r0,%r0,%r0
-  58:	30 ae ff 4b 	d.pfadd.ss	%f21,%f31,%f31
-  5c:	00 00 00 a0 	shl	%r0,%r0,%r0
-
-00000060 <S>:
-  60:	30 b4 de 4b 	pfadd.ss	%f22,%f30,%f30
-  64:	fc ff 15 94 	adds	-4,%r0,%r21
-  68:	30 bc ff 4b 	pfadd.ss	%f23,%f31,%f31
-  6c:	02 a8 20 5a 	bte	%r21,%r17,0x00000078	// 78 <DONE>
-  70:	0b 00 14 26 	fld.l	8\(%r16\)\+\+,%f20
-  74:	30 a4 de 4b 	pfadd.ss	%f20,%f30,%f30
-
-00000078 <DONE>:
-  78:	30 04 1e 48 	pfadd.ss	%f0,%f0,%f30
-  7c:	30 f4 ff 4b 	pfadd.ss	%f30,%f31,%f31
-  80:	30 04 1e 48 	pfadd.ss	%f0,%f0,%f30
-  84:	30 04 00 48 	pfadd.ss	%f0,%f0,%f0
-  88:	30 04 1f 48 	pfadd.ss	%f0,%f0,%f31
-  8c:	30 f0 f0 4b 	fadd.ss	%f30,%f31,%f16
diff --git a/gas/testsuite/gas/i860/dual03.s b/gas/testsuite/gas/i860/dual03.s
deleted file mode 100644
index 96c3134..0000000
--- a/gas/testsuite/gas/i860/dual03.s
+++ /dev/null
@@ -1,46 +0,0 @@
-// A larger dual-mode test, from the programmer's reference manual.
-// This uses Intel syntax, as in the manual.
-
-// Single-precision vector sum
-	fld.d	r0(r16),f20
-	mov	-2,r21
-	d.pfadd.ss	f0,f0,f0
-	adds	-6,r17,r17
-	d.pfadd.ss	f0,f0,f0
-	bla	r21,r17,L1
-	d.pfadd.ss	f0,f0,f0
-	fld.d	8(r16)++,f22
-L1:
-	d.pfadd.ss	f20,f30,f30
-	bla	r21,r17,L2
-	d.pfadd.ss	f21,f31,f31
-	fld.d	8(r16)++,f20
-	d.pfadd.ss	f20,f30,f30
-	br	S
-	d.pfadd.ss	f21,f31,f31
-	nop
-L2:
-	d.pfadd.ss	f22,f30,f30
-	bla	r21,r17,L1
-	d.pfadd.ss	f23,f31,f31
-	fld.d	8(r16)++,f22
-	d.pfadd.ss	f20,f30,f30
-	nop
-	d.pfadd.ss	f21,f31,f31
-	nop
-S:
-	pfadd.ss	f22,f30,f30
-	mov	-4,r21
-	pfadd.ss	f23,f31,f31
-	bte	r21,r17,DONE
-	fld.l	8(r16)++,f20
-	pfadd.ss	f20,f30,f30
-DONE:
-	pfadd.ss	f0,f0,f30
-	pfadd.ss	f30,f31,f31
-	pfadd.ss	f0,f0,f30
-	pfadd.ss	f0,f0,f0
-	pfadd.ss	f0,f0,f31
-	fadd.ss		f30,f31,f16
-
-	
diff --git a/gas/testsuite/gas/i860/fldst01.d b/gas/testsuite/gas/i860/fldst01.d
deleted file mode 100644
index b404d3d..0000000
--- a/gas/testsuite/gas/i860/fldst01.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst01 (fld.l)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	02 00 00 24 	fld.l	0\(%r0\),%f0
-   4:	7e 00 3f 24 	fld.l	124\(%r1\),%f31
-   8:	02 01 5e 24 	fld.l	256\(%sp\),%f30
-   c:	02 02 7d 24 	fld.l	512\(%fp\),%f29
-  10:	02 04 9c 24 	fld.l	1024\(%r4\),%f28
-  14:	02 10 bb 24 	fld.l	4096\(%r5\),%f27
-  18:	02 20 da 24 	fld.l	8192\(%r6\),%f26
-  1c:	02 40 f9 24 	fld.l	16384\(%r7\),%f25
-  20:	fe 7f f9 24 	fld.l	32764\(%r7\),%f25
-  24:	02 80 f7 24 	fld.l	-32768\(%r7\),%f23
-  28:	02 c0 02 25 	fld.l	-16384\(%r8\),%f2
-  2c:	02 e0 23 25 	fld.l	-8192\(%r9\),%f3
-  30:	02 f0 48 25 	fld.l	-4096\(%r10\),%f8
-  34:	02 fc 69 25 	fld.l	-1024\(%r11\),%f9
-  38:	06 fe 8c 25 	fld.l	-508\(%r12\),%f12
-  3c:	0a ff b3 25 	fld.l	-248\(%r13\),%f19
-  40:	fe ff d5 25 	fld.l	-4\(%r14\),%f21
-  44:	03 00 00 24 	fld.l	0\(%r0\)\+\+,%f0
-  48:	7f 00 21 24 	fld.l	124\(%r1\)\+\+,%f1
-  4c:	03 01 42 24 	fld.l	256\(%sp\)\+\+,%f2
-  50:	03 02 63 24 	fld.l	512\(%fp\)\+\+,%f3
-  54:	03 04 84 24 	fld.l	1024\(%r4\)\+\+,%f4
-  58:	03 10 a5 24 	fld.l	4096\(%r5\)\+\+,%f5
-  5c:	03 20 c6 24 	fld.l	8192\(%r6\)\+\+,%f6
-  60:	03 40 e7 24 	fld.l	16384\(%r7\)\+\+,%f7
-  64:	ff 7f e8 24 	fld.l	32764\(%r7\)\+\+,%f8
-  68:	03 80 e9 24 	fld.l	-32768\(%r7\)\+\+,%f9
-  6c:	03 c0 0a 25 	fld.l	-16384\(%r8\)\+\+,%f10
-  70:	03 e0 2b 25 	fld.l	-8192\(%r9\)\+\+,%f11
-  74:	03 f0 4c 25 	fld.l	-4096\(%r10\)\+\+,%f12
-  78:	03 fc 6d 25 	fld.l	-1024\(%r11\)\+\+,%f13
-  7c:	07 fe 8e 25 	fld.l	-508\(%r12\)\+\+,%f14
-  80:	0b ff af 25 	fld.l	-248\(%r13\)\+\+,%f15
-  84:	ff ff d0 25 	fld.l	-4\(%r14\)\+\+,%f16
-  88:	02 28 00 20 	fld.l	%r5\(%r0\),%f0
-  8c:	02 30 3f 20 	fld.l	%r6\(%r1\),%f31
-  90:	02 38 5e 20 	fld.l	%r7\(%sp\),%f30
-  94:	02 40 7d 20 	fld.l	%r8\(%fp\),%f29
-  98:	02 48 9c 20 	fld.l	%r9\(%r4\),%f28
-  9c:	02 00 bb 20 	fld.l	%r0\(%r5\),%f27
-  a0:	02 08 da 20 	fld.l	%r1\(%r6\),%f26
-  a4:	02 60 f9 20 	fld.l	%r12\(%r7\),%f25
-  a8:	02 68 18 21 	fld.l	%r13\(%r8\),%f24
-  ac:	02 70 37 21 	fld.l	%r14\(%r9\),%f23
-  b0:	02 78 56 21 	fld.l	%r15\(%r10\),%f22
-  b4:	02 80 75 21 	fld.l	%r16\(%r11\),%f21
-  b8:	02 88 94 21 	fld.l	%r17\(%r12\),%f20
-  bc:	02 e0 b3 21 	fld.l	%r28\(%r13\),%f19
-  c0:	02 f8 d2 21 	fld.l	%r31\(%r14\),%f18
-  c4:	03 28 00 20 	fld.l	%r5\(%r0\)\+\+,%f0
-  c8:	03 30 21 20 	fld.l	%r6\(%r1\)\+\+,%f1
-  cc:	03 38 42 20 	fld.l	%r7\(%sp\)\+\+,%f2
-  d0:	03 40 63 20 	fld.l	%r8\(%fp\)\+\+,%f3
-  d4:	03 48 84 20 	fld.l	%r9\(%r4\)\+\+,%f4
-  d8:	03 00 a5 20 	fld.l	%r0\(%r5\)\+\+,%f5
-  dc:	03 08 c6 20 	fld.l	%r1\(%r6\)\+\+,%f6
-  e0:	03 60 e7 20 	fld.l	%r12\(%r7\)\+\+,%f7
-  e4:	03 68 08 21 	fld.l	%r13\(%r8\)\+\+,%f8
-  e8:	03 70 29 21 	fld.l	%r14\(%r9\)\+\+,%f9
-  ec:	03 78 4a 21 	fld.l	%r15\(%r10\)\+\+,%f10
-  f0:	03 80 6b 21 	fld.l	%r16\(%r11\)\+\+,%f11
-  f4:	03 88 8c 21 	fld.l	%r17\(%r12\)\+\+,%f12
-  f8:	03 e0 ad 21 	fld.l	%r28\(%r13\)\+\+,%f13
-  fc:	03 f8 ce 21 	fld.l	%r31\(%r14\)\+\+,%f14
diff --git a/gas/testsuite/gas/i860/fldst01.s b/gas/testsuite/gas/i860/fldst01.s
deleted file mode 100644
index 109cba8..0000000
--- a/gas/testsuite/gas/i860/fldst01.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# fld.l (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	fld.l	0(%r0),%f0
-	fld.l	124(%r1),%f31
-	fld.l	256(%r2),%f30
-	fld.l	512(%r3),%f29
-	fld.l	1024(%r4),%f28
-	fld.l	4096(%r5),%f27
-	fld.l	8192(%r6),%f26
-	fld.l	16384(%r7),%f25
-	fld.l	32764(%r7),%f25
-	fld.l	-32768(%r7),%f23
-	fld.l	-16384(%r8),%f2
-	fld.l	-8192(%r9),%f3
-	fld.l	-4096(%r10),%f8
-	fld.l	-1024(%r11),%f9
-	fld.l	-508(%r12),%f12
-	fld.l	-248(%r13),%f19
-	fld.l	-4(%r14),%f21
-
-	# Immediate form, with auto-increment.
-	fld.l	0(%r0)++,%f0
-	fld.l	124(%r1)++,%f1
-	fld.l	256(%r2)++,%f2
-	fld.l	512(%r3)++,%f3
-	fld.l	1024(%r4)++,%f4
-	fld.l	4096(%r5)++,%f5
-	fld.l	8192(%r6)++,%f6
-	fld.l	16384(%r7)++,%f7
-	fld.l	32764(%r7)++,%f8
-	fld.l	-32768(%r7)++,%f9
-	fld.l	-16384(%r8)++,%f10
-	fld.l	-8192(%r9)++,%f11
-	fld.l	-4096(%r10)++,%f12
-	fld.l	-1024(%r11)++,%f13
-	fld.l	-508(%r12)++,%f14
-	fld.l	-248(%r13)++,%f15
-	fld.l	-4(%r14)++,%f16
-
-	# Index form, no auto-increment.
-	fld.l	%r5(%r0),%f0
-	fld.l	%r6(%r1),%f31
-	fld.l	%r7(%r2),%f30
-	fld.l	%r8(%r3),%f29
-	fld.l	%r9(%r4),%f28
-	fld.l	%r0(%r5),%f27
-	fld.l	%r1(%r6),%f26
-	fld.l	%r12(%r7),%f25
-	fld.l	%r13(%r8),%f24
-	fld.l	%r14(%r9),%f23
-	fld.l	%r15(%r10),%f22
-	fld.l	%r16(%r11),%f21
-	fld.l	%r17(%r12),%f20
-	fld.l	%r28(%r13),%f19
-	fld.l	%r31(%r14),%f18
-
-	# Index form, with auto-increment.
-	fld.l	%r5(%r0)++,%f0
-	fld.l	%r6(%r1)++,%f1
-	fld.l	%r7(%r2)++,%f2
-	fld.l	%r8(%r3)++,%f3
-	fld.l	%r9(%r4)++,%f4
-	fld.l	%r0(%r5)++,%f5
-	fld.l	%r1(%r6)++,%f6
-	fld.l	%r12(%r7)++,%f7
-	fld.l	%r13(%r8)++,%f8
-	fld.l	%r14(%r9)++,%f9
-	fld.l	%r15(%r10)++,%f10
-	fld.l	%r16(%r11)++,%f11
-	fld.l	%r17(%r12)++,%f12
-	fld.l	%r28(%r13)++,%f13
-	fld.l	%r31(%r14)++,%f14
-
diff --git a/gas/testsuite/gas/i860/fldst02.d b/gas/testsuite/gas/i860/fldst02.d
deleted file mode 100644
index 7a0db94..0000000
--- a/gas/testsuite/gas/i860/fldst02.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst02 (fld.d)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 24 	fld.d	0\(%r0\),%f0
-   4:	80 00 3e 24 	fld.d	128\(%r1\),%f30
-   8:	00 01 5c 24 	fld.d	256\(%sp\),%f28
-   c:	00 02 7a 24 	fld.d	512\(%fp\),%f26
-  10:	00 04 98 24 	fld.d	1024\(%r4\),%f24
-  14:	00 10 b6 24 	fld.d	4096\(%r5\),%f22
-  18:	00 20 d4 24 	fld.d	8192\(%r6\),%f20
-  1c:	00 40 f2 24 	fld.d	16384\(%r7\),%f18
-  20:	f8 7f f0 24 	fld.d	32760\(%r7\),%f16
-  24:	00 80 ee 24 	fld.d	-32768\(%r7\),%f14
-  28:	00 c0 0c 25 	fld.d	-16384\(%r8\),%f12
-  2c:	00 e0 2a 25 	fld.d	-8192\(%r9\),%f10
-  30:	00 f0 48 25 	fld.d	-4096\(%r10\),%f8
-  34:	00 fc 66 25 	fld.d	-1024\(%r11\),%f6
-  38:	00 fe 84 25 	fld.d	-512\(%r12\),%f4
-  3c:	08 ff a2 25 	fld.d	-248\(%r13\),%f2
-  40:	f8 ff c0 25 	fld.d	-8\(%r14\),%f0
-  44:	01 00 00 24 	fld.d	0\(%r0\)\+\+,%f0
-  48:	81 00 22 24 	fld.d	128\(%r1\)\+\+,%f2
-  4c:	01 01 44 24 	fld.d	256\(%sp\)\+\+,%f4
-  50:	01 02 66 24 	fld.d	512\(%fp\)\+\+,%f6
-  54:	01 04 88 24 	fld.d	1024\(%r4\)\+\+,%f8
-  58:	01 10 aa 24 	fld.d	4096\(%r5\)\+\+,%f10
-  5c:	01 20 cc 24 	fld.d	8192\(%r6\)\+\+,%f12
-  60:	01 40 ee 24 	fld.d	16384\(%r7\)\+\+,%f14
-  64:	f9 7f f0 24 	fld.d	32760\(%r7\)\+\+,%f16
-  68:	01 80 f2 24 	fld.d	-32768\(%r7\)\+\+,%f18
-  6c:	01 c0 14 25 	fld.d	-16384\(%r8\)\+\+,%f20
-  70:	01 e0 36 25 	fld.d	-8192\(%r9\)\+\+,%f22
-  74:	01 f0 58 25 	fld.d	-4096\(%r10\)\+\+,%f24
-  78:	01 fc 7a 25 	fld.d	-1024\(%r11\)\+\+,%f26
-  7c:	01 fe 9c 25 	fld.d	-512\(%r12\)\+\+,%f28
-  80:	09 ff be 25 	fld.d	-248\(%r13\)\+\+,%f30
-  84:	f9 ff d0 25 	fld.d	-8\(%r14\)\+\+,%f16
-  88:	00 28 00 20 	fld.d	%r5\(%r0\),%f0
-  8c:	00 30 3e 20 	fld.d	%r6\(%r1\),%f30
-  90:	00 38 5c 20 	fld.d	%r7\(%sp\),%f28
-  94:	00 40 7a 20 	fld.d	%r8\(%fp\),%f26
-  98:	00 48 98 20 	fld.d	%r9\(%r4\),%f24
-  9c:	00 00 b6 20 	fld.d	%r0\(%r5\),%f22
-  a0:	00 08 d4 20 	fld.d	%r1\(%r6\),%f20
-  a4:	00 60 f2 20 	fld.d	%r12\(%r7\),%f18
-  a8:	00 68 10 21 	fld.d	%r13\(%r8\),%f16
-  ac:	00 70 2e 21 	fld.d	%r14\(%r9\),%f14
-  b0:	00 78 4c 21 	fld.d	%r15\(%r10\),%f12
-  b4:	00 80 6a 21 	fld.d	%r16\(%r11\),%f10
-  b8:	00 88 88 21 	fld.d	%r17\(%r12\),%f8
-  bc:	00 e0 a6 21 	fld.d	%r28\(%r13\),%f6
-  c0:	00 f8 c4 21 	fld.d	%r31\(%r14\),%f4
-  c4:	01 28 00 20 	fld.d	%r5\(%r0\)\+\+,%f0
-  c8:	01 30 22 20 	fld.d	%r6\(%r1\)\+\+,%f2
-  cc:	01 38 44 20 	fld.d	%r7\(%sp\)\+\+,%f4
-  d0:	01 40 66 20 	fld.d	%r8\(%fp\)\+\+,%f6
-  d4:	01 48 88 20 	fld.d	%r9\(%r4\)\+\+,%f8
-  d8:	01 00 aa 20 	fld.d	%r0\(%r5\)\+\+,%f10
-  dc:	01 08 cc 20 	fld.d	%r1\(%r6\)\+\+,%f12
-  e0:	01 60 ee 20 	fld.d	%r12\(%r7\)\+\+,%f14
-  e4:	01 68 10 21 	fld.d	%r13\(%r8\)\+\+,%f16
-  e8:	01 70 32 21 	fld.d	%r14\(%r9\)\+\+,%f18
-  ec:	01 78 54 21 	fld.d	%r15\(%r10\)\+\+,%f20
-  f0:	01 80 76 21 	fld.d	%r16\(%r11\)\+\+,%f22
-  f4:	01 88 98 21 	fld.d	%r17\(%r12\)\+\+,%f24
-  f8:	01 e0 ba 21 	fld.d	%r28\(%r13\)\+\+,%f26
-  fc:	01 f8 de 21 	fld.d	%r31\(%r14\)\+\+,%f30
diff --git a/gas/testsuite/gas/i860/fldst02.s b/gas/testsuite/gas/i860/fldst02.s
deleted file mode 100644
index 50b612b..0000000
--- a/gas/testsuite/gas/i860/fldst02.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# fld.d (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	fld.d	0(%r0),%f0
-	fld.d	128(%r1),%f30
-	fld.d	256(%r2),%f28
-	fld.d	512(%r3),%f26
-	fld.d	1024(%r4),%f24
-	fld.d	4096(%r5),%f22
-	fld.d	8192(%r6),%f20
-	fld.d	16384(%r7),%f18
-	fld.d	32760(%r7),%f16
-	fld.d	-32768(%r7),%f14
-	fld.d	-16384(%r8),%f12
-	fld.d	-8192(%r9),%f10
-	fld.d	-4096(%r10),%f8
-	fld.d	-1024(%r11),%f6
-	fld.d	-512(%r12),%f4
-	fld.d	-248(%r13),%f2
-	fld.d	-8(%r14),%f0
-
-	# Immediate form, with auto-increment.
-	fld.d	0(%r0)++,%f0
-	fld.d	128(%r1)++,%f2
-	fld.d	256(%r2)++,%f4
-	fld.d	512(%r3)++,%f6
-	fld.d	1024(%r4)++,%f8
-	fld.d	4096(%r5)++,%f10
-	fld.d	8192(%r6)++,%f12
-	fld.d	16384(%r7)++,%f14
-	fld.d	32760(%r7)++,%f16
-	fld.d	-32768(%r7)++,%f18
-	fld.d	-16384(%r8)++,%f20
-	fld.d	-8192(%r9)++,%f22
-	fld.d	-4096(%r10)++,%f24
-	fld.d	-1024(%r11)++,%f26
-	fld.d	-512(%r12)++,%f28
-	fld.d	-248(%r13)++,%f30
-	fld.d	-8(%r14)++,%f16
-
-	# Index form, no auto-increment.
-	fld.d	%r5(%r0),%f0
-	fld.d	%r6(%r1),%f30
-	fld.d	%r7(%r2),%f28
-	fld.d	%r8(%r3),%f26
-	fld.d	%r9(%r4),%f24
-	fld.d	%r0(%r5),%f22
-	fld.d	%r1(%r6),%f20
-	fld.d	%r12(%r7),%f18
-	fld.d	%r13(%r8),%f16
-	fld.d	%r14(%r9),%f14
-	fld.d	%r15(%r10),%f12
-	fld.d	%r16(%r11),%f10
-	fld.d	%r17(%r12),%f8
-	fld.d	%r28(%r13),%f6
-	fld.d	%r31(%r14),%f4
-
-	# Index form, with auto-increment.
-	fld.d	%r5(%r0)++,%f0
-	fld.d	%r6(%r1)++,%f2
-	fld.d	%r7(%r2)++,%f4
-	fld.d	%r8(%r3)++,%f6
-	fld.d	%r9(%r4)++,%f8
-	fld.d	%r0(%r5)++,%f10
-	fld.d	%r1(%r6)++,%f12
-	fld.d	%r12(%r7)++,%f14
-	fld.d	%r13(%r8)++,%f16
-	fld.d	%r14(%r9)++,%f18
-	fld.d	%r15(%r10)++,%f20
-	fld.d	%r16(%r11)++,%f22
-	fld.d	%r17(%r12)++,%f24
-	fld.d	%r28(%r13)++,%f26
-	fld.d	%r31(%r14)++,%f30
-
diff --git a/gas/testsuite/gas/i860/fldst03.d b/gas/testsuite/gas/i860/fldst03.d
deleted file mode 100644
index 033c904..0000000
--- a/gas/testsuite/gas/i860/fldst03.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst03 (fld.q)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	04 00 00 24 	fld.q	0\(%r0\),%f0
-   4:	84 00 3c 24 	fld.q	128\(%r1\),%f28
-   8:	04 01 58 24 	fld.q	256\(%sp\),%f24
-   c:	04 02 74 24 	fld.q	512\(%fp\),%f20
-  10:	04 04 90 24 	fld.q	1024\(%r4\),%f16
-  14:	04 10 ac 24 	fld.q	4096\(%r5\),%f12
-  18:	04 20 c8 24 	fld.q	8192\(%r6\),%f8
-  1c:	04 40 e4 24 	fld.q	16384\(%r7\),%f4
-  20:	f4 7f e0 24 	fld.q	32752\(%r7\),%f0
-  24:	04 80 fc 24 	fld.q	-32768\(%r7\),%f28
-  28:	04 c0 18 25 	fld.q	-16384\(%r8\),%f24
-  2c:	04 e0 34 25 	fld.q	-8192\(%r9\),%f20
-  30:	04 f0 50 25 	fld.q	-4096\(%r10\),%f16
-  34:	04 fc 6c 25 	fld.q	-1024\(%r11\),%f12
-  38:	04 fe 88 25 	fld.q	-512\(%r12\),%f8
-  3c:	04 ff a4 25 	fld.q	-256\(%r13\),%f4
-  40:	f4 ff c0 25 	fld.q	-16\(%r14\),%f0
-  44:	05 00 00 24 	fld.q	0\(%r0\)\+\+,%f0
-  48:	85 00 24 24 	fld.q	128\(%r1\)\+\+,%f4
-  4c:	05 01 48 24 	fld.q	256\(%sp\)\+\+,%f8
-  50:	05 02 6c 24 	fld.q	512\(%fp\)\+\+,%f12
-  54:	05 04 90 24 	fld.q	1024\(%r4\)\+\+,%f16
-  58:	05 10 b4 24 	fld.q	4096\(%r5\)\+\+,%f20
-  5c:	05 20 d8 24 	fld.q	8192\(%r6\)\+\+,%f24
-  60:	05 40 fc 24 	fld.q	16384\(%r7\)\+\+,%f28
-  64:	f5 7f e0 24 	fld.q	32752\(%r7\)\+\+,%f0
-  68:	05 80 e4 24 	fld.q	-32768\(%r7\)\+\+,%f4
-  6c:	05 c0 08 25 	fld.q	-16384\(%r8\)\+\+,%f8
-  70:	05 e0 2c 25 	fld.q	-8192\(%r9\)\+\+,%f12
-  74:	05 f0 50 25 	fld.q	-4096\(%r10\)\+\+,%f16
-  78:	05 fc 74 25 	fld.q	-1024\(%r11\)\+\+,%f20
-  7c:	05 fe 98 25 	fld.q	-512\(%r12\)\+\+,%f24
-  80:	05 ff bc 25 	fld.q	-256\(%r13\)\+\+,%f28
-  84:	f5 ff d0 25 	fld.q	-16\(%r14\)\+\+,%f16
-  88:	04 28 00 20 	fld.q	%r5\(%r0\),%f0
-  8c:	04 30 34 20 	fld.q	%r6\(%r1\),%f20
-  90:	04 38 50 20 	fld.q	%r7\(%sp\),%f16
-  94:	04 40 6c 20 	fld.q	%r8\(%fp\),%f12
-  98:	04 48 88 20 	fld.q	%r9\(%r4\),%f8
-  9c:	04 00 a4 20 	fld.q	%r0\(%r5\),%f4
-  a0:	04 08 c0 20 	fld.q	%r1\(%r6\),%f0
-  a4:	04 60 fc 20 	fld.q	%r12\(%r7\),%f28
-  a8:	04 68 18 21 	fld.q	%r13\(%r8\),%f24
-  ac:	04 70 34 21 	fld.q	%r14\(%r9\),%f20
-  b0:	04 78 50 21 	fld.q	%r15\(%r10\),%f16
-  b4:	04 80 6c 21 	fld.q	%r16\(%r11\),%f12
-  b8:	04 88 88 21 	fld.q	%r17\(%r12\),%f8
-  bc:	04 e0 a4 21 	fld.q	%r28\(%r13\),%f4
-  c0:	04 f8 c0 21 	fld.q	%r31\(%r14\),%f0
-  c4:	05 28 00 20 	fld.q	%r5\(%r0\)\+\+,%f0
-  c8:	05 30 24 20 	fld.q	%r6\(%r1\)\+\+,%f4
-  cc:	05 38 48 20 	fld.q	%r7\(%sp\)\+\+,%f8
-  d0:	05 40 6c 20 	fld.q	%r8\(%fp\)\+\+,%f12
-  d4:	05 48 90 20 	fld.q	%r9\(%r4\)\+\+,%f16
-  d8:	05 00 b4 20 	fld.q	%r0\(%r5\)\+\+,%f20
-  dc:	05 08 d8 20 	fld.q	%r1\(%r6\)\+\+,%f24
-  e0:	05 60 fc 20 	fld.q	%r12\(%r7\)\+\+,%f28
-  e4:	05 68 00 21 	fld.q	%r13\(%r8\)\+\+,%f0
-  e8:	05 70 24 21 	fld.q	%r14\(%r9\)\+\+,%f4
-  ec:	05 78 48 21 	fld.q	%r15\(%r10\)\+\+,%f8
-  f0:	05 80 6c 21 	fld.q	%r16\(%r11\)\+\+,%f12
-  f4:	05 88 90 21 	fld.q	%r17\(%r12\)\+\+,%f16
-  f8:	05 e0 b4 21 	fld.q	%r28\(%r13\)\+\+,%f20
-  fc:	05 f8 d8 21 	fld.q	%r31\(%r14\)\+\+,%f24
diff --git a/gas/testsuite/gas/i860/fldst03.s b/gas/testsuite/gas/i860/fldst03.s
deleted file mode 100644
index 7259925..0000000
--- a/gas/testsuite/gas/i860/fldst03.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# fld.q (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	fld.q	0(%r0),%f0
-	fld.q	128(%r1),%f28
-	fld.q	256(%r2),%f24
-	fld.q	512(%r3),%f20
-	fld.q	1024(%r4),%f16
-	fld.q	4096(%r5),%f12
-	fld.q	8192(%r6),%f8
-	fld.q	16384(%r7),%f4
-	fld.q	32752(%r7),%f0
-	fld.q	-32768(%r7),%f28
-	fld.q	-16384(%r8),%f24
-	fld.q	-8192(%r9),%f20
-	fld.q	-4096(%r10),%f16
-	fld.q	-1024(%r11),%f12
-	fld.q	-512(%r12),%f8
-	fld.q	-256(%r13),%f4
-	fld.q	-16(%r14),%f0
-
-	# Immediate form, with auto-increment.
-	fld.q	0(%r0)++,%f0
-	fld.q	128(%r1)++,%f4
-	fld.q	256(%r2)++,%f8
-	fld.q	512(%r3)++,%f12
-	fld.q	1024(%r4)++,%f16
-	fld.q	4096(%r5)++,%f20
-	fld.q	8192(%r6)++,%f24
-	fld.q	16384(%r7)++,%f28
-	fld.q	32752(%r7)++,%f0
-	fld.q	-32768(%r7)++,%f4
-	fld.q	-16384(%r8)++,%f8
-	fld.q	-8192(%r9)++,%f12
-	fld.q	-4096(%r10)++,%f16
-	fld.q	-1024(%r11)++,%f20
-	fld.q	-512(%r12)++,%f24
-	fld.q	-256(%r13)++,%f28
-	fld.q	-16(%r14)++,%f16
-
-	# Index form, no auto-increment.
-	fld.q	%r5(%r0),%f0
-	fld.q	%r6(%r1),%f20
-	fld.q	%r7(%r2),%f16
-	fld.q	%r8(%r3),%f12
-	fld.q	%r9(%r4),%f8
-	fld.q	%r0(%r5),%f4
-	fld.q	%r1(%r6),%f0
-	fld.q	%r12(%r7),%f28
-	fld.q	%r13(%r8),%f24
-	fld.q	%r14(%r9),%f20
-	fld.q	%r15(%r10),%f16
-	fld.q	%r16(%r11),%f12
-	fld.q	%r17(%r12),%f8
-	fld.q	%r28(%r13),%f4
-	fld.q	%r31(%r14),%f0
-
-	# Index form, with auto-increment.
-	fld.q	%r5(%r0)++,%f0
-	fld.q	%r6(%r1)++,%f4
-	fld.q	%r7(%r2)++,%f8
-	fld.q	%r8(%r3)++,%f12
-	fld.q	%r9(%r4)++,%f16
-	fld.q	%r0(%r5)++,%f20
-	fld.q	%r1(%r6)++,%f24
-	fld.q	%r12(%r7)++,%f28
-	fld.q	%r13(%r8)++,%f0
-	fld.q	%r14(%r9)++,%f4
-	fld.q	%r15(%r10)++,%f8
-	fld.q	%r16(%r11)++,%f12
-	fld.q	%r17(%r12)++,%f16
-	fld.q	%r28(%r13)++,%f20
-	fld.q	%r31(%r14)++,%f24
-
diff --git a/gas/testsuite/gas/i860/fldst04.d b/gas/testsuite/gas/i860/fldst04.d
deleted file mode 100644
index 32559ce..0000000
--- a/gas/testsuite/gas/i860/fldst04.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst04 (fst.l)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	02 00 00 2c 	fst.l	%f0,0\(%r0\)
-   4:	7e 00 3f 2c 	fst.l	%f31,124\(%r1\)
-   8:	02 01 5e 2c 	fst.l	%f30,256\(%sp\)
-   c:	02 02 7d 2c 	fst.l	%f29,512\(%fp\)
-  10:	02 04 9c 2c 	fst.l	%f28,1024\(%r4\)
-  14:	02 10 bb 2c 	fst.l	%f27,4096\(%r5\)
-  18:	02 20 da 2c 	fst.l	%f26,8192\(%r6\)
-  1c:	02 40 f9 2c 	fst.l	%f25,16384\(%r7\)
-  20:	fe 7f f9 2c 	fst.l	%f25,32764\(%r7\)
-  24:	02 80 f7 2c 	fst.l	%f23,-32768\(%r7\)
-  28:	02 c0 02 2d 	fst.l	%f2,-16384\(%r8\)
-  2c:	02 e0 23 2d 	fst.l	%f3,-8192\(%r9\)
-  30:	02 f0 48 2d 	fst.l	%f8,-4096\(%r10\)
-  34:	02 fc 69 2d 	fst.l	%f9,-1024\(%r11\)
-  38:	06 fe 8c 2d 	fst.l	%f12,-508\(%r12\)
-  3c:	0a ff b3 2d 	fst.l	%f19,-248\(%r13\)
-  40:	fe ff d5 2d 	fst.l	%f21,-4\(%r14\)
-  44:	03 00 00 2c 	fst.l	%f0,0\(%r0\)\+\+
-  48:	7f 00 21 2c 	fst.l	%f1,124\(%r1\)\+\+
-  4c:	03 01 42 2c 	fst.l	%f2,256\(%sp\)\+\+
-  50:	03 02 63 2c 	fst.l	%f3,512\(%fp\)\+\+
-  54:	03 04 84 2c 	fst.l	%f4,1024\(%r4\)\+\+
-  58:	03 10 a5 2c 	fst.l	%f5,4096\(%r5\)\+\+
-  5c:	03 20 c6 2c 	fst.l	%f6,8192\(%r6\)\+\+
-  60:	03 40 e7 2c 	fst.l	%f7,16384\(%r7\)\+\+
-  64:	ff 7f e8 2c 	fst.l	%f8,32764\(%r7\)\+\+
-  68:	03 80 e9 2c 	fst.l	%f9,-32768\(%r7\)\+\+
-  6c:	03 c0 0a 2d 	fst.l	%f10,-16384\(%r8\)\+\+
-  70:	03 e0 2b 2d 	fst.l	%f11,-8192\(%r9\)\+\+
-  74:	03 f0 4c 2d 	fst.l	%f12,-4096\(%r10\)\+\+
-  78:	03 fc 6d 2d 	fst.l	%f13,-1024\(%r11\)\+\+
-  7c:	07 fe 8e 2d 	fst.l	%f14,-508\(%r12\)\+\+
-  80:	0b ff af 2d 	fst.l	%f15,-248\(%r13\)\+\+
-  84:	ff ff d0 2d 	fst.l	%f16,-4\(%r14\)\+\+
-  88:	02 28 00 28 	fst.l	%f0,%r5\(%r0\)
-  8c:	02 30 3f 28 	fst.l	%f31,%r6\(%r1\)
-  90:	02 38 5e 28 	fst.l	%f30,%r7\(%sp\)
-  94:	02 40 7d 28 	fst.l	%f29,%r8\(%fp\)
-  98:	02 48 9c 28 	fst.l	%f28,%r9\(%r4\)
-  9c:	02 00 bb 28 	fst.l	%f27,%r0\(%r5\)
-  a0:	02 08 da 28 	fst.l	%f26,%r1\(%r6\)
-  a4:	02 60 f9 28 	fst.l	%f25,%r12\(%r7\)
-  a8:	02 68 18 29 	fst.l	%f24,%r13\(%r8\)
-  ac:	02 70 37 29 	fst.l	%f23,%r14\(%r9\)
-  b0:	02 78 56 29 	fst.l	%f22,%r15\(%r10\)
-  b4:	02 80 75 29 	fst.l	%f21,%r16\(%r11\)
-  b8:	02 88 94 29 	fst.l	%f20,%r17\(%r12\)
-  bc:	02 e0 b3 29 	fst.l	%f19,%r28\(%r13\)
-  c0:	02 f8 d2 29 	fst.l	%f18,%r31\(%r14\)
-  c4:	03 28 00 28 	fst.l	%f0,%r5\(%r0\)\+\+
-  c8:	03 30 21 28 	fst.l	%f1,%r6\(%r1\)\+\+
-  cc:	03 38 42 28 	fst.l	%f2,%r7\(%sp\)\+\+
-  d0:	03 40 63 28 	fst.l	%f3,%r8\(%fp\)\+\+
-  d4:	03 48 84 28 	fst.l	%f4,%r9\(%r4\)\+\+
-  d8:	03 00 a5 28 	fst.l	%f5,%r0\(%r5\)\+\+
-  dc:	03 08 c6 28 	fst.l	%f6,%r1\(%r6\)\+\+
-  e0:	03 60 e7 28 	fst.l	%f7,%r12\(%r7\)\+\+
-  e4:	03 68 08 29 	fst.l	%f8,%r13\(%r8\)\+\+
-  e8:	03 70 29 29 	fst.l	%f9,%r14\(%r9\)\+\+
-  ec:	03 78 4a 29 	fst.l	%f10,%r15\(%r10\)\+\+
-  f0:	03 80 6b 29 	fst.l	%f11,%r16\(%r11\)\+\+
-  f4:	03 88 8c 29 	fst.l	%f12,%r17\(%r12\)\+\+
-  f8:	03 e0 ad 29 	fst.l	%f13,%r28\(%r13\)\+\+
-  fc:	03 f8 ce 29 	fst.l	%f14,%r31\(%r14\)\+\+
diff --git a/gas/testsuite/gas/i860/fldst04.s b/gas/testsuite/gas/i860/fldst04.s
deleted file mode 100644
index 7136614..0000000
--- a/gas/testsuite/gas/i860/fldst04.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# fst.l (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	fst.l	%f0,0(%r0)
-	fst.l	%f31,124(%r1)
-	fst.l	%f30,256(%r2)
-	fst.l	%f29,512(%r3)
-	fst.l	%f28,1024(%r4)
-	fst.l	%f27,4096(%r5)
-	fst.l	%f26,8192(%r6)
-	fst.l	%f25,16384(%r7)
-	fst.l	%f25,32764(%r7)
-	fst.l	%f23,-32768(%r7)
-	fst.l	%f2,-16384(%r8)
-	fst.l	%f3,-8192(%r9)
-	fst.l	%f8,-4096(%r10)
-	fst.l	%f9,-1024(%r11)
-	fst.l	%f12,-508(%r12)
-	fst.l	%f19,-248(%r13)
-	fst.l	%f21,-4(%r14)
-
-	# Immediate form, with auto-increment.
-	fst.l	%f0,0(%r0)++
-	fst.l	%f1,124(%r1)++
-	fst.l	%f2,256(%r2)++
-	fst.l	%f3,512(%r3)++
-	fst.l	%f4,1024(%r4)++
-	fst.l	%f5,4096(%r5)++
-	fst.l	%f6,8192(%r6)++
-	fst.l	%f7,16384(%r7)++
-	fst.l	%f8,32764(%r7)++
-	fst.l	%f9,-32768(%r7)++
-	fst.l	%f10,-16384(%r8)++
-	fst.l	%f11,-8192(%r9)++
-	fst.l	%f12,-4096(%r10)++
-	fst.l	%f13,-1024(%r11)++
-	fst.l	%f14,-508(%r12)++
-	fst.l	%f15,-248(%r13)++
-	fst.l	%f16,-4(%r14)++
-
-	# Index form, no auto-increment.
-	fst.l	%f0,%r5(%r0)
-	fst.l	%f31,%r6(%r1)
-	fst.l	%f30,%r7(%r2)
-	fst.l	%f29,%r8(%r3)
-	fst.l	%f28,%r9(%r4)
-	fst.l	%f27,%r0(%r5)
-	fst.l	%f26,%r1(%r6)
-	fst.l	%f25,%r12(%r7)
-	fst.l	%f24,%r13(%r8)
-	fst.l	%f23,%r14(%r9)
-	fst.l	%f22,%r15(%r10)
-	fst.l	%f21,%r16(%r11)
-	fst.l	%f20,%r17(%r12)
-	fst.l	%f19,%r28(%r13)
-	fst.l	%f18,%r31(%r14)
-
-	# Index form, with auto-increment.
-	fst.l	%f0,%r5(%r0)++
-	fst.l	%f1,%r6(%r1)++
-	fst.l	%f2,%r7(%r2)++
-	fst.l	%f3,%r8(%r3)++
-	fst.l	%f4,%r9(%r4)++
-	fst.l	%f5,%r0(%r5)++
-	fst.l	%f6,%r1(%r6)++
-	fst.l	%f7,%r12(%r7)++
-	fst.l	%f8,%r13(%r8)++
-	fst.l	%f9,%r14(%r9)++
-	fst.l	%f10,%r15(%r10)++
-	fst.l	%f11,%r16(%r11)++
-	fst.l	%f12,%r17(%r12)++
-	fst.l	%f13,%r28(%r13)++
-	fst.l	%f14,%r31(%r14)++
-
diff --git a/gas/testsuite/gas/i860/fldst05.d b/gas/testsuite/gas/i860/fldst05.d
deleted file mode 100644
index a6187bf..0000000
--- a/gas/testsuite/gas/i860/fldst05.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst05 (fst.d)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 2c 	fst.d	%f0,0\(%r0\)
-   4:	80 00 3e 2c 	fst.d	%f30,128\(%r1\)
-   8:	00 01 5c 2c 	fst.d	%f28,256\(%sp\)
-   c:	00 02 7a 2c 	fst.d	%f26,512\(%fp\)
-  10:	00 04 98 2c 	fst.d	%f24,1024\(%r4\)
-  14:	00 10 b6 2c 	fst.d	%f22,4096\(%r5\)
-  18:	00 20 d4 2c 	fst.d	%f20,8192\(%r6\)
-  1c:	00 40 f2 2c 	fst.d	%f18,16384\(%r7\)
-  20:	f8 7f f0 2c 	fst.d	%f16,32760\(%r7\)
-  24:	00 80 ee 2c 	fst.d	%f14,-32768\(%r7\)
-  28:	00 c0 0c 2d 	fst.d	%f12,-16384\(%r8\)
-  2c:	00 e0 2a 2d 	fst.d	%f10,-8192\(%r9\)
-  30:	00 f0 48 2d 	fst.d	%f8,-4096\(%r10\)
-  34:	00 fc 66 2d 	fst.d	%f6,-1024\(%r11\)
-  38:	00 fe 84 2d 	fst.d	%f4,-512\(%r12\)
-  3c:	08 ff a2 2d 	fst.d	%f2,-248\(%r13\)
-  40:	f8 ff c0 2d 	fst.d	%f0,-8\(%r14\)
-  44:	01 00 00 2c 	fst.d	%f0,0\(%r0\)\+\+
-  48:	81 00 22 2c 	fst.d	%f2,128\(%r1\)\+\+
-  4c:	01 01 44 2c 	fst.d	%f4,256\(%sp\)\+\+
-  50:	01 02 66 2c 	fst.d	%f6,512\(%fp\)\+\+
-  54:	01 04 88 2c 	fst.d	%f8,1024\(%r4\)\+\+
-  58:	01 10 aa 2c 	fst.d	%f10,4096\(%r5\)\+\+
-  5c:	01 20 cc 2c 	fst.d	%f12,8192\(%r6\)\+\+
-  60:	01 40 ee 2c 	fst.d	%f14,16384\(%r7\)\+\+
-  64:	f9 7f f0 2c 	fst.d	%f16,32760\(%r7\)\+\+
-  68:	01 80 f2 2c 	fst.d	%f18,-32768\(%r7\)\+\+
-  6c:	01 c0 14 2d 	fst.d	%f20,-16384\(%r8\)\+\+
-  70:	01 e0 36 2d 	fst.d	%f22,-8192\(%r9\)\+\+
-  74:	01 f0 58 2d 	fst.d	%f24,-4096\(%r10\)\+\+
-  78:	01 fc 7a 2d 	fst.d	%f26,-1024\(%r11\)\+\+
-  7c:	01 fe 9c 2d 	fst.d	%f28,-512\(%r12\)\+\+
-  80:	09 ff be 2d 	fst.d	%f30,-248\(%r13\)\+\+
-  84:	f9 ff d0 2d 	fst.d	%f16,-8\(%r14\)\+\+
-  88:	00 28 00 28 	fst.d	%f0,%r5\(%r0\)
-  8c:	00 30 3e 28 	fst.d	%f30,%r6\(%r1\)
-  90:	00 38 5c 28 	fst.d	%f28,%r7\(%sp\)
-  94:	00 40 7a 28 	fst.d	%f26,%r8\(%fp\)
-  98:	00 48 98 28 	fst.d	%f24,%r9\(%r4\)
-  9c:	00 00 b6 28 	fst.d	%f22,%r0\(%r5\)
-  a0:	00 08 d4 28 	fst.d	%f20,%r1\(%r6\)
-  a4:	00 60 f2 28 	fst.d	%f18,%r12\(%r7\)
-  a8:	00 68 10 29 	fst.d	%f16,%r13\(%r8\)
-  ac:	00 70 2e 29 	fst.d	%f14,%r14\(%r9\)
-  b0:	00 78 4c 29 	fst.d	%f12,%r15\(%r10\)
-  b4:	00 80 6a 29 	fst.d	%f10,%r16\(%r11\)
-  b8:	00 88 88 29 	fst.d	%f8,%r17\(%r12\)
-  bc:	00 e0 a6 29 	fst.d	%f6,%r28\(%r13\)
-  c0:	00 f8 c4 29 	fst.d	%f4,%r31\(%r14\)
-  c4:	01 28 00 28 	fst.d	%f0,%r5\(%r0\)\+\+
-  c8:	01 30 22 28 	fst.d	%f2,%r6\(%r1\)\+\+
-  cc:	01 38 44 28 	fst.d	%f4,%r7\(%sp\)\+\+
-  d0:	01 40 66 28 	fst.d	%f6,%r8\(%fp\)\+\+
-  d4:	01 48 88 28 	fst.d	%f8,%r9\(%r4\)\+\+
-  d8:	01 00 aa 28 	fst.d	%f10,%r0\(%r5\)\+\+
-  dc:	01 08 cc 28 	fst.d	%f12,%r1\(%r6\)\+\+
-  e0:	01 60 ee 28 	fst.d	%f14,%r12\(%r7\)\+\+
-  e4:	01 68 10 29 	fst.d	%f16,%r13\(%r8\)\+\+
-  e8:	01 70 32 29 	fst.d	%f18,%r14\(%r9\)\+\+
-  ec:	01 78 54 29 	fst.d	%f20,%r15\(%r10\)\+\+
-  f0:	01 80 76 29 	fst.d	%f22,%r16\(%r11\)\+\+
-  f4:	01 88 98 29 	fst.d	%f24,%r17\(%r12\)\+\+
-  f8:	01 e0 ba 29 	fst.d	%f26,%r28\(%r13\)\+\+
-  fc:	01 f8 de 29 	fst.d	%f30,%r31\(%r14\)\+\+
diff --git a/gas/testsuite/gas/i860/fldst05.s b/gas/testsuite/gas/i860/fldst05.s
deleted file mode 100644
index 97032aa..0000000
--- a/gas/testsuite/gas/i860/fldst05.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# fst.d (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	fst.d	%f0,0(%r0)
-	fst.d	%f30,128(%r1)
-	fst.d	%f28,256(%r2)
-	fst.d	%f26,512(%r3)
-	fst.d	%f24,1024(%r4)
-	fst.d	%f22,4096(%r5)
-	fst.d	%f20,8192(%r6)
-	fst.d	%f18,16384(%r7)
-	fst.d	%f16,32760(%r7)
-	fst.d	%f14,-32768(%r7)
-	fst.d	%f12,-16384(%r8)
-	fst.d	%f10,-8192(%r9)
-	fst.d	%f8,-4096(%r10)
-	fst.d	%f6,-1024(%r11)
-	fst.d	%f4,-512(%r12)
-	fst.d	%f2,-248(%r13)
-	fst.d	%f0,-8(%r14)
-
-	# Immediate form, with auto-increment.
-	fst.d	%f0,0(%r0)++
-	fst.d	%f2,128(%r1)++
-	fst.d	%f4,256(%r2)++
-	fst.d	%f6,512(%r3)++
-	fst.d	%f8,1024(%r4)++
-	fst.d	%f10,4096(%r5)++
-	fst.d	%f12,8192(%r6)++
-	fst.d	%f14,16384(%r7)++
-	fst.d	%f16,32760(%r7)++
-	fst.d	%f18,-32768(%r7)++
-	fst.d	%f20,-16384(%r8)++
-	fst.d	%f22,-8192(%r9)++
-	fst.d	%f24,-4096(%r10)++
-	fst.d	%f26,-1024(%r11)++
-	fst.d	%f28,-512(%r12)++
-	fst.d	%f30,-248(%r13)++
-	fst.d	%f16,-8(%r14)++
-
-	# Index form, no auto-increment.
-	fst.d	%f0,%r5(%r0)
-	fst.d	%f30,%r6(%r1)
-	fst.d	%f28,%r7(%r2)
-	fst.d	%f26,%r8(%r3)
-	fst.d	%f24,%r9(%r4)
-	fst.d	%f22,%r0(%r5)
-	fst.d	%f20,%r1(%r6)
-	fst.d	%f18,%r12(%r7)
-	fst.d	%f16,%r13(%r8)
-	fst.d	%f14,%r14(%r9)
-	fst.d	%f12,%r15(%r10)
-	fst.d	%f10,%r16(%r11)
-	fst.d	%f8,%r17(%r12)
-	fst.d	%f6,%r28(%r13)
-	fst.d	%f4,%r31(%r14)
-
-	# Index form, with auto-increment.
-	fst.d	%f0,%r5(%r0)++
-	fst.d	%f2,%r6(%r1)++
-	fst.d	%f4,%r7(%r2)++
-	fst.d	%f6,%r8(%r3)++
-	fst.d	%f8,%r9(%r4)++
-	fst.d	%f10,%r0(%r5)++
-	fst.d	%f12,%r1(%r6)++
-	fst.d	%f14,%r12(%r7)++
-	fst.d	%f16,%r13(%r8)++
-	fst.d	%f18,%r14(%r9)++
-	fst.d	%f20,%r15(%r10)++
-	fst.d	%f22,%r16(%r11)++
-	fst.d	%f24,%r17(%r12)++
-	fst.d	%f26,%r28(%r13)++
-	fst.d	%f30,%r31(%r14)++
-
diff --git a/gas/testsuite/gas/i860/fldst06.d b/gas/testsuite/gas/i860/fldst06.d
deleted file mode 100644
index a1f6c5c..0000000
--- a/gas/testsuite/gas/i860/fldst06.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst06 (fst.q)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	04 00 00 2c 	fst.q	%f0,0\(%r0\)
-   4:	84 00 3c 2c 	fst.q	%f28,128\(%r1\)
-   8:	04 01 58 2c 	fst.q	%f24,256\(%sp\)
-   c:	04 02 74 2c 	fst.q	%f20,512\(%fp\)
-  10:	04 04 90 2c 	fst.q	%f16,1024\(%r4\)
-  14:	04 10 ac 2c 	fst.q	%f12,4096\(%r5\)
-  18:	04 20 c8 2c 	fst.q	%f8,8192\(%r6\)
-  1c:	04 40 e4 2c 	fst.q	%f4,16384\(%r7\)
-  20:	f4 7f e0 2c 	fst.q	%f0,32752\(%r7\)
-  24:	04 80 fc 2c 	fst.q	%f28,-32768\(%r7\)
-  28:	04 c0 18 2d 	fst.q	%f24,-16384\(%r8\)
-  2c:	04 e0 34 2d 	fst.q	%f20,-8192\(%r9\)
-  30:	04 f0 50 2d 	fst.q	%f16,-4096\(%r10\)
-  34:	04 fc 6c 2d 	fst.q	%f12,-1024\(%r11\)
-  38:	04 fe 88 2d 	fst.q	%f8,-512\(%r12\)
-  3c:	04 ff a4 2d 	fst.q	%f4,-256\(%r13\)
-  40:	f4 ff c0 2d 	fst.q	%f0,-16\(%r14\)
-  44:	05 00 00 2c 	fst.q	%f0,0\(%r0\)\+\+
-  48:	85 00 24 2c 	fst.q	%f4,128\(%r1\)\+\+
-  4c:	05 01 48 2c 	fst.q	%f8,256\(%sp\)\+\+
-  50:	05 02 6c 2c 	fst.q	%f12,512\(%fp\)\+\+
-  54:	05 04 90 2c 	fst.q	%f16,1024\(%r4\)\+\+
-  58:	05 10 b4 2c 	fst.q	%f20,4096\(%r5\)\+\+
-  5c:	05 20 d8 2c 	fst.q	%f24,8192\(%r6\)\+\+
-  60:	05 40 fc 2c 	fst.q	%f28,16384\(%r7\)\+\+
-  64:	f5 7f e0 2c 	fst.q	%f0,32752\(%r7\)\+\+
-  68:	05 80 e4 2c 	fst.q	%f4,-32768\(%r7\)\+\+
-  6c:	05 c0 08 2d 	fst.q	%f8,-16384\(%r8\)\+\+
-  70:	05 e0 2c 2d 	fst.q	%f12,-8192\(%r9\)\+\+
-  74:	05 f0 50 2d 	fst.q	%f16,-4096\(%r10\)\+\+
-  78:	05 fc 74 2d 	fst.q	%f20,-1024\(%r11\)\+\+
-  7c:	05 fe 98 2d 	fst.q	%f24,-512\(%r12\)\+\+
-  80:	05 ff bc 2d 	fst.q	%f28,-256\(%r13\)\+\+
-  84:	f5 ff d0 2d 	fst.q	%f16,-16\(%r14\)\+\+
-  88:	04 28 00 28 	fst.q	%f0,%r5\(%r0\)
-  8c:	04 30 34 28 	fst.q	%f20,%r6\(%r1\)
-  90:	04 38 50 28 	fst.q	%f16,%r7\(%sp\)
-  94:	04 40 6c 28 	fst.q	%f12,%r8\(%fp\)
-  98:	04 48 88 28 	fst.q	%f8,%r9\(%r4\)
-  9c:	04 00 a4 28 	fst.q	%f4,%r0\(%r5\)
-  a0:	04 08 c0 28 	fst.q	%f0,%r1\(%r6\)
-  a4:	04 60 fc 28 	fst.q	%f28,%r12\(%r7\)
-  a8:	04 68 18 29 	fst.q	%f24,%r13\(%r8\)
-  ac:	04 70 34 29 	fst.q	%f20,%r14\(%r9\)
-  b0:	04 78 50 29 	fst.q	%f16,%r15\(%r10\)
-  b4:	04 80 6c 29 	fst.q	%f12,%r16\(%r11\)
-  b8:	04 88 88 29 	fst.q	%f8,%r17\(%r12\)
-  bc:	04 e0 a4 29 	fst.q	%f4,%r28\(%r13\)
-  c0:	04 f8 c0 29 	fst.q	%f0,%r31\(%r14\)
-  c4:	05 28 00 28 	fst.q	%f0,%r5\(%r0\)\+\+
-  c8:	05 30 24 28 	fst.q	%f4,%r6\(%r1\)\+\+
-  cc:	05 38 48 28 	fst.q	%f8,%r7\(%sp\)\+\+
-  d0:	05 40 6c 28 	fst.q	%f12,%r8\(%fp\)\+\+
-  d4:	05 48 90 28 	fst.q	%f16,%r9\(%r4\)\+\+
-  d8:	05 00 b4 28 	fst.q	%f20,%r0\(%r5\)\+\+
-  dc:	05 08 d8 28 	fst.q	%f24,%r1\(%r6\)\+\+
-  e0:	05 60 fc 28 	fst.q	%f28,%r12\(%r7\)\+\+
-  e4:	05 68 00 29 	fst.q	%f0,%r13\(%r8\)\+\+
-  e8:	05 70 24 29 	fst.q	%f4,%r14\(%r9\)\+\+
-  ec:	05 78 48 29 	fst.q	%f8,%r15\(%r10\)\+\+
-  f0:	05 80 6c 29 	fst.q	%f12,%r16\(%r11\)\+\+
-  f4:	05 88 90 29 	fst.q	%f16,%r17\(%r12\)\+\+
-  f8:	05 e0 b4 29 	fst.q	%f20,%r28\(%r13\)\+\+
-  fc:	05 f8 d8 29 	fst.q	%f24,%r31\(%r14\)\+\+
diff --git a/gas/testsuite/gas/i860/fldst06.s b/gas/testsuite/gas/i860/fldst06.s
deleted file mode 100644
index 0bb1476..0000000
--- a/gas/testsuite/gas/i860/fldst06.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# fst.q (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	fst.q	%f0,0(%r0)
-	fst.q	%f28,128(%r1)
-	fst.q	%f24,256(%r2)
-	fst.q	%f20,512(%r3)
-	fst.q	%f16,1024(%r4)
-	fst.q	%f12,4096(%r5)
-	fst.q	%f8,8192(%r6)
-	fst.q	%f4,16384(%r7)
-	fst.q	%f0,32752(%r7)
-	fst.q	%f28,-32768(%r7)
-	fst.q	%f24,-16384(%r8)
-	fst.q	%f20,-8192(%r9)
-	fst.q	%f16,-4096(%r10)
-	fst.q	%f12,-1024(%r11)
-	fst.q	%f8,-512(%r12)
-	fst.q	%f4,-256(%r13)
-	fst.q	%f0,-16(%r14)
-
-	# Immediate form, with auto-increment.
-	fst.q	%f0,0(%r0)++
-	fst.q	%f4,128(%r1)++
-	fst.q	%f8,256(%r2)++
-	fst.q	%f12,512(%r3)++
-	fst.q	%f16,1024(%r4)++
-	fst.q	%f20,4096(%r5)++
-	fst.q	%f24,8192(%r6)++
-	fst.q	%f28,16384(%r7)++
-	fst.q	%f0,32752(%r7)++
-	fst.q	%f4,-32768(%r7)++
-	fst.q	%f8,-16384(%r8)++
-	fst.q	%f12,-8192(%r9)++
-	fst.q	%f16,-4096(%r10)++
-	fst.q	%f20,-1024(%r11)++
-	fst.q	%f24,-512(%r12)++
-	fst.q	%f28,-256(%r13)++
-	fst.q	%f16,-16(%r14)++
-
-	# Index form, no auto-increment.
-	fst.q	%f0,%r5(%r0)
-	fst.q	%f20,%r6(%r1)
-	fst.q	%f16,%r7(%r2)
-	fst.q	%f12,%r8(%r3)
-	fst.q	%f8,%r9(%r4)
-	fst.q	%f4,%r0(%r5)
-	fst.q	%f0,%r1(%r6)
-	fst.q	%f28,%r12(%r7)
-	fst.q	%f24,%r13(%r8)
-	fst.q	%f20,%r14(%r9)
-	fst.q	%f16,%r15(%r10)
-	fst.q	%f12,%r16(%r11)
-	fst.q	%f8,%r17(%r12)
-	fst.q	%f4,%r28(%r13)
-	fst.q	%f0,%r31(%r14)
-
-	# Index form, with auto-increment.
-	fst.q	%f0,%r5(%r0)++
-	fst.q	%f4,%r6(%r1)++
-	fst.q	%f8,%r7(%r2)++
-	fst.q	%f12,%r8(%r3)++
-	fst.q	%f16,%r9(%r4)++
-	fst.q	%f20,%r0(%r5)++
-	fst.q	%f24,%r1(%r6)++
-	fst.q	%f28,%r12(%r7)++
-	fst.q	%f0,%r13(%r8)++
-	fst.q	%f4,%r14(%r9)++
-	fst.q	%f8,%r15(%r10)++
-	fst.q	%f12,%r16(%r11)++
-	fst.q	%f16,%r17(%r12)++
-	fst.q	%f20,%r28(%r13)++
-	fst.q	%f24,%r31(%r14)++
-
diff --git a/gas/testsuite/gas/i860/fldst07.d b/gas/testsuite/gas/i860/fldst07.d
deleted file mode 100644
index 4ba66f9..0000000
--- a/gas/testsuite/gas/i860/fldst07.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst07 (pfld.l)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	02 00 00 64 	pfld.l	0\(%r0\),%f0
-   4:	7e 00 3f 64 	pfld.l	124\(%r1\),%f31
-   8:	02 01 5e 64 	pfld.l	256\(%sp\),%f30
-   c:	02 02 7d 64 	pfld.l	512\(%fp\),%f29
-  10:	02 04 9c 64 	pfld.l	1024\(%r4\),%f28
-  14:	02 10 bb 64 	pfld.l	4096\(%r5\),%f27
-  18:	02 20 da 64 	pfld.l	8192\(%r6\),%f26
-  1c:	02 40 f9 64 	pfld.l	16384\(%r7\),%f25
-  20:	fe 7f f9 64 	pfld.l	32764\(%r7\),%f25
-  24:	02 80 f7 64 	pfld.l	-32768\(%r7\),%f23
-  28:	02 c0 02 65 	pfld.l	-16384\(%r8\),%f2
-  2c:	02 e0 23 65 	pfld.l	-8192\(%r9\),%f3
-  30:	02 f0 48 65 	pfld.l	-4096\(%r10\),%f8
-  34:	02 fc 69 65 	pfld.l	-1024\(%r11\),%f9
-  38:	06 fe 8c 65 	pfld.l	-508\(%r12\),%f12
-  3c:	0a ff b3 65 	pfld.l	-248\(%r13\),%f19
-  40:	fe ff d5 65 	pfld.l	-4\(%r14\),%f21
-  44:	03 00 00 64 	pfld.l	0\(%r0\)\+\+,%f0
-  48:	7f 00 21 64 	pfld.l	124\(%r1\)\+\+,%f1
-  4c:	03 01 42 64 	pfld.l	256\(%sp\)\+\+,%f2
-  50:	03 02 63 64 	pfld.l	512\(%fp\)\+\+,%f3
-  54:	03 04 84 64 	pfld.l	1024\(%r4\)\+\+,%f4
-  58:	03 10 a5 64 	pfld.l	4096\(%r5\)\+\+,%f5
-  5c:	03 20 c6 64 	pfld.l	8192\(%r6\)\+\+,%f6
-  60:	03 40 e7 64 	pfld.l	16384\(%r7\)\+\+,%f7
-  64:	ff 7f e8 64 	pfld.l	32764\(%r7\)\+\+,%f8
-  68:	03 80 e9 64 	pfld.l	-32768\(%r7\)\+\+,%f9
-  6c:	03 c0 0a 65 	pfld.l	-16384\(%r8\)\+\+,%f10
-  70:	03 e0 2b 65 	pfld.l	-8192\(%r9\)\+\+,%f11
-  74:	03 f0 4c 65 	pfld.l	-4096\(%r10\)\+\+,%f12
-  78:	03 fc 6d 65 	pfld.l	-1024\(%r11\)\+\+,%f13
-  7c:	07 fe 8e 65 	pfld.l	-508\(%r12\)\+\+,%f14
-  80:	0b ff af 65 	pfld.l	-248\(%r13\)\+\+,%f15
-  84:	ff ff d0 65 	pfld.l	-4\(%r14\)\+\+,%f16
-  88:	02 28 00 60 	pfld.l	%r5\(%r0\),%f0
-  8c:	02 30 3f 60 	pfld.l	%r6\(%r1\),%f31
-  90:	02 38 5e 60 	pfld.l	%r7\(%sp\),%f30
-  94:	02 40 7d 60 	pfld.l	%r8\(%fp\),%f29
-  98:	02 48 9c 60 	pfld.l	%r9\(%r4\),%f28
-  9c:	02 00 bb 60 	pfld.l	%r0\(%r5\),%f27
-  a0:	02 08 da 60 	pfld.l	%r1\(%r6\),%f26
-  a4:	02 60 f9 60 	pfld.l	%r12\(%r7\),%f25
-  a8:	02 68 18 61 	pfld.l	%r13\(%r8\),%f24
-  ac:	02 70 37 61 	pfld.l	%r14\(%r9\),%f23
-  b0:	02 78 56 61 	pfld.l	%r15\(%r10\),%f22
-  b4:	02 80 75 61 	pfld.l	%r16\(%r11\),%f21
-  b8:	02 88 94 61 	pfld.l	%r17\(%r12\),%f20
-  bc:	02 e0 b3 61 	pfld.l	%r28\(%r13\),%f19
-  c0:	02 f8 d2 61 	pfld.l	%r31\(%r14\),%f18
-  c4:	03 28 00 60 	pfld.l	%r5\(%r0\)\+\+,%f0
-  c8:	03 30 21 60 	pfld.l	%r6\(%r1\)\+\+,%f1
-  cc:	03 38 42 60 	pfld.l	%r7\(%sp\)\+\+,%f2
-  d0:	03 40 63 60 	pfld.l	%r8\(%fp\)\+\+,%f3
-  d4:	03 48 84 60 	pfld.l	%r9\(%r4\)\+\+,%f4
-  d8:	03 00 a5 60 	pfld.l	%r0\(%r5\)\+\+,%f5
-  dc:	03 08 c6 60 	pfld.l	%r1\(%r6\)\+\+,%f6
-  e0:	03 60 e7 60 	pfld.l	%r12\(%r7\)\+\+,%f7
-  e4:	03 68 08 61 	pfld.l	%r13\(%r8\)\+\+,%f8
-  e8:	03 70 29 61 	pfld.l	%r14\(%r9\)\+\+,%f9
-  ec:	03 78 4a 61 	pfld.l	%r15\(%r10\)\+\+,%f10
-  f0:	03 80 6b 61 	pfld.l	%r16\(%r11\)\+\+,%f11
-  f4:	03 88 8c 61 	pfld.l	%r17\(%r12\)\+\+,%f12
-  f8:	03 e0 ad 61 	pfld.l	%r28\(%r13\)\+\+,%f13
-  fc:	03 f8 ce 61 	pfld.l	%r31\(%r14\)\+\+,%f14
diff --git a/gas/testsuite/gas/i860/fldst07.s b/gas/testsuite/gas/i860/fldst07.s
deleted file mode 100644
index 410b256..0000000
--- a/gas/testsuite/gas/i860/fldst07.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# pfld.l (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	pfld.l	0(%r0),%f0
-	pfld.l	124(%r1),%f31
-	pfld.l	256(%r2),%f30
-	pfld.l	512(%r3),%f29
-	pfld.l	1024(%r4),%f28
-	pfld.l	4096(%r5),%f27
-	pfld.l	8192(%r6),%f26
-	pfld.l	16384(%r7),%f25
-	pfld.l	32764(%r7),%f25
-	pfld.l	-32768(%r7),%f23
-	pfld.l	-16384(%r8),%f2
-	pfld.l	-8192(%r9),%f3
-	pfld.l	-4096(%r10),%f8
-	pfld.l	-1024(%r11),%f9
-	pfld.l	-508(%r12),%f12
-	pfld.l	-248(%r13),%f19
-	pfld.l	-4(%r14),%f21
-
-	# Immediate form, with auto-increment.
-	pfld.l	0(%r0)++,%f0
-	pfld.l	124(%r1)++,%f1
-	pfld.l	256(%r2)++,%f2
-	pfld.l	512(%r3)++,%f3
-	pfld.l	1024(%r4)++,%f4
-	pfld.l	4096(%r5)++,%f5
-	pfld.l	8192(%r6)++,%f6
-	pfld.l	16384(%r7)++,%f7
-	pfld.l	32764(%r7)++,%f8
-	pfld.l	-32768(%r7)++,%f9
-	pfld.l	-16384(%r8)++,%f10
-	pfld.l	-8192(%r9)++,%f11
-	pfld.l	-4096(%r10)++,%f12
-	pfld.l	-1024(%r11)++,%f13
-	pfld.l	-508(%r12)++,%f14
-	pfld.l	-248(%r13)++,%f15
-	pfld.l	-4(%r14)++,%f16
-
-	# Index form, no auto-increment.
-	pfld.l	%r5(%r0),%f0
-	pfld.l	%r6(%r1),%f31
-	pfld.l	%r7(%r2),%f30
-	pfld.l	%r8(%r3),%f29
-	pfld.l	%r9(%r4),%f28
-	pfld.l	%r0(%r5),%f27
-	pfld.l	%r1(%r6),%f26
-	pfld.l	%r12(%r7),%f25
-	pfld.l	%r13(%r8),%f24
-	pfld.l	%r14(%r9),%f23
-	pfld.l	%r15(%r10),%f22
-	pfld.l	%r16(%r11),%f21
-	pfld.l	%r17(%r12),%f20
-	pfld.l	%r28(%r13),%f19
-	pfld.l	%r31(%r14),%f18
-
-	# Index form, with auto-increment.
-	pfld.l	%r5(%r0)++,%f0
-	pfld.l	%r6(%r1)++,%f1
-	pfld.l	%r7(%r2)++,%f2
-	pfld.l	%r8(%r3)++,%f3
-	pfld.l	%r9(%r4)++,%f4
-	pfld.l	%r0(%r5)++,%f5
-	pfld.l	%r1(%r6)++,%f6
-	pfld.l	%r12(%r7)++,%f7
-	pfld.l	%r13(%r8)++,%f8
-	pfld.l	%r14(%r9)++,%f9
-	pfld.l	%r15(%r10)++,%f10
-	pfld.l	%r16(%r11)++,%f11
-	pfld.l	%r17(%r12)++,%f12
-	pfld.l	%r28(%r13)++,%f13
-	pfld.l	%r31(%r14)++,%f14
-
diff --git a/gas/testsuite/gas/i860/fldst08.d b/gas/testsuite/gas/i860/fldst08.d
deleted file mode 100644
index 272b40d..0000000
--- a/gas/testsuite/gas/i860/fldst08.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 fldst08 (pfld.d)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 64 	pfld.d	0\(%r0\),%f0
-   4:	80 00 3e 64 	pfld.d	128\(%r1\),%f30
-   8:	00 01 5c 64 	pfld.d	256\(%sp\),%f28
-   c:	00 02 7a 64 	pfld.d	512\(%fp\),%f26
-  10:	00 04 98 64 	pfld.d	1024\(%r4\),%f24
-  14:	00 10 b6 64 	pfld.d	4096\(%r5\),%f22
-  18:	00 20 d4 64 	pfld.d	8192\(%r6\),%f20
-  1c:	00 40 f2 64 	pfld.d	16384\(%r7\),%f18
-  20:	f8 7f f0 64 	pfld.d	32760\(%r7\),%f16
-  24:	00 80 ee 64 	pfld.d	-32768\(%r7\),%f14
-  28:	00 c0 0c 65 	pfld.d	-16384\(%r8\),%f12
-  2c:	00 e0 2a 65 	pfld.d	-8192\(%r9\),%f10
-  30:	00 f0 48 65 	pfld.d	-4096\(%r10\),%f8
-  34:	00 fc 66 65 	pfld.d	-1024\(%r11\),%f6
-  38:	00 fe 84 65 	pfld.d	-512\(%r12\),%f4
-  3c:	08 ff a2 65 	pfld.d	-248\(%r13\),%f2
-  40:	f8 ff c0 65 	pfld.d	-8\(%r14\),%f0
-  44:	01 00 00 64 	pfld.d	0\(%r0\)\+\+,%f0
-  48:	81 00 22 64 	pfld.d	128\(%r1\)\+\+,%f2
-  4c:	01 01 44 64 	pfld.d	256\(%sp\)\+\+,%f4
-  50:	01 02 66 64 	pfld.d	512\(%fp\)\+\+,%f6
-  54:	01 04 88 64 	pfld.d	1024\(%r4\)\+\+,%f8
-  58:	01 10 aa 64 	pfld.d	4096\(%r5\)\+\+,%f10
-  5c:	01 20 cc 64 	pfld.d	8192\(%r6\)\+\+,%f12
-  60:	01 40 ee 64 	pfld.d	16384\(%r7\)\+\+,%f14
-  64:	f9 7f f0 64 	pfld.d	32760\(%r7\)\+\+,%f16
-  68:	01 80 f2 64 	pfld.d	-32768\(%r7\)\+\+,%f18
-  6c:	01 c0 14 65 	pfld.d	-16384\(%r8\)\+\+,%f20
-  70:	01 e0 36 65 	pfld.d	-8192\(%r9\)\+\+,%f22
-  74:	01 f0 58 65 	pfld.d	-4096\(%r10\)\+\+,%f24
-  78:	01 fc 7a 65 	pfld.d	-1024\(%r11\)\+\+,%f26
-  7c:	01 fe 9c 65 	pfld.d	-512\(%r12\)\+\+,%f28
-  80:	09 ff be 65 	pfld.d	-248\(%r13\)\+\+,%f30
-  84:	f9 ff d0 65 	pfld.d	-8\(%r14\)\+\+,%f16
-  88:	00 28 00 60 	pfld.d	%r5\(%r0\),%f0
-  8c:	00 30 3e 60 	pfld.d	%r6\(%r1\),%f30
-  90:	00 38 5c 60 	pfld.d	%r7\(%sp\),%f28
-  94:	00 40 7a 60 	pfld.d	%r8\(%fp\),%f26
-  98:	00 48 98 60 	pfld.d	%r9\(%r4\),%f24
-  9c:	00 00 b6 60 	pfld.d	%r0\(%r5\),%f22
-  a0:	00 08 d4 60 	pfld.d	%r1\(%r6\),%f20
-  a4:	00 60 f2 60 	pfld.d	%r12\(%r7\),%f18
-  a8:	00 68 10 61 	pfld.d	%r13\(%r8\),%f16
-  ac:	00 70 2e 61 	pfld.d	%r14\(%r9\),%f14
-  b0:	00 78 4c 61 	pfld.d	%r15\(%r10\),%f12
-  b4:	00 80 6a 61 	pfld.d	%r16\(%r11\),%f10
-  b8:	00 88 88 61 	pfld.d	%r17\(%r12\),%f8
-  bc:	00 e0 a6 61 	pfld.d	%r28\(%r13\),%f6
-  c0:	00 f8 c4 61 	pfld.d	%r31\(%r14\),%f4
-  c4:	01 28 00 60 	pfld.d	%r5\(%r0\)\+\+,%f0
-  c8:	01 30 22 60 	pfld.d	%r6\(%r1\)\+\+,%f2
-  cc:	01 38 44 60 	pfld.d	%r7\(%sp\)\+\+,%f4
-  d0:	01 40 66 60 	pfld.d	%r8\(%fp\)\+\+,%f6
-  d4:	01 48 88 60 	pfld.d	%r9\(%r4\)\+\+,%f8
-  d8:	01 00 aa 60 	pfld.d	%r0\(%r5\)\+\+,%f10
-  dc:	01 08 cc 60 	pfld.d	%r1\(%r6\)\+\+,%f12
-  e0:	01 60 ee 60 	pfld.d	%r12\(%r7\)\+\+,%f14
-  e4:	01 68 10 61 	pfld.d	%r13\(%r8\)\+\+,%f16
-  e8:	01 70 32 61 	pfld.d	%r14\(%r9\)\+\+,%f18
-  ec:	01 78 54 61 	pfld.d	%r15\(%r10\)\+\+,%f20
-  f0:	01 80 76 61 	pfld.d	%r16\(%r11\)\+\+,%f22
-  f4:	01 88 98 61 	pfld.d	%r17\(%r12\)\+\+,%f24
-  f8:	01 e0 ba 61 	pfld.d	%r28\(%r13\)\+\+,%f26
-  fc:	01 f8 de 61 	pfld.d	%r31\(%r14\)\+\+,%f30
diff --git a/gas/testsuite/gas/i860/fldst08.s b/gas/testsuite/gas/i860/fldst08.s
deleted file mode 100644
index 7ae6cf5..0000000
--- a/gas/testsuite/gas/i860/fldst08.s
+++ /dev/null
@@ -1,75 +0,0 @@
-# pfld.d (no relocations here)
-	.text
-
-	# Immediate form, no auto-increment.
-	pfld.d	0(%r0),%f0
-	pfld.d	128(%r1),%f30
-	pfld.d	256(%r2),%f28
-	pfld.d	512(%r3),%f26
-	pfld.d	1024(%r4),%f24
-	pfld.d	4096(%r5),%f22
-	pfld.d	8192(%r6),%f20
-	pfld.d	16384(%r7),%f18
-	pfld.d	32760(%r7),%f16
-	pfld.d	-32768(%r7),%f14
-	pfld.d	-16384(%r8),%f12
-	pfld.d	-8192(%r9),%f10
-	pfld.d	-4096(%r10),%f8
-	pfld.d	-1024(%r11),%f6
-	pfld.d	-512(%r12),%f4
-	pfld.d	-248(%r13),%f2
-	pfld.d	-8(%r14),%f0
-
-	# Immediate form, with auto-increment.
-	pfld.d	0(%r0)++,%f0
-	pfld.d	128(%r1)++,%f2
-	pfld.d	256(%r2)++,%f4
-	pfld.d	512(%r3)++,%f6
-	pfld.d	1024(%r4)++,%f8
-	pfld.d	4096(%r5)++,%f10
-	pfld.d	8192(%r6)++,%f12
-	pfld.d	16384(%r7)++,%f14
-	pfld.d	32760(%r7)++,%f16
-	pfld.d	-32768(%r7)++,%f18
-	pfld.d	-16384(%r8)++,%f20
-	pfld.d	-8192(%r9)++,%f22
-	pfld.d	-4096(%r10)++,%f24
-	pfld.d	-1024(%r11)++,%f26
-	pfld.d	-512(%r12)++,%f28
-	pfld.d	-248(%r13)++,%f30
-	pfld.d	-8(%r14)++,%f16
-
-	# Index form, no auto-increment.
-	pfld.d	%r5(%r0),%f0
-	pfld.d	%r6(%r1),%f30
-	pfld.d	%r7(%r2),%f28
-	pfld.d	%r8(%r3),%f26
-	pfld.d	%r9(%r4),%f24
-	pfld.d	%r0(%r5),%f22
-	pfld.d	%r1(%r6),%f20
-	pfld.d	%r12(%r7),%f18
-	pfld.d	%r13(%r8),%f16
-	pfld.d	%r14(%r9),%f14
-	pfld.d	%r15(%r10),%f12
-	pfld.d	%r16(%r11),%f10
-	pfld.d	%r17(%r12),%f8
-	pfld.d	%r28(%r13),%f6
-	pfld.d	%r31(%r14),%f4
-
-	# Index form, with auto-increment.
-	pfld.d	%r5(%r0)++,%f0
-	pfld.d	%r6(%r1)++,%f2
-	pfld.d	%r7(%r2)++,%f4
-	pfld.d	%r8(%r3)++,%f6
-	pfld.d	%r9(%r4)++,%f8
-	pfld.d	%r0(%r5)++,%f10
-	pfld.d	%r1(%r6)++,%f12
-	pfld.d	%r12(%r7)++,%f14
-	pfld.d	%r13(%r8)++,%f16
-	pfld.d	%r14(%r9)++,%f18
-	pfld.d	%r15(%r10)++,%f20
-	pfld.d	%r16(%r11)++,%f22
-	pfld.d	%r17(%r12)++,%f24
-	pfld.d	%r28(%r13)++,%f26
-	pfld.d	%r31(%r14)++,%f30
-
diff --git a/gas/testsuite/gas/i860/float01.d b/gas/testsuite/gas/i860/float01.d
deleted file mode 100644
index f614f1a..0000000
--- a/gas/testsuite/gas/i860/float01.d
+++ /dev/null
@@ -1,69 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 float01
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	30 00 22 48 	fadd.ss	%f0,%f1,%f2
-   4:	b0 10 64 48 	fadd.sd	%f2,%f3,%f4
-   8:	b0 31 0a 49 	fadd.dd	%f6,%f8,%f10
-   c:	31 28 c7 48 	fsub.ss	%f5,%f6,%f7
-  10:	b1 40 2a 49 	fsub.sd	%f8,%f9,%f10
-  14:	b1 61 d0 49 	fsub.dd	%f12,%f14,%f16
-  18:	20 58 8d 49 	fmul.ss	%f11,%f12,%f13
-  1c:	a0 70 f0 49 	fmul.sd	%f14,%f15,%f16
-  20:	a0 91 96 4a 	fmul.dd	%f18,%f20,%f22
-  24:	a1 b1 1a 4b 	fmlow.dd	%f22,%f24,%f26
-  28:	30 74 f0 49 	pfadd.ss	%f14,%f15,%f16
-  2c:	b0 8c 54 4a 	pfadd.sd	%f17,%f18,%f20
-  30:	b0 b5 1a 4b 	pfadd.dd	%f22,%f24,%f26
-  34:	31 a4 b6 4a 	pfsub.ss	%f20,%f21,%f22
-  38:	b1 bc 1a 4b 	pfsub.sd	%f23,%f24,%f26
-  3c:	b1 e5 c2 4b 	pfsub.dd	%f28,%f30,%f2
-  40:	20 dc 9d 4b 	pfmul.ss	%f27,%f28,%f29
-  44:	a0 f4 e4 4b 	pfmul.sd	%f30,%f31,%f4
-  48:	a0 35 08 48 	pfmul.dd	%f6,%f0,%f8
-  4c:	a4 15 9e 48 	pfmul3.dd	%f2,%f4,%f30
-  50:	30 02 22 48 	d.fadd.ss	%f0,%f1,%f2
-  54:	00 00 00 a0 	shl	%r0,%r0,%r0
-  58:	b0 12 64 48 	d.fadd.sd	%f2,%f3,%f4
-  5c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  60:	b0 33 0a 49 	d.fadd.dd	%f6,%f8,%f10
-  64:	00 00 00 a0 	shl	%r0,%r0,%r0
-  68:	31 2a c7 48 	d.fsub.ss	%f5,%f6,%f7
-  6c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  70:	b1 42 2a 49 	d.fsub.sd	%f8,%f9,%f10
-  74:	00 00 00 a0 	shl	%r0,%r0,%r0
-  78:	b1 63 d0 49 	d.fsub.dd	%f12,%f14,%f16
-  7c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  80:	20 5a 8d 49 	d.fmul.ss	%f11,%f12,%f13
-  84:	00 00 00 a0 	shl	%r0,%r0,%r0
-  88:	a0 72 f0 49 	d.fmul.sd	%f14,%f15,%f16
-  8c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  90:	a0 93 96 4a 	d.fmul.dd	%f18,%f20,%f22
-  94:	00 00 00 a0 	shl	%r0,%r0,%r0
-  98:	a1 43 4c 49 	d.fmlow.dd	%f8,%f10,%f12
-  9c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a0:	30 76 f0 49 	d.pfadd.ss	%f14,%f15,%f16
-  a4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a8:	b0 8e 54 4a 	d.pfadd.sd	%f17,%f18,%f20
-  ac:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b0:	b0 b7 1a 4b 	d.pfadd.dd	%f22,%f24,%f26
-  b4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b8:	31 a6 b6 4a 	d.pfsub.ss	%f20,%f21,%f22
-  bc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c0:	b1 be 1a 4b 	d.pfsub.sd	%f23,%f24,%f26
-  c4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c8:	b1 e7 c2 4b 	d.pfsub.dd	%f28,%f30,%f2
-  cc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d0:	20 de 9d 4b 	d.pfmul.ss	%f27,%f28,%f29
-  d4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d8:	a0 f6 e4 4b 	d.pfmul.sd	%f30,%f31,%f4
-  dc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e0:	a0 37 08 48 	d.pfmul.dd	%f6,%f0,%f8
-  e4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e8:	a4 17 9e 48 	d.pfmul3.dd	%f2,%f4,%f30
-  ec:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/float01.s b/gas/testsuite/gas/i860/float01.s
deleted file mode 100644
index 88e3769..0000000
--- a/gas/testsuite/gas/i860/float01.s
+++ /dev/null
@@ -1,84 +0,0 @@
-# fadd, fsub, fmul, pfmul3, fmlow
-
-	.text
-
-	# Non-pipelined, without dual bit 
-	fadd.ss	%f0,%f1,%f2
-	fadd.sd	%f2,%f3,%f4
-	fadd.dd	%f6,%f8,%f10
-
-	fsub.ss	%f5,%f6,%f7
-	fsub.sd	%f8,%f9,%f10
-	fsub.dd	%f12,%f14,%f16
-
-	fmul.ss	%f11,%f12,%f13
-	fmul.sd	%f14,%f15,%f16
-	fmul.dd	%f18,%f20,%f22
-
-	fmlow.dd	%f22,%f24,%f26
-
-	# Pipelined, without dual bit 
-	pfadd.ss	%f14,%f15,%f16
-	pfadd.sd	%f17,%f18,%f20
-	pfadd.dd	%f22,%f24,%f26
-
-	pfsub.ss	%f20,%f21,%f22
-	pfsub.sd	%f23,%f24,%f26
-	pfsub.dd	%f28,%f30,%f2
-
-	pfmul.ss	%f27,%f28,%f29
-	pfmul.sd	%f30,%f31,%f4
-	pfmul.dd	%f6,%f0,%f8
-
-	pfmul3.dd	%f2,%f4,%f30
-
-	# Non-pipelined, with dual bit 
-	d.fadd.ss	%f0,%f1,%f2
-	nop
-	d.fadd.sd	%f2,%f3,%f4
-	nop
-	d.fadd.dd	%f6,%f8,%f10
-	nop
-
-	d.fsub.ss	%f5,%f6,%f7
-	nop
-	d.fsub.sd	%f8,%f9,%f10
-	nop
-	d.fsub.dd	%f12,%f14,%f16
-	nop
-
-	d.fmul.ss	%f11,%f12,%f13
-	nop
-	d.fmul.sd	%f14,%f15,%f16
-	nop
-	d.fmul.dd	%f18,%f20,%f22
-	nop
-
-	d.fmlow.dd	%f8,%f10,%f12
-	nop
-
-	# Pipelined, with dual bit 
-	d.pfadd.ss	%f14,%f15,%f16
-	nop
-	d.pfadd.sd	%f17,%f18,%f20
-	nop
-	d.pfadd.dd	%f22,%f24,%f26
-	nop
-
-	d.pfsub.ss	%f20,%f21,%f22
-	nop
-	d.pfsub.sd	%f23,%f24,%f26
-	nop
-	d.pfsub.dd	%f28,%f30,%f2
-	nop
-
-	d.pfmul.ss	%f27,%f28,%f29
-	nop
-	d.pfmul.sd	%f30,%f31,%f4
-	nop
-	d.pfmul.dd	%f6,%f0,%f8
-	nop
-
-	d.pfmul3.dd	%f2,%f4,%f30
-	nop
-
diff --git a/gas/testsuite/gas/i860/float02.d b/gas/testsuite/gas/i860/float02.d
deleted file mode 100644
index aae176f..0000000
--- a/gas/testsuite/gas/i860/float02.d
+++ /dev/null
@@ -1,39 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 float02
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	22 00 01 48 	frcp.ss	%f0,%f1
-   4:	a2 00 44 48 	frcp.sd	%f2,%f4
-   8:	a2 01 c8 48 	frcp.dd	%f6,%f8
-   c:	23 00 a6 48 	frsqr.ss	%f5,%f6
-  10:	a3 00 0a 49 	frsqr.sd	%f8,%f10
-  14:	a3 01 8e 49 	frsqr.dd	%f12,%f14
-  18:	33 08 1f 48 	famov.ss	%f1,%f31
-  1c:	33 11 1e 48 	famov.ds	%f2,%f30
-  20:	b3 38 10 48 	famov.sd	%f7,%f16
-  24:	b3 c1 0c 48 	famov.dd	%f24,%f12
-  28:	22 02 01 48 	d.frcp.ss	%f0,%f1
-  2c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  30:	a2 02 5e 48 	d.frcp.sd	%f2,%f30
-  34:	00 00 00 a0 	shl	%r0,%r0,%r0
-  38:	a2 03 c8 48 	d.frcp.dd	%f6,%f8
-  3c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  40:	23 02 a6 48 	d.frsqr.ss	%f5,%f6
-  44:	00 00 00 a0 	shl	%r0,%r0,%r0
-  48:	a3 02 18 49 	d.frsqr.sd	%f8,%f24
-  4c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  50:	a3 03 8e 49 	d.frsqr.dd	%f12,%f14
-  54:	00 00 00 a0 	shl	%r0,%r0,%r0
-  58:	33 2a 0d 48 	d.famov.ss	%f5,%f13
-  5c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  60:	33 f3 15 48 	d.famov.ds	%f30,%f21
-  64:	00 00 00 a0 	shl	%r0,%r0,%r0
-  68:	b3 ba 16 48 	d.famov.sd	%f23,%f22
-  6c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  70:	b3 03 0c 48 	d.famov.dd	%f0,%f12
-  74:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/float02.s b/gas/testsuite/gas/i860/float02.s
deleted file mode 100644
index d4a475d..0000000
--- a/gas/testsuite/gas/i860/float02.s
+++ /dev/null
@@ -1,42 +0,0 @@
-# frcp, frsqr, famov
-
-	.text
-
-	# Without dual bit 
-	frcp.ss	%f0,%f1
-	frcp.sd	%f2,%f4
-	frcp.dd	%f6,%f8
-
-	frsqr.ss	%f5,%f6
-	frsqr.sd	%f8,%f10
-	frsqr.dd	%f12,%f14
-
-	famov.ss	%f1,%f31
-	famov.ds	%f2,%f30
-	famov.sd	%f7,%f16
-	famov.dd	%f24,%f12
-
-	# With dual bit 
-	d.frcp.ss	%f0,%f1
-	nop
-	d.frcp.sd	%f2,%f30
-	nop
-	d.frcp.dd	%f6,%f8
-	nop
-
-	d.frsqr.ss	%f5,%f6
-	nop
-	d.frsqr.sd	%f8,%f24
-	nop
-	d.frsqr.dd	%f12,%f14
-	nop
-
-	d.famov.ss	%f5,%f13
-	nop
-	d.famov.ds	%f30,%f21
-	nop
-	d.famov.sd	%f23,%f22
-	nop
-	d.famov.dd	%f0,%f12
-	nop
-
diff --git a/gas/testsuite/gas/i860/float03.d b/gas/testsuite/gas/i860/float03.d
deleted file mode 100644
index 10f66c2..0000000
--- a/gas/testsuite/gas/i860/float03.d
+++ /dev/null
@@ -1,51 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 float03
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	b2 10 04 48 	fix.sd	%f2,%f4
-   4:	b2 31 08 48 	fix.dd	%f6,%f8
-   8:	ba 40 0a 48 	ftrunc.sd	%f8,%f10
-   c:	ba 61 0e 48 	ftrunc.dd	%f12,%f14
-  10:	b2 f4 0e 48 	pfix.sd	%f30,%f14
-  14:	b2 c5 02 48 	pfix.dd	%f24,%f2
-  18:	ba 44 0a 48 	pftrunc.sd	%f8,%f10
-  1c:	ba 65 0e 48 	pftrunc.dd	%f12,%f14
-  20:	34 04 22 48 	pfgt.ss	%f0,%f1,%f2
-  24:	34 35 0a 49 	pfgt.dd	%f6,%f8,%f10
-  28:	b4 2c c7 48 	pfle.ss	%f5,%f6,%f7
-  2c:	b4 65 d0 49 	pfle.dd	%f12,%f14,%f16
-  30:	35 5c 8d 49 	pfeq.ss	%f11,%f12,%f13
-  34:	35 95 96 4a 	pfeq.dd	%f18,%f20,%f22
-  38:	b2 12 1e 48 	d.fix.sd	%f2,%f30
-  3c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  40:	b2 33 08 48 	d.fix.dd	%f6,%f8
-  44:	00 00 00 a0 	shl	%r0,%r0,%r0
-  48:	ba 42 18 48 	d.ftrunc.sd	%f8,%f24
-  4c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  50:	ba 63 0e 48 	d.ftrunc.dd	%f12,%f14
-  54:	00 00 00 a0 	shl	%r0,%r0,%r0
-  58:	b2 16 1e 48 	d.pfix.sd	%f2,%f30
-  5c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  60:	b2 37 08 48 	d.pfix.dd	%f6,%f8
-  64:	00 00 00 a0 	shl	%r0,%r0,%r0
-  68:	ba 46 18 48 	d.pftrunc.sd	%f8,%f24
-  6c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  70:	ba 67 0e 48 	d.pftrunc.dd	%f12,%f14
-  74:	00 00 00 a0 	shl	%r0,%r0,%r0
-  78:	34 06 22 48 	d.pfgt.ss	%f0,%f1,%f2
-  7c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  80:	34 37 0a 49 	d.pfgt.dd	%f6,%f8,%f10
-  84:	00 00 00 a0 	shl	%r0,%r0,%r0
-  88:	b4 2e c7 48 	d.pfle.ss	%f5,%f6,%f7
-  8c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  90:	b4 67 d0 49 	d.pfle.dd	%f12,%f14,%f16
-  94:	00 00 00 a0 	shl	%r0,%r0,%r0
-  98:	35 5e 8d 49 	d.pfeq.ss	%f11,%f12,%f13
-  9c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a0:	35 97 96 4a 	d.pfeq.dd	%f18,%f20,%f22
-  a4:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/float03.s b/gas/testsuite/gas/i860/float03.s
deleted file mode 100644
index 8fd626c..0000000
--- a/gas/testsuite/gas/i860/float03.s
+++ /dev/null
@@ -1,64 +0,0 @@
-# fix, ftrunc, pfgt, pfle, pfeq
-
-	.text
-
-	# Non-pipelined, without dual bit 
-	fix.sd	%f2,%f4
-	fix.dd	%f6,%f8
-
-	ftrunc.sd	%f8,%f10
-	ftrunc.dd	%f12,%f14
-
-	# Pipelined, without dual bit 
-	pfix.sd	%f30,%f14
-	pfix.dd	%f24,%f2
-
-	pftrunc.sd	%f8,%f10
-	pftrunc.dd	%f12,%f14
-
-	pfgt.ss %f0,%f1,%f2
-	pfgt.dd %f6,%f8,%f10
-
-	pfle.ss %f5,%f6,%f7
-	pfle.dd %f12,%f14,%f16
-
-	pfeq.ss %f11,%f12,%f13
-	pfeq.dd %f18,%f20,%f22
-
-	# Non-pipelined, with dual bit 
-	d.fix.sd	%f2,%f30
-	nop
-	d.fix.dd	%f6,%f8
-	nop
-
-	d.ftrunc.sd	%f8,%f24
-	nop
-	d.ftrunc.dd	%f12,%f14
-	nop
-
-	# Pipelined, with dual bit 
-	d.pfix.sd	%f2,%f30
-	nop
-	d.pfix.dd	%f6,%f8
-	nop
-
-	d.pftrunc.sd	%f8,%f24
-	nop
-	d.pftrunc.dd	%f12,%f14
-	nop
-
-	d.pfgt.ss %f0,%f1,%f2
-	nop
-	d.pfgt.dd %f6,%f8,%f10
-	nop
-
-	d.pfle.ss %f5,%f6,%f7
-	nop
-	d.pfle.dd %f12,%f14,%f16
-	nop
-
-	d.pfeq.ss %f11,%f12,%f13
-	nop
-	d.pfeq.dd %f18,%f20,%f22
-	nop
-
diff --git a/gas/testsuite/gas/i860/float04.d b/gas/testsuite/gas/i860/float04.d
deleted file mode 100644
index 8640682..0000000
--- a/gas/testsuite/gas/i860/float04.d
+++ /dev/null
@@ -1,39 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 float04
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	40 08 03 48 	fxfr	%f1,%fp
-   4:	40 40 1e 48 	fxfr	%f8,%r30
-   8:	40 f8 12 48 	fxfr	%f31,%r18
-   c:	00 48 1f 08 	ixfr	%r9,%f31
-  10:	00 b8 10 08 	ixfr	%r23,%f16
-  14:	00 00 00 08 	ixfr	%r0,%f0
-  18:	49 00 22 48 	fiadd.ss	%f0,%f1,%f2
-  1c:	c9 31 0a 49 	fiadd.dd	%f6,%f8,%f10
-  20:	4d 28 c7 48 	fisub.ss	%f5,%f6,%f7
-  24:	cd 61 d0 49 	fisub.dd	%f12,%f14,%f16
-  28:	49 74 f0 49 	pfiadd.ss	%f14,%f15,%f16
-  2c:	c9 b5 1a 4b 	pfiadd.dd	%f22,%f24,%f26
-  30:	4d a4 b6 4a 	pfisub.ss	%f20,%f21,%f22
-  34:	cd e5 c2 4b 	pfisub.dd	%f28,%f30,%f2
-  38:	49 02 22 48 	d.fiadd.ss	%f0,%f1,%f2
-  3c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  40:	c9 33 0a 49 	d.fiadd.dd	%f6,%f8,%f10
-  44:	00 00 00 a0 	shl	%r0,%r0,%r0
-  48:	4d 2a c7 48 	d.fisub.ss	%f5,%f6,%f7
-  4c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  50:	cd 63 d0 49 	d.fisub.dd	%f12,%f14,%f16
-  54:	00 00 00 a0 	shl	%r0,%r0,%r0
-  58:	49 76 f0 49 	d.pfiadd.ss	%f14,%f15,%f16
-  5c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  60:	c9 b7 1a 4b 	d.pfiadd.dd	%f22,%f24,%f26
-  64:	00 00 00 a0 	shl	%r0,%r0,%r0
-  68:	4d a6 b6 4a 	d.pfisub.ss	%f20,%f21,%f22
-  6c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  70:	cd e7 c2 4b 	d.pfisub.dd	%f28,%f30,%f2
-  74:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/float04.s b/gas/testsuite/gas/i860/float04.s
deleted file mode 100644
index 5a4aae5..0000000
--- a/gas/testsuite/gas/i860/float04.s
+++ /dev/null
@@ -1,49 +0,0 @@
-# fxfr, ixfr, fiadd, fisub
-
-	.text
-
-	# ixfr, fxfr
-	fxfr	%f1,%r3
-	fxfr	%f8,%r30
-	fxfr	%f31,%r18
-
-	ixfr	%r9,%f31
-	ixfr	%r23,%f16
-	ixfr	%r0,%f0
-
-	# Non-pipelined, without dual bit 
-	fiadd.ss	%f0,%f1,%f2
-	fiadd.dd	%f6,%f8,%f10
-
-	fisub.ss	%f5,%f6,%f7
-	fisub.dd	%f12,%f14,%f16
-
-	# Pipelined, without dual bit 
-	pfiadd.ss	%f14,%f15,%f16
-	pfiadd.dd	%f22,%f24,%f26
-
-	pfisub.ss	%f20,%f21,%f22
-	pfisub.dd	%f28,%f30,%f2
-
-	# Non-pipelined, with dual bit 
-	d.fiadd.ss	%f0,%f1,%f2
-	nop
-	d.fiadd.dd	%f6,%f8,%f10
-	nop
-
-	d.fisub.ss	%f5,%f6,%f7
-	nop
-	d.fisub.dd	%f12,%f14,%f16
-	nop
-
-	# Pipelined, with dual bit 
-	d.pfiadd.ss	%f14,%f15,%f16
-	nop
-	d.pfiadd.dd	%f22,%f24,%f26
-	nop
-
-	d.pfisub.ss	%f20,%f21,%f22
-	nop
-	d.pfisub.dd	%f28,%f30,%f2
-	nop
-
diff --git a/gas/testsuite/gas/i860/form.d b/gas/testsuite/gas/i860/form.d
deleted file mode 100644
index d713d8c..0000000
--- a/gas/testsuite/gas/i860/form.d
+++ /dev/null
@@ -1,63 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 form/pform
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	da 05 02 48 	pform	%f0,%f2
-   4:	da 15 04 48 	pform	%f2,%f4
-   8:	da 25 06 48 	pform	%f4,%f6
-   c:	da 45 0a 48 	pform	%f8,%f10
-  10:	da 65 0e 48 	pform	%f12,%f14
-  14:	da 85 12 48 	pform	%f16,%f18
-  18:	da a5 16 48 	pform	%f20,%f22
-  1c:	da c5 1a 48 	pform	%f24,%f26
-  20:	da e5 1e 48 	pform	%f28,%f30
-  24:	da 01 02 48 	form	%f0,%f2
-  28:	da 11 04 48 	form	%f2,%f4
-  2c:	da 21 06 48 	form	%f4,%f6
-  30:	da 41 0a 48 	form	%f8,%f10
-  34:	da 61 0e 48 	form	%f12,%f14
-  38:	da 81 12 48 	form	%f16,%f18
-  3c:	da a1 16 48 	form	%f20,%f22
-  40:	da c1 1a 48 	form	%f24,%f26
-  44:	da e1 1e 48 	form	%f28,%f30
-  48:	da 07 02 48 	d.pform	%f0,%f2
-  4c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  50:	da 17 04 48 	d.pform	%f2,%f4
-  54:	00 00 00 a0 	shl	%r0,%r0,%r0
-  58:	da 27 06 48 	d.pform	%f4,%f6
-  5c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  60:	da 47 0a 48 	d.pform	%f8,%f10
-  64:	00 00 00 a0 	shl	%r0,%r0,%r0
-  68:	da 67 0e 48 	d.pform	%f12,%f14
-  6c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  70:	da 87 12 48 	d.pform	%f16,%f18
-  74:	00 00 00 a0 	shl	%r0,%r0,%r0
-  78:	da a7 16 48 	d.pform	%f20,%f22
-  7c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  80:	da c7 1a 48 	d.pform	%f24,%f26
-  84:	00 00 00 a0 	shl	%r0,%r0,%r0
-  88:	da e7 1e 48 	d.pform	%f28,%f30
-  8c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  90:	da 03 02 48 	d.form	%f0,%f2
-  94:	00 00 00 a0 	shl	%r0,%r0,%r0
-  98:	da 13 04 48 	d.form	%f2,%f4
-  9c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a0:	da 23 06 48 	d.form	%f4,%f6
-  a4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a8:	da 43 0a 48 	d.form	%f8,%f10
-  ac:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b0:	da 63 0e 48 	d.form	%f12,%f14
-  b4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b8:	da 83 12 48 	d.form	%f16,%f18
-  bc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c0:	da a3 16 48 	d.form	%f20,%f22
-  c4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c8:	da c3 1a 48 	d.form	%f24,%f26
-  cc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d0:	da e3 1e 48 	d.form	%f28,%f30
-  d4:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/form.s b/gas/testsuite/gas/i860/form.s
deleted file mode 100644
index e73dde6..0000000
--- a/gas/testsuite/gas/i860/form.s
+++ /dev/null
@@ -1,66 +0,0 @@
-# form and pform
-
-	.text
-
-	# pform, no dual bit
-	pform	%f0,%f2
-	pform	%f2,%f4
-	pform	%f4,%f6
-	pform	%f8,%f10
-	pform	%f12,%f14
-	pform	%f16,%f18
-	pform	%f20,%f22
-	pform	%f24,%f26
-	pform	%f28,%f30
-
-	# form, no dual bit
-	form	%f0,%f2
-	form	%f2,%f4
-	form	%f4,%f6
-	form	%f8,%f10
-	form	%f12,%f14
-	form	%f16,%f18
-	form	%f20,%f22
-	form	%f24,%f26
-	form	%f28,%f30
-
-	# pform, with dual bit
-	d.pform	%f0,%f2
-	nop
-	d.pform	%f2,%f4
-	nop
-	d.pform	%f4,%f6
-	nop
-	d.pform	%f8,%f10
-	nop
-	d.pform	%f12,%f14
-	nop
-	d.pform	%f16,%f18
-	nop
-	d.pform	%f20,%f22
-	nop
-	d.pform	%f24,%f26
-	nop
-	d.pform	%f28,%f30
-	nop
-
-	# form, with dual bit
-	d.form	%f0,%f2
-	nop
-	d.form	%f2,%f4
-	nop
-	d.form	%f4,%f6
-	nop
-	d.form	%f8,%f10
-	nop
-	d.form	%f12,%f14
-	nop
-	d.form	%f16,%f18
-	nop
-	d.form	%f20,%f22
-	nop
-	d.form	%f24,%f26
-	nop
-	d.form	%f28,%f30
-	nop
-
diff --git a/gas/testsuite/gas/i860/i860.exp b/gas/testsuite/gas/i860/i860.exp
deleted file mode 100644
index bac5758..0000000
--- a/gas/testsuite/gas/i860/i860.exp
+++ /dev/null
@@ -1,61 +0,0 @@
-# Copyright (C) 2012-2018 Free Software Foundation, Inc.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-# 
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-# 
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  
-
-# i860 assembler testsuite.
-
-if [istarget i860-*-*] {
-    run_dump_test "bitwise"
-    run_dump_test "branch"
-    run_dump_test "bte"
-    run_dump_test "dir-align01"
-    run_dump_test "dir-intel01"
-    run_dump_test "dir-intel02"
-    run_list_test "dir-intel03-err" ""
-    run_dump_test "dual01"
-    run_list_test "dual02-err" ""
-    run_dump_test "dual03"
-    run_dump_test "fldst01"
-    run_dump_test "fldst02"
-    run_dump_test "fldst03"
-    run_dump_test "fldst04"
-    run_dump_test "fldst05"
-    run_dump_test "fldst06"
-    run_dump_test "fldst07"
-    run_dump_test "fldst08"
-    run_dump_test "float01"
-    run_dump_test "float02"
-    run_dump_test "float03"
-    run_dump_test "float04"
-    run_dump_test "form"
-    run_dump_test "iarith"
-    run_dump_test "ldst01"
-    run_dump_test "ldst02"
-    run_dump_test "ldst03"
-    run_dump_test "ldst04"
-    run_dump_test "ldst05"
-    run_dump_test "ldst06"
-    run_dump_test "pfam"
-    run_dump_test "pfmam"
-    run_dump_test "pfmsm"
-    run_dump_test "pfsm"
-    run_dump_test "pseudo-ops01"
-    run_dump_test "regress01"
-    run_dump_test "shift"
-    run_dump_test "simd"
-    run_dump_test "system"
-    run_dump_test "xp"
-}
-
diff --git a/gas/testsuite/gas/i860/iarith.d b/gas/testsuite/gas/i860/iarith.d
deleted file mode 100644
index 9b2a509..0000000
--- a/gas/testsuite/gas/i860/iarith.d
+++ /dev/null
@@ -1,97 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 iarith
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 22 80 	addu	%r0,%r1,%sp
-   4:	00 18 85 80 	addu	%fp,%r4,%r5
-   8:	00 30 e8 80 	addu	%r6,%r7,%r8
-   c:	00 48 4b 81 	addu	%r9,%r10,%r11
-  10:	00 f8 ae 81 	addu	%r31,%r13,%r14
-  14:	00 78 11 82 	addu	%r15,%r16,%r17
-  18:	00 90 74 82 	addu	%r18,%r19,%r20
-  1c:	00 a8 d7 82 	addu	%r21,%r22,%r23
-  20:	00 c0 3f 83 	addu	%r24,%r25,%r31
-  24:	00 d8 9d 83 	addu	%r27,%r28,%r29
-  28:	00 f0 e0 83 	addu	%r30,%r31,%r0
-  2c:	00 00 22 90 	adds	%r0,%r1,%sp
-  30:	00 18 85 90 	adds	%fp,%r4,%r5
-  34:	00 30 e8 90 	adds	%r6,%r7,%r8
-  38:	00 48 4b 91 	adds	%r9,%r10,%r11
-  3c:	00 f8 ae 91 	adds	%r31,%r13,%r14
-  40:	00 78 11 92 	adds	%r15,%r16,%r17
-  44:	00 90 74 92 	adds	%r18,%r19,%r20
-  48:	00 a8 d7 92 	adds	%r21,%r22,%r23
-  4c:	00 c0 3f 93 	adds	%r24,%r25,%r31
-  50:	00 d8 9d 93 	adds	%r27,%r28,%r29
-  54:	00 f0 e0 93 	adds	%r30,%r31,%r0
-  58:	00 00 22 88 	subu	%r0,%r1,%sp
-  5c:	00 18 85 88 	subu	%fp,%r4,%r5
-  60:	00 30 e8 88 	subu	%r6,%r7,%r8
-  64:	00 48 4b 89 	subu	%r9,%r10,%r11
-  68:	00 f8 ae 89 	subu	%r31,%r13,%r14
-  6c:	00 78 11 8a 	subu	%r15,%r16,%r17
-  70:	00 90 74 8a 	subu	%r18,%r19,%r20
-  74:	00 a8 d7 8a 	subu	%r21,%r22,%r23
-  78:	00 c0 3f 8b 	subu	%r24,%r25,%r31
-  7c:	00 d8 9d 8b 	subu	%r27,%r28,%r29
-  80:	00 f0 e0 8b 	subu	%r30,%r31,%r0
-  84:	00 00 22 98 	subs	%r0,%r1,%sp
-  88:	00 18 85 98 	subs	%fp,%r4,%r5
-  8c:	00 30 e8 98 	subs	%r6,%r7,%r8
-  90:	00 48 4b 99 	subs	%r9,%r10,%r11
-  94:	00 f8 ae 99 	subs	%r31,%r13,%r14
-  98:	00 78 11 9a 	subs	%r15,%r16,%r17
-  9c:	00 90 74 9a 	subs	%r18,%r19,%r20
-  a0:	00 a8 d7 9a 	subs	%r21,%r22,%r23
-  a4:	00 c0 3f 9b 	subs	%r24,%r25,%r31
-  a8:	00 d8 9d 9b 	subs	%r27,%r28,%r29
-  ac:	00 f0 e0 9b 	subs	%r30,%r31,%r0
-  b0:	00 00 22 84 	addu	0,%r1,%sp
-  b4:	00 20 85 84 	addu	8192,%r4,%r5
-  b8:	f5 13 e8 84 	addu	5109,%r7,%r8
-  bc:	ff 7f 4b 85 	addu	32767,%r10,%r11
-  c0:	00 80 ae 85 	addu	-32768,%r13,%r14
-  c4:	00 e0 11 86 	addu	-8192,%r16,%r17
-  c8:	ff ff 74 86 	addu	-1,%r19,%r20
-  cc:	cd ab d7 86 	addu	-21555,%r22,%r23
-  d0:	34 12 3a 87 	addu	4660,%r25,%r26
-  d4:	00 00 9d 87 	addu	0,%r28,%r29
-  d8:	03 00 e0 87 	addu	3,%r31,%r0
-  dc:	00 00 22 94 	adds	0,%r1,%sp
-  e0:	00 20 85 94 	adds	8192,%r4,%r5
-  e4:	f5 13 e8 94 	adds	5109,%r7,%r8
-  e8:	ff 7f 4b 95 	adds	32767,%r10,%r11
-  ec:	00 80 ae 95 	adds	-32768,%r13,%r14
-  f0:	00 e0 11 96 	adds	-8192,%r16,%r17
-  f4:	ff ff 74 96 	adds	-1,%r19,%r20
-  f8:	cd ab d7 96 	adds	-21555,%r22,%r23
-  fc:	34 12 3a 97 	adds	4660,%r25,%r26
- 100:	00 00 9d 97 	adds	0,%r28,%r29
- 104:	03 00 e0 97 	adds	3,%r31,%r0
- 108:	01 00 22 8c 	subu	1,%r1,%sp
- 10c:	01 20 85 8c 	subu	8193,%r4,%r5
- 110:	f6 13 e8 8c 	subu	5110,%r7,%r8
- 114:	ff 7f 4b 8d 	subu	32767,%r10,%r11
- 118:	00 80 ae 8d 	subu	-32768,%r13,%r14
- 11c:	00 e0 11 8e 	subu	-8192,%r16,%r17
- 120:	ff ff 74 8e 	subu	-1,%r19,%r20
- 124:	cd ab d7 8e 	subu	-21555,%r22,%r23
- 128:	34 12 3a 8f 	subu	4660,%r25,%r26
- 12c:	00 00 9d 8f 	subu	0,%r28,%r29
- 130:	03 00 e0 8f 	subu	3,%r31,%r0
- 134:	01 00 22 9c 	subs	1,%r1,%sp
- 138:	01 20 85 9c 	subs	8193,%r4,%r5
- 13c:	f6 13 e8 9c 	subs	5110,%r7,%r8
- 140:	ff 7f 4b 9d 	subs	32767,%r10,%r11
- 144:	00 80 ae 9d 	subs	-32768,%r13,%r14
- 148:	00 e0 11 9e 	subs	-8192,%r16,%r17
- 14c:	ff ff 74 9e 	subs	-1,%r19,%r20
- 150:	cd ab d7 9e 	subs	-21555,%r22,%r23
- 154:	34 12 3a 9f 	subs	4660,%r25,%r26
- 158:	00 00 9d 9f 	subs	0,%r28,%r29
- 15c:	03 00 e0 9f 	subs	3,%r31,%r0
diff --git a/gas/testsuite/gas/i860/iarith.s b/gas/testsuite/gas/i860/iarith.s
deleted file mode 100644
index 98a360e..0000000
--- a/gas/testsuite/gas/i860/iarith.s
+++ /dev/null
@@ -1,102 +0,0 @@
-# addu, adds, subu, subs
-
-	.text
-
-	# Register forms
-	addu	%r0,%r1,%r2
-	addu	%r3,%r4,%r5
-	addu	%r6,%r7,%r8
-	addu	%r9,%r10,%r11
-	addu	%r31,%r13,%r14
-	addu	%r15,%r16,%r17
-	addu	%r18,%r19,%r20
-	addu	%r21,%r22,%r23
-	addu	%r24,%r25,%r31
-	addu	%r27,%r28,%r29
-	addu	%r30,%r31,%r0
-
-	adds	%r0,%r1,%r2
-	adds	%r3,%r4,%r5
-	adds	%r6,%r7,%r8
-	adds	%r9,%r10,%r11
-	adds	%r31,%r13,%r14
-	adds	%r15,%r16,%r17
-	adds	%r18,%r19,%r20
-	adds	%r21,%r22,%r23
-	adds	%r24,%r25,%r31
-	adds	%r27,%r28,%r29
-	adds	%r30,%r31,%r0
-
-	subu	%r0,%r1,%r2
-	subu	%r3,%r4,%r5
-	subu	%r6,%r7,%r8
-	subu	%r9,%r10,%r11
-	subu	%r31,%r13,%r14
-	subu	%r15,%r16,%r17
-	subu	%r18,%r19,%r20
-	subu	%r21,%r22,%r23
-	subu	%r24,%r25,%r31
-	subu	%r27,%r28,%r29
-	subu	%r30,%r31,%r0
-
-	subs	%r0,%r1,%r2
-	subs	%r3,%r4,%r5
-	subs	%r6,%r7,%r8
-	subs	%r9,%r10,%r11
-	subs	%r31,%r13,%r14
-	subs	%r15,%r16,%r17
-	subs	%r18,%r19,%r20
-	subs	%r21,%r22,%r23
-	subs	%r24,%r25,%r31
-	subs	%r27,%r28,%r29
-	subs	%r30,%r31,%r0
-
-	# Immediate forms (all)
-	addu	0,%r1,%r2
-	addu	8192,%r4,%r5
-	addu	5109,%r7,%r8
-	addu	32767,%r10,%r11
-	addu	-32768,%r13,%r14
-	addu	-8192,%r16,%r17
-	addu	-1,%r19,%r20
-	addu	-21555,%r22,%r23
-	addu	0x1234,%r25,%r26
-	addu	0x0,%r28,%r29
-	addu	0x3,%r31,%r0
-
-	adds	0,%r1,%r2
-	adds	8192,%r4,%r5
-	adds	5109,%r7,%r8
-	adds	32767,%r10,%r11
-	adds	-32768,%r13,%r14
-	adds	-8192,%r16,%r17
-	adds	-1,%r19,%r20
-	adds	-21555,%r22,%r23
-	adds	0x1234,%r25,%r26
-	adds	0x0,%r28,%r29
-	adds	0x3,%r31,%r0
-
-	subu	1,%r1,%r2
-	subu	8193,%r4,%r5
-	subu	5110,%r7,%r8
-	subu	32767,%r10,%r11
-	subu	-32768,%r13,%r14
-	subu	-8192,%r16,%r17
-	subu	-1,%r19,%r20
-	subu	-21555,%r22,%r23
-	subu	0x1234,%r25,%r26
-	subu	0x0,%r28,%r29
-	subu	0x3,%r31,%r0
-
-	subs	1,%r1,%r2
-	subs	8193,%r4,%r5
-	subs	5110,%r7,%r8
-	subs	32767,%r10,%r11
-	subs	-32768,%r13,%r14
-	subs	-8192,%r16,%r17
-	subs	-1,%r19,%r20
-	subs	-21555,%r22,%r23
-	subs	0x1234,%r25,%r26
-	subs	0x0,%r28,%r29
-	subs	0x3,%r31,%r0
-
diff --git a/gas/testsuite/gas/i860/ldst01.d b/gas/testsuite/gas/i860/ldst01.d
deleted file mode 100644
index 6c1330b..0000000
--- a/gas/testsuite/gas/i860/ldst01.d
+++ /dev/null
@@ -1,39 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 ldst01 (ld.l)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	01 00 00 14 	ld.l	0\(%r0\),%r0
-   4:	7d 00 3f 14 	ld.l	124\(%r1\),%r31
-   8:	01 01 5e 14 	ld.l	256\(%sp\),%r30
-   c:	01 02 7d 14 	ld.l	512\(%fp\),%r29
-  10:	01 04 9c 14 	ld.l	1024\(%r4\),%r28
-  14:	01 10 bb 14 	ld.l	4096\(%r5\),%r27
-  18:	01 20 da 14 	ld.l	8192\(%r6\),%r26
-  1c:	01 40 f9 14 	ld.l	16384\(%r7\),%r25
-  20:	01 c0 18 15 	ld.l	-16384\(%r8\),%r24
-  24:	01 e0 37 15 	ld.l	-8192\(%r9\),%r23
-  28:	01 f0 56 15 	ld.l	-4096\(%r10\),%r22
-  2c:	01 fc 75 15 	ld.l	-1024\(%r11\),%r21
-  30:	05 fe 94 15 	ld.l	-508\(%r12\),%r20
-  34:	09 ff b3 15 	ld.l	-248\(%r13\),%r19
-  38:	fd ff d2 15 	ld.l	-4\(%r14\),%r18
-  3c:	01 28 00 10 	ld.l	%r5\(%r0\),%r0
-  40:	01 30 3f 10 	ld.l	%r6\(%r1\),%r31
-  44:	01 38 5e 10 	ld.l	%r7\(%sp\),%r30
-  48:	01 40 7d 10 	ld.l	%r8\(%fp\),%r29
-  4c:	01 48 9c 10 	ld.l	%r9\(%r4\),%r28
-  50:	01 00 bb 10 	ld.l	%r0\(%r5\),%r27
-  54:	01 08 da 10 	ld.l	%r1\(%r6\),%r26
-  58:	01 60 f9 10 	ld.l	%r12\(%r7\),%r25
-  5c:	01 68 18 11 	ld.l	%r13\(%r8\),%r24
-  60:	01 70 37 11 	ld.l	%r14\(%r9\),%r23
-  64:	01 78 56 11 	ld.l	%r15\(%r10\),%r22
-  68:	01 80 75 11 	ld.l	%r16\(%r11\),%r21
-  6c:	01 88 94 11 	ld.l	%r17\(%r12\),%r20
-  70:	01 e0 b3 11 	ld.l	%r28\(%r13\),%r19
-  74:	01 f8 d2 11 	ld.l	%r31\(%r14\),%r18
diff --git a/gas/testsuite/gas/i860/ldst01.s b/gas/testsuite/gas/i860/ldst01.s
deleted file mode 100644
index 498f346..0000000
--- a/gas/testsuite/gas/i860/ldst01.s
+++ /dev/null
@@ -1,35 +0,0 @@
-# ld.l (no relocations here)
-	.text
-
-	ld.l	0(%r0),%r0
-	ld.l	124(%r1),%r31
-	ld.l	256(%r2),%r30
-	ld.l	512(%r3),%r29
-	ld.l	1024(%r4),%r28
-	ld.l	4096(%r5),%r27
-	ld.l	8192(%r6),%r26
-	ld.l	16384(%r7),%r25
-	ld.l	-16384(%r8),%r24
-	ld.l	-8192(%r9),%r23
-	ld.l	-4096(%r10),%r22
-	ld.l	-1024(%r11),%r21
-	ld.l	-508(%r12),%r20
-	ld.l	-248(%r13),%r19
-	ld.l	-4(%r14),%r18
-
-	ld.l	%r5(%r0),%r0
-	ld.l	%r6(%r1),%r31
-	ld.l	%r7(%r2),%r30
-	ld.l	%r8(%r3),%r29
-	ld.l	%r9(%r4),%r28
-	ld.l	%r0(%r5),%r27
-	ld.l	%r1(%r6),%r26
-	ld.l	%r12(%r7),%r25
-	ld.l	%r13(%r8),%r24
-	ld.l	%r14(%r9),%r23
-	ld.l	%r15(%r10),%r22
-	ld.l	%r16(%r11),%r21
-	ld.l	%r17(%r12),%r20
-	ld.l	%r28(%r13),%r19
-	ld.l	%r31(%r14),%r18
-
diff --git a/gas/testsuite/gas/i860/ldst02.d b/gas/testsuite/gas/i860/ldst02.d
deleted file mode 100644
index ec03ae5..0000000
--- a/gas/testsuite/gas/i860/ldst02.d
+++ /dev/null
@@ -1,39 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 ldst02 (ld.s)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 14 	ld.s	0\(%r0\),%r0
-   4:	7a 00 3f 14 	ld.s	122\(%r1\),%r31
-   8:	02 01 5e 14 	ld.s	258\(%sp\),%r30
-   c:	00 02 7d 14 	ld.s	512\(%fp\),%r29
-  10:	04 04 9c 14 	ld.s	1028\(%r4\),%r28
-  14:	fa 0f bb 14 	ld.s	4090\(%r5\),%r27
-  18:	fe 1f da 14 	ld.s	8190\(%r6\),%r26
-  1c:	00 40 f9 14 	ld.s	16384\(%r7\),%r25
-  20:	00 c0 18 15 	ld.s	-16384\(%r8\),%r24
-  24:	00 e0 37 15 	ld.s	-8192\(%r9\),%r23
-  28:	00 f0 56 15 	ld.s	-4096\(%r10\),%r22
-  2c:	00 fc 75 15 	ld.s	-1024\(%r11\),%r21
-  30:	04 fe 94 15 	ld.s	-508\(%r12\),%r20
-  34:	0e ff b3 15 	ld.s	-242\(%r13\),%r19
-  38:	fe ff d2 15 	ld.s	-2\(%r14\),%r18
-  3c:	00 28 00 10 	ld.s	%r5\(%r0\),%r0
-  40:	00 30 3f 10 	ld.s	%r6\(%r1\),%r31
-  44:	00 38 5e 10 	ld.s	%r7\(%sp\),%r30
-  48:	00 40 7d 10 	ld.s	%r8\(%fp\),%r29
-  4c:	00 48 9c 10 	ld.s	%r9\(%r4\),%r28
-  50:	00 00 bb 10 	ld.s	%r0\(%r5\),%r27
-  54:	00 08 da 10 	ld.s	%r1\(%r6\),%r26
-  58:	00 60 f9 10 	ld.s	%r12\(%r7\),%r25
-  5c:	00 68 18 11 	ld.s	%r13\(%r8\),%r24
-  60:	00 70 37 11 	ld.s	%r14\(%r9\),%r23
-  64:	00 78 56 11 	ld.s	%r15\(%r10\),%r22
-  68:	00 80 75 11 	ld.s	%r16\(%r11\),%r21
-  6c:	00 88 94 11 	ld.s	%r17\(%r12\),%r20
-  70:	00 e0 b3 11 	ld.s	%r28\(%r13\),%r19
-  74:	00 f8 d2 11 	ld.s	%r31\(%r14\),%r18
diff --git a/gas/testsuite/gas/i860/ldst02.s b/gas/testsuite/gas/i860/ldst02.s
deleted file mode 100644
index 52c0e1a..0000000
--- a/gas/testsuite/gas/i860/ldst02.s
+++ /dev/null
@@ -1,35 +0,0 @@
-# ld.s (no relocations here)
-	.text
-
-	ld.s	0(%r0),%r0
-	ld.s	122(%r1),%r31
-	ld.s	258(%r2),%r30
-	ld.s	512(%r3),%r29
-	ld.s	1028(%r4),%r28
-	ld.s	4090(%r5),%r27
-	ld.s	8190(%r6),%r26
-	ld.s	16384(%r7),%r25
-	ld.s	-16384(%r8),%r24
-	ld.s	-8192(%r9),%r23
-	ld.s	-4096(%r10),%r22
-	ld.s	-1024(%r11),%r21
-	ld.s	-508(%r12),%r20
-	ld.s	-242(%r13),%r19
-	ld.s	-2(%r14),%r18
-
-	ld.s	%r5(%r0),%r0
-	ld.s	%r6(%r1),%r31
-	ld.s	%r7(%r2),%r30
-	ld.s	%r8(%r3),%r29
-	ld.s	%r9(%r4),%r28
-	ld.s	%r0(%r5),%r27
-	ld.s	%r1(%r6),%r26
-	ld.s	%r12(%r7),%r25
-	ld.s	%r13(%r8),%r24
-	ld.s	%r14(%r9),%r23
-	ld.s	%r15(%r10),%r22
-	ld.s	%r16(%r11),%r21
-	ld.s	%r17(%r12),%r20
-	ld.s	%r28(%r13),%r19
-	ld.s	%r31(%r14),%r18
-
diff --git a/gas/testsuite/gas/i860/ldst03.d b/gas/testsuite/gas/i860/ldst03.d
deleted file mode 100644
index f3f0008..0000000
--- a/gas/testsuite/gas/i860/ldst03.d
+++ /dev/null
@@ -1,43 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 ldst03 (ld.b)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 04 	ld.b	0\(%r0\),%r0
-   4:	01 00 3f 04 	ld.b	1\(%r1\),%r31
-   8:	02 00 5e 04 	ld.b	2\(%sp\),%r30
-   c:	01 02 7d 04 	ld.b	513\(%fp\),%r29
-  10:	04 04 9c 04 	ld.b	1028\(%r4\),%r28
-  14:	fa 0f bb 04 	ld.b	4090\(%r5\),%r27
-  18:	fe 1f da 04 	ld.b	8190\(%r6\),%r26
-  1c:	01 40 f9 04 	ld.b	16385\(%r7\),%r25
-  20:	07 7d f9 04 	ld.b	32007\(%r7\),%r25
-  24:	ff 7f f9 04 	ld.b	32767\(%r7\),%r25
-  28:	00 80 f9 04 	ld.b	-32768\(%r7\),%r25
-  2c:	01 80 f9 04 	ld.b	-32767\(%r7\),%r25
-  30:	01 c0 18 05 	ld.b	-16383\(%r8\),%r24
-  34:	5b e0 37 05 	ld.b	-8101\(%r9\),%r23
-  38:	05 f0 56 05 	ld.b	-4091\(%r10\),%r22
-  3c:	01 fc 75 05 	ld.b	-1023\(%r11\),%r21
-  40:	03 fe 94 05 	ld.b	-509\(%r12\),%r20
-  44:	e9 ff b3 05 	ld.b	-23\(%r13\),%r19
-  48:	ff ff d2 05 	ld.b	-1\(%r14\),%r18
-  4c:	00 28 00 00 	ld.b	%r5\(%r0\),%r0
-  50:	00 30 3f 00 	ld.b	%r6\(%r1\),%r31
-  54:	00 38 5e 00 	ld.b	%r7\(%sp\),%r30
-  58:	00 40 7d 00 	ld.b	%r8\(%fp\),%r29
-  5c:	00 48 9c 00 	ld.b	%r9\(%r4\),%r28
-  60:	00 00 bb 00 	ld.b	%r0\(%r5\),%r27
-  64:	00 08 da 00 	ld.b	%r1\(%r6\),%r26
-  68:	00 60 f9 00 	ld.b	%r12\(%r7\),%r25
-  6c:	00 68 18 01 	ld.b	%r13\(%r8\),%r24
-  70:	00 70 37 01 	ld.b	%r14\(%r9\),%r23
-  74:	00 78 56 01 	ld.b	%r15\(%r10\),%r22
-  78:	00 80 75 01 	ld.b	%r16\(%r11\),%r21
-  7c:	00 88 94 01 	ld.b	%r17\(%r12\),%r20
-  80:	00 e0 b3 01 	ld.b	%r28\(%r13\),%r19
-  84:	00 f8 d2 01 	ld.b	%r31\(%r14\),%r18
diff --git a/gas/testsuite/gas/i860/ldst03.s b/gas/testsuite/gas/i860/ldst03.s
deleted file mode 100644
index 055a3b8..0000000
--- a/gas/testsuite/gas/i860/ldst03.s
+++ /dev/null
@@ -1,39 +0,0 @@
-# ld.b (no relocations here)
-	.text
-
-	ld.b	0(%r0),%r0
-	ld.b	1(%r1),%r31
-	ld.b	2(%r2),%r30
-	ld.b	513(%r3),%r29
-	ld.b	1028(%r4),%r28
-	ld.b	4090(%r5),%r27
-	ld.b	8190(%r6),%r26
-	ld.b	16385(%r7),%r25
-	ld.b	32007(%r7),%r25
-	ld.b	32767(%r7),%r25
-	ld.b	-32768(%r7),%r25
-	ld.b	-32767(%r7),%r25
-	ld.b	-16383(%r8),%r24
-	ld.b	-8101(%r9),%r23
-	ld.b	-4091(%r10),%r22
-	ld.b	-1023(%r11),%r21
-	ld.b	-509(%r12),%r20
-	ld.b	-23(%r13),%r19
-	ld.b	-1(%r14),%r18
-
-	ld.b	%r5(%r0),%r0
-	ld.b	%r6(%r1),%r31
-	ld.b	%r7(%r2),%r30
-	ld.b	%r8(%r3),%r29
-	ld.b	%r9(%r4),%r28
-	ld.b	%r0(%r5),%r27
-	ld.b	%r1(%r6),%r26
-	ld.b	%r12(%r7),%r25
-	ld.b	%r13(%r8),%r24
-	ld.b	%r14(%r9),%r23
-	ld.b	%r15(%r10),%r22
-	ld.b	%r16(%r11),%r21
-	ld.b	%r17(%r12),%r20
-	ld.b	%r28(%r13),%r19
-	ld.b	%r31(%r14),%r18
-
diff --git a/gas/testsuite/gas/i860/ldst04.d b/gas/testsuite/gas/i860/ldst04.d
deleted file mode 100644
index a9130ac..0000000
--- a/gas/testsuite/gas/i860/ldst04.d
+++ /dev/null
@@ -1,24 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 ldst04 (st.l)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	01 00 00 1c 	st.l	%r0,0\(%r0\)
-   4:	7d f8 20 1c 	st.l	%r31,124\(%r1\)
-   8:	01 f1 40 1c 	st.l	%r30,256\(%sp\)
-   c:	01 ea 60 1c 	st.l	%r29,512\(%fp\)
-  10:	01 e4 80 1c 	st.l	%r28,1024\(%r4\)
-  14:	01 d8 a2 1c 	st.l	%r27,4096\(%r5\)
-  18:	01 d0 c4 1c 	st.l	%r26,8192\(%r6\)
-  1c:	01 c8 e8 1c 	st.l	%r25,16384\(%r7\)
-  20:	01 c0 18 1d 	st.l	%r24,-16384\(%r8\)
-  24:	01 b8 3c 1d 	st.l	%r23,-8192\(%r9\)
-  28:	01 b0 5e 1d 	st.l	%r22,-4096\(%r10\)
-  2c:	01 ac 7f 1d 	st.l	%r21,-1024\(%r11\)
-  30:	05 a6 9f 1d 	st.l	%r20,-508\(%r12\)
-  34:	09 9f bf 1d 	st.l	%r19,-248\(%r13\)
-  38:	fd 97 df 1d 	st.l	%r18,-4\(%r14\)
diff --git a/gas/testsuite/gas/i860/ldst04.s b/gas/testsuite/gas/i860/ldst04.s
deleted file mode 100644
index 8e22b6f..0000000
--- a/gas/testsuite/gas/i860/ldst04.s
+++ /dev/null
@@ -1,19 +0,0 @@
-# st.l (no relocations here)
-	.text
-
-	st.l	%r0,0(%r0)
-	st.l	%r31,124(%r1)
-	st.l	%r30,256(%r2)
-	st.l	%r29,512(%r3)
-	st.l	%r28,1024(%r4)
-	st.l	%r27,4096(%r5)
-	st.l	%r26,8192(%r6)
-	st.l	%r25,16384(%r7)
-	st.l	%r24,-16384(%r8)
-	st.l	%r23,-8192(%r9)
-	st.l	%r22,-4096(%r10)
-	st.l	%r21,-1024(%r11)
-	st.l	%r20,-508(%r12)
-	st.l	%r19,-248(%r13)
-	st.l	%r18,-4(%r14)
-
diff --git a/gas/testsuite/gas/i860/ldst05.d b/gas/testsuite/gas/i860/ldst05.d
deleted file mode 100644
index e57f822..0000000
--- a/gas/testsuite/gas/i860/ldst05.d
+++ /dev/null
@@ -1,24 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 ldst05 (st.s)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 1c 	st.s	%r0,0\(%r0\)
-   4:	7a f8 20 1c 	st.s	%r31,122\(%r1\)
-   8:	02 f1 40 1c 	st.s	%r30,258\(%sp\)
-   c:	00 ea 60 1c 	st.s	%r29,512\(%fp\)
-  10:	04 e4 80 1c 	st.s	%r28,1028\(%r4\)
-  14:	fa df a1 1c 	st.s	%r27,4090\(%r5\)
-  18:	fe d7 c3 1c 	st.s	%r26,8190\(%r6\)
-  1c:	00 c8 e8 1c 	st.s	%r25,16384\(%r7\)
-  20:	00 c0 18 1d 	st.s	%r24,-16384\(%r8\)
-  24:	00 b8 3c 1d 	st.s	%r23,-8192\(%r9\)
-  28:	00 b0 5e 1d 	st.s	%r22,-4096\(%r10\)
-  2c:	00 ac 7f 1d 	st.s	%r21,-1024\(%r11\)
-  30:	04 a6 9f 1d 	st.s	%r20,-508\(%r12\)
-  34:	0e 9f bf 1d 	st.s	%r19,-242\(%r13\)
-  38:	fe 97 df 1d 	st.s	%r18,-2\(%r14\)
diff --git a/gas/testsuite/gas/i860/ldst05.s b/gas/testsuite/gas/i860/ldst05.s
deleted file mode 100644
index 7f253f4..0000000
--- a/gas/testsuite/gas/i860/ldst05.s
+++ /dev/null
@@ -1,19 +0,0 @@
-# st.s (no relocations here)
-	.text
-
-	st.s	%r0,0(%r0)
-	st.s	%r31,122(%r1)
-	st.s	%r30,258(%r2)
-	st.s	%r29,512(%r3)
-	st.s	%r28,1028(%r4)
-	st.s	%r27,4090(%r5)
-	st.s	%r26,8190(%r6)
-	st.s	%r25,16384(%r7)
-	st.s	%r24,-16384(%r8)
-	st.s	%r23,-8192(%r9)
-	st.s	%r22,-4096(%r10)
-	st.s	%r21,-1024(%r11)
-	st.s	%r20,-508(%r12)
-	st.s	%r19,-242(%r13)
-	st.s	%r18,-2(%r14)
-
diff --git a/gas/testsuite/gas/i860/ldst06.d b/gas/testsuite/gas/i860/ldst06.d
deleted file mode 100644
index a1c54d1..0000000
--- a/gas/testsuite/gas/i860/ldst06.d
+++ /dev/null
@@ -1,28 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 ldst06 (st.b)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 00 0c 	st.b	%r0,0\(%r0\)
-   4:	01 f8 20 0c 	st.b	%r31,1\(%r1\)
-   8:	02 f0 40 0c 	st.b	%r30,2\(%sp\)
-   c:	01 ea 60 0c 	st.b	%r29,513\(%fp\)
-  10:	04 e4 80 0c 	st.b	%r28,1028\(%r4\)
-  14:	fa df a1 0c 	st.b	%r27,4090\(%r5\)
-  18:	fe d7 c3 0c 	st.b	%r26,8190\(%r6\)
-  1c:	01 c8 e8 0c 	st.b	%r25,16385\(%r7\)
-  20:	07 cd ef 0c 	st.b	%r25,32007\(%r7\)
-  24:	ff cf ef 0c 	st.b	%r25,32767\(%r7\)
-  28:	00 c8 f0 0c 	st.b	%r25,-32768\(%r7\)
-  2c:	01 c8 f0 0c 	st.b	%r25,-32767\(%r7\)
-  30:	01 c0 18 0d 	st.b	%r24,-16383\(%r8\)
-  34:	5b b8 3c 0d 	st.b	%r23,-8101\(%r9\)
-  38:	05 b0 5e 0d 	st.b	%r22,-4091\(%r10\)
-  3c:	01 ac 7f 0d 	st.b	%r21,-1023\(%r11\)
-  40:	03 a6 9f 0d 	st.b	%r20,-509\(%r12\)
-  44:	e9 9f bf 0d 	st.b	%r19,-23\(%r13\)
-  48:	ff 97 df 0d 	st.b	%r18,-1\(%r14\)
diff --git a/gas/testsuite/gas/i860/ldst06.s b/gas/testsuite/gas/i860/ldst06.s
deleted file mode 100644
index bb817ab..0000000
--- a/gas/testsuite/gas/i860/ldst06.s
+++ /dev/null
@@ -1,22 +0,0 @@
-# st.b (no relocations here)
-	.text
-
-	st.b	%r0,0(%r0)
-	st.b	%r31,1(%r1)
-	st.b	%r30,2(%r2)
-	st.b	%r29,513(%r3)
-	st.b	%r28,1028(%r4)
-	st.b	%r27,4090(%r5)
-	st.b	%r26,8190(%r6)
-	st.b	%r25,16385(%r7)
-	st.b	%r25,32007(%r7)
-	st.b	%r25,32767(%r7)
-	st.b	%r25,-32768(%r7)
-	st.b	%r25,-32767(%r7)
-	st.b	%r24,-16383(%r8)
-	st.b	%r23,-8101(%r9)
-	st.b	%r22,-4091(%r10)
-	st.b	%r21,-1023(%r11)
-	st.b	%r20,-509(%r12)
-	st.b	%r19,-23(%r13)
-	st.b	%r18,-1(%r14)
diff --git a/gas/testsuite/gas/i860/pfam.d b/gas/testsuite/gas/i860/pfam.d
deleted file mode 100644
index 2d95081..0000000
--- a/gas/testsuite/gas/i860/pfam.d
+++ /dev/null
@@ -1,153 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 pfam
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 04 22 48 	r2p1.ss	%f0,%f1,%f2
-   4:	80 1c 85 48 	r2p1.sd	%f3,%f4,%f5
-   8:	80 05 44 48 	r2p1.dd	%f0,%f2,%f4
-   c:	01 0c 43 48 	r2pt.ss	%f1,%f2,%f3
-  10:	81 24 a6 48 	r2pt.sd	%f4,%f5,%f6
-  14:	81 15 86 48 	r2pt.dd	%f2,%f4,%f6
-  18:	02 14 64 48 	r2ap1.ss	%f2,%f3,%f4
-  1c:	82 34 e8 48 	r2ap1.sd	%f6,%f7,%f8
-  20:	82 25 c8 48 	r2ap1.dd	%f4,%f6,%f8
-  24:	03 1c 85 48 	r2apt.ss	%f3,%f4,%f5
-  28:	83 3c 09 49 	r2apt.sd	%f7,%f8,%f9
-  2c:	83 35 0a 49 	r2apt.dd	%f6,%f8,%f10
-  30:	04 24 a6 48 	i2p1.ss	%f4,%f5,%f6
-  34:	84 44 2a 49 	i2p1.sd	%f8,%f9,%f10
-  38:	84 65 d0 49 	i2p1.dd	%f12,%f14,%f16
-  3c:	05 3c 09 49 	i2pt.ss	%f7,%f8,%f9
-  40:	85 5c 8d 49 	i2pt.sd	%f11,%f12,%f13
-  44:	85 75 12 4a 	i2pt.dd	%f14,%f16,%f18
-  48:	06 54 6c 49 	i2ap1.ss	%f10,%f11,%f12
-  4c:	86 74 f0 49 	i2ap1.sd	%f14,%f15,%f16
-  50:	86 85 54 4a 	i2ap1.dd	%f16,%f18,%f20
-  54:	07 6c cf 49 	i2apt.ss	%f13,%f14,%f15
-  58:	87 8c 53 4a 	i2apt.sd	%f17,%f18,%f19
-  5c:	87 95 96 4a 	i2apt.dd	%f18,%f20,%f22
-  60:	08 74 f0 49 	rat1p2.ss	%f14,%f15,%f16
-  64:	88 a4 b6 4a 	rat1p2.sd	%f20,%f21,%f22
-  68:	88 a5 d8 4a 	rat1p2.dd	%f20,%f22,%f24
-  6c:	09 7c 11 4a 	m12apm.ss	%f15,%f16,%f17
-  70:	89 bc 19 4b 	m12apm.sd	%f23,%f24,%f25
-  74:	89 b5 1a 4b 	m12apm.dd	%f22,%f24,%f26
-  78:	0a 94 74 4a 	ra1p2.ss	%f18,%f19,%f20
-  7c:	8a d4 7c 4b 	ra1p2.sd	%f26,%f27,%f28
-  80:	8a a5 d8 4a 	ra1p2.dd	%f20,%f22,%f24
-  84:	0b 9c 95 4a 	m12ttpa.ss	%f19,%f20,%f21
-  88:	8b ec df 4b 	m12ttpa.sd	%f29,%f30,%f31
-  8c:	8b b5 1a 4b 	m12ttpa.dd	%f22,%f24,%f26
-  90:	0c a4 b6 4a 	iat1p2.ss	%f20,%f21,%f22
-  94:	8c 04 22 48 	iat1p2.sd	%f0,%f1,%f2
-  98:	8c c5 5c 4b 	iat1p2.dd	%f24,%f26,%f28
-  9c:	0d ac d7 4a 	m12tpm.ss	%f21,%f22,%f23
-  a0:	8d 1c 85 48 	m12tpm.sd	%f3,%f4,%f5
-  a4:	8d f5 02 48 	m12tpm.dd	%f30,%f0,%f2
-  a8:	0e b4 f8 4a 	ia1p2.ss	%f22,%f23,%f24
-  ac:	8e 34 e8 48 	ia1p2.sd	%f6,%f7,%f8
-  b0:	8e 25 c8 48 	ia1p2.dd	%f4,%f6,%f8
-  b4:	0f bc 19 4b 	m12tpa.ss	%f23,%f24,%f25
-  b8:	8f 4c 4b 49 	m12tpa.sd	%f9,%f10,%f11
-  bc:	8f 35 0a 49 	m12tpa.dd	%f6,%f8,%f10
-  c0:	00 06 22 48 	d.r2p1.ss	%f0,%f1,%f2
-  c4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c8:	80 1e 85 48 	d.r2p1.sd	%f3,%f4,%f5
-  cc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d0:	80 07 44 48 	d.r2p1.dd	%f0,%f2,%f4
-  d4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d8:	01 0e 43 48 	d.r2pt.ss	%f1,%f2,%f3
-  dc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e0:	81 26 a6 48 	d.r2pt.sd	%f4,%f5,%f6
-  e4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e8:	81 17 86 48 	d.r2pt.dd	%f2,%f4,%f6
-  ec:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f0:	02 16 64 48 	d.r2ap1.ss	%f2,%f3,%f4
-  f4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f8:	82 36 e8 48 	d.r2ap1.sd	%f6,%f7,%f8
-  fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 100:	82 27 c8 48 	d.r2ap1.dd	%f4,%f6,%f8
- 104:	00 00 00 a0 	shl	%r0,%r0,%r0
- 108:	03 1e 85 48 	d.r2apt.ss	%f3,%f4,%f5
- 10c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 110:	83 3e 09 49 	d.r2apt.sd	%f7,%f8,%f9
- 114:	00 00 00 a0 	shl	%r0,%r0,%r0
- 118:	83 37 0a 49 	d.r2apt.dd	%f6,%f8,%f10
- 11c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 120:	04 26 a6 48 	d.i2p1.ss	%f4,%f5,%f6
- 124:	00 00 00 a0 	shl	%r0,%r0,%r0
- 128:	84 46 2a 49 	d.i2p1.sd	%f8,%f9,%f10
- 12c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 130:	84 67 d0 49 	d.i2p1.dd	%f12,%f14,%f16
- 134:	00 00 00 a0 	shl	%r0,%r0,%r0
- 138:	05 3e 09 49 	d.i2pt.ss	%f7,%f8,%f9
- 13c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 140:	85 5e 8d 49 	d.i2pt.sd	%f11,%f12,%f13
- 144:	00 00 00 a0 	shl	%r0,%r0,%r0
- 148:	85 77 12 4a 	d.i2pt.dd	%f14,%f16,%f18
- 14c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 150:	06 56 6c 49 	d.i2ap1.ss	%f10,%f11,%f12
- 154:	00 00 00 a0 	shl	%r0,%r0,%r0
- 158:	86 76 f0 49 	d.i2ap1.sd	%f14,%f15,%f16
- 15c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 160:	86 87 54 4a 	d.i2ap1.dd	%f16,%f18,%f20
- 164:	00 00 00 a0 	shl	%r0,%r0,%r0
- 168:	07 6e cf 49 	d.i2apt.ss	%f13,%f14,%f15
- 16c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 170:	87 8e 53 4a 	d.i2apt.sd	%f17,%f18,%f19
- 174:	00 00 00 a0 	shl	%r0,%r0,%r0
- 178:	87 97 96 4a 	d.i2apt.dd	%f18,%f20,%f22
- 17c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 180:	08 76 f0 49 	d.rat1p2.ss	%f14,%f15,%f16
- 184:	00 00 00 a0 	shl	%r0,%r0,%r0
- 188:	88 a6 b6 4a 	d.rat1p2.sd	%f20,%f21,%f22
- 18c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 190:	88 a7 d8 4a 	d.rat1p2.dd	%f20,%f22,%f24
- 194:	00 00 00 a0 	shl	%r0,%r0,%r0
- 198:	09 7e 11 4a 	d.m12apm.ss	%f15,%f16,%f17
- 19c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a0:	89 be 19 4b 	d.m12apm.sd	%f23,%f24,%f25
- 1a4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a8:	89 b7 1a 4b 	d.m12apm.dd	%f22,%f24,%f26
- 1ac:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b0:	0a 96 74 4a 	d.ra1p2.ss	%f18,%f19,%f20
- 1b4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b8:	8a d6 7c 4b 	d.ra1p2.sd	%f26,%f27,%f28
- 1bc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c0:	8a a7 d8 4a 	d.ra1p2.dd	%f20,%f22,%f24
- 1c4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c8:	0b 9e 95 4a 	d.m12ttpa.ss	%f19,%f20,%f21
- 1cc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d0:	8b ee df 4b 	d.m12ttpa.sd	%f29,%f30,%f31
- 1d4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d8:	8b b7 1a 4b 	d.m12ttpa.dd	%f22,%f24,%f26
- 1dc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e0:	0c a6 b6 4a 	d.iat1p2.ss	%f20,%f21,%f22
- 1e4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e8:	8c 06 22 48 	d.iat1p2.sd	%f0,%f1,%f2
- 1ec:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f0:	8c c7 5c 4b 	d.iat1p2.dd	%f24,%f26,%f28
- 1f4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f8:	0d ae d7 4a 	d.m12tpm.ss	%f21,%f22,%f23
- 1fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 200:	8d 1e 85 48 	d.m12tpm.sd	%f3,%f4,%f5
- 204:	00 00 00 a0 	shl	%r0,%r0,%r0
- 208:	8d f7 02 48 	d.m12tpm.dd	%f30,%f0,%f2
- 20c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 210:	0e b6 f8 4a 	d.ia1p2.ss	%f22,%f23,%f24
- 214:	00 00 00 a0 	shl	%r0,%r0,%r0
- 218:	8e 36 e8 48 	d.ia1p2.sd	%f6,%f7,%f8
- 21c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 220:	8e 27 c8 48 	d.ia1p2.dd	%f4,%f6,%f8
- 224:	00 00 00 a0 	shl	%r0,%r0,%r0
- 228:	0f be 19 4b 	d.m12tpa.ss	%f23,%f24,%f25
- 22c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 230:	8f 4e 4b 49 	d.m12tpa.sd	%f9,%f10,%f11
- 234:	00 00 00 a0 	shl	%r0,%r0,%r0
- 238:	8f 37 0a 49 	d.m12tpa.dd	%f6,%f8,%f10
- 23c:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/pfam.s b/gas/testsuite/gas/i860/pfam.s
deleted file mode 100644
index 4afc28d..0000000
--- a/gas/testsuite/gas/i860/pfam.s
+++ /dev/null
@@ -1,182 +0,0 @@
-# pfam.p family (p={ss,sd,dd})
-
-	.text
-
-	# pfam without dual bit.
-	r2p1.ss	%f0,%f1,%f2
-	r2p1.sd	%f3,%f4,%f5
-	r2p1.dd	%f0,%f2,%f4
-
-	r2pt.ss	%f1,%f2,%f3
-	r2pt.sd	%f4,%f5,%f6
-	r2pt.dd	%f2,%f4,%f6
-
-	r2ap1.ss	%f2,%f3,%f4
-	r2ap1.sd	%f6,%f7,%f8
-	r2ap1.dd	%f4,%f6,%f8
-
-	r2apt.ss	%f3,%f4,%f5
-	r2apt.sd	%f7,%f8,%f9
-	r2apt.dd	%f6,%f8,%f10
-
-	i2p1.ss	%f4,%f5,%f6
-	i2p1.sd	%f8,%f9,%f10
-	i2p1.dd	%f12,%f14,%f16
-
-	i2pt.ss	%f7,%f8,%f9
-	i2pt.sd	%f11,%f12,%f13
-	i2pt.dd	%f14,%f16,%f18
-
-	i2ap1.ss	%f10,%f11,%f12
-	i2ap1.sd	%f14,%f15,%f16
-	i2ap1.dd	%f16,%f18,%f20
-
-	i2apt.ss	%f13,%f14,%f15
-	i2apt.sd	%f17,%f18,%f19
-	i2apt.dd	%f18,%f20,%f22
-
-	rat1p2.ss	%f14,%f15,%f16
-	rat1p2.sd	%f20,%f21,%f22
-	rat1p2.dd	%f20,%f22,%f24
-
-	m12apm.ss	%f15,%f16,%f17
-	m12apm.sd	%f23,%f24,%f25
-	m12apm.dd	%f22,%f24,%f26
-
-	ra1p2.ss	%f18,%f19,%f20
-	ra1p2.sd	%f26,%f27,%f28
-	ra1p2.dd	%f20,%f22,%f24
-
-	m12ttpa.ss	%f19,%f20,%f21
-	m12ttpa.sd	%f29,%f30,%f31
-	m12ttpa.dd	%f22,%f24,%f26
-
-	iat1p2.ss	%f20,%f21,%f22
-	iat1p2.sd	%f0,%f1,%f2
-	iat1p2.dd	%f24,%f26,%f28
-
-	m12tpm.ss	%f21,%f22,%f23
-	m12tpm.sd	%f3,%f4,%f5
-	m12tpm.dd	%f30,%f0,%f2
-
-	ia1p2.ss	%f22,%f23,%f24
-	ia1p2.sd	%f6,%f7,%f8
-	ia1p2.dd	%f4,%f6,%f8
-
-	m12tpa.ss	%f23,%f24,%f25
-	m12tpa.sd	%f9,%f10,%f11
-	m12tpa.dd	%f6,%f8,%f10
-
-	# pfam with dual bit.
-	d.r2p1.ss	%f0,%f1,%f2
-	nop
-	d.r2p1.sd	%f3,%f4,%f5
-	nop
-	d.r2p1.dd	%f0,%f2,%f4
-	nop
-
-	d.r2pt.ss	%f1,%f2,%f3
-	nop
-	d.r2pt.sd	%f4,%f5,%f6
-	nop
-	d.r2pt.dd	%f2,%f4,%f6
-	nop
-
-	d.r2ap1.ss	%f2,%f3,%f4
-	nop
-	d.r2ap1.sd	%f6,%f7,%f8
-	nop
-	d.r2ap1.dd	%f4,%f6,%f8
-	nop
-
-	d.r2apt.ss	%f3,%f4,%f5
-	nop
-	d.r2apt.sd	%f7,%f8,%f9
-	nop
-	d.r2apt.dd	%f6,%f8,%f10
-	nop
-
-	d.i2p1.ss	%f4,%f5,%f6
-	nop
-	d.i2p1.sd	%f8,%f9,%f10
-	nop
-	d.i2p1.dd	%f12,%f14,%f16
-	nop
-
-	d.i2pt.ss	%f7,%f8,%f9
-	nop
-	d.i2pt.sd	%f11,%f12,%f13
-	nop
-	d.i2pt.dd	%f14,%f16,%f18
-	nop
-
-	d.i2ap1.ss	%f10,%f11,%f12
-	nop
-	d.i2ap1.sd	%f14,%f15,%f16
-	nop
-	d.i2ap1.dd	%f16,%f18,%f20
-	nop
-
-	d.i2apt.ss	%f13,%f14,%f15
-	nop
-	d.i2apt.sd	%f17,%f18,%f19
-	nop
-	d.i2apt.dd	%f18,%f20,%f22
-	nop
-
-	d.rat1p2.ss	%f14,%f15,%f16
-	nop
-	d.rat1p2.sd	%f20,%f21,%f22
-	nop
-	d.rat1p2.dd	%f20,%f22,%f24
-	nop
-
-	d.m12apm.ss	%f15,%f16,%f17
-	nop
-	d.m12apm.sd	%f23,%f24,%f25
-	nop
-	d.m12apm.dd	%f22,%f24,%f26
-	nop
-
-	d.ra1p2.ss	%f18,%f19,%f20
-	nop
-	d.ra1p2.sd	%f26,%f27,%f28
-	nop
-	d.ra1p2.dd	%f20,%f22,%f24
-	nop
-
-	d.m12ttpa.ss	%f19,%f20,%f21
-	nop
-	d.m12ttpa.sd	%f29,%f30,%f31
-	nop
-	d.m12ttpa.dd	%f22,%f24,%f26
-	nop
-
-	d.iat1p2.ss	%f20,%f21,%f22
-	nop
-	d.iat1p2.sd	%f0,%f1,%f2
-	nop
-	d.iat1p2.dd	%f24,%f26,%f28
-	nop
-
-	d.m12tpm.ss	%f21,%f22,%f23
-	nop
-	d.m12tpm.sd	%f3,%f4,%f5
-	nop
-	d.m12tpm.dd	%f30,%f0,%f2
-	nop
-
-	d.ia1p2.ss	%f22,%f23,%f24
-	nop
-	d.ia1p2.sd	%f6,%f7,%f8
-	nop
-	d.ia1p2.dd	%f4,%f6,%f8
-	nop
-
-	d.m12tpa.ss	%f23,%f24,%f25
-	nop
-	d.m12tpa.sd	%f9,%f10,%f11
-	nop
-	d.m12tpa.dd	%f6,%f8,%f10
-	nop
-
diff --git a/gas/testsuite/gas/i860/pfmam.d b/gas/testsuite/gas/i860/pfmam.d
deleted file mode 100644
index 63f48a4..0000000
--- a/gas/testsuite/gas/i860/pfmam.d
+++ /dev/null
@@ -1,153 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 pfmam
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 22 48 	mr2p1.ss	%f0,%f1,%f2
-   4:	80 18 85 48 	mr2p1.sd	%f3,%f4,%f5
-   8:	80 01 44 48 	mr2p1.dd	%f0,%f2,%f4
-   c:	01 08 43 48 	mr2pt.ss	%f1,%f2,%f3
-  10:	81 20 a6 48 	mr2pt.sd	%f4,%f5,%f6
-  14:	81 11 86 48 	mr2pt.dd	%f2,%f4,%f6
-  18:	02 10 64 48 	mr2mp1.ss	%f2,%f3,%f4
-  1c:	82 30 e8 48 	mr2mp1.sd	%f6,%f7,%f8
-  20:	82 21 c8 48 	mr2mp1.dd	%f4,%f6,%f8
-  24:	03 18 85 48 	mr2mpt.ss	%f3,%f4,%f5
-  28:	83 38 09 49 	mr2mpt.sd	%f7,%f8,%f9
-  2c:	83 31 0a 49 	mr2mpt.dd	%f6,%f8,%f10
-  30:	04 20 a6 48 	mi2p1.ss	%f4,%f5,%f6
-  34:	84 40 2a 49 	mi2p1.sd	%f8,%f9,%f10
-  38:	84 61 d0 49 	mi2p1.dd	%f12,%f14,%f16
-  3c:	05 38 09 49 	mi2pt.ss	%f7,%f8,%f9
-  40:	85 58 8d 49 	mi2pt.sd	%f11,%f12,%f13
-  44:	85 71 12 4a 	mi2pt.dd	%f14,%f16,%f18
-  48:	06 50 6c 49 	mi2mp1.ss	%f10,%f11,%f12
-  4c:	86 70 f0 49 	mi2mp1.sd	%f14,%f15,%f16
-  50:	86 81 54 4a 	mi2mp1.dd	%f16,%f18,%f20
-  54:	07 68 cf 49 	mi2mpt.ss	%f13,%f14,%f15
-  58:	87 88 53 4a 	mi2mpt.sd	%f17,%f18,%f19
-  5c:	87 91 96 4a 	mi2mpt.dd	%f18,%f20,%f22
-  60:	08 70 f0 49 	mrmt1p2.ss	%f14,%f15,%f16
-  64:	88 a0 b6 4a 	mrmt1p2.sd	%f20,%f21,%f22
-  68:	88 a1 d8 4a 	mrmt1p2.dd	%f20,%f22,%f24
-  6c:	09 78 11 4a 	mm12mpm.ss	%f15,%f16,%f17
-  70:	89 b8 19 4b 	mm12mpm.sd	%f23,%f24,%f25
-  74:	89 b1 1a 4b 	mm12mpm.dd	%f22,%f24,%f26
-  78:	0a 90 74 4a 	mrm1p2.ss	%f18,%f19,%f20
-  7c:	8a d0 7c 4b 	mrm1p2.sd	%f26,%f27,%f28
-  80:	8a a1 d8 4a 	mrm1p2.dd	%f20,%f22,%f24
-  84:	0b 98 95 4a 	mm12ttpm.ss	%f19,%f20,%f21
-  88:	8b e8 df 4b 	mm12ttpm.sd	%f29,%f30,%f31
-  8c:	8b b1 1a 4b 	mm12ttpm.dd	%f22,%f24,%f26
-  90:	0c a0 b6 4a 	mimt1p2.ss	%f20,%f21,%f22
-  94:	8c 00 22 48 	mimt1p2.sd	%f0,%f1,%f2
-  98:	8c c1 5c 4b 	mimt1p2.dd	%f24,%f26,%f28
-  9c:	0d a8 d7 4a 	mm12tpm.ss	%f21,%f22,%f23
-  a0:	8d 18 85 48 	mm12tpm.sd	%f3,%f4,%f5
-  a4:	8d f1 02 48 	mm12tpm.dd	%f30,%f0,%f2
-  a8:	0e b0 f8 4a 	mim1p2.ss	%f22,%f23,%f24
-  ac:	8e 30 e8 48 	mim1p2.sd	%f6,%f7,%f8
-  b0:	8e 21 c8 48 	mim1p2.dd	%f4,%f6,%f8
-  b4:	0f bc 19 4b 	m12tpa.ss	%f23,%f24,%f25
-  b8:	8f 4c 4b 49 	m12tpa.sd	%f9,%f10,%f11
-  bc:	8f 35 0a 49 	m12tpa.dd	%f6,%f8,%f10
-  c0:	00 02 22 48 	d.mr2p1.ss	%f0,%f1,%f2
-  c4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c8:	80 1a 85 48 	d.mr2p1.sd	%f3,%f4,%f5
-  cc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d0:	80 03 44 48 	d.mr2p1.dd	%f0,%f2,%f4
-  d4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d8:	01 0a 43 48 	d.mr2pt.ss	%f1,%f2,%f3
-  dc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e0:	81 22 a6 48 	d.mr2pt.sd	%f4,%f5,%f6
-  e4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e8:	81 13 86 48 	d.mr2pt.dd	%f2,%f4,%f6
-  ec:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f0:	02 12 64 48 	d.mr2mp1.ss	%f2,%f3,%f4
-  f4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f8:	82 32 e8 48 	d.mr2mp1.sd	%f6,%f7,%f8
-  fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 100:	82 23 c8 48 	d.mr2mp1.dd	%f4,%f6,%f8
- 104:	00 00 00 a0 	shl	%r0,%r0,%r0
- 108:	03 1a 85 48 	d.mr2mpt.ss	%f3,%f4,%f5
- 10c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 110:	83 3a 09 49 	d.mr2mpt.sd	%f7,%f8,%f9
- 114:	00 00 00 a0 	shl	%r0,%r0,%r0
- 118:	83 33 0a 49 	d.mr2mpt.dd	%f6,%f8,%f10
- 11c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 120:	04 22 a6 48 	d.mi2p1.ss	%f4,%f5,%f6
- 124:	00 00 00 a0 	shl	%r0,%r0,%r0
- 128:	84 42 2a 49 	d.mi2p1.sd	%f8,%f9,%f10
- 12c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 130:	84 63 d0 49 	d.mi2p1.dd	%f12,%f14,%f16
- 134:	00 00 00 a0 	shl	%r0,%r0,%r0
- 138:	05 3a 09 49 	d.mi2pt.ss	%f7,%f8,%f9
- 13c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 140:	85 5a 8d 49 	d.mi2pt.sd	%f11,%f12,%f13
- 144:	00 00 00 a0 	shl	%r0,%r0,%r0
- 148:	85 73 12 4a 	d.mi2pt.dd	%f14,%f16,%f18
- 14c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 150:	06 52 6c 49 	d.mi2mp1.ss	%f10,%f11,%f12
- 154:	00 00 00 a0 	shl	%r0,%r0,%r0
- 158:	86 72 f0 49 	d.mi2mp1.sd	%f14,%f15,%f16
- 15c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 160:	86 83 54 4a 	d.mi2mp1.dd	%f16,%f18,%f20
- 164:	00 00 00 a0 	shl	%r0,%r0,%r0
- 168:	07 6a cf 49 	d.mi2mpt.ss	%f13,%f14,%f15
- 16c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 170:	87 8a 53 4a 	d.mi2mpt.sd	%f17,%f18,%f19
- 174:	00 00 00 a0 	shl	%r0,%r0,%r0
- 178:	87 93 96 4a 	d.mi2mpt.dd	%f18,%f20,%f22
- 17c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 180:	08 72 f0 49 	d.mrmt1p2.ss	%f14,%f15,%f16
- 184:	00 00 00 a0 	shl	%r0,%r0,%r0
- 188:	88 a2 b6 4a 	d.mrmt1p2.sd	%f20,%f21,%f22
- 18c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 190:	88 a3 d8 4a 	d.mrmt1p2.dd	%f20,%f22,%f24
- 194:	00 00 00 a0 	shl	%r0,%r0,%r0
- 198:	09 7a 11 4a 	d.mm12mpm.ss	%f15,%f16,%f17
- 19c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a0:	89 ba 19 4b 	d.mm12mpm.sd	%f23,%f24,%f25
- 1a4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a8:	89 b3 1a 4b 	d.mm12mpm.dd	%f22,%f24,%f26
- 1ac:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b0:	0a 92 74 4a 	d.mrm1p2.ss	%f18,%f19,%f20
- 1b4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b8:	8a d2 7c 4b 	d.mrm1p2.sd	%f26,%f27,%f28
- 1bc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c0:	8a a3 d8 4a 	d.mrm1p2.dd	%f20,%f22,%f24
- 1c4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c8:	0b 9a 95 4a 	d.mm12ttpm.ss	%f19,%f20,%f21
- 1cc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d0:	8b ea df 4b 	d.mm12ttpm.sd	%f29,%f30,%f31
- 1d4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d8:	8b b3 1a 4b 	d.mm12ttpm.dd	%f22,%f24,%f26
- 1dc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e0:	0c a2 b6 4a 	d.mimt1p2.ss	%f20,%f21,%f22
- 1e4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e8:	8c 02 22 48 	d.mimt1p2.sd	%f0,%f1,%f2
- 1ec:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f0:	8c c3 5c 4b 	d.mimt1p2.dd	%f24,%f26,%f28
- 1f4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f8:	0d aa d7 4a 	d.mm12tpm.ss	%f21,%f22,%f23
- 1fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 200:	8d 1a 85 48 	d.mm12tpm.sd	%f3,%f4,%f5
- 204:	00 00 00 a0 	shl	%r0,%r0,%r0
- 208:	8d f3 02 48 	d.mm12tpm.dd	%f30,%f0,%f2
- 20c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 210:	0e b2 f8 4a 	d.mim1p2.ss	%f22,%f23,%f24
- 214:	00 00 00 a0 	shl	%r0,%r0,%r0
- 218:	8e 32 e8 48 	d.mim1p2.sd	%f6,%f7,%f8
- 21c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 220:	8e 23 c8 48 	d.mim1p2.dd	%f4,%f6,%f8
- 224:	00 00 00 a0 	shl	%r0,%r0,%r0
- 228:	0f be 19 4b 	d.m12tpa.ss	%f23,%f24,%f25
- 22c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 230:	8f 4e 4b 49 	d.m12tpa.sd	%f9,%f10,%f11
- 234:	00 00 00 a0 	shl	%r0,%r0,%r0
- 238:	8f 37 0a 49 	d.m12tpa.dd	%f6,%f8,%f10
- 23c:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/pfmam.s b/gas/testsuite/gas/i860/pfmam.s
deleted file mode 100644
index ac6a1af..0000000
--- a/gas/testsuite/gas/i860/pfmam.s
+++ /dev/null
@@ -1,182 +0,0 @@
-# pfmam.p family (p={ss,sd,dd})
-
-	.text
-
-	# pfmam without dual bit.
-	mr2p1.ss	%f0,%f1,%f2
-	mr2p1.sd	%f3,%f4,%f5
-	mr2p1.dd	%f0,%f2,%f4
-
-	mr2pt.ss	%f1,%f2,%f3
-	mr2pt.sd	%f4,%f5,%f6
-	mr2pt.dd	%f2,%f4,%f6
-
-	mr2mp1.ss	%f2,%f3,%f4
-	mr2mp1.sd	%f6,%f7,%f8
-	mr2mp1.dd	%f4,%f6,%f8
-
-	mr2mpt.ss	%f3,%f4,%f5
-	mr2mpt.sd	%f7,%f8,%f9
-	mr2mpt.dd	%f6,%f8,%f10
-
-	mi2p1.ss	%f4,%f5,%f6
-	mi2p1.sd	%f8,%f9,%f10
-	mi2p1.dd	%f12,%f14,%f16
-
-	mi2pt.ss	%f7,%f8,%f9
-	mi2pt.sd	%f11,%f12,%f13
-	mi2pt.dd	%f14,%f16,%f18
-
-	mi2mp1.ss	%f10,%f11,%f12
-	mi2mp1.sd	%f14,%f15,%f16
-	mi2mp1.dd	%f16,%f18,%f20
-
-	mi2mpt.ss	%f13,%f14,%f15
-	mi2mpt.sd	%f17,%f18,%f19
-	mi2mpt.dd	%f18,%f20,%f22
-
-	mrmt1p2.ss	%f14,%f15,%f16
-	mrmt1p2.sd	%f20,%f21,%f22
-	mrmt1p2.dd	%f20,%f22,%f24
-
-	mm12mpm.ss	%f15,%f16,%f17
-	mm12mpm.sd	%f23,%f24,%f25
-	mm12mpm.dd	%f22,%f24,%f26
-
-	mrm1p2.ss	%f18,%f19,%f20
-	mrm1p2.sd	%f26,%f27,%f28
-	mrm1p2.dd	%f20,%f22,%f24
-
-	mm12ttpm.ss	%f19,%f20,%f21
-	mm12ttpm.sd	%f29,%f30,%f31
-	mm12ttpm.dd	%f22,%f24,%f26
-
-	mimt1p2.ss	%f20,%f21,%f22
-	mimt1p2.sd	%f0,%f1,%f2
-	mimt1p2.dd	%f24,%f26,%f28
-
-	mm12tpm.ss	%f21,%f22,%f23
-	mm12tpm.sd	%f3,%f4,%f5
-	mm12tpm.dd	%f30,%f0,%f2
-
-	mim1p2.ss	%f22,%f23,%f24
-	mim1p2.sd	%f6,%f7,%f8
-	mim1p2.dd	%f4,%f6,%f8
-
-	m12tpa.ss	%f23,%f24,%f25
-	m12tpa.sd	%f9,%f10,%f11
-	m12tpa.dd	%f6,%f8,%f10
-
-	# pfmam with dual bit.
-	d.mr2p1.ss	%f0,%f1,%f2
-	nop
-	d.mr2p1.sd	%f3,%f4,%f5
-	nop
-	d.mr2p1.dd	%f0,%f2,%f4
-	nop
-
-	d.mr2pt.ss	%f1,%f2,%f3
-	nop
-	d.mr2pt.sd	%f4,%f5,%f6
-	nop
-	d.mr2pt.dd	%f2,%f4,%f6
-	nop
-
-	d.mr2mp1.ss	%f2,%f3,%f4
-	nop
-	d.mr2mp1.sd	%f6,%f7,%f8
-	nop
-	d.mr2mp1.dd	%f4,%f6,%f8
-	nop
-
-	d.mr2mpt.ss	%f3,%f4,%f5
-	nop
-	d.mr2mpt.sd	%f7,%f8,%f9
-	nop
-	d.mr2mpt.dd	%f6,%f8,%f10
-	nop
-
-	d.mi2p1.ss	%f4,%f5,%f6
-	nop
-	d.mi2p1.sd	%f8,%f9,%f10
-	nop
-	d.mi2p1.dd	%f12,%f14,%f16
-	nop
-
-	d.mi2pt.ss	%f7,%f8,%f9
-	nop
-	d.mi2pt.sd	%f11,%f12,%f13
-	nop
-	d.mi2pt.dd	%f14,%f16,%f18
-	nop
-
-	d.mi2mp1.ss	%f10,%f11,%f12
-	nop
-	d.mi2mp1.sd	%f14,%f15,%f16
-	nop
-	d.mi2mp1.dd	%f16,%f18,%f20
-	nop
-
-	d.mi2mpt.ss	%f13,%f14,%f15
-	nop
-	d.mi2mpt.sd	%f17,%f18,%f19
-	nop
-	d.mi2mpt.dd	%f18,%f20,%f22
-	nop
-
-	d.mrmt1p2.ss	%f14,%f15,%f16
-	nop
-	d.mrmt1p2.sd	%f20,%f21,%f22
-	nop
-	d.mrmt1p2.dd	%f20,%f22,%f24
-	nop
-
-	d.mm12mpm.ss	%f15,%f16,%f17
-	nop
-	d.mm12mpm.sd	%f23,%f24,%f25
-	nop
-	d.mm12mpm.dd	%f22,%f24,%f26
-	nop
-
-	d.mrm1p2.ss	%f18,%f19,%f20
-	nop
-	d.mrm1p2.sd	%f26,%f27,%f28
-	nop
-	d.mrm1p2.dd	%f20,%f22,%f24
-	nop
-
-	d.mm12ttpm.ss	%f19,%f20,%f21
-	nop
-	d.mm12ttpm.sd	%f29,%f30,%f31
-	nop
-	d.mm12ttpm.dd	%f22,%f24,%f26
-	nop
-
-	d.mimt1p2.ss	%f20,%f21,%f22
-	nop
-	d.mimt1p2.sd	%f0,%f1,%f2
-	nop
-	d.mimt1p2.dd	%f24,%f26,%f28
-	nop
-
-	d.mm12tpm.ss	%f21,%f22,%f23
-	nop
-	d.mm12tpm.sd	%f3,%f4,%f5
-	nop
-	d.mm12tpm.dd	%f30,%f0,%f2
-	nop
-
-	d.mim1p2.ss	%f22,%f23,%f24
-	nop
-	d.mim1p2.sd	%f6,%f7,%f8
-	nop
-	d.mim1p2.dd	%f4,%f6,%f8
-	nop
-
-	d.m12tpa.ss	%f23,%f24,%f25
-	nop
-	d.m12tpa.sd	%f9,%f10,%f11
-	nop
-	d.m12tpa.dd	%f6,%f8,%f10
-	nop
-
diff --git a/gas/testsuite/gas/i860/pfmsm.d b/gas/testsuite/gas/i860/pfmsm.d
deleted file mode 100644
index 65d7e97..0000000
--- a/gas/testsuite/gas/i860/pfmsm.d
+++ /dev/null
@@ -1,153 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 pfmsm
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	10 00 22 48 	mr2s1.ss	%f0,%f1,%f2
-   4:	90 18 85 48 	mr2s1.sd	%f3,%f4,%f5
-   8:	90 01 44 48 	mr2s1.dd	%f0,%f2,%f4
-   c:	11 08 43 48 	mr2st.ss	%f1,%f2,%f3
-  10:	91 20 a6 48 	mr2st.sd	%f4,%f5,%f6
-  14:	91 11 86 48 	mr2st.dd	%f2,%f4,%f6
-  18:	12 10 64 48 	mr2ms1.ss	%f2,%f3,%f4
-  1c:	92 30 e8 48 	mr2ms1.sd	%f6,%f7,%f8
-  20:	92 21 c8 48 	mr2ms1.dd	%f4,%f6,%f8
-  24:	13 18 85 48 	mr2mst.ss	%f3,%f4,%f5
-  28:	93 38 09 49 	mr2mst.sd	%f7,%f8,%f9
-  2c:	93 31 0a 49 	mr2mst.dd	%f6,%f8,%f10
-  30:	14 20 a6 48 	mi2s1.ss	%f4,%f5,%f6
-  34:	94 40 2a 49 	mi2s1.sd	%f8,%f9,%f10
-  38:	94 61 d0 49 	mi2s1.dd	%f12,%f14,%f16
-  3c:	15 38 09 49 	mi2st.ss	%f7,%f8,%f9
-  40:	95 58 8d 49 	mi2st.sd	%f11,%f12,%f13
-  44:	95 71 12 4a 	mi2st.dd	%f14,%f16,%f18
-  48:	16 50 6c 49 	mi2ms1.ss	%f10,%f11,%f12
-  4c:	96 70 f0 49 	mi2ms1.sd	%f14,%f15,%f16
-  50:	96 81 54 4a 	mi2ms1.dd	%f16,%f18,%f20
-  54:	17 68 cf 49 	mi2mst.ss	%f13,%f14,%f15
-  58:	97 88 53 4a 	mi2mst.sd	%f17,%f18,%f19
-  5c:	97 91 96 4a 	mi2mst.dd	%f18,%f20,%f22
-  60:	18 70 f0 49 	mrmt1s2.ss	%f14,%f15,%f16
-  64:	98 a0 b6 4a 	mrmt1s2.sd	%f20,%f21,%f22
-  68:	98 a1 d8 4a 	mrmt1s2.dd	%f20,%f22,%f24
-  6c:	19 78 11 4a 	mm12msm.ss	%f15,%f16,%f17
-  70:	99 b8 19 4b 	mm12msm.sd	%f23,%f24,%f25
-  74:	99 b1 1a 4b 	mm12msm.dd	%f22,%f24,%f26
-  78:	1a 90 74 4a 	mrm1s2.ss	%f18,%f19,%f20
-  7c:	9a d0 7c 4b 	mrm1s2.sd	%f26,%f27,%f28
-  80:	9a a1 d8 4a 	mrm1s2.dd	%f20,%f22,%f24
-  84:	1b 98 95 4a 	mm12ttsm.ss	%f19,%f20,%f21
-  88:	9b e8 df 4b 	mm12ttsm.sd	%f29,%f30,%f31
-  8c:	9b b1 1a 4b 	mm12ttsm.dd	%f22,%f24,%f26
-  90:	1c a0 b6 4a 	mimt1s2.ss	%f20,%f21,%f22
-  94:	9c 00 22 48 	mimt1s2.sd	%f0,%f1,%f2
-  98:	9c c1 5c 4b 	mimt1s2.dd	%f24,%f26,%f28
-  9c:	1d a8 d7 4a 	mm12tsm.ss	%f21,%f22,%f23
-  a0:	9d 18 85 48 	mm12tsm.sd	%f3,%f4,%f5
-  a4:	9d f1 02 48 	mm12tsm.dd	%f30,%f0,%f2
-  a8:	1e b0 f8 4a 	mim1s2.ss	%f22,%f23,%f24
-  ac:	9e 30 e8 48 	mim1s2.sd	%f6,%f7,%f8
-  b0:	9e 21 c8 48 	mim1s2.dd	%f4,%f6,%f8
-  b4:	1f bc 19 4b 	m12tsa.ss	%f23,%f24,%f25
-  b8:	9f 4c 4b 49 	m12tsa.sd	%f9,%f10,%f11
-  bc:	9f 35 0a 49 	m12tsa.dd	%f6,%f8,%f10
-  c0:	10 02 22 48 	d.mr2s1.ss	%f0,%f1,%f2
-  c4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c8:	90 1a 85 48 	d.mr2s1.sd	%f3,%f4,%f5
-  cc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d0:	90 03 44 48 	d.mr2s1.dd	%f0,%f2,%f4
-  d4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d8:	11 0a 43 48 	d.mr2st.ss	%f1,%f2,%f3
-  dc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e0:	91 22 a6 48 	d.mr2st.sd	%f4,%f5,%f6
-  e4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e8:	91 13 86 48 	d.mr2st.dd	%f2,%f4,%f6
-  ec:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f0:	12 12 64 48 	d.mr2ms1.ss	%f2,%f3,%f4
-  f4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f8:	92 32 e8 48 	d.mr2ms1.sd	%f6,%f7,%f8
-  fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 100:	92 23 c8 48 	d.mr2ms1.dd	%f4,%f6,%f8
- 104:	00 00 00 a0 	shl	%r0,%r0,%r0
- 108:	13 1a 85 48 	d.mr2mst.ss	%f3,%f4,%f5
- 10c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 110:	93 3a 09 49 	d.mr2mst.sd	%f7,%f8,%f9
- 114:	00 00 00 a0 	shl	%r0,%r0,%r0
- 118:	93 33 0a 49 	d.mr2mst.dd	%f6,%f8,%f10
- 11c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 120:	14 22 a6 48 	d.mi2s1.ss	%f4,%f5,%f6
- 124:	00 00 00 a0 	shl	%r0,%r0,%r0
- 128:	94 42 2a 49 	d.mi2s1.sd	%f8,%f9,%f10
- 12c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 130:	94 63 d0 49 	d.mi2s1.dd	%f12,%f14,%f16
- 134:	00 00 00 a0 	shl	%r0,%r0,%r0
- 138:	15 3a 09 49 	d.mi2st.ss	%f7,%f8,%f9
- 13c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 140:	95 5a 8d 49 	d.mi2st.sd	%f11,%f12,%f13
- 144:	00 00 00 a0 	shl	%r0,%r0,%r0
- 148:	95 73 12 4a 	d.mi2st.dd	%f14,%f16,%f18
- 14c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 150:	16 52 6c 49 	d.mi2ms1.ss	%f10,%f11,%f12
- 154:	00 00 00 a0 	shl	%r0,%r0,%r0
- 158:	96 72 f0 49 	d.mi2ms1.sd	%f14,%f15,%f16
- 15c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 160:	96 83 54 4a 	d.mi2ms1.dd	%f16,%f18,%f20
- 164:	00 00 00 a0 	shl	%r0,%r0,%r0
- 168:	17 6a cf 49 	d.mi2mst.ss	%f13,%f14,%f15
- 16c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 170:	97 8a 53 4a 	d.mi2mst.sd	%f17,%f18,%f19
- 174:	00 00 00 a0 	shl	%r0,%r0,%r0
- 178:	97 93 96 4a 	d.mi2mst.dd	%f18,%f20,%f22
- 17c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 180:	18 72 f0 49 	d.mrmt1s2.ss	%f14,%f15,%f16
- 184:	00 00 00 a0 	shl	%r0,%r0,%r0
- 188:	98 a2 b6 4a 	d.mrmt1s2.sd	%f20,%f21,%f22
- 18c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 190:	98 a3 d8 4a 	d.mrmt1s2.dd	%f20,%f22,%f24
- 194:	00 00 00 a0 	shl	%r0,%r0,%r0
- 198:	19 7a 11 4a 	d.mm12msm.ss	%f15,%f16,%f17
- 19c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a0:	99 ba 19 4b 	d.mm12msm.sd	%f23,%f24,%f25
- 1a4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a8:	99 b3 1a 4b 	d.mm12msm.dd	%f22,%f24,%f26
- 1ac:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b0:	1a 92 74 4a 	d.mrm1s2.ss	%f18,%f19,%f20
- 1b4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b8:	9a d2 7c 4b 	d.mrm1s2.sd	%f26,%f27,%f28
- 1bc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c0:	9a a3 d8 4a 	d.mrm1s2.dd	%f20,%f22,%f24
- 1c4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c8:	1b 9a 95 4a 	d.mm12ttsm.ss	%f19,%f20,%f21
- 1cc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d0:	9b ea df 4b 	d.mm12ttsm.sd	%f29,%f30,%f31
- 1d4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d8:	9b b3 1a 4b 	d.mm12ttsm.dd	%f22,%f24,%f26
- 1dc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e0:	1c a2 b6 4a 	d.mimt1s2.ss	%f20,%f21,%f22
- 1e4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e8:	9c 02 22 48 	d.mimt1s2.sd	%f0,%f1,%f2
- 1ec:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f0:	9c c3 5c 4b 	d.mimt1s2.dd	%f24,%f26,%f28
- 1f4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f8:	1d aa d7 4a 	d.mm12tsm.ss	%f21,%f22,%f23
- 1fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 200:	9d 1a 85 48 	d.mm12tsm.sd	%f3,%f4,%f5
- 204:	00 00 00 a0 	shl	%r0,%r0,%r0
- 208:	9d f3 02 48 	d.mm12tsm.dd	%f30,%f0,%f2
- 20c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 210:	1e b2 f8 4a 	d.mim1s2.ss	%f22,%f23,%f24
- 214:	00 00 00 a0 	shl	%r0,%r0,%r0
- 218:	9e 32 e8 48 	d.mim1s2.sd	%f6,%f7,%f8
- 21c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 220:	9e 23 c8 48 	d.mim1s2.dd	%f4,%f6,%f8
- 224:	00 00 00 a0 	shl	%r0,%r0,%r0
- 228:	1f be 19 4b 	d.m12tsa.ss	%f23,%f24,%f25
- 22c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 230:	9f 4e 4b 49 	d.m12tsa.sd	%f9,%f10,%f11
- 234:	00 00 00 a0 	shl	%r0,%r0,%r0
- 238:	9f 37 0a 49 	d.m12tsa.dd	%f6,%f8,%f10
- 23c:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/pfmsm.s b/gas/testsuite/gas/i860/pfmsm.s
deleted file mode 100644
index 26c9166..0000000
--- a/gas/testsuite/gas/i860/pfmsm.s
+++ /dev/null
@@ -1,182 +0,0 @@
-# pfmsm.p family (p={ss,sd,dd})
-
-	.text
-
-	# pfmsm without dual bit
-	mr2s1.ss	%f0,%f1,%f2
-	mr2s1.sd	%f3,%f4,%f5
-	mr2s1.dd	%f0,%f2,%f4
-
-	mr2st.ss	%f1,%f2,%f3
-	mr2st.sd	%f4,%f5,%f6
-	mr2st.dd	%f2,%f4,%f6
-
-	mr2ms1.ss	%f2,%f3,%f4
-	mr2ms1.sd	%f6,%f7,%f8
-	mr2ms1.dd	%f4,%f6,%f8
-
-	mr2mst.ss	%f3,%f4,%f5
-	mr2mst.sd	%f7,%f8,%f9
-	mr2mst.dd	%f6,%f8,%f10
-
-	mi2s1.ss	%f4,%f5,%f6
-	mi2s1.sd	%f8,%f9,%f10
-	mi2s1.dd	%f12,%f14,%f16
-
-	mi2st.ss	%f7,%f8,%f9
-	mi2st.sd	%f11,%f12,%f13
-	mi2st.dd	%f14,%f16,%f18
-
-	mi2ms1.ss	%f10,%f11,%f12
-	mi2ms1.sd	%f14,%f15,%f16
-	mi2ms1.dd	%f16,%f18,%f20
-
-	mi2mst.ss	%f13,%f14,%f15
-	mi2mst.sd	%f17,%f18,%f19
-	mi2mst.dd	%f18,%f20,%f22
-
-	mrmt1s2.ss	%f14,%f15,%f16
-	mrmt1s2.sd	%f20,%f21,%f22
-	mrmt1s2.dd	%f20,%f22,%f24
-
-	mm12msm.ss	%f15,%f16,%f17
-	mm12msm.sd	%f23,%f24,%f25
-	mm12msm.dd	%f22,%f24,%f26
-
-	mrm1s2.ss	%f18,%f19,%f20
-	mrm1s2.sd	%f26,%f27,%f28
-	mrm1s2.dd	%f20,%f22,%f24
-
-	mm12ttsm.ss	%f19,%f20,%f21
-	mm12ttsm.sd	%f29,%f30,%f31
-	mm12ttsm.dd	%f22,%f24,%f26
-
-	mimt1s2.ss	%f20,%f21,%f22
-	mimt1s2.sd	%f0,%f1,%f2
-	mimt1s2.dd	%f24,%f26,%f28
-
-	mm12tsm.ss	%f21,%f22,%f23
-	mm12tsm.sd	%f3,%f4,%f5
-	mm12tsm.dd	%f30,%f0,%f2
-
-	mim1s2.ss	%f22,%f23,%f24
-	mim1s2.sd	%f6,%f7,%f8
-	mim1s2.dd	%f4,%f6,%f8
-
-	m12tsa.ss	%f23,%f24,%f25
-	m12tsa.sd	%f9,%f10,%f11
-	m12tsa.dd	%f6,%f8,%f10
-
-	# pfmsm with dual bit
-	d.mr2s1.ss	%f0,%f1,%f2
-	nop
-	d.mr2s1.sd	%f3,%f4,%f5
-	nop
-	d.mr2s1.dd	%f0,%f2,%f4
-	nop
-
-	d.mr2st.ss	%f1,%f2,%f3
-	nop
-	d.mr2st.sd	%f4,%f5,%f6
-	nop
-	d.mr2st.dd	%f2,%f4,%f6
-	nop
-
-	d.mr2ms1.ss	%f2,%f3,%f4
-	nop
-	d.mr2ms1.sd	%f6,%f7,%f8
-	nop
-	d.mr2ms1.dd	%f4,%f6,%f8
-	nop
-
-	d.mr2mst.ss	%f3,%f4,%f5
-	nop
-	d.mr2mst.sd	%f7,%f8,%f9
-	nop
-	d.mr2mst.dd	%f6,%f8,%f10
-	nop
-
-	d.mi2s1.ss	%f4,%f5,%f6
-	nop
-	d.mi2s1.sd	%f8,%f9,%f10
-	nop
-	d.mi2s1.dd	%f12,%f14,%f16
-	nop
-
-	d.mi2st.ss	%f7,%f8,%f9
-	nop
-	d.mi2st.sd	%f11,%f12,%f13
-	nop
-	d.mi2st.dd	%f14,%f16,%f18
-	nop
-
-	d.mi2ms1.ss	%f10,%f11,%f12
-	nop
-	d.mi2ms1.sd	%f14,%f15,%f16
-	nop
-	d.mi2ms1.dd	%f16,%f18,%f20
-	nop
-
-	d.mi2mst.ss	%f13,%f14,%f15
-	nop
-	d.mi2mst.sd	%f17,%f18,%f19
-	nop
-	d.mi2mst.dd	%f18,%f20,%f22
-	nop
-
-	d.mrmt1s2.ss	%f14,%f15,%f16
-	nop
-	d.mrmt1s2.sd	%f20,%f21,%f22
-	nop
-	d.mrmt1s2.dd	%f20,%f22,%f24
-	nop
-
-	d.mm12msm.ss	%f15,%f16,%f17
-	nop
-	d.mm12msm.sd	%f23,%f24,%f25
-	nop
-	d.mm12msm.dd	%f22,%f24,%f26
-	nop
-
-	d.mrm1s2.ss	%f18,%f19,%f20
-	nop
-	d.mrm1s2.sd	%f26,%f27,%f28
-	nop
-	d.mrm1s2.dd	%f20,%f22,%f24
-	nop
-
-	d.mm12ttsm.ss	%f19,%f20,%f21
-	nop
-	d.mm12ttsm.sd	%f29,%f30,%f31
-	nop
-	d.mm12ttsm.dd	%f22,%f24,%f26
-	nop
-
-	d.mimt1s2.ss	%f20,%f21,%f22
-	nop
-	d.mimt1s2.sd	%f0,%f1,%f2
-	nop
-	d.mimt1s2.dd	%f24,%f26,%f28
-	nop
-
-	d.mm12tsm.ss	%f21,%f22,%f23
-	nop
-	d.mm12tsm.sd	%f3,%f4,%f5
-	nop
-	d.mm12tsm.dd	%f30,%f0,%f2
-	nop
-
-	d.mim1s2.ss	%f22,%f23,%f24
-	nop
-	d.mim1s2.sd	%f6,%f7,%f8
-	nop
-	d.mim1s2.dd	%f4,%f6,%f8
-	nop
-
-	d.m12tsa.ss	%f23,%f24,%f25
-	nop
-	d.m12tsa.sd	%f9,%f10,%f11
-	nop
-	d.m12tsa.dd	%f6,%f8,%f10
-	nop
-
diff --git a/gas/testsuite/gas/i860/pfsm.d b/gas/testsuite/gas/i860/pfsm.d
deleted file mode 100644
index a3655cb..0000000
--- a/gas/testsuite/gas/i860/pfsm.d
+++ /dev/null
@@ -1,153 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 pfsm
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	10 04 22 48 	r2s1.ss	%f0,%f1,%f2
-   4:	90 1c 85 48 	r2s1.sd	%f3,%f4,%f5
-   8:	90 05 44 48 	r2s1.dd	%f0,%f2,%f4
-   c:	11 0c 43 48 	r2st.ss	%f1,%f2,%f3
-  10:	91 24 a6 48 	r2st.sd	%f4,%f5,%f6
-  14:	91 15 86 48 	r2st.dd	%f2,%f4,%f6
-  18:	12 14 64 48 	r2as1.ss	%f2,%f3,%f4
-  1c:	92 34 e8 48 	r2as1.sd	%f6,%f7,%f8
-  20:	92 25 c8 48 	r2as1.dd	%f4,%f6,%f8
-  24:	13 1c 85 48 	r2ast.ss	%f3,%f4,%f5
-  28:	93 3c 09 49 	r2ast.sd	%f7,%f8,%f9
-  2c:	93 35 0a 49 	r2ast.dd	%f6,%f8,%f10
-  30:	14 24 a6 48 	i2s1.ss	%f4,%f5,%f6
-  34:	94 44 2a 49 	i2s1.sd	%f8,%f9,%f10
-  38:	94 65 d0 49 	i2s1.dd	%f12,%f14,%f16
-  3c:	15 3c 09 49 	i2st.ss	%f7,%f8,%f9
-  40:	95 5c 8d 49 	i2st.sd	%f11,%f12,%f13
-  44:	95 75 12 4a 	i2st.dd	%f14,%f16,%f18
-  48:	16 54 6c 49 	i2as1.ss	%f10,%f11,%f12
-  4c:	96 74 f0 49 	i2as1.sd	%f14,%f15,%f16
-  50:	96 85 54 4a 	i2as1.dd	%f16,%f18,%f20
-  54:	17 6c cf 49 	i2ast.ss	%f13,%f14,%f15
-  58:	97 8c 53 4a 	i2ast.sd	%f17,%f18,%f19
-  5c:	97 95 96 4a 	i2ast.dd	%f18,%f20,%f22
-  60:	18 74 f0 49 	rat1s2.ss	%f14,%f15,%f16
-  64:	98 a4 b6 4a 	rat1s2.sd	%f20,%f21,%f22
-  68:	98 a5 d8 4a 	rat1s2.dd	%f20,%f22,%f24
-  6c:	19 7c 11 4a 	m12asm.ss	%f15,%f16,%f17
-  70:	99 bc 19 4b 	m12asm.sd	%f23,%f24,%f25
-  74:	99 b5 1a 4b 	m12asm.dd	%f22,%f24,%f26
-  78:	1a 94 74 4a 	ra1s2.ss	%f18,%f19,%f20
-  7c:	9a d4 7c 4b 	ra1s2.sd	%f26,%f27,%f28
-  80:	9a a5 d8 4a 	ra1s2.dd	%f20,%f22,%f24
-  84:	1b 9c 95 4a 	m12ttsa.ss	%f19,%f20,%f21
-  88:	9b ec df 4b 	m12ttsa.sd	%f29,%f30,%f31
-  8c:	9b b5 1a 4b 	m12ttsa.dd	%f22,%f24,%f26
-  90:	1c a4 b6 4a 	iat1s2.ss	%f20,%f21,%f22
-  94:	9c 04 22 48 	iat1s2.sd	%f0,%f1,%f2
-  98:	9c c5 5c 4b 	iat1s2.dd	%f24,%f26,%f28
-  9c:	1d ac d7 4a 	m12tsm.ss	%f21,%f22,%f23
-  a0:	9d 1c 85 48 	m12tsm.sd	%f3,%f4,%f5
-  a4:	9d f5 02 48 	m12tsm.dd	%f30,%f0,%f2
-  a8:	1e b4 f8 4a 	ia1s2.ss	%f22,%f23,%f24
-  ac:	9e 34 e8 48 	ia1s2.sd	%f6,%f7,%f8
-  b0:	9e 25 c8 48 	ia1s2.dd	%f4,%f6,%f8
-  b4:	1f bc 19 4b 	m12tsa.ss	%f23,%f24,%f25
-  b8:	9f 4c 4b 49 	m12tsa.sd	%f9,%f10,%f11
-  bc:	9f 35 0a 49 	m12tsa.dd	%f6,%f8,%f10
-  c0:	10 06 22 48 	d.r2s1.ss	%f0,%f1,%f2
-  c4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c8:	90 1e 85 48 	d.r2s1.sd	%f3,%f4,%f5
-  cc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d0:	90 07 44 48 	d.r2s1.dd	%f0,%f2,%f4
-  d4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d8:	11 0e 43 48 	d.r2st.ss	%f1,%f2,%f3
-  dc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e0:	91 26 a6 48 	d.r2st.sd	%f4,%f5,%f6
-  e4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e8:	91 17 86 48 	d.r2st.dd	%f2,%f4,%f6
-  ec:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f0:	12 16 64 48 	d.r2as1.ss	%f2,%f3,%f4
-  f4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f8:	92 36 e8 48 	d.r2as1.sd	%f6,%f7,%f8
-  fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 100:	92 27 c8 48 	d.r2as1.dd	%f4,%f6,%f8
- 104:	00 00 00 a0 	shl	%r0,%r0,%r0
- 108:	13 1e 85 48 	d.r2ast.ss	%f3,%f4,%f5
- 10c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 110:	93 3e 09 49 	d.r2ast.sd	%f7,%f8,%f9
- 114:	00 00 00 a0 	shl	%r0,%r0,%r0
- 118:	93 37 0a 49 	d.r2ast.dd	%f6,%f8,%f10
- 11c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 120:	14 26 a6 48 	d.i2s1.ss	%f4,%f5,%f6
- 124:	00 00 00 a0 	shl	%r0,%r0,%r0
- 128:	94 46 2a 49 	d.i2s1.sd	%f8,%f9,%f10
- 12c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 130:	94 67 d0 49 	d.i2s1.dd	%f12,%f14,%f16
- 134:	00 00 00 a0 	shl	%r0,%r0,%r0
- 138:	15 3e 09 49 	d.i2st.ss	%f7,%f8,%f9
- 13c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 140:	95 5e 8d 49 	d.i2st.sd	%f11,%f12,%f13
- 144:	00 00 00 a0 	shl	%r0,%r0,%r0
- 148:	95 77 12 4a 	d.i2st.dd	%f14,%f16,%f18
- 14c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 150:	16 56 6c 49 	d.i2as1.ss	%f10,%f11,%f12
- 154:	00 00 00 a0 	shl	%r0,%r0,%r0
- 158:	96 76 f0 49 	d.i2as1.sd	%f14,%f15,%f16
- 15c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 160:	96 87 54 4a 	d.i2as1.dd	%f16,%f18,%f20
- 164:	00 00 00 a0 	shl	%r0,%r0,%r0
- 168:	17 6e cf 49 	d.i2ast.ss	%f13,%f14,%f15
- 16c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 170:	97 8e 53 4a 	d.i2ast.sd	%f17,%f18,%f19
- 174:	00 00 00 a0 	shl	%r0,%r0,%r0
- 178:	97 97 96 4a 	d.i2ast.dd	%f18,%f20,%f22
- 17c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 180:	18 76 f0 49 	d.rat1s2.ss	%f14,%f15,%f16
- 184:	00 00 00 a0 	shl	%r0,%r0,%r0
- 188:	98 a6 b6 4a 	d.rat1s2.sd	%f20,%f21,%f22
- 18c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 190:	98 a7 d8 4a 	d.rat1s2.dd	%f20,%f22,%f24
- 194:	00 00 00 a0 	shl	%r0,%r0,%r0
- 198:	19 7e 11 4a 	d.m12asm.ss	%f15,%f16,%f17
- 19c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a0:	99 be 19 4b 	d.m12asm.sd	%f23,%f24,%f25
- 1a4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1a8:	99 b7 1a 4b 	d.m12asm.dd	%f22,%f24,%f26
- 1ac:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b0:	1a 96 74 4a 	d.ra1s2.ss	%f18,%f19,%f20
- 1b4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1b8:	9a d6 7c 4b 	d.ra1s2.sd	%f26,%f27,%f28
- 1bc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c0:	9a a7 d8 4a 	d.ra1s2.dd	%f20,%f22,%f24
- 1c4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1c8:	1b 9e 95 4a 	d.m12ttsa.ss	%f19,%f20,%f21
- 1cc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d0:	9b ee df 4b 	d.m12ttsa.sd	%f29,%f30,%f31
- 1d4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1d8:	9b b7 1a 4b 	d.m12ttsa.dd	%f22,%f24,%f26
- 1dc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e0:	1c a6 b6 4a 	d.iat1s2.ss	%f20,%f21,%f22
- 1e4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1e8:	9c 06 22 48 	d.iat1s2.sd	%f0,%f1,%f2
- 1ec:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f0:	9c c7 5c 4b 	d.iat1s2.dd	%f24,%f26,%f28
- 1f4:	00 00 00 a0 	shl	%r0,%r0,%r0
- 1f8:	1d ae d7 4a 	d.m12tsm.ss	%f21,%f22,%f23
- 1fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 200:	9d 1e 85 48 	d.m12tsm.sd	%f3,%f4,%f5
- 204:	00 00 00 a0 	shl	%r0,%r0,%r0
- 208:	9d f7 02 48 	d.m12tsm.dd	%f30,%f0,%f2
- 20c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 210:	1e b6 f8 4a 	d.ia1s2.ss	%f22,%f23,%f24
- 214:	00 00 00 a0 	shl	%r0,%r0,%r0
- 218:	9e 36 e8 48 	d.ia1s2.sd	%f6,%f7,%f8
- 21c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 220:	9e 27 c8 48 	d.ia1s2.dd	%f4,%f6,%f8
- 224:	00 00 00 a0 	shl	%r0,%r0,%r0
- 228:	1f be 19 4b 	d.m12tsa.ss	%f23,%f24,%f25
- 22c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 230:	9f 4e 4b 49 	d.m12tsa.sd	%f9,%f10,%f11
- 234:	00 00 00 a0 	shl	%r0,%r0,%r0
- 238:	9f 37 0a 49 	d.m12tsa.dd	%f6,%f8,%f10
- 23c:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/pfsm.s b/gas/testsuite/gas/i860/pfsm.s
deleted file mode 100644
index 16ecd97..0000000
--- a/gas/testsuite/gas/i860/pfsm.s
+++ /dev/null
@@ -1,182 +0,0 @@
-# pfsm.p family (p={ss,sd,dd})
-
-	.text
-
-	# pfsm without dual bit
-	r2s1.ss	%f0,%f1,%f2
-	r2s1.sd	%f3,%f4,%f5
-	r2s1.dd	%f0,%f2,%f4
-
-	r2st.ss	%f1,%f2,%f3
-	r2st.sd	%f4,%f5,%f6
-	r2st.dd	%f2,%f4,%f6
-
-	r2as1.ss	%f2,%f3,%f4
-	r2as1.sd	%f6,%f7,%f8
-	r2as1.dd	%f4,%f6,%f8
-
-	r2ast.ss	%f3,%f4,%f5
-	r2ast.sd	%f7,%f8,%f9
-	r2ast.dd	%f6,%f8,%f10
-
-	i2s1.ss	%f4,%f5,%f6
-	i2s1.sd	%f8,%f9,%f10
-	i2s1.dd	%f12,%f14,%f16
-
-	i2st.ss	%f7,%f8,%f9
-	i2st.sd	%f11,%f12,%f13
-	i2st.dd	%f14,%f16,%f18
-
-	i2as1.ss	%f10,%f11,%f12
-	i2as1.sd	%f14,%f15,%f16
-	i2as1.dd	%f16,%f18,%f20
-
-	i2ast.ss	%f13,%f14,%f15
-	i2ast.sd	%f17,%f18,%f19
-	i2ast.dd	%f18,%f20,%f22
-
-	rat1s2.ss	%f14,%f15,%f16
-	rat1s2.sd	%f20,%f21,%f22
-	rat1s2.dd	%f20,%f22,%f24
-
-	m12asm.ss	%f15,%f16,%f17
-	m12asm.sd	%f23,%f24,%f25
-	m12asm.dd	%f22,%f24,%f26
-
-	ra1s2.ss	%f18,%f19,%f20
-	ra1s2.sd	%f26,%f27,%f28
-	ra1s2.dd	%f20,%f22,%f24
-
-	m12ttsa.ss	%f19,%f20,%f21
-	m12ttsa.sd	%f29,%f30,%f31
-	m12ttsa.dd	%f22,%f24,%f26
-
-	iat1s2.ss	%f20,%f21,%f22
-	iat1s2.sd	%f0,%f1,%f2
-	iat1s2.dd	%f24,%f26,%f28
-
-	m12tsm.ss	%f21,%f22,%f23
-	m12tsm.sd	%f3,%f4,%f5
-	m12tsm.dd	%f30,%f0,%f2
-
-	ia1s2.ss	%f22,%f23,%f24
-	ia1s2.sd	%f6,%f7,%f8
-	ia1s2.dd	%f4,%f6,%f8
-
-	m12tsa.ss	%f23,%f24,%f25
-	m12tsa.sd	%f9,%f10,%f11
-	m12tsa.dd	%f6,%f8,%f10
-
-	# pfsm with dual bit
-	d.r2s1.ss	%f0,%f1,%f2
-	nop
-	d.r2s1.sd	%f3,%f4,%f5
-	nop
-	d.r2s1.dd	%f0,%f2,%f4
-	nop
-
-	d.r2st.ss	%f1,%f2,%f3
-	nop
-	d.r2st.sd	%f4,%f5,%f6
-	nop
-	d.r2st.dd	%f2,%f4,%f6
-	nop
-
-	d.r2as1.ss	%f2,%f3,%f4
-	nop
-	d.r2as1.sd	%f6,%f7,%f8
-	nop
-	d.r2as1.dd	%f4,%f6,%f8
-	nop
-
-	d.r2ast.ss	%f3,%f4,%f5
-	nop
-	d.r2ast.sd	%f7,%f8,%f9
-	nop
-	d.r2ast.dd	%f6,%f8,%f10
-	nop
-
-	d.i2s1.ss	%f4,%f5,%f6
-	nop
-	d.i2s1.sd	%f8,%f9,%f10
-	nop
-	d.i2s1.dd	%f12,%f14,%f16
-	nop
-
-	d.i2st.ss	%f7,%f8,%f9
-	nop
-	d.i2st.sd	%f11,%f12,%f13
-	nop
-	d.i2st.dd	%f14,%f16,%f18
-	nop
-
-	d.i2as1.ss	%f10,%f11,%f12
-	nop
-	d.i2as1.sd	%f14,%f15,%f16
-	nop
-	d.i2as1.dd	%f16,%f18,%f20
-	nop
-
-	d.i2ast.ss	%f13,%f14,%f15
-	nop
-	d.i2ast.sd	%f17,%f18,%f19
-	nop
-	d.i2ast.dd	%f18,%f20,%f22
-	nop
-
-	d.rat1s2.ss	%f14,%f15,%f16
-	nop
-	d.rat1s2.sd	%f20,%f21,%f22
-	nop
-	d.rat1s2.dd	%f20,%f22,%f24
-	nop
-
-	d.m12asm.ss	%f15,%f16,%f17
-	nop
-	d.m12asm.sd	%f23,%f24,%f25
-	nop
-	d.m12asm.dd	%f22,%f24,%f26
-	nop
-
-	d.ra1s2.ss	%f18,%f19,%f20
-	nop
-	d.ra1s2.sd	%f26,%f27,%f28
-	nop
-	d.ra1s2.dd	%f20,%f22,%f24
-	nop
-
-	d.m12ttsa.ss	%f19,%f20,%f21
-	nop
-	d.m12ttsa.sd	%f29,%f30,%f31
-	nop
-	d.m12ttsa.dd	%f22,%f24,%f26
-	nop
-
-	d.iat1s2.ss	%f20,%f21,%f22
-	nop
-	d.iat1s2.sd	%f0,%f1,%f2
-	nop
-	d.iat1s2.dd	%f24,%f26,%f28
-	nop
-
-	d.m12tsm.ss	%f21,%f22,%f23
-	nop
-	d.m12tsm.sd	%f3,%f4,%f5
-	nop
-	d.m12tsm.dd	%f30,%f0,%f2
-	nop
-
-	d.ia1s2.ss	%f22,%f23,%f24
-	nop
-	d.ia1s2.sd	%f6,%f7,%f8
-	nop
-	d.ia1s2.dd	%f4,%f6,%f8
-	nop
-
-	d.m12tsa.ss	%f23,%f24,%f25
-	nop
-	d.m12tsa.sd	%f9,%f10,%f11
-	nop
-	d.m12tsa.dd	%f6,%f8,%f10
-	nop
-
diff --git a/gas/testsuite/gas/i860/pseudo-ops01.d b/gas/testsuite/gas/i860/pseudo-ops01.d
deleted file mode 100644
index 3131e2e..0000000
--- a/gas/testsuite/gas/i860/pseudo-ops01.d
+++ /dev/null
@@ -1,14 +0,0 @@
-#as:
-#objdump: -d
-#name: i860 pseudo-ops01
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	49 28 06 48 	fiadd\.ss	%f5,%f0,%f6
-   4:	c9 41 0a 48 	fiadd\.dd	%f8,%f0,%f10
-   8:	b3 18 14 48 	famov\.sd	%f3,%f20
-   c:	33 c1 09 48 	famov\.ds	%f24,%f9
-  10:	33 e5 03 48 	pfamov\.ds	%f28,%f3
diff --git a/gas/testsuite/gas/i860/pseudo-ops01.s b/gas/testsuite/gas/i860/pseudo-ops01.s
deleted file mode 100644
index 4b88925..0000000
--- a/gas/testsuite/gas/i860/pseudo-ops01.s
+++ /dev/null
@@ -1,10 +0,0 @@
-# Test some assembler pseudo-operations:
-# Floating point moves.
-
-	.text
-	fmov.ss		%f5,%f6
-	fmov.dd		%f8,%f10
-	fmov.sd		%f3,%f20
-	fmov.ds		%f24,%f9
-	pfmov.ds	%f28,%f3
-
diff --git a/gas/testsuite/gas/i860/regress01.d b/gas/testsuite/gas/i860/regress01.d
deleted file mode 100644
index 1ddfa4b..0000000
--- a/gas/testsuite/gas/i860/regress01.d
+++ /dev/null
@@ -1,21 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 regress01
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	f2 ff 50 2c 	fst.l	%f16,-16\(%sp\)
-   4:	f2 ff 54 2c 	fst.l	%f20,-16\(%sp\)
-   8:	f2 ff 58 2c 	fst.l	%f24,-16\(%sp\)
-   c:	f3 ff 50 2c 	fst.l	%f16,-16\(%sp\)\+\+
-  10:	f3 ff 54 2c 	fst.l	%f20,-16\(%sp\)\+\+
-  14:	f3 ff 58 2c 	fst.l	%f24,-16\(%sp\)\+\+
-  18:	f4 ff 50 2c 	fst.q	%f16,-16\(%sp\)
-  1c:	f4 ff 54 2c 	fst.q	%f20,-16\(%sp\)
-  20:	f4 ff 58 2c 	fst.q	%f24,-16\(%sp\)
-  24:	f5 ff 50 2c 	fst.q	%f16,-16\(%sp\)\+\+
-  28:	f5 ff 54 2c 	fst.q	%f20,-16\(%sp\)\+\+
-  2c:	f5 ff 58 2c 	fst.q	%f24,-16\(%sp\)\+\+
diff --git a/gas/testsuite/gas/i860/regress01.s b/gas/testsuite/gas/i860/regress01.s
deleted file mode 100644
index 002c3bd..0000000
--- a/gas/testsuite/gas/i860/regress01.s
+++ /dev/null
@@ -1,19 +0,0 @@
-# Test fst.* with and without auto-increment.
-
-	.text
-
-        fst.l   %f16,-16(%sp)
-        fst.l   %f20,-16(%sp)
-        fst.l   %f24,-16(%sp)
-
-        fst.l   %f16,-16(%sp)++
-        fst.l   %f20,-16(%sp)++
-        fst.l   %f24,-16(%sp)++
-
-        fst.q   %f16,-16(%sp)
-        fst.q   %f20,-16(%sp)
-        fst.q   %f24,-16(%sp)
-
-        fst.q   %f16,-16(%sp)++
-        fst.q   %f20,-16(%sp)++
-        fst.q   %f24,-16(%sp)++
diff --git a/gas/testsuite/gas/i860/shift.d b/gas/testsuite/gas/i860/shift.d
deleted file mode 100644
index e48ba16..0000000
--- a/gas/testsuite/gas/i860/shift.d
+++ /dev/null
@@ -1,86 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 shift
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 22 a0 	shl	%r0,%r1,%sp
-   4:	00 18 85 a0 	shl	%fp,%r4,%r5
-   8:	00 30 e8 a0 	shl	%r6,%r7,%r8
-   c:	00 48 4b a1 	shl	%r9,%r10,%r11
-  10:	00 f8 ae a1 	shl	%r31,%r13,%r14
-  14:	00 78 11 a2 	shl	%r15,%r16,%r17
-  18:	00 90 74 a2 	shl	%r18,%r19,%r20
-  1c:	00 a8 d7 a2 	shl	%r21,%r22,%r23
-  20:	00 c0 3f a3 	shl	%r24,%r25,%r31
-  24:	00 d8 9d a3 	shl	%r27,%r28,%r29
-  28:	00 f0 e0 a3 	shl	%r30,%r31,%r0
-  2c:	00 00 22 a8 	shr	%r0,%r1,%sp
-  30:	00 18 85 a8 	shr	%fp,%r4,%r5
-  34:	00 30 e8 a8 	shr	%r6,%r7,%r8
-  38:	00 48 4b a9 	shr	%r9,%r10,%r11
-  3c:	00 f8 ae a9 	shr	%r31,%r13,%r14
-  40:	00 78 11 aa 	shr	%r15,%r16,%r17
-  44:	00 90 74 aa 	shr	%r18,%r19,%r20
-  48:	00 a8 d7 aa 	shr	%r21,%r22,%r23
-  4c:	00 c0 3f ab 	shr	%r24,%r25,%r31
-  50:	00 d8 9d ab 	shr	%r27,%r28,%r29
-  54:	00 f0 e0 ab 	shr	%r30,%r31,%r0
-  58:	00 00 22 b8 	shra	%r0,%r1,%sp
-  5c:	00 18 85 b8 	shra	%fp,%r4,%r5
-  60:	00 30 e8 b8 	shra	%r6,%r7,%r8
-  64:	00 48 4b b9 	shra	%r9,%r10,%r11
-  68:	00 f8 ae b9 	shra	%r31,%r13,%r14
-  6c:	00 78 11 ba 	shra	%r15,%r16,%r17
-  70:	00 90 74 ba 	shra	%r18,%r19,%r20
-  74:	00 a8 d7 ba 	shra	%r21,%r22,%r23
-  78:	00 c0 3f bb 	shra	%r24,%r25,%r31
-  7c:	00 d8 9d bb 	shra	%r27,%r28,%r29
-  80:	00 f0 e0 bb 	shra	%r30,%r31,%r0
-  84:	00 00 22 b0 	shrd	%r0,%r1,%sp
-  88:	00 18 85 b0 	shrd	%fp,%r4,%r5
-  8c:	00 30 e8 b0 	shrd	%r6,%r7,%r8
-  90:	00 48 4b b1 	shrd	%r9,%r10,%r11
-  94:	00 f8 ae b1 	shrd	%r31,%r13,%r14
-  98:	00 78 11 b2 	shrd	%r15,%r16,%r17
-  9c:	00 90 74 b2 	shrd	%r18,%r19,%r20
-  a0:	00 a8 d7 b2 	shrd	%r21,%r22,%r23
-  a4:	00 c0 3f b3 	shrd	%r24,%r25,%r31
-  a8:	00 d8 9d b3 	shrd	%r27,%r28,%r29
-  ac:	00 f0 e0 b3 	shrd	%r30,%r31,%r0
-  b0:	00 00 22 a4 	shl	0,%r1,%sp
-  b4:	00 20 85 a4 	shl	8192,%r4,%r5
-  b8:	f5 13 e8 a4 	shl	5109,%r7,%r8
-  bc:	ff 7f 4b a5 	shl	32767,%r10,%r11
-  c0:	00 80 ae a5 	shl	-32768,%r13,%r14
-  c4:	00 e0 11 a6 	shl	-8192,%r16,%r17
-  c8:	ff ff 74 a6 	shl	-1,%r19,%r20
-  cc:	cd ab d7 a6 	shl	-21555,%r22,%r23
-  d0:	34 12 3a a7 	shl	4660,%r25,%r26
-  d4:	00 00 9d a7 	shl	0,%r28,%r29
-  d8:	03 00 e0 a7 	shl	3,%r31,%r0
-  dc:	00 00 22 ac 	shr	0,%r1,%sp
-  e0:	00 20 85 ac 	shr	8192,%r4,%r5
-  e4:	f5 13 e8 ac 	shr	5109,%r7,%r8
-  e8:	ff 7f 4b ad 	shr	32767,%r10,%r11
-  ec:	00 80 ae ad 	shr	-32768,%r13,%r14
-  f0:	00 e0 11 ae 	shr	-8192,%r16,%r17
-  f4:	ff ff 74 ae 	shr	-1,%r19,%r20
-  f8:	cd ab d7 ae 	shr	-21555,%r22,%r23
-  fc:	34 12 3a af 	shr	4660,%r25,%r26
- 100:	00 00 9d af 	shr	0,%r28,%r29
- 104:	03 00 e0 af 	shr	3,%r31,%r0
- 108:	01 00 22 bc 	shra	1,%r1,%sp
- 10c:	01 20 85 bc 	shra	8193,%r4,%r5
- 110:	f6 13 e8 bc 	shra	5110,%r7,%r8
- 114:	ff 7f 4b bd 	shra	32767,%r10,%r11
- 118:	00 80 ae bd 	shra	-32768,%r13,%r14
- 11c:	00 e0 11 be 	shra	-8192,%r16,%r17
- 120:	ff ff 74 be 	shra	-1,%r19,%r20
- 124:	cd ab d7 be 	shra	-21555,%r22,%r23
- 128:	34 12 3a bf 	shra	4660,%r25,%r26
- 12c:	00 00 9d bf 	shra	0,%r28,%r29
- 130:	03 00 e0 bf 	shra	3,%r31,%r0
diff --git a/gas/testsuite/gas/i860/shift.s b/gas/testsuite/gas/i860/shift.s
deleted file mode 100644
index 0d0d189..0000000
--- a/gas/testsuite/gas/i860/shift.s
+++ /dev/null
@@ -1,90 +0,0 @@
-# shl, shr, shra, shrd 
-
-	.text
-
-	# Register forms (all)
-	shl	%r0,%r1,%r2
-	shl	%r3,%r4,%r5
-	shl	%r6,%r7,%r8
-	shl	%r9,%r10,%r11
-	shl	%r31,%r13,%r14
-	shl	%r15,%r16,%r17
-	shl	%r18,%r19,%r20
-	shl	%r21,%r22,%r23
-	shl	%r24,%r25,%r31
-	shl	%r27,%r28,%r29
-	shl	%r30,%r31,%r0
-
-	shr	%r0,%r1,%r2
-	shr	%r3,%r4,%r5
-	shr	%r6,%r7,%r8
-	shr	%r9,%r10,%r11
-	shr	%r31,%r13,%r14
-	shr	%r15,%r16,%r17
-	shr	%r18,%r19,%r20
-	shr	%r21,%r22,%r23
-	shr	%r24,%r25,%r31
-	shr	%r27,%r28,%r29
-	shr	%r30,%r31,%r0
-
-	shra	%r0,%r1,%r2
-	shra	%r3,%r4,%r5
-	shra	%r6,%r7,%r8
-	shra	%r9,%r10,%r11
-	shra	%r31,%r13,%r14
-	shra	%r15,%r16,%r17
-	shra	%r18,%r19,%r20
-	shra	%r21,%r22,%r23
-	shra	%r24,%r25,%r31
-	shra	%r27,%r28,%r29
-	shra	%r30,%r31,%r0
-
-	shrd	%r0,%r1,%r2
-	shrd	%r3,%r4,%r5
-	shrd	%r6,%r7,%r8
-	shrd	%r9,%r10,%r11
-	shrd	%r31,%r13,%r14
-	shrd	%r15,%r16,%r17
-	shrd	%r18,%r19,%r20
-	shrd	%r21,%r22,%r23
-	shrd	%r24,%r25,%r31
-	shrd	%r27,%r28,%r29
-	shrd	%r30,%r31,%r0
-
-	# Immediate forms (shrd does not have an immediate form)
-	shl	0,%r1,%r2
-	shl	8192,%r4,%r5
-	shl	5109,%r7,%r8
-	shl	32767,%r10,%r11
-	shl	-32768,%r13,%r14
-	shl	-8192,%r16,%r17
-	shl	-1,%r19,%r20
-	shl	-21555,%r22,%r23
-	shl	0x1234,%r25,%r26
-	shl	0x0,%r28,%r29
-	shl	0x3,%r31,%r0
-
-	shr	0,%r1,%r2
-	shr	8192,%r4,%r5
-	shr	5109,%r7,%r8
-	shr	32767,%r10,%r11
-	shr	-32768,%r13,%r14
-	shr	-8192,%r16,%r17
-	shr	-1,%r19,%r20
-	shr	-21555,%r22,%r23
-	shr	0x1234,%r25,%r26
-	shr	0x0,%r28,%r29
-	shr	0x3,%r31,%r0
-
-	shra	1,%r1,%r2
-	shra	8193,%r4,%r5
-	shra	5110,%r7,%r8
-	shra	32767,%r10,%r11
-	shra	-32768,%r13,%r14
-	shra	-8192,%r16,%r17
-	shra	-1,%r19,%r20
-	shra	-21555,%r22,%r23
-	shra	0x1234,%r25,%r26
-	shra	0x0,%r28,%r29
-	shra	0x3,%r31,%r0
-
diff --git a/gas/testsuite/gas/i860/simd.d b/gas/testsuite/gas/i860/simd.d
deleted file mode 100644
index 2885196..0000000
--- a/gas/testsuite/gas/i860/simd.d
+++ /dev/null
@@ -1,105 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 simd
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	d7 05 48 48 	pfzchkl	%f0,%f2,%f8
-   4:	d7 15 90 48 	pfzchkl	%f2,%f4,%f16
-   8:	d7 25 cd 48 	pfzchkl	%f4,%f6,%f13
-   c:	d7 45 52 49 	pfzchkl	%f8,%f10,%f18
-  10:	df 65 de 49 	pfzchks	%f12,%f14,%f30
-  14:	df 85 54 4a 	pfzchks	%f16,%f18,%f20
-  18:	df a5 dc 4a 	pfzchks	%f20,%f22,%f28
-  1c:	df c5 5e 4b 	pfzchks	%f24,%f26,%f30
-  20:	d0 05 48 48 	pfaddp	%f0,%f2,%f8
-  24:	d0 15 90 48 	pfaddp	%f2,%f4,%f16
-  28:	d0 25 cd 48 	pfaddp	%f4,%f6,%f13
-  2c:	d0 45 52 49 	pfaddp	%f8,%f10,%f18
-  30:	d1 65 de 49 	pfaddz	%f12,%f14,%f30
-  34:	d1 85 54 4a 	pfaddz	%f16,%f18,%f20
-  38:	d1 a5 dc 4a 	pfaddz	%f20,%f22,%f28
-  3c:	d1 c5 5e 4b 	pfaddz	%f24,%f26,%f30
-  40:	d7 61 44 48 	fzchkl	%f12,%f2,%f4
-  44:	d7 b1 82 48 	fzchkl	%f22,%f4,%f2
-  48:	d7 21 d2 48 	fzchkl	%f4,%f6,%f18
-  4c:	d7 41 5c 49 	fzchkl	%f8,%f10,%f28
-  50:	df 61 c6 49 	fzchks	%f12,%f14,%f6
-  54:	df 81 54 4a 	fzchks	%f16,%f18,%f20
-  58:	df a1 dc 4a 	fzchks	%f20,%f22,%f28
-  5c:	df c1 5e 4b 	fzchks	%f24,%f26,%f30
-  60:	d0 61 44 48 	faddp	%f12,%f2,%f4
-  64:	d0 b1 82 48 	faddp	%f22,%f4,%f2
-  68:	d0 21 d2 48 	faddp	%f4,%f6,%f18
-  6c:	d0 41 5c 49 	faddp	%f8,%f10,%f28
-  70:	d1 61 c6 49 	faddz	%f12,%f14,%f6
-  74:	d1 81 54 4a 	faddz	%f16,%f18,%f20
-  78:	d1 a1 dc 4a 	faddz	%f20,%f22,%f28
-  7c:	d1 c1 5e 4b 	faddz	%f24,%f26,%f30
-  80:	d7 07 52 48 	d.pfzchkl	%f0,%f2,%f18
-  84:	00 00 00 a0 	shl	%r0,%r0,%r0
-  88:	d7 17 8c 48 	d.pfzchkl	%f2,%f4,%f12
-  8c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  90:	d7 27 de 48 	d.pfzchkl	%f4,%f6,%f30
-  94:	00 00 00 a0 	shl	%r0,%r0,%r0
-  98:	d7 47 44 49 	d.pfzchkl	%f8,%f10,%f4
-  9c:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a0:	df 67 ce 49 	d.pfzchks	%f12,%f14,%f14
-  a4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  a8:	df 87 46 4a 	d.pfzchks	%f16,%f18,%f6
-  ac:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b0:	df a7 ca 4a 	d.pfzchks	%f20,%f22,%f10
-  b4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  b8:	df c7 48 4b 	d.pfzchks	%f24,%f26,%f8
-  bc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c0:	d0 07 52 48 	d.pfaddp	%f0,%f2,%f18
-  c4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  c8:	d0 17 80 48 	d.pfaddp	%f2,%f4,%f0
-  cc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d0:	d0 27 de 48 	d.pfaddp	%f4,%f6,%f30
-  d4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  d8:	d0 47 44 49 	d.pfaddp	%f8,%f10,%f4
-  dc:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e0:	d1 67 ce 49 	d.pfaddz	%f12,%f14,%f14
-  e4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  e8:	d1 87 46 4a 	d.pfaddz	%f16,%f18,%f6
-  ec:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f0:	d1 a7 ca 4a 	d.pfaddz	%f20,%f22,%f10
-  f4:	00 00 00 a0 	shl	%r0,%r0,%r0
-  f8:	d1 c7 48 4b 	d.pfaddz	%f24,%f26,%f8
-  fc:	00 00 00 a0 	shl	%r0,%r0,%r0
- 100:	d7 03 4a 48 	d.fzchkl	%f0,%f2,%f10
- 104:	00 00 00 a0 	shl	%r0,%r0,%r0
- 108:	d7 13 92 48 	d.fzchkl	%f2,%f4,%f18
- 10c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 110:	d7 23 cc 48 	d.fzchkl	%f4,%f6,%f12
- 114:	00 00 00 a0 	shl	%r0,%r0,%r0
- 118:	d7 43 4e 49 	d.fzchkl	%f8,%f10,%f14
- 11c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 120:	df 63 d0 49 	d.fzchks	%f12,%f14,%f16
- 124:	00 00 00 a0 	shl	%r0,%r0,%r0
- 128:	df 83 4c 4a 	d.fzchks	%f16,%f18,%f12
- 12c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 130:	df a3 d0 4a 	d.fzchks	%f20,%f22,%f16
- 134:	00 00 00 a0 	shl	%r0,%r0,%r0
- 138:	df c3 5e 4b 	d.fzchks	%f24,%f26,%f30
- 13c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 140:	d0 03 4a 48 	d.faddp	%f0,%f2,%f10
- 144:	00 00 00 a0 	shl	%r0,%r0,%r0
- 148:	d0 13 92 48 	d.faddp	%f2,%f4,%f18
- 14c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 150:	d0 23 cc 48 	d.faddp	%f4,%f6,%f12
- 154:	00 00 00 a0 	shl	%r0,%r0,%r0
- 158:	d0 43 4e 49 	d.faddp	%f8,%f10,%f14
- 15c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 160:	d1 63 d0 49 	d.faddz	%f12,%f14,%f16
- 164:	00 00 00 a0 	shl	%r0,%r0,%r0
- 168:	d1 83 4c 4a 	d.faddz	%f16,%f18,%f12
- 16c:	00 00 00 a0 	shl	%r0,%r0,%r0
- 170:	d1 a3 d0 4a 	d.faddz	%f20,%f22,%f16
- 174:	00 00 00 a0 	shl	%r0,%r0,%r0
- 178:	d1 c3 5e 4b 	d.faddz	%f24,%f26,%f30
- 17c:	00 00 00 a0 	shl	%r0,%r0,%r0
diff --git a/gas/testsuite/gas/i860/simd.s b/gas/testsuite/gas/i860/simd.s
deleted file mode 100644
index 4f252dd..0000000
--- a/gas/testsuite/gas/i860/simd.s
+++ /dev/null
@@ -1,119 +0,0 @@
-# fzchkl, fzchks, faddp, faddz
-
-	.text
-
-	# Pipelined, without dual bit
-	pfzchkl	%f0,%f2,%f8
-	pfzchkl	%f2,%f4,%f16
-	pfzchkl	%f4,%f6,%f13
-	pfzchkl	%f8,%f10,%f18
-
-	pfzchks	%f12,%f14,%f30
-	pfzchks	%f16,%f18,%f20
-	pfzchks	%f20,%f22,%f28
-	pfzchks	%f24,%f26,%f30
-
-	pfaddp	%f0,%f2,%f8
-	pfaddp	%f2,%f4,%f16
-	pfaddp	%f4,%f6,%f13
-	pfaddp	%f8,%f10,%f18
-
-	pfaddz	%f12,%f14,%f30
-	pfaddz	%f16,%f18,%f20
-	pfaddz	%f20,%f22,%f28
-	pfaddz	%f24,%f26,%f30
-
-	# Non-pipelined, without dual bit
-	fzchkl	%f12,%f2,%f4
-	fzchkl	%f22,%f4,%f2
-	fzchkl	%f4,%f6,%f18
-	fzchkl	%f8,%f10,%f28
-
-	fzchks	%f12,%f14,%f6
-	fzchks	%f16,%f18,%f20
-	fzchks	%f20,%f22,%f28
-	fzchks	%f24,%f26,%f30
-
-	faddp	%f12,%f2,%f4
-	faddp	%f22,%f4,%f2
-	faddp	%f4,%f6,%f18
-	faddp	%f8,%f10,%f28
-
-	faddz	%f12,%f14,%f6
-	faddz	%f16,%f18,%f20
-	faddz	%f20,%f22,%f28
-	faddz	%f24,%f26,%f30
-
-	# Pipelined, with dual bit
-	d.pfzchkl	%f0,%f2,%f18
-	nop
-	d.pfzchkl	%f2,%f4,%f12
-	nop
-	d.pfzchkl	%f4,%f6,%f30
-	nop
-	d.pfzchkl	%f8,%f10,%f4
-	nop
-
-	d.pfzchks	%f12,%f14,%f14
-	nop
-	d.pfzchks	%f16,%f18,%f6
-	nop
-	d.pfzchks	%f20,%f22,%f10
-	nop
-	d.pfzchks	%f24,%f26,%f8
-	nop
-
-	d.pfaddp	%f0,%f2,%f18
-	nop
-	d.pfaddp	%f2,%f4,%f0
-	nop
-	d.pfaddp	%f4,%f6,%f30
-	nop
-	d.pfaddp	%f8,%f10,%f4
-	nop
-
-	d.pfaddz	%f12,%f14,%f14
-	nop
-	d.pfaddz	%f16,%f18,%f6
-	nop
-	d.pfaddz	%f20,%f22,%f10
-	nop
-	d.pfaddz	%f24,%f26,%f8
-	nop
-
-	# Non-pipelined, with dual bit
-	d.fzchkl	%f0,%f2,%f10
-	nop
-	d.fzchkl	%f2,%f4,%f18
-	nop
-	d.fzchkl	%f4,%f6,%f12
-	nop
-	d.fzchkl	%f8,%f10,%f14
-	nop
-
-	d.fzchks	%f12,%f14,%f16
-	nop
-	d.fzchks	%f16,%f18,%f12
-	nop
-	d.fzchks	%f20,%f22,%f16
-	nop
-	d.fzchks	%f24,%f26,%f30
-	nop
-
-	d.faddp	%f0,%f2,%f10
-	nop
-	d.faddp	%f2,%f4,%f18
-	nop
-	d.faddp	%f4,%f6,%f12
-	nop
-	d.faddp	%f8,%f10,%f14
-	nop
-
-	d.faddz	%f12,%f14,%f16
-	nop
-	d.faddz	%f16,%f18,%f12
-	nop
-	d.faddz	%f20,%f22,%f16
-	nop
-	d.faddz	%f24,%f26,%f30
-	nop
diff --git a/gas/testsuite/gas/i860/system.d b/gas/testsuite/gas/i860/system.d
deleted file mode 100644
index a797961..0000000
--- a/gas/testsuite/gas/i860/system.d
+++ /dev/null
@@ -1,72 +0,0 @@
-#as:
-#objdump: -dr
-#name: i860 system
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	01 00 00 4c 	lock	
-   4:	07 00 00 4c 	unlock	
-   8:	04 00 00 4c 	intovr	
-   c:	00 00 00 44 	trap	%r0,%r0,%r0
-  10:	00 f8 ff 47 	trap	%r31,%r31,%r31
-  14:	00 08 b2 44 	trap	%r1,%r5,%r18
-  18:	00 f8 86 46 	trap	%r31,%r20,%r6
-  1c:	00 00 01 30 	ld.c	%fir,%r1
-  20:	00 00 1f 30 	ld.c	%fir,%r31
-  24:	00 00 25 30 	ld.c	%psr,%r5
-  28:	00 00 3e 30 	ld.c	%psr,%r30
-  2c:	00 00 4a 30 	ld.c	%dirbase,%r10
-  30:	00 00 42 30 	ld.c	%dirbase,%sp
-  34:	00 00 75 30 	ld.c	%db,%r21
-  38:	00 00 60 30 	ld.c	%db,%r0
-  3c:	00 00 9c 30 	ld.c	%fsr,%r28
-  40:	00 00 8c 30 	ld.c	%fsr,%r12
-  44:	00 00 bf 30 	ld.c	%epsr,%r31
-  48:	00 00 a6 30 	ld.c	%epsr,%r6
-  4c:	00 00 00 38 	st.c	%r0,%fir
-  50:	00 f0 00 38 	st.c	%r30,%fir
-  54:	00 38 20 38 	st.c	%r7,%psr
-  58:	00 f8 20 38 	st.c	%r31,%psr
-  5c:	00 58 40 38 	st.c	%r11,%dirbase
-  60:	00 18 40 38 	st.c	%fp,%dirbase
-  64:	00 b0 60 38 	st.c	%r22,%db
-  68:	00 78 60 38 	st.c	%r15,%db
-  6c:	00 e8 80 38 	st.c	%r29,%fsr
-  70:	00 68 80 38 	st.c	%r13,%fsr
-  74:	00 20 a0 38 	st.c	%r4,%epsr
-  78:	00 30 a0 38 	st.c	%r6,%epsr
-  7c:	04 00 00 34 	flush	0\(%r0\)
-  80:	84 00 20 34 	flush	128\(%r1\)
-  84:	04 01 40 34 	flush	256\(%sp\)
-  88:	04 02 60 34 	flush	512\(%fp\)
-  8c:	04 04 80 34 	flush	1024\(%r4\)
-  90:	04 10 a0 34 	flush	4096\(%r5\)
-  94:	04 20 c0 34 	flush	8192\(%r6\)
-  98:	04 40 e0 34 	flush	16384\(%r7\)
-  9c:	04 c0 00 35 	flush	-16384\(%r8\)
-  a0:	04 e0 20 35 	flush	-8192\(%r9\)
-  a4:	04 f0 40 35 	flush	-4096\(%r10\)
-  a8:	04 fc 60 35 	flush	-1024\(%r11\)
-  ac:	04 fe 80 35 	flush	-512\(%r12\)
-  b0:	0c ff a0 35 	flush	-248\(%r13\)
-  b4:	e4 ff c0 35 	flush	-32\(%r14\)
-  b8:	f4 ff c0 35 	flush	-16\(%r14\)
-  bc:	05 00 00 34 	flush	0\(%r0\)\+\+
-  c0:	85 00 20 34 	flush	128\(%r1\)\+\+
-  c4:	05 01 40 34 	flush	256\(%sp\)\+\+
-  c8:	05 02 60 34 	flush	512\(%fp\)\+\+
-  cc:	05 04 80 34 	flush	1024\(%r4\)\+\+
-  d0:	05 10 c0 36 	flush	4096\(%r22\)\+\+
-  d4:	05 20 e0 36 	flush	8192\(%r23\)\+\+
-  d8:	05 40 00 37 	flush	16384\(%r24\)\+\+
-  dc:	05 c0 20 37 	flush	-16384\(%r25\)\+\+
-  e0:	05 e0 40 37 	flush	-8192\(%r26\)\+\+
-  e4:	05 f0 60 37 	flush	-4096\(%r27\)\+\+
-  e8:	05 fc 80 37 	flush	-1024\(%r28\)\+\+
-  ec:	05 fe a0 37 	flush	-512\(%r29\)\+\+
-  f0:	0d ff c0 37 	flush	-248\(%r30\)\+\+
-  f4:	25 00 e0 37 	flush	32\(%r31\)\+\+
-  f8:	15 00 e0 37 	flush	16\(%r31\)\+\+
diff --git a/gas/testsuite/gas/i860/system.s b/gas/testsuite/gas/i860/system.s
deleted file mode 100644
index 62bcbfc..0000000
--- a/gas/testsuite/gas/i860/system.s
+++ /dev/null
@@ -1,76 +0,0 @@
-# System and privileged instructions
-# ld.c, st.c, flush, lock, unlock, intovr, trap
-
-	.text
-
-	lock
-	unlock
-	intovr
-
-	trap	%r0,%r0,%r0
-	trap	%r31,%r31,%r31
-	trap	%r1,%r5,%r18
-	trap	%r31,%r20,%r6
-
-	ld.c	%fir,%r1
-	ld.c	%fir,%r31
-	ld.c	%psr,%r5
-	ld.c	%psr,%r30
-	ld.c	%dirbase,%r10
-	ld.c	%dirbase,%r2
-	ld.c	%db,%r21
-	ld.c	%db,%r0
-	ld.c	%fsr,%r28
-	ld.c	%fsr,%r12
-	ld.c	%epsr,%r31
-	ld.c	%epsr,%r6
-
-	st.c	%r0,%fir
-	st.c	%r30,%fir
-	st.c	%r7,%psr
-	st.c	%r31,%psr
-	st.c	%r11,%dirbase
-	st.c	%r3,%dirbase
-	st.c	%r22,%db
-	st.c	%r15,%db
-	st.c	%r29,%fsr
-	st.c	%r13,%fsr
-	st.c	%r4,%epsr
-	st.c	%r6,%epsr
-
-	# Flush, no auto-increment.
-	flush	0(%r0)
-	flush	128(%r1)
-	flush	256(%r2)
-	flush	512(%r3)
-	flush	1024(%r4)
-	flush	4096(%r5)
-	flush	8192(%r6)
-	flush	16384(%r7)
-	flush	-16384(%r8)
-	flush	-8192(%r9)
-	flush	-4096(%r10)
-	flush	-1024(%r11)
-	flush	-512(%r12)
-	flush	-248(%r13)
-	flush	-32(%r14)
-	flush	-16(%r14)
-
-	# Flush, auto-increment.	
-	flush	0(%r0)++
-	flush	128(%r1)++
-	flush	256(%r2)++
-	flush	512(%r3)++
-	flush	1024(%r4)++
-	flush	4096(%r22)++
-	flush	8192(%r23)++
-	flush	16384(%r24)++
-	flush	-16384(%r25)++
-	flush	-8192(%r26)++
-	flush	-4096(%r27)++
-	flush	-1024(%r28)++
-	flush	-512(%r29)++
-	flush	-248(%r30)++
-	flush	32(%r31)++
-	flush	16(%r31)++
-
diff --git a/gas/testsuite/gas/i860/xp.d b/gas/testsuite/gas/i860/xp.d
deleted file mode 100644
index 6dad997..0000000
--- a/gas/testsuite/gas/i860/xp.d
+++ /dev/null
@@ -1,241 +0,0 @@
-#as: -mxp
-#objdump: -dr
-#name: i860 xp (XP-only instructions)
-
-.*: +file format .*
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:	00 00 df 30 	ld.c	%bear,%r31
-   4:	00 00 c0 30 	ld.c	%bear,%r0
-   8:	00 00 e5 30 	ld.c	%ccr,%r5
-   c:	00 00 fe 30 	ld.c	%ccr,%r30
-  10:	00 00 0a 31 	ld.c	%p0,%r10
-  14:	00 00 02 31 	ld.c	%p0,%sp
-  18:	00 00 35 31 	ld.c	%p1,%r21
-  1c:	00 00 20 31 	ld.c	%p1,%r0
-  20:	00 00 5c 31 	ld.c	%p2,%r28
-  24:	00 00 4c 31 	ld.c	%p2,%r12
-  28:	00 00 7f 31 	ld.c	%p3,%r31
-  2c:	00 00 66 31 	ld.c	%p3,%r6
-  30:	00 00 c0 38 	st.c	%r0,%bear
-  34:	00 f0 c0 38 	st.c	%r30,%bear
-  38:	00 38 e0 38 	st.c	%r7,%ccr
-  3c:	00 f8 e0 38 	st.c	%r31,%ccr
-  40:	00 58 00 39 	st.c	%r11,%p0
-  44:	00 18 00 39 	st.c	%fp,%p0
-  48:	00 b0 20 39 	st.c	%r22,%p1
-  4c:	00 78 20 39 	st.c	%r15,%p1
-  50:	00 e8 40 39 	st.c	%r29,%p2
-  54:	00 68 40 39 	st.c	%r13,%p2
-  58:	00 20 60 39 	st.c	%r4,%p3
-  5c:	00 30 60 39 	st.c	%r6,%p3
-  60:	0a 04 05 4c 	ldint.l	%r0,%r5
-  64:	0a 04 df 4c 	ldint.l	%r6,%r31
-  68:	0a 04 fe 4c 	ldint.l	%r7,%r30
-  6c:	0a 04 1d 4d 	ldint.l	%r8,%r29
-  70:	0a 04 3c 4d 	ldint.l	%r9,%r28
-  74:	0a 04 1b 4c 	ldint.l	%r0,%r27
-  78:	0a 04 3a 4c 	ldint.l	%r1,%r26
-  7c:	0a 04 99 4d 	ldint.l	%r12,%r25
-  80:	0a 04 b8 4d 	ldint.l	%r13,%r24
-  84:	0a 04 d7 4d 	ldint.l	%r14,%r23
-  88:	0a 04 f6 4d 	ldint.l	%r15,%r22
-  8c:	0a 04 15 4e 	ldint.l	%r16,%r21
-  90:	0a 04 34 4e 	ldint.l	%r17,%r20
-  94:	0a 04 93 4f 	ldint.l	%r28,%r19
-  98:	0a 04 f2 4f 	ldint.l	%r31,%r18
-  9c:	0a 02 05 4c 	ldint.s	%r0,%r5
-  a0:	0a 02 df 4c 	ldint.s	%r6,%r31
-  a4:	0a 02 fe 4c 	ldint.s	%r7,%r30
-  a8:	0a 02 1d 4d 	ldint.s	%r8,%r29
-  ac:	0a 02 3c 4d 	ldint.s	%r9,%r28
-  b0:	0a 02 1b 4c 	ldint.s	%r0,%r27
-  b4:	0a 02 3a 4c 	ldint.s	%r1,%r26
-  b8:	0a 02 99 4d 	ldint.s	%r12,%r25
-  bc:	0a 02 b8 4d 	ldint.s	%r13,%r24
-  c0:	0a 02 d7 4d 	ldint.s	%r14,%r23
-  c4:	0a 02 f6 4d 	ldint.s	%r15,%r22
-  c8:	0a 02 15 4e 	ldint.s	%r16,%r21
-  cc:	0a 02 34 4e 	ldint.s	%r17,%r20
-  d0:	0a 02 93 4f 	ldint.s	%r28,%r19
-  d4:	0a 02 f2 4f 	ldint.s	%r31,%r18
-  d8:	0a 00 05 4c 	ldint.b	%r0,%r5
-  dc:	0a 00 df 4c 	ldint.b	%r6,%r31
-  e0:	0a 00 fe 4c 	ldint.b	%r7,%r30
-  e4:	0a 00 1d 4d 	ldint.b	%r8,%r29
-  e8:	0a 00 3c 4d 	ldint.b	%r9,%r28
-  ec:	0a 00 1b 4c 	ldint.b	%r0,%r27
-  f0:	0a 00 3a 4c 	ldint.b	%r1,%r26
-  f4:	0a 00 99 4d 	ldint.b	%r12,%r25
-  f8:	0a 00 b8 4d 	ldint.b	%r13,%r24
-  fc:	0a 00 d7 4d 	ldint.b	%r14,%r23
- 100:	0a 00 f6 4d 	ldint.b	%r15,%r22
- 104:	0a 00 15 4e 	ldint.b	%r16,%r21
- 108:	0a 00 34 4e 	ldint.b	%r17,%r20
- 10c:	0a 00 93 4f 	ldint.b	%r28,%r19
- 110:	0a 00 f2 4f 	ldint.b	%r31,%r18
- 114:	08 04 05 4c 	ldio.l	%r0,%r5
- 118:	08 04 df 4c 	ldio.l	%r6,%r31
- 11c:	08 04 fe 4c 	ldio.l	%r7,%r30
- 120:	08 04 1d 4d 	ldio.l	%r8,%r29
- 124:	08 04 3c 4d 	ldio.l	%r9,%r28
- 128:	08 04 1b 4c 	ldio.l	%r0,%r27
- 12c:	08 04 3a 4c 	ldio.l	%r1,%r26
- 130:	08 04 99 4d 	ldio.l	%r12,%r25
- 134:	08 04 b8 4d 	ldio.l	%r13,%r24
- 138:	08 04 d7 4d 	ldio.l	%r14,%r23
- 13c:	08 04 f6 4d 	ldio.l	%r15,%r22
- 140:	08 04 15 4e 	ldio.l	%r16,%r21
- 144:	08 04 34 4e 	ldio.l	%r17,%r20
- 148:	08 04 93 4f 	ldio.l	%r28,%r19
- 14c:	08 04 f2 4f 	ldio.l	%r31,%r18
- 150:	08 02 05 4c 	ldio.s	%r0,%r5
- 154:	08 02 df 4c 	ldio.s	%r6,%r31
- 158:	08 02 fe 4c 	ldio.s	%r7,%r30
- 15c:	08 02 1d 4d 	ldio.s	%r8,%r29
- 160:	08 02 3c 4d 	ldio.s	%r9,%r28
- 164:	08 02 1b 4c 	ldio.s	%r0,%r27
- 168:	08 02 3a 4c 	ldio.s	%r1,%r26
- 16c:	08 02 99 4d 	ldio.s	%r12,%r25
- 170:	08 02 b8 4d 	ldio.s	%r13,%r24
- 174:	08 02 d7 4d 	ldio.s	%r14,%r23
- 178:	08 02 f6 4d 	ldio.s	%r15,%r22
- 17c:	08 02 15 4e 	ldio.s	%r16,%r21
- 180:	08 02 34 4e 	ldio.s	%r17,%r20
- 184:	08 02 93 4f 	ldio.s	%r28,%r19
- 188:	08 02 f2 4f 	ldio.s	%r31,%r18
- 18c:	08 00 05 4c 	ldio.b	%r0,%r5
- 190:	08 00 df 4c 	ldio.b	%r6,%r31
- 194:	08 00 fe 4c 	ldio.b	%r7,%r30
- 198:	08 00 1d 4d 	ldio.b	%r8,%r29
- 19c:	08 00 3c 4d 	ldio.b	%r9,%r28
- 1a0:	08 00 1b 4c 	ldio.b	%r0,%r27
- 1a4:	08 00 3a 4c 	ldio.b	%r1,%r26
- 1a8:	08 00 99 4d 	ldio.b	%r12,%r25
- 1ac:	08 00 b8 4d 	ldio.b	%r13,%r24
- 1b0:	08 00 d7 4d 	ldio.b	%r14,%r23
- 1b4:	08 00 f6 4d 	ldio.b	%r15,%r22
- 1b8:	08 00 15 4e 	ldio.b	%r16,%r21
- 1bc:	08 00 34 4e 	ldio.b	%r17,%r20
- 1c0:	08 00 93 4f 	ldio.b	%r28,%r19
- 1c4:	08 00 f2 4f 	ldio.b	%r31,%r18
- 1c8:	09 04 a0 4c 	stio.l	%r0,%r5
- 1cc:	09 34 e0 4f 	stio.l	%r6,%r31
- 1d0:	09 3c c0 4f 	stio.l	%r7,%r30
- 1d4:	09 44 a0 4f 	stio.l	%r8,%r29
- 1d8:	09 4c 80 4f 	stio.l	%r9,%r28
- 1dc:	09 04 60 4f 	stio.l	%r0,%r27
- 1e0:	09 0c 40 4f 	stio.l	%r1,%r26
- 1e4:	09 64 20 4f 	stio.l	%r12,%r25
- 1e8:	09 6c 00 4f 	stio.l	%r13,%r24
- 1ec:	09 74 e0 4e 	stio.l	%r14,%r23
- 1f0:	09 7c c0 4e 	stio.l	%r15,%r22
- 1f4:	09 84 a0 4e 	stio.l	%r16,%r21
- 1f8:	09 8c 80 4e 	stio.l	%r17,%r20
- 1fc:	09 e4 60 4e 	stio.l	%r28,%r19
- 200:	09 fc 40 4e 	stio.l	%r31,%r18
- 204:	09 02 a0 4c 	stio.s	%r0,%r5
- 208:	09 32 e0 4f 	stio.s	%r6,%r31
- 20c:	09 3a c0 4f 	stio.s	%r7,%r30
- 210:	09 42 a0 4f 	stio.s	%r8,%r29
- 214:	09 4a 80 4f 	stio.s	%r9,%r28
- 218:	09 02 60 4f 	stio.s	%r0,%r27
- 21c:	09 0a 40 4f 	stio.s	%r1,%r26
- 220:	09 62 20 4f 	stio.s	%r12,%r25
- 224:	09 6a 00 4f 	stio.s	%r13,%r24
- 228:	09 72 e0 4e 	stio.s	%r14,%r23
- 22c:	09 7a c0 4e 	stio.s	%r15,%r22
- 230:	09 82 a0 4e 	stio.s	%r16,%r21
- 234:	09 8a 80 4e 	stio.s	%r17,%r20
- 238:	09 e2 60 4e 	stio.s	%r28,%r19
- 23c:	09 fa 40 4e 	stio.s	%r31,%r18
- 240:	09 00 a0 4c 	stio.b	%r0,%r5
- 244:	09 30 e0 4f 	stio.b	%r6,%r31
- 248:	09 38 c0 4f 	stio.b	%r7,%r30
- 24c:	09 40 a0 4f 	stio.b	%r8,%r29
- 250:	09 48 80 4f 	stio.b	%r9,%r28
- 254:	09 00 60 4f 	stio.b	%r0,%r27
- 258:	09 08 40 4f 	stio.b	%r1,%r26
- 25c:	09 60 20 4f 	stio.b	%r12,%r25
- 260:	09 68 00 4f 	stio.b	%r13,%r24
- 264:	09 70 e0 4e 	stio.b	%r14,%r23
- 268:	09 78 c0 4e 	stio.b	%r15,%r22
- 26c:	09 80 a0 4e 	stio.b	%r16,%r21
- 270:	09 88 80 4e 	stio.b	%r17,%r20
- 274:	09 e0 60 4e 	stio.b	%r28,%r19
- 278:	09 f8 40 4e 	stio.b	%r31,%r18
- 27c:	0b 00 00 4c 	scyc.b	%r0
- 280:	0b 00 a0 4c 	scyc.b	%r5
- 284:	0b 00 c0 4c 	scyc.b	%r6
- 288:	0b 00 a0 4d 	scyc.b	%r13
- 28c:	0b 00 c0 4d 	scyc.b	%r14
- 290:	0b 00 80 4f 	scyc.b	%r28
- 294:	0b 00 a0 4f 	scyc.b	%r29
- 298:	0b 00 c0 4f 	scyc.b	%r30
- 29c:	0b 00 e0 4f 	scyc.b	%r31
- 2a0:	04 00 00 64 	pfld.q	0\(%r0\),%f0
- 2a4:	84 00 3c 64 	pfld.q	128\(%r1\),%f28
- 2a8:	04 01 58 64 	pfld.q	256\(%sp\),%f24
- 2ac:	04 02 74 64 	pfld.q	512\(%fp\),%f20
- 2b0:	04 04 90 64 	pfld.q	1024\(%r4\),%f16
- 2b4:	04 10 ac 64 	pfld.q	4096\(%r5\),%f12
- 2b8:	04 20 c8 64 	pfld.q	8192\(%r6\),%f8
- 2bc:	04 40 e4 64 	pfld.q	16384\(%r7\),%f4
- 2c0:	fc 7f e0 64 	pfld.q	32760\(%r7\),%f0
- 2c4:	04 80 fc 64 	pfld.q	-32768\(%r7\),%f28
- 2c8:	04 c0 18 65 	pfld.q	-16384\(%r8\),%f24
- 2cc:	04 e0 34 65 	pfld.q	-8192\(%r9\),%f20
- 2d0:	04 f0 50 65 	pfld.q	-4096\(%r10\),%f16
- 2d4:	04 fc 6c 65 	pfld.q	-1024\(%r11\),%f12
- 2d8:	04 fe 88 65 	pfld.q	-512\(%r12\),%f8
- 2dc:	0c ff a4 65 	pfld.q	-248\(%r13\),%f4
- 2e0:	fc ff c0 65 	pfld.q	-8\(%r14\),%f0
- 2e4:	05 00 00 64 	pfld.q	0\(%r0\)\+\+,%f0
- 2e8:	85 00 24 64 	pfld.q	128\(%r1\)\+\+,%f4
- 2ec:	05 01 48 64 	pfld.q	256\(%sp\)\+\+,%f8
- 2f0:	05 02 6c 64 	pfld.q	512\(%fp\)\+\+,%f12
- 2f4:	05 04 90 64 	pfld.q	1024\(%r4\)\+\+,%f16
- 2f8:	05 10 b4 64 	pfld.q	4096\(%r5\)\+\+,%f20
- 2fc:	05 20 d8 64 	pfld.q	8192\(%r6\)\+\+,%f24
- 300:	05 40 fc 64 	pfld.q	16384\(%r7\)\+\+,%f28
- 304:	fd 7f e0 64 	pfld.q	32760\(%r7\)\+\+,%f0
- 308:	05 80 e4 64 	pfld.q	-32768\(%r7\)\+\+,%f4
- 30c:	05 c0 08 65 	pfld.q	-16384\(%r8\)\+\+,%f8
- 310:	05 e0 2c 65 	pfld.q	-8192\(%r9\)\+\+,%f12
- 314:	05 f0 50 65 	pfld.q	-4096\(%r10\)\+\+,%f16
- 318:	05 fc 74 65 	pfld.q	-1024\(%r11\)\+\+,%f20
- 31c:	05 fe 98 65 	pfld.q	-512\(%r12\)\+\+,%f24
- 320:	0d ff bc 65 	pfld.q	-248\(%r13\)\+\+,%f28
- 324:	fd ff d0 65 	pfld.q	-8\(%r14\)\+\+,%f16
- 328:	04 28 1c 60 	pfld.q	%r5\(%r0\),%f28
- 32c:	04 30 38 60 	pfld.q	%r6\(%r1\),%f24
- 330:	04 38 54 60 	pfld.q	%r7\(%sp\),%f20
- 334:	04 40 70 60 	pfld.q	%r8\(%fp\),%f16
- 338:	04 48 8c 60 	pfld.q	%r9\(%r4\),%f12
- 33c:	04 00 a8 60 	pfld.q	%r0\(%r5\),%f8
- 340:	04 08 c4 60 	pfld.q	%r1\(%r6\),%f4
- 344:	04 60 e0 60 	pfld.q	%r12\(%r7\),%f0
- 348:	04 68 1c 61 	pfld.q	%r13\(%r8\),%f28
- 34c:	04 70 38 61 	pfld.q	%r14\(%r9\),%f24
- 350:	04 78 54 61 	pfld.q	%r15\(%r10\),%f20
- 354:	04 80 70 61 	pfld.q	%r16\(%r11\),%f16
- 358:	04 88 8c 61 	pfld.q	%r17\(%r12\),%f12
- 35c:	04 e0 a8 61 	pfld.q	%r28\(%r13\),%f8
- 360:	04 f8 c4 61 	pfld.q	%r31\(%r14\),%f4
- 364:	05 28 00 60 	pfld.q	%r5\(%r0\)\+\+,%f0
- 368:	05 30 24 60 	pfld.q	%r6\(%r1\)\+\+,%f4
- 36c:	05 38 48 60 	pfld.q	%r7\(%sp\)\+\+,%f8
- 370:	05 40 6c 60 	pfld.q	%r8\(%fp\)\+\+,%f12
- 374:	05 48 90 60 	pfld.q	%r9\(%r4\)\+\+,%f16
- 378:	05 00 b4 60 	pfld.q	%r0\(%r5\)\+\+,%f20
- 37c:	05 08 d8 60 	pfld.q	%r1\(%r6\)\+\+,%f24
- 380:	05 60 fc 60 	pfld.q	%r12\(%r7\)\+\+,%f28
- 384:	05 68 00 61 	pfld.q	%r13\(%r8\)\+\+,%f0
- 388:	05 70 24 61 	pfld.q	%r14\(%r9\)\+\+,%f4
- 38c:	05 78 48 61 	pfld.q	%r15\(%r10\)\+\+,%f8
- 390:	05 80 6c 61 	pfld.q	%r16\(%r11\)\+\+,%f12
- 394:	05 88 90 61 	pfld.q	%r17\(%r12\)\+\+,%f16
- 398:	05 e0 b4 61 	pfld.q	%r28\(%r13\)\+\+,%f20
- 39c:	05 f8 d8 61 	pfld.q	%r31\(%r14\)\+\+,%f24
diff --git a/gas/testsuite/gas/i860/xp.s b/gas/testsuite/gas/i860/xp.s
deleted file mode 100644
index 406c8f0..0000000
--- a/gas/testsuite/gas/i860/xp.s
+++ /dev/null
@@ -1,266 +0,0 @@
-# This tests the XP-only instructions:
-#  ldint.x, ldio.x, stio.x, scyc.b, pfld.q
-# And control registers:
-#  %bear, %ccr, %p0, %p1, %p2, %p3
-
-	.text
-
-	# XP-only control registers
-	ld.c	%bear,%r31
-	ld.c	%bear,%r0
-	ld.c	%ccr,%r5
-	ld.c	%ccr,%r30
-	ld.c	%p0,%r10
-	ld.c	%p0,%r2
-	ld.c	%p1,%r21
-	ld.c	%p1,%r0
-	ld.c	%p2,%r28
-	ld.c	%p2,%r12
-	ld.c	%p3,%r31
-	ld.c	%p3,%r6
-
-	st.c	%r0,%bear
-	st.c	%r30,%bear
-	st.c	%r7,%ccr
-	st.c	%r31,%ccr
-	st.c	%r11,%p0
-	st.c	%r3,%p0
-	st.c	%r22,%p1
-	st.c	%r15,%p1
-	st.c	%r29,%p2
-	st.c	%r13,%p2
-	st.c	%r4,%p3
-	st.c	%r6,%p3
-
-	# ldint.{s,b,l}
-	ldint.l	%r0,%r5
-	ldint.l	%r6,%r31
-	ldint.l	%r7,%r30
-	ldint.l	%r8,%r29
-	ldint.l	%r9,%r28
-	ldint.l	%r0,%r27
-	ldint.l	%r1,%r26
-	ldint.l	%r12,%r25
-	ldint.l	%r13,%r24
-	ldint.l	%r14,%r23
-	ldint.l	%r15,%r22
-	ldint.l	%r16,%r21
-	ldint.l	%r17,%r20
-	ldint.l	%r28,%r19
-	ldint.l	%r31,%r18
-
-	ldint.s	%r0,%r5
-	ldint.s	%r6,%r31
-	ldint.s	%r7,%r30
-	ldint.s	%r8,%r29
-	ldint.s	%r9,%r28
-	ldint.s	%r0,%r27
-	ldint.s	%r1,%r26
-	ldint.s	%r12,%r25
-	ldint.s	%r13,%r24
-	ldint.s	%r14,%r23
-	ldint.s	%r15,%r22
-	ldint.s	%r16,%r21
-	ldint.s	%r17,%r20
-	ldint.s	%r28,%r19
-	ldint.s	%r31,%r18
-
-	ldint.b	%r0,%r5
-	ldint.b	%r6,%r31
-	ldint.b	%r7,%r30
-	ldint.b	%r8,%r29
-	ldint.b	%r9,%r28
-	ldint.b	%r0,%r27
-	ldint.b	%r1,%r26
-	ldint.b	%r12,%r25
-	ldint.b	%r13,%r24
-	ldint.b	%r14,%r23
-	ldint.b	%r15,%r22
-	ldint.b	%r16,%r21
-	ldint.b	%r17,%r20
-	ldint.b	%r28,%r19
-	ldint.b	%r31,%r18
-
-	# ldio.{s,b,l}
-	ldio.l	%r0,%r5
-	ldio.l	%r6,%r31
-	ldio.l	%r7,%r30
-	ldio.l	%r8,%r29
-	ldio.l	%r9,%r28
-	ldio.l	%r0,%r27
-	ldio.l	%r1,%r26
-	ldio.l	%r12,%r25
-	ldio.l	%r13,%r24
-	ldio.l	%r14,%r23
-	ldio.l	%r15,%r22
-	ldio.l	%r16,%r21
-	ldio.l	%r17,%r20
-	ldio.l	%r28,%r19
-	ldio.l	%r31,%r18
-
-	ldio.s	%r0,%r5
-	ldio.s	%r6,%r31
-	ldio.s	%r7,%r30
-	ldio.s	%r8,%r29
-	ldio.s	%r9,%r28
-	ldio.s	%r0,%r27
-	ldio.s	%r1,%r26
-	ldio.s	%r12,%r25
-	ldio.s	%r13,%r24
-	ldio.s	%r14,%r23
-	ldio.s	%r15,%r22
-	ldio.s	%r16,%r21
-	ldio.s	%r17,%r20
-	ldio.s	%r28,%r19
-	ldio.s	%r31,%r18
-
-	ldio.b	%r0,%r5
-	ldio.b	%r6,%r31
-	ldio.b	%r7,%r30
-	ldio.b	%r8,%r29
-	ldio.b	%r9,%r28
-	ldio.b	%r0,%r27
-	ldio.b	%r1,%r26
-	ldio.b	%r12,%r25
-	ldio.b	%r13,%r24
-	ldio.b	%r14,%r23
-	ldio.b	%r15,%r22
-	ldio.b	%r16,%r21
-	ldio.b	%r17,%r20
-	ldio.b	%r28,%r19
-	ldio.b	%r31,%r18
-
-	# stio.{s,b,l}
-	stio.l	%r0,%r5
-	stio.l	%r6,%r31
-	stio.l	%r7,%r30
-	stio.l	%r8,%r29
-	stio.l	%r9,%r28
-	stio.l	%r0,%r27
-	stio.l	%r1,%r26
-	stio.l	%r12,%r25
-	stio.l	%r13,%r24
-	stio.l	%r14,%r23
-	stio.l	%r15,%r22
-	stio.l	%r16,%r21
-	stio.l	%r17,%r20
-	stio.l	%r28,%r19
-	stio.l	%r31,%r18
-
-	stio.s	%r0,%r5
-	stio.s	%r6,%r31
-	stio.s	%r7,%r30
-	stio.s	%r8,%r29
-	stio.s	%r9,%r28
-	stio.s	%r0,%r27
-	stio.s	%r1,%r26
-	stio.s	%r12,%r25
-	stio.s	%r13,%r24
-	stio.s	%r14,%r23
-	stio.s	%r15,%r22
-	stio.s	%r16,%r21
-	stio.s	%r17,%r20
-	stio.s	%r28,%r19
-	stio.s	%r31,%r18
-
-	stio.b	%r0,%r5
-	stio.b	%r6,%r31
-	stio.b	%r7,%r30
-	stio.b	%r8,%r29
-	stio.b	%r9,%r28
-	stio.b	%r0,%r27
-	stio.b	%r1,%r26
-	stio.b	%r12,%r25
-	stio.b	%r13,%r24
-	stio.b	%r14,%r23
-	stio.b	%r15,%r22
-	stio.b	%r16,%r21
-	stio.b	%r17,%r20
-	stio.b	%r28,%r19
-	stio.b	%r31,%r18
-
-	# scyc.b
-	scyc.b	%r0
-	scyc.b	%r5
-	scyc.b	%r6
-	scyc.b	%r13
-	scyc.b	%r14
-	scyc.b	%r28
-	scyc.b	%r29
-	scyc.b	%r30
-	scyc.b	%r31
-
-	# pfld.q
-	# Immediate form, no auto-increment.
-	pfld.q	0(%r0),%f0
-	pfld.q	128(%r1),%f28
-	pfld.q	256(%r2),%f24
-	pfld.q	512(%r3),%f20
-	pfld.q	1024(%r4),%f16
-	pfld.q	4096(%r5),%f12
-	pfld.q	8192(%r6),%f8
-	pfld.q	16384(%r7),%f4
-	pfld.q	32760(%r7),%f0
-	pfld.q	-32768(%r7),%f28
-	pfld.q	-16384(%r8),%f24
-	pfld.q	-8192(%r9),%f20
-	pfld.q	-4096(%r10),%f16
-	pfld.q	-1024(%r11),%f12
-	pfld.q	-512(%r12),%f8
-	pfld.q	-248(%r13),%f4
-	pfld.q	-8(%r14),%f0
-
-	# Immediate form, with auto-increment.
-	pfld.q	0(%r0)++,%f0
-	pfld.q	128(%r1)++,%f4
-	pfld.q	256(%r2)++,%f8
-	pfld.q	512(%r3)++,%f12
-	pfld.q	1024(%r4)++,%f16
-	pfld.q	4096(%r5)++,%f20
-	pfld.q	8192(%r6)++,%f24
-	pfld.q	16384(%r7)++,%f28
-	pfld.q	32760(%r7)++,%f0
-	pfld.q	-32768(%r7)++,%f4
-	pfld.q	-16384(%r8)++,%f8
-	pfld.q	-8192(%r9)++,%f12
-	pfld.q	-4096(%r10)++,%f16
-	pfld.q	-1024(%r11)++,%f20
-	pfld.q	-512(%r12)++,%f24
-	pfld.q	-248(%r13)++,%f28
-	pfld.q	-8(%r14)++,%f16
-
-	# Index form, no auto-increment.
-	pfld.q	%r5(%r0),%f28
-	pfld.q	%r6(%r1),%f24
-	pfld.q	%r7(%r2),%f20
-	pfld.q	%r8(%r3),%f16
-	pfld.q	%r9(%r4),%f12
-	pfld.q	%r0(%r5),%f8
-	pfld.q	%r1(%r6),%f4
-	pfld.q	%r12(%r7),%f0
-	pfld.q	%r13(%r8),%f28
-	pfld.q	%r14(%r9),%f24
-	pfld.q	%r15(%r10),%f20
-	pfld.q	%r16(%r11),%f16
-	pfld.q	%r17(%r12),%f12
-	pfld.q	%r28(%r13),%f8
-	pfld.q	%r31(%r14),%f4
-
-	# Index form, with auto-increment.
-	pfld.q	%r5(%r0)++,%f0
-	pfld.q	%r6(%r1)++,%f4
-	pfld.q	%r7(%r2)++,%f8
-	pfld.q	%r8(%r3)++,%f12
-	pfld.q	%r9(%r4)++,%f16
-	pfld.q	%r0(%r5)++,%f20
-	pfld.q	%r1(%r6)++,%f24
-	pfld.q	%r12(%r7)++,%f28
-	pfld.q	%r13(%r8)++,%f0
-	pfld.q	%r14(%r9)++,%f4
-	pfld.q	%r15(%r10)++,%f8
-	pfld.q	%r16(%r11)++,%f12
-	pfld.q	%r17(%r12)++,%f16
-	pfld.q	%r28(%r13)++,%f20
-	pfld.q	%r31(%r14)++,%f24
-
-
diff --git a/gas/testsuite/gas/lns/lns.exp b/gas/testsuite/gas/lns/lns.exp
index 5ccf120..dcf593c 100644
--- a/gas/testsuite/gas/lns/lns.exp
+++ b/gas/testsuite/gas/lns/lns.exp
@@ -26,7 +26,6 @@ run_dump_test "lns-duplicate"
 # defined a macro...
 if {
         ![istarget i370-*-*]
-     && ![istarget i960-*-*]
      && ![istarget s390*-*-*]
 } {
     # Use alternate file for targets using DW_LNS_fixed_advance_pc opcodes.
diff --git a/gas/testsuite/gas/symver/symver.exp b/gas/testsuite/gas/symver/symver.exp
index 87e3cc8..c40fc9a 100644
--- a/gas/testsuite/gas/symver/symver.exp
+++ b/gas/testsuite/gas/symver/symver.exp
@@ -46,11 +46,6 @@ if { [is_elf_format] } then {
       return
     }
 
-    # not yet supported by i960
-    if {[istarget "i960-*-*"]} {
-      return
-    }
-
     run_dump_test "symver0" 
     run_dump_test "symver1" 
     run_error_test "symver2" ""
diff --git a/gas/write.c b/gas/write.c
index 4c8e42b..2d0bbe4 100644
--- a/gas/write.c
+++ b/gas/write.c
@@ -926,9 +926,7 @@ fixup_segment (fixS *fixP, segT this_segment)
   /* If the linker is doing the relaxing, we must not do any fixups.
 
      Well, strictly speaking that's not true -- we could do any that
-     are PC-relative and don't cross regions that could change size.
-     And for the i960 we might be able to turn callx/callj into bal
-     anyways in cases where we know the maximum displacement.  */
+     are PC-relative and don't cross regions that could change size.  */
   if (linkrelax && TC_LINKRELAX_FIXUP (this_segment))
     {
       for (; fixP; fixP = fixP->fx_next)
diff --git a/gas/write.h b/gas/write.h
index 3c6f259..4f510d6 100644
--- a/gas/write.h
+++ b/gas/write.h
@@ -106,10 +106,6 @@ struct fix
   struct fix *fx_next;
 
   /* If NULL, no bitfix's to do.  */
-  /* Only i960-coff and ns32k use this, and i960-coff stores an
-     integer.  This can probably be folded into tc_fix_data, below.
-     @@ Alpha also uses it, but only to disable certain relocation
-     processing.  */
   bit_fixS *fx_bit_fixP;
 
   bfd_reloc_code_real_type fx_r_type;
author	Alan Modra <amodra@gmail.com>	2018-04-11 18:46:05 +0930
committer	Alan Modra <amodra@gmail.com>	2018-04-11 21:49:30 +0930
commit	a8eb42a8b7d48ff6bd12ac83b0e31967b4f5abf1 (patch)
tree	60b19da93f47532605aea14cc4cec88b442c43f6 /gas
parent	c43b2c546be1fead208b816b59c8bdcdf9562571 (diff)
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