diff options
| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2016-11-02 12:24:39 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-11-02 12:25:34 -0700 |
| commit | 920d2ddccb72a366140ed28283165b274f7a9045 (patch) | |
| tree | d305278866b75e1605f77972f4496c1ee99105c0 /gas | |
| parent | 95dc74aa02352505785bb70ba60b706e70c74584 (diff) | |
| download | fsf-binutils-gdb-920d2ddccb72a366140ed28283165b274f7a9045.zip fsf-binutils-gdb-920d2ddccb72a366140ed28283165b274f7a9045.tar.gz fsf-binutils-gdb-920d2ddccb72a366140ed28283165b274f7a9045.tar.bz2 | |
Enable Intel AVX512_4FMAPS instructions
gas/
* config/tc-i386.c (cpu_arch): Add .avx512_4fmaps.
(cpu_noarch): Add noavx512_4fmaps.
(process_operands): Handle implicit quad group.
* doc/c-i386.texi: Document avx512_4fmaps, noavx512_4fmaps.
* testsuite/gas/i386/i386.exp: Add AVX512_4FMAPS tests.
* testsuite/gas/i386/avx512_4fmaps_vl-intel.d: New test.
* testsuite/gas/i386/avx512_4fmaps_vl.d: Ditto.
* testsuite/gas/i386/avx512_4fmaps_vl.s: Ditto.
* testsuite/gas/i386/avx512_4fmaps-intel.d: Ditto.
* testsuite/gas/i386/avx512_4fmaps.d: Ditto.
* testsuite/gas/i386/avx512_4fmaps.s: Ditto.
* testsuite/gas/i386/avx512_4fmaps-warn.l: Ditto.
* testsuite/gas/i386/avx512_4fmaps-warn.s: Ditto.
* testsuite/gas/i386/avx512_4fmaps_vl-warn.l: Ditto.
* testsuite/gas/i386/avx512_4fmaps_vl-warn.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s: Ditto.
opcodes/
* i386-dis.c. (enum): Add PREFIX_EVEX_0F389A,
PREFIX_EVEX_0F389B, PREFIX_EVEX_0F38AA, PREFIX_EVEX_0F38AB.
* i386-dis-evex.h (evex_table): Updated.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4FMAPS_FLAGS,
CPU_ANY_AVX512_4FMAPS_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
(cpu_flags): Add CpuAVX512_4FMAPS.
(opcode_modifiers): Add ImplicitQuadGroup modifier.
* i386-opc.h (AVX512_4FMAP): New.
(i386_cpu_flags): Add cpuavx512_4fmaps.
(ImplicitQuadGroup): New.
(i386_opcode_modifier): Add implicitquadgroup.
* i386-opc.tbl: Add Intel AVX512_4FMAPS instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Ditto.
Diffstat (limited to 'gas')
24 files changed, 1124 insertions, 3 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 8eabfd5..a40647d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,31 @@ +2016-11-02 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add .avx512_4fmaps. + (cpu_noarch): Add noavx512_4fmaps. + (process_operands): Handle implicit quad group. + * doc/c-i386.texi: Document avx512_4fmaps, noavx512_4fmaps. + * testsuite/gas/i386/i386.exp: Add AVX512_4FMAPS tests. + * testsuite/gas/i386/avx512_4fmaps_vl-intel.d: New test. + * testsuite/gas/i386/avx512_4fmaps_vl.d: Ditto. + * testsuite/gas/i386/avx512_4fmaps_vl.s: Ditto. + * testsuite/gas/i386/avx512_4fmaps-intel.d: Ditto. + * testsuite/gas/i386/avx512_4fmaps.d: Ditto. + * testsuite/gas/i386/avx512_4fmaps.s: Ditto. + * testsuite/gas/i386/avx512_4fmaps-warn.l: Ditto. + * testsuite/gas/i386/avx512_4fmaps-warn.s: Ditto. + * testsuite/gas/i386/avx512_4fmaps_vl-warn.l: Ditto. + * testsuite/gas/i386/avx512_4fmaps_vl-warn.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s: Ditto. + 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com> Andrew Waterman <andrew@sifive.com> diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 6724bca..d2ec480 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -962,6 +962,8 @@ static const arch_entry cpu_arch[] = CPU_AVX512IFMA_FLAGS, 0 }, { STRING_COMMA_LEN (".avx512vbmi"), PROCESSOR_UNKNOWN, CPU_AVX512VBMI_FLAGS, 0 }, + { STRING_COMMA_LEN (".avx512_4fmaps"), PROCESSOR_UNKNOWN, + CPU_AVX512_4FMAPS_FLAGS, 0 }, { STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN, CPU_CLZERO_FLAGS, 0 }, { STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN, @@ -999,6 +1001,7 @@ static const noarch_entry cpu_noarch[] = { STRING_COMMA_LEN ("noavx512vl"), CPU_ANY_AVX512VL_FLAGS }, { STRING_COMMA_LEN ("noavx512ifma"), CPU_ANY_AVX512IFMA_FLAGS }, { STRING_COMMA_LEN ("noavx512vbmi"), CPU_ANY_AVX512VBMI_FLAGS }, + { STRING_COMMA_LEN ("noavx512_4fmaps"), CPU_ANY_AVX512_4FMAPS_FLAGS }, }; #ifdef I386COFF @@ -5966,6 +5969,25 @@ duplicate: i.reg_operands--; i.tm.operands--; } + else if (i.tm.opcode_modifier.implicitquadgroup) + { + /* The second operand must be {x,y,z}mmN, where N is a multiple of 4. */ + gas_assert (i.operands >= 2 + && (operand_type_equal (&i.types[1], ®xmm) + || operand_type_equal (&i.types[1], ®ymm) + || operand_type_equal (&i.types[1], ®zmm))); + unsigned int regnum = register_number (i.op[1].regs); + unsigned int first_reg_in_group = regnum & ~3; + unsigned int last_reg_in_group = first_reg_in_group + 3; + if (regnum != first_reg_in_group) { + as_warn (_("the second source register `%s%s' implicitly denotes" + " `%s%.3s%d' to `%s%.3s%d' source group in `%s'"), + register_prefix, i.op[1].regs->reg_name, + register_prefix, i.op[1].regs->reg_name, first_reg_in_group, + register_prefix, i.op[1].regs->reg_name, last_reg_in_group, + i.tm.name); + } + } else if (i.tm.opcode_modifier.regkludge) { /* The imul $imm, %reg instruction is converted into diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 43b4008..7aa043e 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -180,6 +180,7 @@ accept various extension mnemonics. For example, @code{avx512dq}, @code{avx512ifma}, @code{avx512vbmi}, +@code{avx512_4fmaps}, @code{noavx512f}, @code{noavx512cd}, @code{noavx512er}, @@ -189,6 +190,7 @@ accept various extension mnemonics. For example, @code{noavx512dq}, @code{noavx512ifma}, @code{noavx512vbmi}, +@code{noavx512_4fmaps}, @code{vmx}, @code{vmfunc}, @code{smx}, @@ -1190,12 +1192,12 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @tab @samp{.se1} @item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf} @item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} @tab @samp{.avx512ifma} -@item @samp{.avx512vbmi} @tab @samp{.clwb} +@item @samp{.avx512vbmi} @tab @samp{.avx512_4fmaps} @tab @samp{.clwb} +@item @samp{.rdpid} @tab @samp{.ptwrite} @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} -@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.rdpid} -@item @samp{.ptwrite} +@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @end multitable Apart from the warning, there are only two other effects on diff --git a/gas/testsuite/gas/i386/avx512_4fmaps-intel.d b/gas/testsuite/gas/i386/avx512_4fmaps-intel.d new file mode 100644 index 0000000..9406309 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps-intel.d @@ -0,0 +1,79 @@ +#objdump: -dw -Mintel +#name: i386 AVX512/4FMAPS insns (Intel disassembly) +#source: avx512_4fmaps.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 09[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f 9a 09[ ]*v4fmaddps zmm1\{k7\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf 9a 09[ ]*v4fmaddps zmm1\{k7\}\{z\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 10 00 00[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 09[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f aa 09[ ]*v4fnmaddps zmm1\{k7\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf aa 09[ ]*v4fnmaddps zmm1\{k7\}\{z\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 09[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9b 09[ ]*v4fmaddss xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9b 09[ ]*v4fmaddss xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8c f4 c0 1d fe ff[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 10 00 00[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 09[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f ab 09[ ]*v4fnmaddss xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f ab 09[ ]*v4fnmaddss xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8c f4 c0 1d fe ff[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 09[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 09[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f 9a 09[ ]*v4fmaddps zmm1\{k7\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf 9a 09[ ]*v4fmaddps zmm1\{k7\}\{z\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 10 00 00[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 09[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 09[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f aa 09[ ]*v4fnmaddps zmm1\{k7\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf aa 09[ ]*v4fnmaddps zmm1\{k7\}\{z\},zmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps zmm1,zmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 09[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 09[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9b 09[ ]*v4fmaddss xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9b 09[ ]*v4fmaddss xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8c f4 c0 1d fe ff[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 10 00 00[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 09[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 09[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f ab 09[ ]*v4fnmaddss xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f ab 09[ ]*v4fnmaddss xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8c f4 c0 1d fe ff[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +#pass diff --git a/gas/testsuite/gas/i386/avx512_4fmaps-warn.l b/gas/testsuite/gas/i386/avx512_4fmaps-warn.l new file mode 100644 index 0000000..d8a0b79 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps-warn.l @@ -0,0 +1,13 @@ +.*: Assembler messages: +.*:5: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:6: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:7: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:10: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:11: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:12: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:15: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddss' +.*:16: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddss' +.*:17: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddss' +.*:20: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddss' +.*:21: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddss' +.*:22: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddss' diff --git a/gas/testsuite/gas/i386/avx512_4fmaps-warn.s b/gas/testsuite/gas/i386/avx512_4fmaps-warn.s new file mode 100644 index 0000000..650358e --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps-warn.s @@ -0,0 +1,23 @@ +# Check warnings for invalid usage of register group + +.text + v4fmaddps (%eax), %xmm0, %xmm6 + v4fmaddps (%eax), %xmm1, %xmm6 + v4fmaddps (%eax), %xmm2, %xmm6 + v4fmaddps (%eax), %xmm3, %xmm6 + v4fmaddps (%eax), %xmm4, %xmm6 + v4fnmaddps (%eax), %xmm0, %xmm6 + v4fnmaddps (%eax), %xmm1, %xmm6 + v4fnmaddps (%eax), %xmm2, %xmm6 + v4fnmaddps (%eax), %xmm3, %xmm6 + v4fnmaddps (%eax), %xmm4, %xmm6 + v4fmaddss (%eax), %xmm0, %xmm6 + v4fmaddss (%eax), %xmm1, %xmm6 + v4fmaddss (%eax), %xmm2, %xmm6 + v4fmaddss (%eax), %xmm3, %xmm6 + v4fmaddss (%eax), %xmm4, %xmm6 + v4fnmaddss (%eax), %xmm0, %xmm6 + v4fnmaddss (%eax), %xmm1, %xmm6 + v4fnmaddss (%eax), %xmm2, %xmm6 + v4fnmaddss (%eax), %xmm3, %xmm6 + v4fnmaddss (%eax), %xmm4, %xmm6 diff --git a/gas/testsuite/gas/i386/avx512_4fmaps.d b/gas/testsuite/gas/i386/avx512_4fmaps.d new file mode 100644 index 0000000..5e1f8dd --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps.d @@ -0,0 +1,79 @@ +#objdump: -dw +#name: i386 AVX512/4FMAPS insns +#source: avx512_4fmaps.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 09[ ]*v4fmaddps \(%ecx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f 9a 09[ ]*v4fmaddps \(%ecx\),%zmm4,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf 9a 09[ ]*v4fmaddps \(%ecx\),%zmm4,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%esp,%esi,8\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 09[ ]*v4fnmaddps \(%ecx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f aa 09[ ]*v4fnmaddps \(%ecx\),%zmm4,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf aa 09[ ]*v4fnmaddps \(%ecx\),%zmm4,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%esp,%esi,8\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 09[ ]*v4fmaddss \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9b 09[ ]*v4fmaddss \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9b 09[ ]*v4fmaddss \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8c f4 c0 1d fe ff[ ]*v4fmaddss -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 10 00 00[ ]*v4fmaddss 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss -0x1020\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 09[ ]*v4fnmaddss \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f ab 09[ ]*v4fnmaddss \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f ab 09[ ]*v4fnmaddss \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8c f4 c0 1d fe ff[ ]*v4fnmaddss -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss -0x1020\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 09[ ]*v4fmaddps \(%ecx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 09[ ]*v4fmaddps \(%ecx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f 9a 09[ ]*v4fmaddps \(%ecx\),%zmm4,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf 9a 09[ ]*v4fmaddps \(%ecx\),%zmm4,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%esp,%esi,8\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 09[ ]*v4fnmaddps \(%ecx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 09[ ]*v4fnmaddps \(%ecx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 4f aa 09[ ]*v4fnmaddps \(%ecx\),%zmm4,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f cf aa 09[ ]*v4fnmaddps \(%ecx\),%zmm4,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%esp,%esi,8\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%edx\),%zmm4,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 09[ ]*v4fmaddss \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 09[ ]*v4fmaddss \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9b 09[ ]*v4fmaddss \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9b 09[ ]*v4fmaddss \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8c f4 c0 1d fe ff[ ]*v4fmaddss -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 10 00 00[ ]*v4fmaddss 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss -0x1020\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 09[ ]*v4fnmaddss \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 09[ ]*v4fnmaddss \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f ab 09[ ]*v4fnmaddss \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f ab 09[ ]*v4fnmaddss \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8c f4 c0 1d fe ff[ ]*v4fnmaddss -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss -0x1020\(%edx\),%xmm4,%xmm1 +#pass diff --git a/gas/testsuite/gas/i386/avx512_4fmaps.s b/gas/testsuite/gas/i386/avx512_4fmaps.s new file mode 100644 index 0000000..06d7bfa --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps.s @@ -0,0 +1,75 @@ +# Check 32bit AVX512_4FMAPS instructions + + .allow_index_reg + .text +_start: + v4fmaddps (%ecx), %zmm4, %zmm1 # AVX512_4FMAPS + v4fmaddps (%ecx), %zmm4, %zmm1{%k7} # AVX512_4FMAPS + v4fmaddps (%ecx), %zmm4, %zmm1{%k7}{z} # AVX512_4FMAPS + v4fmaddps -123456(%esp,%esi,8), %zmm4, %zmm1 # AVX512_4FMAPS + v4fmaddps 4064(%edx), %zmm4, %zmm1 # AVX512_4FMAPS Disp8 + v4fmaddps 4096(%edx), %zmm4, %zmm1 # AVX512_4FMAPS + v4fmaddps -4096(%edx), %zmm4, %zmm1 # AVX512_4FMAPS Disp8 + v4fmaddps -4128(%edx), %zmm4, %zmm1 # AVX512_4FMAPS + v4fnmaddps (%ecx), %zmm4, %zmm1 # AVX512_4FMAPS + v4fnmaddps (%ecx), %zmm4, %zmm1{%k7} # AVX512_4FMAPS + v4fnmaddps (%ecx), %zmm4, %zmm1{%k7}{z} # AVX512_4FMAPS + v4fnmaddps -123456(%esp,%esi,8), %zmm4, %zmm1 # AVX512_4FMAPS + v4fnmaddps 4064(%edx), %zmm4, %zmm1 # AVX512_4FMAPS Disp8 + v4fnmaddps 4096(%edx), %zmm4, %zmm1 # AVX512_4FMAPS + v4fnmaddps -4096(%edx), %zmm4, %zmm1 # AVX512_4FMAPS Disp8 + v4fnmaddps -4128(%edx), %zmm4, %zmm1 # AVX512_4FMAPS + v4fmaddss (%ecx), %xmm4, %xmm1 # AVX512_4FMAPS + v4fmaddss (%ecx), %xmm4, %xmm1{%k7} # AVX512_4FMAPS + v4fmaddss (%ecx), %xmm4, %xmm1{%k7}{z} # AVX512_4FMAPS + v4fmaddss -123456(%esp,%esi,8), %xmm4, %xmm1 # AVX512_4FMAPS + v4fmaddss 4064(%edx), %xmm4, %xmm1 # AVX512_4FMAPS Disp8 + v4fmaddss 4096(%edx), %xmm4, %xmm1 # AVX512_4FMAPS + v4fmaddss -4096(%edx), %xmm4, %xmm1 # AVX512_4FMAPS Disp8 + v4fmaddss -4128(%edx), %xmm4, %xmm1 # AVX512_4FMAPS + v4fnmaddss (%ecx), %xmm4, %xmm1 # AVX512_4FMAPS + v4fnmaddss (%ecx), %xmm4, %xmm1{%k7} # AVX512_4FMAPS + v4fnmaddss (%ecx), %xmm4, %xmm1{%k7}{z} # AVX512_4FMAPS + v4fnmaddss -123456(%esp,%esi,8), %xmm4, %xmm1 # AVX512_4FMAPS + v4fnmaddss 4064(%edx), %xmm4, %xmm1 # AVX512_4FMAPS Disp8 + v4fnmaddss 4096(%edx), %xmm4, %xmm1 # AVX512_4FMAPS + v4fnmaddss -4096(%edx), %xmm4, %xmm1 # AVX512_4FMAPS Disp8 + v4fnmaddss -4128(%edx), %xmm4, %xmm1 # AVX512_4FMAPS + + .intel_syntax noprefix + v4fmaddps zmm1, zmm4, [ecx] # AVX512_4FMAPS + v4fmaddps zmm1, zmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fmaddps zmm1{k7}, zmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fmaddps zmm1{k7}{z}, zmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fmaddps zmm1, zmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512_4FMAPS + v4fmaddps zmm1, zmm4, XMMWORD PTR [edx+4064] # AVX512_4FMAPS Disp8 + v4fmaddps zmm1, zmm4, XMMWORD PTR [edx+4096] # AVX512_4FMAPS + v4fmaddps zmm1, zmm4, XMMWORD PTR [edx-4096] # AVX512_4FMAPS Disp8 + v4fmaddps zmm1, zmm4, XMMWORD PTR [edx-4128] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm4, [ecx] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fnmaddps zmm1{k7}, zmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fnmaddps zmm1{k7}{z}, zmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm4, XMMWORD PTR [edx+4064] # AVX512_4FMAPS Disp8 + v4fnmaddps zmm1, zmm4, XMMWORD PTR [edx+4096] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm4, XMMWORD PTR [edx-4096] # AVX512_4FMAPS Disp8 + v4fnmaddps zmm1, zmm4, XMMWORD PTR [edx-4128] # AVX512_4FMAPS + v4fmaddss xmm1, xmm4, [ecx] # AVX512_4FMAPS + v4fmaddss xmm1, xmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fmaddss xmm1{k7}, xmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fmaddss xmm1{k7}{z}, xmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fmaddss xmm1, xmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512_4FMAPS + v4fmaddss xmm1, xmm4, XMMWORD PTR [edx+4064] # AVX512_4FMAPS Disp8 + v4fmaddss xmm1, xmm4, XMMWORD PTR [edx+4096] # AVX512_4FMAPS + v4fmaddss xmm1, xmm4, XMMWORD PTR [edx-4096] # AVX512_4FMAPS Disp8 + v4fmaddss xmm1, xmm4, XMMWORD PTR [edx-4128] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm4, [ecx] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fnmaddss xmm1{k7}, xmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fnmaddss xmm1{k7}{z}, xmm4, XMMWORD PTR [ecx] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm4, XMMWORD PTR [edx+4064] # AVX512_4FMAPS Disp8 + v4fnmaddss xmm1, xmm4, XMMWORD PTR [edx+4096] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm4, XMMWORD PTR [edx-4096] # AVX512_4FMAPS Disp8 + v4fnmaddss xmm1, xmm4, XMMWORD PTR [edx-4128] # AVX512_4FMAPS diff --git a/gas/testsuite/gas/i386/avx512_4fmaps_vl-intel.d b/gas/testsuite/gas/i386/avx512_4fmaps_vl-intel.d new file mode 100644 index 0000000..a964a17 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps_vl-intel.d @@ -0,0 +1,78 @@ +#objdump: -dw -Mintel +#name: i386 AVX512/4FMAPS_VL insns (Intel disassembly) +#source: avx512_4fmaps_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 09[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9a 09[ ]*v4fmaddps xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9a 09[ ]*v4fmaddps xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 10 00 00[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 09[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f 9a 09[ ]*v4fmaddps ymm1\{k7\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f af 9a 09[ ]*v4fmaddps ymm1\{k7\}\{z\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 10 00 00[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 09[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f aa 09[ ]*v4fnmaddps xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f aa 09[ ]*v4fnmaddps xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 09[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f aa 09[ ]*v4fnmaddps ymm1\{k7\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f af aa 09[ ]*v4fnmaddps ymm1\{k7\}\{z\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 09[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 09[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9a 09[ ]*v4fmaddps xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9a 09[ ]*v4fmaddps xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 10 00 00[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 09[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 09[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f 9a 09[ ]*v4fmaddps ymm1\{k7\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f af 9a 09[ ]*v4fmaddps ymm1\{k7\}\{z\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 10 00 00[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps ymm1,ymm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 09[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 09[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f aa 09[ ]*v4fnmaddps xmm1\{k7\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f aa 09[ ]*v4fnmaddps xmm1\{k7\}\{z\},xmm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps xmm1,xmm4,XMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 09[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 09[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f aa 09[ ]*v4fnmaddps ymm1\{k7\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f af aa 09[ ]*v4fnmaddps ymm1\{k7\}\{z\},ymm4,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a e0 ef ff ff[ ]*v4fnmaddps ymm1,ymm4,XMMWORD PTR \[edx-0x1020\] +#pass diff --git a/gas/testsuite/gas/i386/avx512_4fmaps_vl-warn.l b/gas/testsuite/gas/i386/avx512_4fmaps_vl-warn.l new file mode 100644 index 0000000..fc42237 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps_vl-warn.l @@ -0,0 +1,13 @@ +.*: Assembler messages: +.*:5: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:6: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:7: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:10: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:11: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:12: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:15: Warning: the second source register `%ymm1' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fmaddps' +.*:16: Warning: the second source register `%ymm2' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fmaddps' +.*:17: Warning: the second source register `%ymm3' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fmaddps' +.*:20: Warning: the second source register `%ymm1' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fnmaddps' +.*:21: Warning: the second source register `%ymm2' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fnmaddps' +.*:22: Warning: the second source register `%ymm3' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fnmaddps' diff --git a/gas/testsuite/gas/i386/avx512_4fmaps_vl-warn.s b/gas/testsuite/gas/i386/avx512_4fmaps_vl-warn.s new file mode 100644 index 0000000..ec7b963 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps_vl-warn.s @@ -0,0 +1,23 @@ +# Check warnings for invalid usage of register group + +.text + v4fmaddps (%eax), %xmm0, %xmm6 + v4fmaddps (%eax), %xmm1, %xmm6 + v4fmaddps (%eax), %xmm2, %xmm6 + v4fmaddps (%eax), %xmm3, %xmm6 + v4fmaddps (%eax), %xmm4, %xmm6 + v4fnmaddps (%eax), %xmm0, %xmm6 + v4fnmaddps (%eax), %xmm1, %xmm6 + v4fnmaddps (%eax), %xmm2, %xmm6 + v4fnmaddps (%eax), %xmm3, %xmm6 + v4fnmaddps (%eax), %xmm4, %xmm6 + v4fmaddps (%eax), %ymm0, %ymm6 + v4fmaddps (%eax), %ymm1, %ymm6 + v4fmaddps (%eax), %ymm2, %ymm6 + v4fmaddps (%eax), %ymm3, %ymm6 + v4fmaddps (%eax), %ymm4, %ymm6 + v4fnmaddps (%eax), %ymm0, %ymm6 + v4fnmaddps (%eax), %ymm1, %ymm6 + v4fnmaddps (%eax), %ymm2, %ymm6 + v4fnmaddps (%eax), %ymm3, %ymm6 + v4fnmaddps (%eax), %ymm4, %ymm6 diff --git a/gas/testsuite/gas/i386/avx512_4fmaps_vl.d b/gas/testsuite/gas/i386/avx512_4fmaps_vl.d new file mode 100644 index 0000000..cb63bb0 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps_vl.d @@ -0,0 +1,78 @@ +#objdump: -dw +#name: i386 AVX512/4FMAPS_VL insns +#source: avx512_4fmaps_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 09[ ]*v4fmaddps \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9a 09[ ]*v4fmaddps \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9a 09[ ]*v4fmaddps \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 09[ ]*v4fmaddps \(%ecx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f 9a 09[ ]*v4fmaddps \(%ecx\),%ymm4,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f af 9a 09[ ]*v4fmaddps \(%ecx\),%ymm4,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%esp,%esi,8\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 09[ ]*v4fnmaddps \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f aa 09[ ]*v4fnmaddps \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f aa 09[ ]*v4fnmaddps \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 09[ ]*v4fnmaddps \(%ecx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f aa 09[ ]*v4fnmaddps \(%ecx\),%ymm4,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f af aa 09[ ]*v4fnmaddps \(%ecx\),%ymm4,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%esp,%esi,8\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 09[ ]*v4fmaddps \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 09[ ]*v4fmaddps \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f 9a 09[ ]*v4fmaddps \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f 9a 09[ ]*v4fmaddps \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 09[ ]*v4fmaddps \(%ecx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 09[ ]*v4fmaddps \(%ecx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f 9a 09[ ]*v4fmaddps \(%ecx\),%ymm4,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f af 9a 09[ ]*v4fmaddps \(%ecx\),%ymm4,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8c f4 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%esp,%esi,8\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 09[ ]*v4fnmaddps \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 09[ ]*v4fnmaddps \(%ecx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 0f aa 09[ ]*v4fnmaddps \(%ecx\),%xmm4,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 8f aa 09[ ]*v4fnmaddps \(%ecx\),%xmm4,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%esp,%esi,8\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%edx\),%xmm4,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 09[ ]*v4fnmaddps \(%ecx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 09[ ]*v4fnmaddps \(%ecx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 2f aa 09[ ]*v4fnmaddps \(%ecx\),%ymm4,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f af aa 09[ ]*v4fnmaddps \(%ecx\),%ymm4,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8c f4 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%esp,%esi,8\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%edx\),%ymm4,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 5f 28 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%edx\),%ymm4,%ymm1 +#pass diff --git a/gas/testsuite/gas/i386/avx512_4fmaps_vl.s b/gas/testsuite/gas/i386/avx512_4fmaps_vl.s new file mode 100644 index 0000000..56977b4 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512_4fmaps_vl.s @@ -0,0 +1,74 @@ +# Check 32bit AVX512{_4FMAPS,VL} instructions + + .allow_index_reg + .text +_start: + v4fmaddps (%ecx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps (%ecx), %xmm4, %xmm1{%k7} # AVX512{_4FMAPS,VL} + v4fmaddps (%ecx), %xmm4, %xmm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fmaddps -123456(%esp,%esi,8), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps 4064(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps 4096(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps -4096(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps -4128(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps (%ecx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} + v4fmaddps (%ecx), %ymm4, %ymm1{%k7} # AVX512{_4FMAPS,VL} + v4fmaddps (%ecx), %ymm4, %ymm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fmaddps -123456(%esp,%esi,8), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} + v4fmaddps 4064(%edx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps 4096(%edx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} + v4fmaddps -4096(%edx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps -4128(%edx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%ecx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%ecx), %xmm4, %xmm1{%k7} # AVX512{_4FMAPS,VL} + v4fnmaddps (%ecx), %xmm4, %xmm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fnmaddps -123456(%esp,%esi,8), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps 4064(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps 4096(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps -4096(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps -4128(%edx), %xmm4, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%ecx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%ecx), %ymm4, %ymm1{%k7} # AVX512{_4FMAPS,VL} + v4fnmaddps (%ecx), %ymm4, %ymm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fnmaddps -123456(%esp,%esi,8), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps 4064(%edx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps 4096(%edx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps -4096(%edx), %ymm4, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + + .intel_syntax noprefix + v4fmaddps xmm1, xmm4, [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1{k7}, xmm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1{k7}{z}, xmm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm4, XMMWORD PTR [edx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps xmm1, xmm4, XMMWORD PTR [edx+4096] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm4, XMMWORD PTR [edx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps xmm1, xmm4, XMMWORD PTR [edx-4128] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm4, [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1{k7}, ymm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1{k7}{z}, ymm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm4, XMMWORD PTR [esp+esi*8-123456] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm4, XMMWORD PTR [edx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps ymm1, ymm4, XMMWORD PTR [edx+4096] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm4, XMMWORD PTR [edx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps ymm1, ymm4, XMMWORD PTR [edx-4128] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm4, [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1{k7}, xmm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1{k7}{z}, xmm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm4, XMMWORD PTR [edx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps xmm1, xmm4, XMMWORD PTR [edx+4096] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm4, XMMWORD PTR [edx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps xmm1, xmm4, XMMWORD PTR [edx-4128] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm4, [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1{k7}, ymm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1{k7}{z}, ymm4, XMMWORD PTR [ecx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm4, XMMWORD PTR [esp+esi*8-123456] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm4, XMMWORD PTR [edx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps ymm1, ymm4, XMMWORD PTR [edx+4096] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm4, XMMWORD PTR [edx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps ymm1, ymm4, XMMWORD PTR [edx-4128] # AVX512{_4FMAPS,VL} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 7d04a5c..89e132a 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -357,6 +357,12 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "avx512vbmi-intel" run_dump_test "avx512vbmi_vl" run_dump_test "avx512vbmi_vl-intel" + run_dump_test "avx512_4fmaps" + run_dump_test "avx512_4fmaps-intel" + run_dump_test "avx512_4fmaps_vl" + run_dump_test "avx512_4fmaps_vl-intel" + run_list_test "avx512_4fmaps-warn" + run_list_test "avx512_4fmaps_vl-warn" run_dump_test "clzero" run_dump_test "disassem" run_dump_test "mwaitx-bdver4" @@ -759,6 +765,12 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-avx512vbmi-intel" run_dump_test "x86-64-avx512vbmi_vl" run_dump_test "x86-64-avx512vbmi_vl-intel" + run_dump_test "x86-64-avx512_4fmaps" + run_dump_test "x86-64-avx512_4fmaps-intel" + run_dump_test "x86-64-avx512_4fmaps_vl" + run_dump_test "x86-64-avx512_4fmaps_vl-intel" + run_list_test "x86-64-avx512_4fmaps-warn" + run_list_test "x86-64-avx512_4fmaps_vl-warn" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d new file mode 100644 index 0000000..80a4a19 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d @@ -0,0 +1,79 @@ +#objdump: -dw -Mintel +#name: x86_64 AVX512/4FMAPS insns (Intel disassembly) +#source: x86-64-avx512_4fmaps.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 09[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f 9a 09[ ]*v4fmaddps zmm1\{k7\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf 9a 09[ ]*v4fmaddps zmm1\{k7\}\{z\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 10 00 00[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 09[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f aa 09[ ]*v4fnmaddps zmm1\{k7\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf aa 09[ ]*v4fnmaddps zmm1\{k7\}\{z\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 09[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9b 09[ ]*v4fmaddss xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9b 09[ ]*v4fmaddss xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9b 8c f0 c0 1d fe ff[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 10 00 00[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 09[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f ab 09[ ]*v4fnmaddss xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f ab 09[ ]*v4fnmaddss xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 ab 8c f0 c0 1d fe ff[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 09[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 09[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f 9a 09[ ]*v4fmaddps zmm1\{k7\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf 9a 09[ ]*v4fmaddps zmm1\{k7\}\{z\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 10 00 00[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 09[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 09[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f aa 09[ ]*v4fnmaddps zmm1\{k7\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf aa 09[ ]*v4fnmaddps zmm1\{k7\}\{z\},zmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps zmm1,zmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 09[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 09[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9b 09[ ]*v4fmaddss xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9b 09[ ]*v4fmaddss xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9b 8c f0 c0 1d fe ff[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 10 00 00[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 09[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 09[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f ab 09[ ]*v4fnmaddss xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f ab 09[ ]*v4fnmaddss xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 ab 8c f0 c0 1d fe ff[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l new file mode 100644 index 0000000..a6939a0 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l @@ -0,0 +1,7 @@ +.*: Assembler messages: +.*:5: Warning: the second source register `%zmm1' implicitly denotes `%zmm0' to `%zmm3' source group in `v4fmaddps' +.*:6: Warning: the second source register `%zmm2' implicitly denotes `%zmm0' to `%zmm3' source group in `v4fmaddps' +.*:7: Warning: the second source register `%zmm3' implicitly denotes `%zmm0' to `%zmm3' source group in `v4fmaddps' +.*:10: Warning: the second source register `%zmm1' implicitly denotes `%zmm0' to `%zmm3' source group in `v4fnmaddps' +.*:11: Warning: the second source register `%zmm2' implicitly denotes `%zmm0' to `%zmm3' source group in `v4fnmaddps' +.*:12: Warning: the second source register `%zmm3' implicitly denotes `%zmm0' to `%zmm3' source group in `v4fnmaddps' diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s new file mode 100644 index 0000000..765c4de --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s @@ -0,0 +1,13 @@ +# Check warnings for invalid usage of register group + +.text + v4fmaddps (%rax), %zmm0, %zmm10 + v4fmaddps (%rax), %zmm1, %zmm10 + v4fmaddps (%rax), %zmm2, %zmm10 + v4fmaddps (%rax), %zmm3, %zmm10 + v4fmaddps (%rax), %zmm4, %zmm10 + v4fnmaddps (%rax), %zmm0, %zmm10 + v4fnmaddps (%rax), %zmm1, %zmm10 + v4fnmaddps (%rax), %zmm2, %zmm10 + v4fnmaddps (%rax), %zmm3, %zmm10 + v4fnmaddps (%rax), %zmm4, %zmm10 diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.d b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.d new file mode 100644 index 0000000..dbb0098 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.d @@ -0,0 +1,79 @@ +#objdump: -dw +#name: x86_64 AVX512/4FMAPS insns +#source: x86-64-avx512_4fmaps.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 09[ ]*v4fmaddps \(%rcx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f 9a 09[ ]*v4fmaddps \(%rcx\),%zmm8,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf 9a 09[ ]*v4fmaddps \(%rcx\),%zmm8,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%rax,%r14,8\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 09[ ]*v4fnmaddps \(%rcx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f aa 09[ ]*v4fnmaddps \(%rcx\),%zmm8,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf aa 09[ ]*v4fnmaddps \(%rcx\),%zmm8,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%rax,%r14,8\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 09[ ]*v4fmaddss \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9b 09[ ]*v4fmaddss \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9b 09[ ]*v4fmaddss \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9b 8c f0 c0 1d fe ff[ ]*v4fmaddss -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 10 00 00[ ]*v4fmaddss 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss -0x1020\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 09[ ]*v4fnmaddss \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f ab 09[ ]*v4fnmaddss \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f ab 09[ ]*v4fnmaddss \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 ab 8c f0 c0 1d fe ff[ ]*v4fnmaddss -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss -0x1020\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 09[ ]*v4fmaddps \(%rcx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 09[ ]*v4fmaddps \(%rcx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f 9a 09[ ]*v4fmaddps \(%rcx\),%zmm8,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf 9a 09[ ]*v4fmaddps \(%rcx\),%zmm8,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%rax,%r14,8\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 09[ ]*v4fnmaddps \(%rcx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 09[ ]*v4fnmaddps \(%rcx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 4f aa 09[ ]*v4fnmaddps \(%rcx\),%zmm8,%zmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f cf aa 09[ ]*v4fnmaddps \(%rcx\),%zmm8,%zmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 48 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%rax,%r14,8\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 48 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%rdx\),%zmm8,%zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 09[ ]*v4fmaddss \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 09[ ]*v4fmaddss \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9b 09[ ]*v4fmaddss \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9b 09[ ]*v4fmaddss \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9b 8c f0 c0 1d fe ff[ ]*v4fmaddss -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 0f 00 00[ ]*v4fmaddss 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 10 00 00[ ]*v4fmaddss 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a 00 f0 ff ff[ ]*v4fmaddss -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9b 8a e0 ef ff ff[ ]*v4fmaddss -0x1020\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 09[ ]*v4fnmaddss \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 09[ ]*v4fnmaddss \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f ab 09[ ]*v4fnmaddss \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f ab 09[ ]*v4fnmaddss \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 ab 8c f0 c0 1d fe ff[ ]*v4fnmaddss -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 0f 00 00[ ]*v4fnmaddss 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 10 00 00[ ]*v4fnmaddss 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a 00 f0 ff ff[ ]*v4fnmaddss -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 ab 8a e0 ef ff ff[ ]*v4fnmaddss -0x1020\(%rdx\),%xmm8,%xmm1 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.s b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.s new file mode 100644 index 0000000..51ef9d7 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.s @@ -0,0 +1,75 @@ +# Check 64bit AVX512_4FMAPS instructions + + .allow_index_reg + .text +_start: + v4fmaddps (%rcx), %zmm8, %zmm1 # AVX512_4FMAPS + v4fmaddps (%rcx), %zmm8, %zmm1{%k7} # AVX512_4FMAPS + v4fmaddps (%rcx), %zmm8, %zmm1{%k7}{z} # AVX512_4FMAPS + v4fmaddps -123456(%rax,%r14,8), %zmm8, %zmm1 # AVX512_4FMAPS + v4fmaddps 4064(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS Disp8 + v4fmaddps 4096(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS + v4fmaddps -4096(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS Disp8 + v4fmaddps -4128(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS + v4fnmaddps (%rcx), %zmm8, %zmm1 # AVX512_4FMAPS + v4fnmaddps (%rcx), %zmm8, %zmm1{%k7} # AVX512_4FMAPS + v4fnmaddps (%rcx), %zmm8, %zmm1{%k7}{z} # AVX512_4FMAPS + v4fnmaddps -123456(%rax,%r14,8), %zmm8, %zmm1 # AVX512_4FMAPS + v4fnmaddps 4064(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS Disp8 + v4fnmaddps 4096(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS + v4fnmaddps -4096(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS Disp8 + v4fnmaddps -4128(%rdx), %zmm8, %zmm1 # AVX512_4FMAPS + v4fmaddss (%rcx), %xmm8, %xmm1 # AVX512_4FMAPS + v4fmaddss (%rcx), %xmm8, %xmm1{%k7} # AVX512_4FMAPS + v4fmaddss (%rcx), %xmm8, %xmm1{%k7}{z} # AVX512_4FMAPS + v4fmaddss -123456(%rax,%r14,8), %xmm8, %xmm1 # AVX512_4FMAPS + v4fmaddss 4064(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS Disp8 + v4fmaddss 4096(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS + v4fmaddss -4096(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS Disp8 + v4fmaddss -4128(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS + v4fnmaddss (%rcx), %xmm8, %xmm1 # AVX512_4FMAPS + v4fnmaddss (%rcx), %xmm8, %xmm1{%k7} # AVX512_4FMAPS + v4fnmaddss (%rcx), %xmm8, %xmm1{%k7}{z} # AVX512_4FMAPS + v4fnmaddss -123456(%rax,%r14,8), %xmm8, %xmm1 # AVX512_4FMAPS + v4fnmaddss 4064(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS Disp8 + v4fnmaddss 4096(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS + v4fnmaddss -4096(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS Disp8 + v4fnmaddss -4128(%rdx), %xmm8, %xmm1 # AVX512_4FMAPS + + .intel_syntax noprefix + v4fmaddps zmm1, zmm8, [rcx] # AVX512_4FMAPS + v4fmaddps zmm1, zmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fmaddps zmm1{k7}, zmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fmaddps zmm1{k7}{z}, zmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fmaddps zmm1, zmm8, XMMWORD PTR [rax+r14*8-123456] # AVX512_4FMAPS + v4fmaddps zmm1, zmm8, XMMWORD PTR [rdx+4064] # AVX512_4FMAPS Disp8 + v4fmaddps zmm1, zmm8, XMMWORD PTR [rdx+4096] # AVX512_4FMAPS + v4fmaddps zmm1, zmm8, XMMWORD PTR [rdx-4096] # AVX512_4FMAPS Disp8 + v4fmaddps zmm1, zmm8, XMMWORD PTR [rdx-4128] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm8, [rcx] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fnmaddps zmm1{k7}, zmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fnmaddps zmm1{k7}{z}, zmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm8, XMMWORD PTR [rax+r14*8-123456] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm8, XMMWORD PTR [rdx+4064] # AVX512_4FMAPS Disp8 + v4fnmaddps zmm1, zmm8, XMMWORD PTR [rdx+4096] # AVX512_4FMAPS + v4fnmaddps zmm1, zmm8, XMMWORD PTR [rdx-4096] # AVX512_4FMAPS Disp8 + v4fnmaddps zmm1, zmm8, XMMWORD PTR [rdx-4128] # AVX512_4FMAPS + v4fmaddss xmm1, xmm8, [rcx] # AVX512_4FMAPS + v4fmaddss xmm1, xmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fmaddss xmm1{k7}, xmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fmaddss xmm1{k7}{z}, xmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fmaddss xmm1, xmm8, XMMWORD PTR [rax+r14*8-123456] # AVX512_4FMAPS + v4fmaddss xmm1, xmm8, XMMWORD PTR [rdx+4064] # AVX512_4FMAPS Disp8 + v4fmaddss xmm1, xmm8, XMMWORD PTR [rdx+4096] # AVX512_4FMAPS + v4fmaddss xmm1, xmm8, XMMWORD PTR [rdx-4096] # AVX512_4FMAPS Disp8 + v4fmaddss xmm1, xmm8, XMMWORD PTR [rdx-4128] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm8, [rcx] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fnmaddss xmm1{k7}, xmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fnmaddss xmm1{k7}{z}, xmm8, XMMWORD PTR [rcx] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm8, XMMWORD PTR [rax+r14*8-123456] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm8, XMMWORD PTR [rdx+4064] # AVX512_4FMAPS Disp8 + v4fnmaddss xmm1, xmm8, XMMWORD PTR [rdx+4096] # AVX512_4FMAPS + v4fnmaddss xmm1, xmm8, XMMWORD PTR [rdx-4096] # AVX512_4FMAPS Disp8 + v4fnmaddss xmm1, xmm8, XMMWORD PTR [rdx-4128] # AVX512_4FMAPS diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d new file mode 100644 index 0000000..e01a307 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d @@ -0,0 +1,79 @@ +#objdump: -dw -Mintel +#name: x86_64 AVX512/4FMAPS_VL insns (Intel disassembly) +#source: x86-64-avx512_4fmaps_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 09[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9a 09[ ]*v4fmaddps xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9a 09[ ]*v4fmaddps xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 10 00 00[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 09[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f 9a 09[ ]*v4fmaddps ymm1\{k7\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f af 9a 09[ ]*v4fmaddps ymm1\{k7\}\{z\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 10 00 00[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 09[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f aa 09[ ]*v4fnmaddps xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f aa 09[ ]*v4fnmaddps xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 09[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f aa 09[ ]*v4fnmaddps ymm1\{k7\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f af aa 09[ ]*v4fnmaddps ymm1\{k7\}\{z\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 ef ff ff[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 09[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 09[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9a 09[ ]*v4fmaddps xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9a 09[ ]*v4fmaddps xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 10 00 00[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 09[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 09[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f 9a 09[ ]*v4fmaddps ymm1\{k7\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f af 9a 09[ ]*v4fmaddps ymm1\{k7\}\{z\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 10 00 00[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 09[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 09[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f aa 09[ ]*v4fnmaddps xmm1\{k7\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f aa 09[ ]*v4fnmaddps xmm1\{k7\}\{z\},xmm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps xmm1,xmm8,XMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 09[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 09[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f aa 09[ ]*v4fnmaddps ymm1\{k7\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f af aa 09[ ]*v4fnmaddps ymm1\{k7\}\{z\},ymm8,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rax\+r14\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 ef ff ff[ ]*v4fnmaddps ymm1,ymm8,XMMWORD PTR \[rdx-0x1020\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l new file mode 100644 index 0000000..fc42237 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l @@ -0,0 +1,13 @@ +.*: Assembler messages: +.*:5: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:6: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:7: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fmaddps' +.*:10: Warning: the second source register `%xmm1' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:11: Warning: the second source register `%xmm2' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:12: Warning: the second source register `%xmm3' implicitly denotes `%xmm0' to `%xmm3' source group in `v4fnmaddps' +.*:15: Warning: the second source register `%ymm1' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fmaddps' +.*:16: Warning: the second source register `%ymm2' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fmaddps' +.*:17: Warning: the second source register `%ymm3' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fmaddps' +.*:20: Warning: the second source register `%ymm1' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fnmaddps' +.*:21: Warning: the second source register `%ymm2' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fnmaddps' +.*:22: Warning: the second source register `%ymm3' implicitly denotes `%ymm0' to `%ymm3' source group in `v4fnmaddps' diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s new file mode 100644 index 0000000..368b4b1 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s @@ -0,0 +1,23 @@ +# Check warnings for invalid usage of register group + +.text + v4fmaddps (%rax), %xmm0, %xmm10 + v4fmaddps (%rax), %xmm1, %xmm10 + v4fmaddps (%rax), %xmm2, %xmm10 + v4fmaddps (%rax), %xmm3, %xmm10 + v4fmaddps (%rax), %xmm4, %xmm10 + v4fnmaddps (%rax), %xmm0, %xmm10 + v4fnmaddps (%rax), %xmm1, %xmm10 + v4fnmaddps (%rax), %xmm2, %xmm10 + v4fnmaddps (%rax), %xmm3, %xmm10 + v4fnmaddps (%rax), %xmm4, %xmm10 + v4fmaddps (%rax), %ymm0, %ymm10 + v4fmaddps (%rax), %ymm1, %ymm10 + v4fmaddps (%rax), %ymm2, %ymm10 + v4fmaddps (%rax), %ymm3, %ymm10 + v4fmaddps (%rax), %ymm4, %ymm10 + v4fnmaddps (%rax), %ymm0, %ymm10 + v4fnmaddps (%rax), %ymm1, %ymm10 + v4fnmaddps (%rax), %ymm2, %ymm10 + v4fnmaddps (%rax), %ymm3, %ymm10 + v4fnmaddps (%rax), %ymm4, %ymm10 diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d new file mode 100644 index 0000000..da12ddc --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d @@ -0,0 +1,79 @@ +#objdump: -dw +#name: x86_64 AVX512/4FMAPS_VL insns +#source: x86-64-avx512_4fmaps_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 09[ ]*v4fmaddps \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9a 09[ ]*v4fmaddps \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9a 09[ ]*v4fmaddps \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 09[ ]*v4fmaddps \(%rcx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f 9a 09[ ]*v4fmaddps \(%rcx\),%ymm8,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f af 9a 09[ ]*v4fmaddps \(%rcx\),%ymm8,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%rax,%r14,8\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 09[ ]*v4fnmaddps \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f aa 09[ ]*v4fnmaddps \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f aa 09[ ]*v4fnmaddps \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 09[ ]*v4fnmaddps \(%rcx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f aa 09[ ]*v4fnmaddps \(%rcx\),%ymm8,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f af aa 09[ ]*v4fnmaddps \(%rcx\),%ymm8,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%rax,%r14,8\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 09[ ]*v4fmaddps \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 09[ ]*v4fmaddps \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f 9a 09[ ]*v4fmaddps \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f 9a 09[ ]*v4fmaddps \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 09[ ]*v4fmaddps \(%rcx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 09[ ]*v4fmaddps \(%rcx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f 9a 09[ ]*v4fmaddps \(%rcx\),%ymm8,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f af 9a 09[ ]*v4fmaddps \(%rcx\),%ymm8,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 9a 8c f0 c0 1d fe ff[ ]*v4fmaddps -0x1e240\(%rax,%r14,8\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 0f 00 00[ ]*v4fmaddps 0xfe0\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 10 00 00[ ]*v4fmaddps 0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a 00 f0 ff ff[ ]*v4fmaddps -0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 9a 8a e0 ef ff ff[ ]*v4fmaddps -0x1020\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 09[ ]*v4fnmaddps \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 09[ ]*v4fnmaddps \(%rcx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 0f aa 09[ ]*v4fnmaddps \(%rcx\),%xmm8,%xmm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f 8f aa 09[ ]*v4fnmaddps \(%rcx\),%xmm8,%xmm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 08 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%rax,%r14,8\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 08 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%rdx\),%xmm8,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 09[ ]*v4fnmaddps \(%rcx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 09[ ]*v4fnmaddps \(%rcx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 2f aa 09[ ]*v4fnmaddps \(%rcx\),%ymm8,%ymm1\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 3f af aa 09[ ]*v4fnmaddps \(%rcx\),%ymm8,%ymm1\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 b2 3f 28 aa 8c f0 c0 1d fe ff[ ]*v4fnmaddps -0x1e240\(%rax,%r14,8\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 0f 00 00[ ]*v4fnmaddps 0xfe0\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 10 00 00[ ]*v4fnmaddps 0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a 00 f0 ff ff[ ]*v4fnmaddps -0x1000\(%rdx\),%ymm8,%ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 3f 28 aa 8a e0 ef ff ff[ ]*v4fnmaddps -0x1020\(%rdx\),%ymm8,%ymm1 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s new file mode 100644 index 0000000..0b7cf37 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s @@ -0,0 +1,75 @@ +# Check 64bit AVX512{_4FMAPS,VL} instructions + + .allow_index_reg + .text +_start: + v4fmaddps (%rcx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps (%rcx), %xmm8, %xmm1{%k7} # AVX512{_4FMAPS,VL} + v4fmaddps (%rcx), %xmm8, %xmm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fmaddps -123456(%rax,%r14,8), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps 4064(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps 4096(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps -4096(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps -4128(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fmaddps (%rcx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + v4fmaddps (%rcx), %ymm8, %ymm1{%k7} # AVX512{_4FMAPS,VL} + v4fmaddps (%rcx), %ymm8, %ymm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fmaddps -123456(%rax,%r14,8), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + v4fmaddps 4064(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps 4096(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + v4fmaddps -4096(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps -4128(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%rcx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%rcx), %xmm8, %xmm1{%k7} # AVX512{_4FMAPS,VL} + v4fnmaddps (%rcx), %xmm8, %xmm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fnmaddps -123456(%rax,%r14,8), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps 4064(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps 4096(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps -4096(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps -4128(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%rcx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps (%rcx), %ymm8, %ymm1{%k7} # AVX512{_4FMAPS,VL} + v4fnmaddps (%rcx), %ymm8, %ymm1{%k7}{z} # AVX512{_4FMAPS,VL} + v4fnmaddps -123456(%rax,%r14,8), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps 4064(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps 4096(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + v4fnmaddps -4096(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps -4128(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} + + .intel_syntax noprefix + v4fmaddps xmm1, xmm8, [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1{k7}, xmm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1{k7}{z}, xmm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm8, XMMWORD PTR [rax+r14*8-123456] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm8, XMMWORD PTR [rdx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps xmm1, xmm8, XMMWORD PTR [rdx+4096] # AVX512{_4FMAPS,VL} + v4fmaddps xmm1, xmm8, XMMWORD PTR [rdx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps xmm1, xmm8, XMMWORD PTR [rdx-4128] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm8, [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1{k7}, ymm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1{k7}{z}, ymm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm8, XMMWORD PTR [rax+r14*8-123456] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm8, XMMWORD PTR [rdx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps ymm1, ymm8, XMMWORD PTR [rdx+4096] # AVX512{_4FMAPS,VL} + v4fmaddps ymm1, ymm8, XMMWORD PTR [rdx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fmaddps ymm1, ymm8, XMMWORD PTR [rdx-4128] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm8, [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1{k7}, xmm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1{k7}{z}, xmm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm8, XMMWORD PTR [rax+r14*8-123456] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm8, XMMWORD PTR [rdx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps xmm1, xmm8, XMMWORD PTR [rdx+4096] # AVX512{_4FMAPS,VL} + v4fnmaddps xmm1, xmm8, XMMWORD PTR [rdx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps xmm1, xmm8, XMMWORD PTR [rdx-4128] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm8, [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1{k7}, ymm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1{k7}{z}, ymm8, XMMWORD PTR [rcx] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm8, XMMWORD PTR [rax+r14*8-123456] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm8, XMMWORD PTR [rdx+4064] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps ymm1, ymm8, XMMWORD PTR [rdx+4096] # AVX512{_4FMAPS,VL} + v4fnmaddps ymm1, ymm8, XMMWORD PTR [rdx-4096] # AVX512{_4FMAPS,VL} Disp8 + v4fnmaddps ymm1, ymm8, XMMWORD PTR [rdx-4128] # AVX512{_4FMAPS,VL} |