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authorRichard Sandiford <richard.sandiford@arm.com>2021-12-02 15:00:57 +0000
committerRichard Sandiford <richard.sandiford@arm.com>2021-12-02 15:00:57 +0000
commit6327658ee73502ffb55dfb6b28a20d1dde15a4dc (patch)
tree13b1c36b6ded6afcde85d45b69971548bb22c37d /gas
parenta5e9beead8580777ea4886b06c493a6f79570f93 (diff)
downloadfsf-binutils-gdb-6327658ee73502ffb55dfb6b28a20d1dde15a4dc.zip
fsf-binutils-gdb-6327658ee73502ffb55dfb6b28a20d1dde15a4dc.tar.gz
fsf-binutils-gdb-6327658ee73502ffb55dfb6b28a20d1dde15a4dc.tar.bz2
aarch64: Add support for +mops
This patch adds support for FEAT_MOPS, an Armv8.8-A extension that provides memcpy and memset acceleration instructions. I took the perhaps controversial decision to generate the individual instruction forms using macros rather than list them out individually. This becomes useful with a follow-on patch to check that code follows the correct P/M/E sequence. [https://developer.arm.com/documentation/ddi0596/2021-09/Base-Instructions?lang=en] include/ * opcode/aarch64.h (AARCH64_FEATURE_MOPS): New macro. (AARCH64_ARCH_V8_8): Make armv8.8-a imply AARCH64_FEATURE_MOPS. (AARCH64_OPND_MOPS_ADDR_Rd): New aarch64_opnd. (AARCH64_OPND_MOPS_ADDR_Rs): Likewise. (AARCH64_OPND_MOPS_WB_Rn): Likewise. opcodes/ * aarch64-asm.h (ins_x0_to_x30): New inserter. * aarch64-asm.c (aarch64_ins_x0_to_x30): New function. * aarch64-dis.h (ext_x0_to_x30): New extractor. * aarch64-dis.c (aarch64_ext_x0_to_x30): New function. * aarch64-tbl.h (aarch64_feature_mops): New feature set. (aarch64_feature_mops_memtag): Likewise. (MOPS, MOPS_MEMTAG, MOPS_INSN, MOPS_MEMTAG_INSN) (MOPS_CPY_OP1_OP2_PME_INSN, MOPS_CPY_OP1_OP2_INSN, MOPS_CPY_OP1_INSN) (MOPS_CPY_INSN, MOPS_SET_OP1_OP2_PME_INSN, MOPS_SET_OP1_OP2_INSN) (MOPS_SET_INSN): New macros. (aarch64_opcode_table): Add MOPS instructions. (aarch64_opcode_table): Add entries for AARCH64_OPND_MOPS_ADDR_Rd, AARCH64_OPND_MOPS_ADDR_Rs and AARCH64_OPND_MOPS_WB_Rn. * aarch64-opc.c (aarch64_print_operand): Handle AARCH64_OPND_MOPS_ADDR_Rd, AARCH64_OPND_MOPS_ADDR_Rs and AARCH64_OPND_MOPS_WB_Rn. (verify_three_different_regs): New function. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. gas/ * doc/c-aarch64.texi: Document +mops. * config/tc-aarch64.c (parse_x0_to_x30): New function. (parse_operands): Handle AARCH64_OPND_MOPS_ADDR_Rd, AARCH64_OPND_MOPS_ADDR_Rs and AARCH64_OPND_MOPS_WB_Rn. (aarch64_features): Add "mops". * testsuite/gas/aarch64/mops.s, testsuite/gas/aarch64/mops.d: New test. * testsuite/gas/aarch64/mops_invalid.s, * testsuite/gas/aarch64/mops_invalid.d, * testsuite/gas/aarch64/mops_invalid.l: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/config/tc-aarch64.c33
-rw-r--r--gas/doc/c-aarch64.texi2
-rw-r--r--gas/testsuite/gas/aarch64/mops.d1016
-rw-r--r--gas/testsuite/gas/aarch64/mops.s66
-rw-r--r--gas/testsuite/gas/aarch64/mops_invalid.d1
-rw-r--r--gas/testsuite/gas/aarch64/mops_invalid.l226
-rw-r--r--gas/testsuite/gas/aarch64/mops_invalid.s248
7 files changed, 1592 insertions, 0 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 2181fa1..4aadf5b 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3918,6 +3918,22 @@ parse_sve_address (char **str, aarch64_opnd_info *operand,
SHIFTED_MUL_VL);
}
+/* Parse a register X0-X30. The register must be 64-bit and register 31
+ is unallocated. */
+static bool
+parse_x0_to_x30 (char **str, aarch64_opnd_info *operand)
+{
+ const reg_entry *reg = parse_reg (str);
+ if (!reg || !aarch64_check_reg_type (reg, REG_TYPE_R_64))
+ {
+ set_syntax_error (_(get_reg_expected_msg (REG_TYPE_R_64)));
+ return false;
+ }
+ operand->reg.regno = reg->number;
+ operand->qualifier = AARCH64_OPND_QLF_X;
+ return true;
+}
+
/* Parse an operand for a MOVZ, MOVN or MOVK instruction.
Return TRUE on success; otherwise return FALSE. */
static bool
@@ -7491,6 +7507,21 @@ parse_operands (char *str, const aarch64_opcode *opcode)
break;
}
+ case AARCH64_OPND_MOPS_ADDR_Rd:
+ case AARCH64_OPND_MOPS_ADDR_Rs:
+ po_char_or_fail ('[');
+ if (!parse_x0_to_x30 (&str, info))
+ goto failure;
+ po_char_or_fail (']');
+ po_char_or_fail ('!');
+ break;
+
+ case AARCH64_OPND_MOPS_WB_Rn:
+ if (!parse_x0_to_x30 (&str, info))
+ goto failure;
+ po_char_or_fail ('!');
+ break;
+
default:
as_fatal (_("unhandled operand code %d"), operands[i]);
}
@@ -9929,6 +9960,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
AARCH64_ARCH_NONE},
{"pauth", AARCH64_FEATURE (AARCH64_FEATURE_PAC, 0),
AARCH64_ARCH_NONE},
+ {"mops", AARCH64_FEATURE (AARCH64_FEATURE_MOPS, 0),
+ AARCH64_ARCH_NONE},
{NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE},
};
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 3051b6f..7edccce 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -193,6 +193,8 @@ automatically cause those extensions to be disabled.
@tab Enable Large System extensions.
@item @code{memtag} @tab ARMv8.5-A @tab No
@tab Enable ARMv8.5-A Memory Tagging Extensions.
+@item @code{mops} @tab @tab Armv8.8-A or later
+ @tab Enable Armv8.8-A memcpy and memset acceleration instructions
@item @code{pan} @tab ARMv8-A @tab ARMv8.1-A or later
@tab Enable Privileged Access Never support.
@item @code{pauth} @tab ARMv8-A @tab No
diff --git a/gas/testsuite/gas/aarch64/mops.d b/gas/testsuite/gas/aarch64/mops.d
new file mode 100644
index 0000000..a49ef1a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/mops.d
@@ -0,0 +1,1016 @@
+# objdump: -dr
+
+.*
+
+
+Disassembly of section \.text:
+
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+[^:]*: 1d0197c0 cpypwtrn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d4197c0 cpymwtrn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d8197c0 cpyewtrn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d1e941d cpypwtrn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d5e941d cpymwtrn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d9e941d cpyewtrn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d00943e cpypwtrn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d40943e cpymwtrn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d80943e cpyewtrn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d0b9668 cpypwtrn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d4b9668 cpymwtrn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d8b9668 cpyewtrn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d0157c0 cpypwtwn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d4157c0 cpymwtwn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d8157c0 cpyewtwn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d1e541d cpypwtwn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d5e541d cpymwtwn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d9e541d cpyewtwn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d00543e cpypwtwn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d40543e cpymwtwn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d80543e cpyewtwn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d0b5668 cpypwtwn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d4b5668 cpymwtwn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d8b5668 cpyewtwn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d01d7c0 cpypwtn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d41d7c0 cpymwtn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d81d7c0 cpyewtn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d1ed41d cpypwtn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d5ed41d cpymwtn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d9ed41d cpyewtn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d00d43e cpypwtn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d40d43e cpymwtn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d80d43e cpyewtn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d0bd668 cpypwtn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d4bd668 cpymwtn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d8bd668 cpyewtn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d0137c0 cpypt \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d4137c0 cpymt \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d8137c0 cpyet \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d1e341d cpypt \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d5e341d cpymt \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d9e341d cpyet \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d00343e cpypt \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d40343e cpymt \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d80343e cpyet \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d0b3668 cpypt \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d4b3668 cpymt \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d8b3668 cpyet \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d01b7c0 cpyptrn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d41b7c0 cpymtrn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d81b7c0 cpyetrn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d1eb41d cpyptrn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d5eb41d cpymtrn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d9eb41d cpyetrn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d00b43e cpyptrn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d40b43e cpymtrn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d80b43e cpyetrn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d0bb668 cpyptrn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d4bb668 cpymtrn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d8bb668 cpyetrn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d0177c0 cpyptwn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d4177c0 cpymtwn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d8177c0 cpyetwn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d1e741d cpyptwn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d5e741d cpymtwn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d9e741d cpyetwn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d00743e cpyptwn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d40743e cpymtwn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d80743e cpyetwn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d0b7668 cpyptwn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d4b7668 cpymtwn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d8b7668 cpyetwn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d01f7c0 cpyptn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d41f7c0 cpymtn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d81f7c0 cpyetn \[x0\]!, \[x1\]!, x30!
+[^:]*: 1d1ef41d cpyptn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d5ef41d cpymtn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d9ef41d cpyetn \[x29\]!, \[x30\]!, x0!
+[^:]*: 1d00f43e cpyptn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d40f43e cpymtn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d80f43e cpyetn \[x30\]!, \[x0\]!, x1!
+[^:]*: 1d0bf668 cpyptn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d4bf668 cpymtn \[x8\]!, \[x11\]!, x19!
+[^:]*: 1d8bf668 cpyetn \[x8\]!, \[x11\]!, x19!
+[^:]*: 19de0420 setp \[x0\]!, x1!, x30
+[^:]*: 19de4420 setm \[x0\]!, x1!, x30
+[^:]*: 19de8420 sete \[x0\]!, x1!, x30
+[^:]*: 19c007dd setp \[x29\]!, x30!, x0
+[^:]*: 19c047dd setm \[x29\]!, x30!, x0
+[^:]*: 19c087dd sete \[x29\]!, x30!, x0
+[^:]*: 19df041e setp \[x30\]!, x0!, xzr
+[^:]*: 19df441e setm \[x30\]!, x0!, xzr
+[^:]*: 19df841e sete \[x30\]!, x0!, xzr
+[^:]*: 19d70668 setp \[x8\]!, x19!, x23
+[^:]*: 19d74668 setm \[x8\]!, x19!, x23
+[^:]*: 19d78668 sete \[x8\]!, x19!, x23
+[^:]*: 19df0668 setp \[x8\]!, x19!, xzr
+[^:]*: 19df4668 setm \[x8\]!, x19!, xzr
+[^:]*: 19df8668 sete \[x8\]!, x19!, xzr
+[^:]*: 19de1420 setpt \[x0\]!, x1!, x30
+[^:]*: 19de5420 setmt \[x0\]!, x1!, x30
+[^:]*: 19de9420 setet \[x0\]!, x1!, x30
+[^:]*: 19c017dd setpt \[x29\]!, x30!, x0
+[^:]*: 19c057dd setmt \[x29\]!, x30!, x0
+[^:]*: 19c097dd setet \[x29\]!, x30!, x0
+[^:]*: 19df141e setpt \[x30\]!, x0!, xzr
+[^:]*: 19df541e setmt \[x30\]!, x0!, xzr
+[^:]*: 19df941e setet \[x30\]!, x0!, xzr
+[^:]*: 19d71668 setpt \[x8\]!, x19!, x23
+[^:]*: 19d75668 setmt \[x8\]!, x19!, x23
+[^:]*: 19d79668 setet \[x8\]!, x19!, x23
+[^:]*: 19df1668 setpt \[x8\]!, x19!, xzr
+[^:]*: 19df5668 setmt \[x8\]!, x19!, xzr
+[^:]*: 19df9668 setet \[x8\]!, x19!, xzr
+[^:]*: 19de2420 setpn \[x0\]!, x1!, x30
+[^:]*: 19de6420 setmn \[x0\]!, x1!, x30
+[^:]*: 19dea420 seten \[x0\]!, x1!, x30
+[^:]*: 19c027dd setpn \[x29\]!, x30!, x0
+[^:]*: 19c067dd setmn \[x29\]!, x30!, x0
+[^:]*: 19c0a7dd seten \[x29\]!, x30!, x0
+[^:]*: 19df241e setpn \[x30\]!, x0!, xzr
+[^:]*: 19df641e setmn \[x30\]!, x0!, xzr
+[^:]*: 19dfa41e seten \[x30\]!, x0!, xzr
+[^:]*: 19d72668 setpn \[x8\]!, x19!, x23
+[^:]*: 19d76668 setmn \[x8\]!, x19!, x23
+[^:]*: 19d7a668 seten \[x8\]!, x19!, x23
+[^:]*: 19df2668 setpn \[x8\]!, x19!, xzr
+[^:]*: 19df6668 setmn \[x8\]!, x19!, xzr
+[^:]*: 19dfa668 seten \[x8\]!, x19!, xzr
+[^:]*: 19de3420 setptn \[x0\]!, x1!, x30
+[^:]*: 19de7420 setmtn \[x0\]!, x1!, x30
+[^:]*: 19deb420 setetn \[x0\]!, x1!, x30
+[^:]*: 19c037dd setptn \[x29\]!, x30!, x0
+[^:]*: 19c077dd setmtn \[x29\]!, x30!, x0
+[^:]*: 19c0b7dd setetn \[x29\]!, x30!, x0
+[^:]*: 19df341e setptn \[x30\]!, x0!, xzr
+[^:]*: 19df741e setmtn \[x30\]!, x0!, xzr
+[^:]*: 19dfb41e setetn \[x30\]!, x0!, xzr
+[^:]*: 19d73668 setptn \[x8\]!, x19!, x23
+[^:]*: 19d77668 setmtn \[x8\]!, x19!, x23
+[^:]*: 19d7b668 setetn \[x8\]!, x19!, x23
+[^:]*: 19df3668 setptn \[x8\]!, x19!, xzr
+[^:]*: 19df7668 setmtn \[x8\]!, x19!, xzr
+[^:]*: 19dfb668 setetn \[x8\]!, x19!, xzr
+[^:]*: 1dde0420 setgp \[x0\]!, x1!, x30
+[^:]*: 1dde4420 setgm \[x0\]!, x1!, x30
+[^:]*: 1dde8420 setge \[x0\]!, x1!, x30
+[^:]*: 1dc007dd setgp \[x29\]!, x30!, x0
+[^:]*: 1dc047dd setgm \[x29\]!, x30!, x0
+[^:]*: 1dc087dd setge \[x29\]!, x30!, x0
+[^:]*: 1ddf041e setgp \[x30\]!, x0!, xzr
+[^:]*: 1ddf441e setgm \[x30\]!, x0!, xzr
+[^:]*: 1ddf841e setge \[x30\]!, x0!, xzr
+[^:]*: 1dd70668 setgp \[x8\]!, x19!, x23
+[^:]*: 1dd74668 setgm \[x8\]!, x19!, x23
+[^:]*: 1dd78668 setge \[x8\]!, x19!, x23
+[^:]*: 1ddf0668 setgp \[x8\]!, x19!, xzr
+[^:]*: 1ddf4668 setgm \[x8\]!, x19!, xzr
+[^:]*: 1ddf8668 setge \[x8\]!, x19!, xzr
+[^:]*: 1dde1420 setgpt \[x0\]!, x1!, x30
+[^:]*: 1dde5420 setgmt \[x0\]!, x1!, x30
+[^:]*: 1dde9420 setget \[x0\]!, x1!, x30
+[^:]*: 1dc017dd setgpt \[x29\]!, x30!, x0
+[^:]*: 1dc057dd setgmt \[x29\]!, x30!, x0
+[^:]*: 1dc097dd setget \[x29\]!, x30!, x0
+[^:]*: 1ddf141e setgpt \[x30\]!, x0!, xzr
+[^:]*: 1ddf541e setgmt \[x30\]!, x0!, xzr
+[^:]*: 1ddf941e setget \[x30\]!, x0!, xzr
+[^:]*: 1dd71668 setgpt \[x8\]!, x19!, x23
+[^:]*: 1dd75668 setgmt \[x8\]!, x19!, x23
+[^:]*: 1dd79668 setget \[x8\]!, x19!, x23
+[^:]*: 1ddf1668 setgpt \[x8\]!, x19!, xzr
+[^:]*: 1ddf5668 setgmt \[x8\]!, x19!, xzr
+[^:]*: 1ddf9668 setget \[x8\]!, x19!, xzr
+[^:]*: 1dde2420 setgpn \[x0\]!, x1!, x30
+[^:]*: 1dde6420 setgmn \[x0\]!, x1!, x30
+[^:]*: 1ddea420 setgen \[x0\]!, x1!, x30
+[^:]*: 1dc027dd setgpn \[x29\]!, x30!, x0
+[^:]*: 1dc067dd setgmn \[x29\]!, x30!, x0
+[^:]*: 1dc0a7dd setgen \[x29\]!, x30!, x0
+[^:]*: 1ddf241e setgpn \[x30\]!, x0!, xzr
+[^:]*: 1ddf641e setgmn \[x30\]!, x0!, xzr
+[^:]*: 1ddfa41e setgen \[x30\]!, x0!, xzr
+[^:]*: 1dd72668 setgpn \[x8\]!, x19!, x23
+[^:]*: 1dd76668 setgmn \[x8\]!, x19!, x23
+[^:]*: 1dd7a668 setgen \[x8\]!, x19!, x23
+[^:]*: 1ddf2668 setgpn \[x8\]!, x19!, xzr
+[^:]*: 1ddf6668 setgmn \[x8\]!, x19!, xzr
+[^:]*: 1ddfa668 setgen \[x8\]!, x19!, xzr
+[^:]*: 1dde3420 setgptn \[x0\]!, x1!, x30
+[^:]*: 1dde7420 setgmtn \[x0\]!, x1!, x30
+[^:]*: 1ddeb420 setgetn \[x0\]!, x1!, x30
+[^:]*: 1dc037dd setgptn \[x29\]!, x30!, x0
+[^:]*: 1dc077dd setgmtn \[x29\]!, x30!, x0
+[^:]*: 1dc0b7dd setgetn \[x29\]!, x30!, x0
+[^:]*: 1ddf341e setgptn \[x30\]!, x0!, xzr
+[^:]*: 1ddf741e setgmtn \[x30\]!, x0!, xzr
+[^:]*: 1ddfb41e setgetn \[x30\]!, x0!, xzr
+[^:]*: 1dd73668 setgptn \[x8\]!, x19!, x23
+[^:]*: 1dd77668 setgmtn \[x8\]!, x19!, x23
+[^:]*: 1dd7b668 setgetn \[x8\]!, x19!, x23
+[^:]*: 1ddf3668 setgptn \[x8\]!, x19!, xzr
+[^:]*: 1ddf7668 setgmtn \[x8\]!, x19!, xzr
+[^:]*: 1ddfb668 setgetn \[x8\]!, x19!, xzr
diff --git a/gas/testsuite/gas/aarch64/mops.s b/gas/testsuite/gas/aarch64/mops.s
new file mode 100644
index 0000000..5cd9e3a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/mops.s
@@ -0,0 +1,66 @@
+ .arch armv8.8-a+memtag
+
+dest .req x8
+src .req x11
+len .req x19
+data .req x23
+zero .req xzr
+
+ .macro pme_seq, op, suffix, r1, r2, r3
+ \op\()p\()\suffix \r1, \r2, \r3
+ \op\()m\()\suffix \r1, \r2, \r3
+ \op\()e\()\suffix \r1, \r2, \r3
+ .endm
+
+ .macro cpy_op1_op2, op, suffix
+ pme_seq \op, \suffix, [x0]!, [x1]!, x30!
+ pme_seq \op, \suffix, [x29]!, [x30]!, x0!
+ pme_seq \op, \suffix, [x30]!, [x0]!, x1!
+ pme_seq \op, \suffix, [dest]!, [src]!, len!
+ .endm
+
+ .macro cpy_op1, op, suffix
+ cpy_op1_op2 \op, \suffix
+ cpy_op1_op2 \op, \suffix\()rn
+ cpy_op1_op2 \op, \suffix\()wn
+ cpy_op1_op2 \op, \suffix\()n
+ .endm
+
+ .macro cpy_all, op
+ cpy_op1 \op
+ cpy_op1 \op, rt
+ cpy_op1 \op, wt
+ cpy_op1 \op, t
+ .endm
+
+ .macro set_op1_op2, op, suffix
+ pme_seq \op, \suffix, [x0]!, x1!, x30
+ pme_seq \op, \suffix, [x29]!, x30!, x0
+ pme_seq \op, \suffix, [x30]!, x0!, xzr
+ pme_seq \op, \suffix, [dest]!, len!, data
+ pme_seq \op, \suffix, [dest]!, len!, zero
+ .endm
+
+ .macro set_all, op
+ set_op1_op2 \op
+ set_op1_op2 \op, t
+ set_op1_op2 \op, n
+ set_op1_op2 \op, tn
+ .endm
+
+ cpy_all cpyf
+ cpy_all cpy
+
+ set_all set
+ set_all setg
+
+ .arch armv8.7-a+mops
+
+ cpy_all cpyf
+ cpy_all cpy
+
+ set_all set
+
+ .arch armv8.7-a+mops+memtag
+
+ set_all setg
diff --git a/gas/testsuite/gas/aarch64/mops_invalid.d b/gas/testsuite/gas/aarch64/mops_invalid.d
new file mode 100644
index 0000000..af66fff
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/mops_invalid.d
@@ -0,0 +1 @@
+#error_output: mops_invalid.l
diff --git a/gas/testsuite/gas/aarch64/mops_invalid.l b/gas/testsuite/gas/aarch64/mops_invalid.l
new file mode 100644
index 0000000..8f5e588
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/mops_invalid.l
@@ -0,0 +1,226 @@
+[^:]+: Assembler messages:
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `cpyfp x0,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `cpyfp x0!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `cpyfp \[x0\],\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `cpyfp \[x0,#0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `cpyfp \[x0,xzr\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: operand 2 must be a register source address with writeback -- `cpyfp \[x1\]!,x0,x2!'
+[^:]+:[0-9]+: Error: operand 2 must be a register source address with writeback -- `cpyfp \[x1\]!,x0!,x2!'
+[^:]+:[0-9]+: Error: operand 2 must be a register source address with writeback -- `cpyfp \[x1\]!,\[x0\],x2!'
+[^:]+:[0-9]+: Error: operand 2 must be a register source address with writeback -- `cpyfp \[x1\]!,\[x0,#0\]!,x2!'
+[^:]+:[0-9]+: Error: operand 2 must be a register source address with writeback -- `cpyfp \[x1\]!,\[x0,xzr\]!,x2!'
+[^:]+:[0-9]+: Error: operand 3 must be an integer register with writeback -- `cpyfp \[x0\]!,\[x1\]!,x2'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,!x2'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,\[x2\]'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,\[x2\]!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[x31\]!,\[x0\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[sp\]!,\[x0\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[zr\]!,\[x0\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[w30\]!,\[x0\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[w0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[wsp\]!,\[x0\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[wzr\]!,\[x0\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[b0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[h0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[s0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[d0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[q0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[v0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[v0.2d\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[z0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[z0.d\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[p0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[p0.d\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `cpyfp \[foo\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x0\]!,\[x31\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x0\]!,\[sp\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x0\]!,\[zr\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x0\]!,\[w30\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x1\]!,\[w0\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x0\]!,\[wsp\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x0\]!,\[wzr\]!,x1!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `cpyfp \[x1\]!,\[foo\]!,x2!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,x31!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,sp!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,zr!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,w30!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x1\]!,\[x2\]!,w0!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,wsp!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x0\]!,\[x1\]!,wzr!'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 3 -- `cpyfp \[x1\]!,\[x2\]!,foo!'
+[^:]+:[0-9]+: Error: the three register operands must be distinct from one another -- `cpyfp \[x0\]!,\[x0\]!,x1!'
+[^:]+:[0-9]+: Error: the three register operands must be distinct from one another -- `cpyfp \[x10\]!,\[x1\]!,x10!'
+[^:]+:[0-9]+: Error: the three register operands must be distinct from one another -- `cpyfp \[x1\]!,\[x30\]!,x30!'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `setp x0,x1!,x2'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `setp x0!,x1!,x2'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `setp \[x0\],x1!,x2'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `setp \[x0,#0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: operand 1 must be a register destination address with writeback -- `setp \[x0,xzr\]!,x1!,x2'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[x31\]!,x0!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[sp\]!,x0!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[zr\]!,x0!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[w30\]!,x0!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[w0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[wsp\]!,x0!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[wzr\]!,x0!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 1 -- `setp \[foo\]!,x1!,x2'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x0\]!,x31!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x0\]!,sp!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x0\]!,zr!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x0\]!,w30!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x1\]!,w0!,x2'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x0\]!,wsp!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x0\]!,wzr!,x1'
+[^:]+:[0-9]+: Error: integer 64-bit register expected at operand 2 -- `setp \[x1\]!,foo!,x2'
+[^:]+:[0-9]+: Error: operand 3 must be an integer register -- `setp \[x30\]!,x0!,sp'
+[^:]+:[0-9]+: Error: operand 3 must be an integer register -- `setp \[x30\]!,x0!,wsp'
+[^:]+:[0-9]+: Error: operand mismatch -- `setp \[x30\]!,x0!,wzr'
+[^:]+:[0-9]+: Info: did you mean this\?
+[^:]+:[0-9]+: Info: setp \[x30\]!, x0!, xzr
+[^:]+:[0-9]+: Error: the three register operands must be distinct from one another -- `setp \[x0\]!,x0!,x1'
+[^:]+:[0-9]+: Error: the three register operands must be distinct from one another -- `setp \[x10\]!,x1!,x10'
+[^:]+:[0-9]+: Error: the three register operands must be distinct from one another -- `setp \[x1\]!,x30!,x30'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfp \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfm \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfe \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfprn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfern \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfpwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfewn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfpn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfen \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfprt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmrt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfert \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfprtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmrtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfertrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfprtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmrtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfertwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfprtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmrtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfertn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfpwt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmwt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfewt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfpwtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmwtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfewtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfpwtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmwtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfewtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfpwtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmwtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfewtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfpt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfet \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfptrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfetrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfptwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfetwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfptn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfmtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyfetn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyp \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpym \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpye \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyprn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyern \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpypwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyewn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpypn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyen \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyprt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymrt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyert \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyprtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymrtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyertrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyprtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymrtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyertwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyprtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymrtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyertn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpypwt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymwt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyewt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpypwtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymwtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyewtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpypwtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymwtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyewtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpypwtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymwtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyewtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpypt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymt \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyet \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyptrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymtrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyetrn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyptwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymtwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyetwn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyptn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpymtn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `cpyetn \[x0\]!,\[x1\]!,x2!'
+[^:]+:[0-9]+: Error: selected processor does not support `setp \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setm \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `sete \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setpt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setmt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setet \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setpn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setmn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `seten \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setptn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setmtn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setetn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgp \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgm \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setge \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgpt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setget \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgpn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgen \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgptn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmtn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgetn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgp \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgm \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setge \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgpt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setget \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgpn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgen \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgptn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmtn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgetn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgp \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgm \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setge \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgpt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmt \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setget \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgpn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgen \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgptn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgmtn \[x0\]!,x1!,x2'
+[^:]+:[0-9]+: Error: selected processor does not support `setgetn \[x0\]!,x1!,x2'
diff --git a/gas/testsuite/gas/aarch64/mops_invalid.s b/gas/testsuite/gas/aarch64/mops_invalid.s
new file mode 100644
index 0000000..5281d37
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/mops_invalid.s
@@ -0,0 +1,248 @@
+ .arch armv8.8-a
+
+ cpyfp x0, [x1]!, x2!
+ cpyfp x0!, [x1]!, x2!
+ cpyfp [x0], [x1]!, x2!
+ cpyfp [x0, #0]!, [x1]!, x2!
+ cpyfp [x0, xzr]!, [x1]!, x2!
+
+ cpyfp [x1]!, x0, x2!
+ cpyfp [x1]!, x0!, x2!
+ cpyfp [x1]!, [x0], x2!
+ cpyfp [x1]!, [x0, #0]!, x2!
+ cpyfp [x1]!, [x0, xzr]!, x2!
+
+ cpyfp [x0]!, [x1]!, x2
+ cpyfp [x0]!, [x1]!, !x2
+ cpyfp [x0]!, [x1]!, [x2]
+ cpyfp [x0]!, [x1]!, [x2]!
+
+ cpyfp [x31]!, [x0]!, x1!
+ cpyfp [sp]!, [x0]!, x1!
+ cpyfp [zr]!, [x0]!, x1!
+ cpyfp [w30]!, [x0]!, x1!
+ cpyfp [w0]!, [x1]!, x2!
+ cpyfp [wsp]!, [x0]!, x1!
+ cpyfp [wzr]!, [x0]!, x1!
+ cpyfp [b0]!, [x1]!, x2!
+ cpyfp [h0]!, [x1]!, x2!
+ cpyfp [s0]!, [x1]!, x2!
+ cpyfp [d0]!, [x1]!, x2!
+ cpyfp [q0]!, [x1]!, x2!
+ cpyfp [v0]!, [x1]!, x2!
+ cpyfp [v0.2d]!, [x1]!, x2!
+ cpyfp [z0]!, [x1]!, x2!
+ cpyfp [z0.d]!, [x1]!, x2!
+ cpyfp [p0]!, [x1]!, x2!
+ cpyfp [p0.d]!, [x1]!, x2!
+ cpyfp [foo]!, [x1]!, x2!
+
+ cpyfp [x0]!, [x31]!, x1!
+ cpyfp [x0]!, [sp]!, x1!
+ cpyfp [x0]!, [zr]!, x1!
+ cpyfp [x0]!, [w30]!, x1!
+ cpyfp [x1]!, [w0]!, x2!
+ cpyfp [x0]!, [wsp]!, x1!
+ cpyfp [x0]!, [wzr]!, x1!
+ cpyfp [x1]!, [foo]!, x2!
+
+ cpyfp [x0]!, [x1]!, x31!
+ cpyfp [x0]!, [x1]!, sp!
+ cpyfp [x0]!, [x1]!, zr!
+ cpyfp [x0]!, [x1]!, w30!
+ cpyfp [x1]!, [x2]!, w0!
+ cpyfp [x0]!, [x1]!, wsp!
+ cpyfp [x0]!, [x1]!, wzr!
+ cpyfp [x1]!, [x2]!, foo!
+
+ cpyfp [x0]!, [x0]!, x1!
+ cpyfp [x10]!, [x1]!, x10!
+ cpyfp [x1]!, [x30]!, x30!
+
+ setp x0, x1!, x2
+ setp x0!, x1!, x2
+ setp [x0], x1!, x2
+ setp [x0, #0]!, x1!, x2
+ setp [x0, xzr]!, x1!, x2
+
+ setp [x31]!, x0!, x1
+ setp [sp]!, x0!, x1
+ setp [zr]!, x0!, x1
+ setp [w30]!, x0!, x1
+ setp [w0]!, x1!, x2
+ setp [wsp]!, x0!, x1
+ setp [wzr]!, x0!, x1
+ setp [foo]!, x1!, x2
+
+ setp [x0]!, x31!, x1
+ setp [x0]!, sp!, x1
+ setp [x0]!, zr!, x1
+ setp [x0]!, w30!, x1
+ setp [x1]!, w0!, x2
+ setp [x0]!, wsp!, x1
+ setp [x0]!, wzr!, x1
+ setp [x1]!, foo!, x2
+
+ setp [x30]!, x0!, sp
+ setp [x30]!, x0!, wsp
+ setp [x30]!, x0!, wzr
+
+ setp [x0]!, x0!, x1
+ setp [x10]!, x1!, x10
+ setp [x1]!, x30!, x30
+
+ .arch armv8.7-a
+
+ cpyfp [x0]!, [x1]!, x2!
+ cpyfm [x0]!, [x1]!, x2!
+ cpyfe [x0]!, [x1]!, x2!
+ cpyfprn [x0]!, [x1]!, x2!
+ cpyfmrn [x0]!, [x1]!, x2!
+ cpyfern [x0]!, [x1]!, x2!
+ cpyfpwn [x0]!, [x1]!, x2!
+ cpyfmwn [x0]!, [x1]!, x2!
+ cpyfewn [x0]!, [x1]!, x2!
+ cpyfpn [x0]!, [x1]!, x2!
+ cpyfmn [x0]!, [x1]!, x2!
+ cpyfen [x0]!, [x1]!, x2!
+ cpyfprt [x0]!, [x1]!, x2!
+ cpyfmrt [x0]!, [x1]!, x2!
+ cpyfert [x0]!, [x1]!, x2!
+ cpyfprtrn [x0]!, [x1]!, x2!
+ cpyfmrtrn [x0]!, [x1]!, x2!
+ cpyfertrn [x0]!, [x1]!, x2!
+ cpyfprtwn [x0]!, [x1]!, x2!
+ cpyfmrtwn [x0]!, [x1]!, x2!
+ cpyfertwn [x0]!, [x1]!, x2!
+ cpyfprtn [x0]!, [x1]!, x2!
+ cpyfmrtn [x0]!, [x1]!, x2!
+ cpyfertn [x0]!, [x1]!, x2!
+ cpyfpwt [x0]!, [x1]!, x2!
+ cpyfmwt [x0]!, [x1]!, x2!
+ cpyfewt [x0]!, [x1]!, x2!
+ cpyfpwtrn [x0]!, [x1]!, x2!
+ cpyfmwtrn [x0]!, [x1]!, x2!
+ cpyfewtrn [x0]!, [x1]!, x2!
+ cpyfpwtwn [x0]!, [x1]!, x2!
+ cpyfmwtwn [x0]!, [x1]!, x2!
+ cpyfewtwn [x0]!, [x1]!, x2!
+ cpyfpwtn [x0]!, [x1]!, x2!
+ cpyfmwtn [x0]!, [x1]!, x2!
+ cpyfewtn [x0]!, [x1]!, x2!
+ cpyfpt [x0]!, [x1]!, x2!
+ cpyfmt [x0]!, [x1]!, x2!
+ cpyfet [x0]!, [x1]!, x2!
+ cpyfptrn [x0]!, [x1]!, x2!
+ cpyfmtrn [x0]!, [x1]!, x2!
+ cpyfetrn [x0]!, [x1]!, x2!
+ cpyfptwn [x0]!, [x1]!, x2!
+ cpyfmtwn [x0]!, [x1]!, x2!
+ cpyfetwn [x0]!, [x1]!, x2!
+ cpyfptn [x0]!, [x1]!, x2!
+ cpyfmtn [x0]!, [x1]!, x2!
+ cpyfetn [x0]!, [x1]!, x2!
+
+ cpyp [x0]!, [x1]!, x2!
+ cpym [x0]!, [x1]!, x2!
+ cpye [x0]!, [x1]!, x2!
+ cpyprn [x0]!, [x1]!, x2!
+ cpymrn [x0]!, [x1]!, x2!
+ cpyern [x0]!, [x1]!, x2!
+ cpypwn [x0]!, [x1]!, x2!
+ cpymwn [x0]!, [x1]!, x2!
+ cpyewn [x0]!, [x1]!, x2!
+ cpypn [x0]!, [x1]!, x2!
+ cpymn [x0]!, [x1]!, x2!
+ cpyen [x0]!, [x1]!, x2!
+ cpyprt [x0]!, [x1]!, x2!
+ cpymrt [x0]!, [x1]!, x2!
+ cpyert [x0]!, [x1]!, x2!
+ cpyprtrn [x0]!, [x1]!, x2!
+ cpymrtrn [x0]!, [x1]!, x2!
+ cpyertrn [x0]!, [x1]!, x2!
+ cpyprtwn [x0]!, [x1]!, x2!
+ cpymrtwn [x0]!, [x1]!, x2!
+ cpyertwn [x0]!, [x1]!, x2!
+ cpyprtn [x0]!, [x1]!, x2!
+ cpymrtn [x0]!, [x1]!, x2!
+ cpyertn [x0]!, [x1]!, x2!
+ cpypwt [x0]!, [x1]!, x2!
+ cpymwt [x0]!, [x1]!, x2!
+ cpyewt [x0]!, [x1]!, x2!
+ cpypwtrn [x0]!, [x1]!, x2!
+ cpymwtrn [x0]!, [x1]!, x2!
+ cpyewtrn [x0]!, [x1]!, x2!
+ cpypwtwn [x0]!, [x1]!, x2!
+ cpymwtwn [x0]!, [x1]!, x2!
+ cpyewtwn [x0]!, [x1]!, x2!
+ cpypwtn [x0]!, [x1]!, x2!
+ cpymwtn [x0]!, [x1]!, x2!
+ cpyewtn [x0]!, [x1]!, x2!
+ cpypt [x0]!, [x1]!, x2!
+ cpymt [x0]!, [x1]!, x2!
+ cpyet [x0]!, [x1]!, x2!
+ cpyptrn [x0]!, [x1]!, x2!
+ cpymtrn [x0]!, [x1]!, x2!
+ cpyetrn [x0]!, [x1]!, x2!
+ cpyptwn [x0]!, [x1]!, x2!
+ cpymtwn [x0]!, [x1]!, x2!
+ cpyetwn [x0]!, [x1]!, x2!
+ cpyptn [x0]!, [x1]!, x2!
+ cpymtn [x0]!, [x1]!, x2!
+ cpyetn [x0]!, [x1]!, x2!
+
+ setp [x0]!, x1!, x2
+ setm [x0]!, x1!, x2
+ sete [x0]!, x1!, x2
+ setpt [x0]!, x1!, x2
+ setmt [x0]!, x1!, x2
+ setet [x0]!, x1!, x2
+ setpn [x0]!, x1!, x2
+ setmn [x0]!, x1!, x2
+ seten [x0]!, x1!, x2
+ setptn [x0]!, x1!, x2
+ setmtn [x0]!, x1!, x2
+ setetn [x0]!, x1!, x2
+
+ setgp [x0]!, x1!, x2
+ setgm [x0]!, x1!, x2
+ setge [x0]!, x1!, x2
+ setgpt [x0]!, x1!, x2
+ setgmt [x0]!, x1!, x2
+ setget [x0]!, x1!, x2
+ setgpn [x0]!, x1!, x2
+ setgmn [x0]!, x1!, x2
+ setgen [x0]!, x1!, x2
+ setgptn [x0]!, x1!, x2
+ setgmtn [x0]!, x1!, x2
+ setgetn [x0]!, x1!, x2
+
+ .arch armv8.7-a+mops
+
+ setgp [x0]!, x1!, x2
+ setgm [x0]!, x1!, x2
+ setge [x0]!, x1!, x2
+ setgpt [x0]!, x1!, x2
+ setgmt [x0]!, x1!, x2
+ setget [x0]!, x1!, x2
+ setgpn [x0]!, x1!, x2
+ setgmn [x0]!, x1!, x2
+ setgen [x0]!, x1!, x2
+ setgptn [x0]!, x1!, x2
+ setgmtn [x0]!, x1!, x2
+ setgetn [x0]!, x1!, x2
+
+ .arch armv8.7-a+memtag
+
+ setgp [x0]!, x1!, x2
+ setgm [x0]!, x1!, x2
+ setge [x0]!, x1!, x2
+ setgpt [x0]!, x1!, x2
+ setgmt [x0]!, x1!, x2
+ setget [x0]!, x1!, x2
+ setgpn [x0]!, x1!, x2
+ setgmn [x0]!, x1!, x2
+ setgen [x0]!, x1!, x2
+ setgptn [x0]!, x1!, x2
+ setgmtn [x0]!, x1!, x2
+ setgetn [x0]!, x1!, x2